WO2014041628A1 - Component-embedded substrate and method for producing same - Google Patents
Component-embedded substrate and method for producing same Download PDFInfo
- Publication number
- WO2014041628A1 WO2014041628A1 PCT/JP2012/073297 JP2012073297W WO2014041628A1 WO 2014041628 A1 WO2014041628 A1 WO 2014041628A1 JP 2012073297 W JP2012073297 W JP 2012073297W WO 2014041628 A1 WO2014041628 A1 WO 2014041628A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- component
- adhesive layer
- metal film
- electrode
- layer
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0152—Temporary metallic carrier, e.g. for transferring material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0392—Pretreatment of metal, e.g. before finish plating, etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to a component-embedded substrate and a manufacturing method thereof.
- a component-embedded substrate there are various methods for manufacturing a component-embedded substrate (see, for example, Patent Document 1).
- an adhesive layer is formed on a copper foil by a dispenser or a printing method, a component to be incorporated is mounted thereon, the adhesive layer is cured, and the component is fixed.
- the component is embedded in the insulating material, and a via that reaches the terminal of the component from the outside is formed by laser processing.
- the via is plated to form a conductive via so as to be electrically connected to the terminal.
- the electrode of the terminal which these components have is formed with the copper electrode by which the copper plating was given. After the via is formed, the copper portion is melted by slightly soft-etching the copper electrode.
- the copper electrode is formed by a different manufacturing process for each part. Yes.
- the etching rate differs for each copper electrode of the component, and even if the board manufacturer performs soft etching processing under the same conditions, the dissolved thickness of the copper electrode will differ, so the connection reliability between the board wiring and the copper electrode will be defective It is feared that this will occur.
- the present invention takes the above-mentioned conventional technology into consideration, and even when a plurality of types of electrical or electronic components are incorporated, a component-embedded substrate that can align the melt thickness of the copper electrode by the soft etching process And it aims at providing the manufacturing method.
- the component-embedded substrate comprising: an electrode comprising: an insulating layer made of an insulating material that embeds the component; and a conductive portion that penetrates the adhesive layer and electrically connects the conductor pattern and the electrode.
- a part group consisting of a plurality of types of parts is embedded in the insulating layer, the electrode is coated with a metal metal film, and the conductive portion is formed so as to penetrate into the metal film.
- a component-embedded substrate in which all of the metal films of the electrodes of the component included have the same or an etching rate of 1 ⁇ m / min to 2 ⁇ m / min.
- the components forming the component group are capacitors, resistors, inductors, and active components.
- an adhesive layer forming step of forming a plurality of adhesive layers made of an insulating material corresponding to the components on a metal layer formed on a support plate, and a component on which the component group is mounted on the adhesive layer A group mounting step, a stacking step of stacking the insulating material on the component group and embedding the component in the insulating layer, removing the support plate, penetrating the metal layer and the adhesive layer, A via forming step of forming a plurality of vias reaching each of the electrodes included in the component forming a component group; and melting the metal film exposed to the via and extending the via into the metal film
- Built-in component comprising: a soft etching step for forming, a plating step for depositing plating on the surface of the via to form the conductive portion, and a pattern forming step for forming a conductor pattern including the metal layer substrate
- the manufacturing method for providing comprising: a soft etching step for forming, a plating step for depositing plating on the
- the built-in component group includes a plurality of types of components.
- a part has an electrode coated with a metal film such as copper by plating, for example, the metal film is partly soft etched to improve the connection reliability with the conductor pattern by the conductive part. Dissolve by processing. Since this soft etching process is performed on the metal film of each component by the substrate manufacturer under the same conditions, the dissolved thickness of the metal film differs if the etching rate of each metal film is different. For this reason, there is a concern that the connection reliability between the substrate wiring and the electrode may cause a problem.
- an adhesive layer forming step is performed.
- a substrate in which a metal layer 12 is formed on a support plate 11 is prepared.
- the support plate 11 has a degree of rigidity required for process conditions.
- the support plate 11 is formed of a rigid SUS (stainless steel) plate or aluminum plate as a support device.
- the metal layer 12 is formed by depositing a copper plating foil having a predetermined thickness.
- the metal layer 12 is formed by attaching a copper foil if the support plate 11 is an aluminum plate.
- the adhesive layer 10 is applied onto the metal layer 12 with an adhesive made of an insulating material, for example, by a dispenser or printing. That is, the adhesive layer 10 is bonded to the metal layer 12.
- a component group mounting process is performed.
- a component-embedded substrate in which a plurality of types of electrical or electronic components 3 are built is used as a reference.
- This component mounting step is a step of mounting the electronic or electrical component 3 on the adhesive layer 10.
- the mounted component 3 includes an active component and a passive component.
- the component 3 has a component main body 3a and an electrode 3b.
- the electrode 3b is bonded to an adhesive that forms the adhesive layer 10. That is, in the component mounting process, the component 3 is mounted with the electrode 3 b aligned with the position of the adhesive layer 10.
- the laminating step is for laminating an insulating material to be the insulating layer 2 on the component 3 and embedding the component 3 in the insulating material.
- This step is performed by laying up an insulating material such as a prepreg on the side opposite to the side on which the metal layer 12 is disposed with respect to the component 3 and pressing it while heating under vacuum.
- This press is performed using, for example, a vacuum press machine. Note that it is preferable to use an insulating material having a thermal expansion coefficient close to that of the component 3.
- Another metal layer 4 is formed on the surface opposite to the metal layer 12 with the insulating layer 2 interposed therebetween.
- a via formation process is performed.
- the support plate 11 is removed.
- the metal layer 12 is exposed on one surface of the insulating layer 2.
- drilling is performed using a laser or the like to form the via 13.
- the via 13 is formed so as to reach the surface of the electrode 3 b from the metal layer 12 through the adhesive layer 10.
- through conduction holes or other conduction vias may be formed at this point in order to obtain electrical connection between each layer or front and back.
- a desmear process is performed to remove the resin remaining during the via formation.
- the electrode 3b described above is formed of a central portion 8 serving as a base and a metal film 9 covering the central portion 8.
- the metal film 9 made of copper is formed by plating the central portion 8 formed of nickel, silver, sintered copper, or the like.
- the thickness of the metal film 9 is 5 ⁇ m to 15 ⁇ m, but most is 5 ⁇ m to 10 ⁇ m.
- the soft etching process the metal film 9 exposed at the bottom of the via 13 is dissolved to extend the via 13 into the metal film 9.
- the soft etching process is performed by using a chemical solution such as sodium persulfate or potassium persulfate and slightly dissolving the metal film 9.
- a plating process and a pattern forming process are performed.
- a plating process (conducting process) is performed, and copper is deposited in the via 13 to form the conductive via 7.
- the conductor pattern 6 is formed on both surfaces of the insulating layer 2 using etching or the like.
- the component-embedded substrate 1 obtained through such a process includes an insulating layer 2, a component 3, a conductor pattern 6, an adhesive layer 10, and a conductive via 7.
- the insulating layer 2 is obtained by curing the above-described insulating material (such as a prepreg), and the component 3 is connected to the conductor pattern 6 via the adhesive layer 10.
- the conductor pattern 6 is formed on the surface of the insulating layer 2.
- the present invention is premised on being applied to a component-embedded substrate 15 in which a component group 14 composed of a plurality of types of components 3 is embedded in an insulating layer 2 as shown in FIG.
- the components 3 constituting the component group 14 here are a capacitor 16, a resistor 17, an inductor 18, and an active component 19.
- FIG. 8 shows a state after the end of the soft etching process when such a component group 14 is embedded.
- vias are formed with a laser and soft etching is performed after desmearing. If multiple types of parts 16 to 19 are embedded in this way, the manufacturer that manufactures each part.
- the etching rate is often different for each metal film 9 of the electrode film, such as different from each other, or even from the same manufacturer with different establishments. For this reason, even if the substrate manufacturer performs the soft etching process under the same conditions, the dissolved thickness of the metal film 9 is different, and there is a concern that the connection reliability between the conductor pattern 6 and the electrode 3b may be defective. However, since the etching rates of the components 16 to 19 forming the component group 14 embedded in the component-embedded substrate 15 according to the present invention are all the same, even if the substrate manufacturer performs the soft etching process under the same conditions, The metal film 9 is similarly dissolved by the electrode 3b.
- the metal film 9 is 8 ⁇ m
- the etching rate of the metal film 9 of the parts 16 to 19 is made uniform at 2 ⁇ m / min, then 5 ⁇ m will be dissolved if the substrate manufacturer performs the soft etching process for 2.5 minutes.
- the metal film 9 is exposed to a fresh surface. That is, the via 13 is formed so as to enter the metal film 9. Thereby, the metal film 9 in the same dissolved state can be efficiently obtained without exposing the central portion 8.
- the substrate maker can achieve the standardization so that the etching rates are uniform for each of the component manufacturers of the components 16-19.
- FIG. 9 shows the relationship between the etching time and the etching amount depending on the etching rate.
- a solid line A indicates a case where the etching rate is 2 ⁇ m
- a broken line B indicates a case where the etching rate is 4 ⁇ m.
- the soft etching time needs to be at least 1.5 minutes considering the entry of the chemical into the via bottom. Usually it takes 2.5 minutes. Since the metal film is often 8 ⁇ m, if the etching rate is 4 ⁇ m, it will dissolve 10 ⁇ m in 2.5 minutes, and this will expose the central part of nickel or the like.
- the etching rate is 2 ⁇ m
- the etching amount is 5 ⁇ m even after 2.5 minutes, so that the metal film with a thickness of 8 ⁇ m remains 3 ⁇ m. Therefore, adjusting the etching rate according to the thickness of the metal film is very useful for the substrate manufacturing process when a large number of components are incorporated. The applicant has confirmed that an etching rate of 1 ⁇ m / min or more is sufficiently practical.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
2 絶縁層
3 電気又は電子的な部品
3a 部品本体
3b 電極
4 金属層
6 導体パターン
7 導通ビア
8 中心部
9 金属膜
10 接着層
11 支持板
12 金属層
13 ビア
14 部品群
15 部品内蔵基板
16 コンデンサ
17 抵抗器
18 インダクタ
19 能動部品 DESCRIPTION OF
Claims (3)
- 基板表面に形成された導体パターンと、
該導体パターンの内側に形成された接着層と、
該接着層と接着する電気又は電子的な部品と、
該部品が有する電極と、
前記部品を埋設する絶縁材からなる絶縁層と、
前記接着層を貫通し、前記導体パターンと前記電極とを電気的に接続する導通部と
を備えた部品内蔵基板において、
前記絶縁層には、複数種類の前記部品からなる部品群が埋設され、
前記電極は、金属製の金属膜で被膜され、
前記導通部は、前記金属膜内に入り込んで形成され、
前記部品群に含まれる前記部品の前記電極が有する前記金属膜は、全て同一又は1μm/分~2μm/分のエッチングレートを有していることを特徴とする部品内蔵基板。 A conductor pattern formed on the substrate surface;
An adhesive layer formed inside the conductor pattern;
An electrical or electronic component that adheres to the adhesive layer;
An electrode of the component;
An insulating layer made of an insulating material for embedding the component;
In the component-embedded substrate that includes a conductive portion that penetrates the adhesive layer and electrically connects the conductor pattern and the electrode,
In the insulating layer, a component group consisting of a plurality of types of the components is embedded,
The electrode is coated with a metallic metal film,
The conduction part is formed so as to enter the metal film,
The component-embedded substrate, wherein all of the metal films of the electrodes of the component included in the component group have the same or an etching rate of 1 μm / min to 2 μm / min. - 前記部品群を形成する前記部品は、コンデンサ、抵抗器、インダクタ及び能動部品であることを特徴とする請求項1に記載の部品内蔵基板。 2. The component built-in board according to claim 1, wherein the components forming the component group are a capacitor, a resistor, an inductor, and an active component.
- 支持板上に形成された金属層に絶縁材料からなる前記接着層を前記部品に対応して複数形成する接着層形成工程と、
前記接着層に前記部品群を搭載する部品群搭載工程と、
前記部品群に対して前記絶縁材を積層して前記絶縁層内に前記部品を埋設する積層工程と、
前記支持板を除去し、前記金属層及び前記接着層を貫通し前記部品群を形成する前記部品が有するそれぞれの前記電極まで到達するビアを複数形成するビア形成工程と、
前記ビアに露出している前記金属膜を溶解して前記ビアを前記金属膜内に延設するソフトエッチング工程と、
前記ビアの表面にめっきを析出させて前記導通部を形成するめっき工程と、
前記金属層を含む導体パターンを形成するパターン形成工程と
を備えたことを特徴とする請求項1に記載の部品内蔵基板の製造方法。 An adhesive layer forming step of forming a plurality of the adhesive layers made of an insulating material on the metal layer formed on the support plate corresponding to the component;
A component group mounting step of mounting the component group on the adhesive layer;
A stacking step of stacking the insulating material on the component group and embedding the component in the insulating layer;
A via forming step of removing the support plate and forming a plurality of vias that reach each of the electrodes of the component that penetrates the metal layer and the adhesive layer to form the component group;
A soft etching step of dissolving the metal film exposed in the via and extending the via into the metal film;
A plating step of depositing plating on the surface of the via to form the conductive portion;
The method for manufacturing a component-embedded board according to claim 1, further comprising a pattern forming step of forming a conductor pattern including the metal layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2012/073297 WO2014041628A1 (en) | 2012-09-12 | 2012-09-12 | Component-embedded substrate and method for producing same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2012/073297 WO2014041628A1 (en) | 2012-09-12 | 2012-09-12 | Component-embedded substrate and method for producing same |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2014041628A1 true WO2014041628A1 (en) | 2014-03-20 |
Family
ID=50277786
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2012/073297 WO2014041628A1 (en) | 2012-09-12 | 2012-09-12 | Component-embedded substrate and method for producing same |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2014041628A1 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11261216A (en) * | 1998-03-09 | 1999-09-24 | Ibiden Co Ltd | Printed wiring board and its manufacture |
JP2002100870A (en) * | 1999-09-02 | 2002-04-05 | Ibiden Co Ltd | Printed wiring board and manufacturing method thereof |
JP2006523375A (en) * | 2003-04-01 | 2006-10-12 | イムベラ エレクトロニクス オサケユキチュア | Electronic module manufacturing method and electronic module |
-
2012
- 2012-09-12 WO PCT/JP2012/073297 patent/WO2014041628A1/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11261216A (en) * | 1998-03-09 | 1999-09-24 | Ibiden Co Ltd | Printed wiring board and its manufacture |
JP2002100870A (en) * | 1999-09-02 | 2002-04-05 | Ibiden Co Ltd | Printed wiring board and manufacturing method thereof |
JP2006523375A (en) * | 2003-04-01 | 2006-10-12 | イムベラ エレクトロニクス オサケユキチュア | Electronic module manufacturing method and electronic module |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6795137B2 (en) | Manufacturing method of printed circuit board with built-in electronic elements | |
JP6262153B2 (en) | Manufacturing method of component-embedded substrate | |
JP2013211519A (en) | Method for manufacturing multilayer wiring board | |
JP2013211518A (en) | Multilayer wiring board and manufacturing method of the same | |
JP6084283B2 (en) | Component built-in substrate and manufacturing method thereof | |
JP2013183029A (en) | Electronic component built-in wiring board and manufacturing method of the same | |
KR100782404B1 (en) | Printed circuit board and manufacturing method thereof | |
KR100752017B1 (en) | Manufacturing Method of Printed Circuit Board | |
KR20150083424A (en) | Method for manufacturing wiring board | |
JP5695205B2 (en) | Manufacturing method of component-embedded substrate and component-embedded substrate using the same | |
JP2009010266A (en) | Printed circuit board and method of manufacturing same | |
JP6058321B2 (en) | Wiring board manufacturing method | |
JP6073339B2 (en) | Manufacturing method of component-embedded substrate and component-embedded substrate using the same | |
WO2014041628A1 (en) | Component-embedded substrate and method for producing same | |
JP4492071B2 (en) | Wiring board manufacturing method | |
JP4019717B2 (en) | Component built-in multilayer wiring module substrate and manufacturing method thereof | |
WO2014041697A1 (en) | Embedded component substrate and method for manufacturing same | |
JP5409480B2 (en) | Wiring board manufacturing method | |
JP2014192224A (en) | Method for manufacturing wiring board | |
WO2019130496A1 (en) | Laminated body and method for manufacturing same | |
JP2009290233A (en) | Wiring substrate and method for manufacturing the same | |
JP2007311466A (en) | Multilayer printed wiring board, and its manufacturing method | |
WO2012164720A1 (en) | Substrate with built-in component, and method for producing said substrate | |
JP2016092229A (en) | Multilayer substrate and manufacturing method thereof | |
JP2013247306A (en) | Manufacturing method of wiring board |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 12884648 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 12884648 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: JP |
|
REG | Reference to national code |
Ref country code: BR Ref legal event code: B01A Ref document number: 112015005563 Country of ref document: BR |
|
ENP | Entry into the national phase |
Ref document number: 112015005563 Country of ref document: BR Kind code of ref document: A2 Effective date: 20150312 |