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WO2014041628A1 - Component-embedded substrate and method for producing same - Google Patents

Component-embedded substrate and method for producing same Download PDF

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Publication number
WO2014041628A1
WO2014041628A1 PCT/JP2012/073297 JP2012073297W WO2014041628A1 WO 2014041628 A1 WO2014041628 A1 WO 2014041628A1 JP 2012073297 W JP2012073297 W JP 2012073297W WO 2014041628 A1 WO2014041628 A1 WO 2014041628A1
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WO
WIPO (PCT)
Prior art keywords
component
adhesive layer
metal film
electrode
layer
Prior art date
Application number
PCT/JP2012/073297
Other languages
French (fr)
Japanese (ja)
Inventor
琢哉 長谷川
知之 長田
光昭 戸田
Original Assignee
株式会社メイコー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 株式会社メイコー filed Critical 株式会社メイコー
Priority to PCT/JP2012/073297 priority Critical patent/WO2014041628A1/en
Publication of WO2014041628A1 publication Critical patent/WO2014041628A1/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92142Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92144Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01Tools for processing; Objects used during processing
    • H05K2203/0147Carriers and holders
    • H05K2203/0152Temporary metallic carrier, e.g. for transferring material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0392Pretreatment of metal, e.g. before finish plating, etching
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a component-embedded substrate and a manufacturing method thereof.
  • a component-embedded substrate there are various methods for manufacturing a component-embedded substrate (see, for example, Patent Document 1).
  • an adhesive layer is formed on a copper foil by a dispenser or a printing method, a component to be incorporated is mounted thereon, the adhesive layer is cured, and the component is fixed.
  • the component is embedded in the insulating material, and a via that reaches the terminal of the component from the outside is formed by laser processing.
  • the via is plated to form a conductive via so as to be electrically connected to the terminal.
  • the electrode of the terminal which these components have is formed with the copper electrode by which the copper plating was given. After the via is formed, the copper portion is melted by slightly soft-etching the copper electrode.
  • the copper electrode is formed by a different manufacturing process for each part. Yes.
  • the etching rate differs for each copper electrode of the component, and even if the board manufacturer performs soft etching processing under the same conditions, the dissolved thickness of the copper electrode will differ, so the connection reliability between the board wiring and the copper electrode will be defective It is feared that this will occur.
  • the present invention takes the above-mentioned conventional technology into consideration, and even when a plurality of types of electrical or electronic components are incorporated, a component-embedded substrate that can align the melt thickness of the copper electrode by the soft etching process And it aims at providing the manufacturing method.
  • the component-embedded substrate comprising: an electrode comprising: an insulating layer made of an insulating material that embeds the component; and a conductive portion that penetrates the adhesive layer and electrically connects the conductor pattern and the electrode.
  • a part group consisting of a plurality of types of parts is embedded in the insulating layer, the electrode is coated with a metal metal film, and the conductive portion is formed so as to penetrate into the metal film.
  • a component-embedded substrate in which all of the metal films of the electrodes of the component included have the same or an etching rate of 1 ⁇ m / min to 2 ⁇ m / min.
  • the components forming the component group are capacitors, resistors, inductors, and active components.
  • an adhesive layer forming step of forming a plurality of adhesive layers made of an insulating material corresponding to the components on a metal layer formed on a support plate, and a component on which the component group is mounted on the adhesive layer A group mounting step, a stacking step of stacking the insulating material on the component group and embedding the component in the insulating layer, removing the support plate, penetrating the metal layer and the adhesive layer, A via forming step of forming a plurality of vias reaching each of the electrodes included in the component forming a component group; and melting the metal film exposed to the via and extending the via into the metal film
  • Built-in component comprising: a soft etching step for forming, a plating step for depositing plating on the surface of the via to form the conductive portion, and a pattern forming step for forming a conductor pattern including the metal layer substrate
  • the manufacturing method for providing comprising: a soft etching step for forming, a plating step for depositing plating on the
  • the built-in component group includes a plurality of types of components.
  • a part has an electrode coated with a metal film such as copper by plating, for example, the metal film is partly soft etched to improve the connection reliability with the conductor pattern by the conductive part. Dissolve by processing. Since this soft etching process is performed on the metal film of each component by the substrate manufacturer under the same conditions, the dissolved thickness of the metal film differs if the etching rate of each metal film is different. For this reason, there is a concern that the connection reliability between the substrate wiring and the electrode may cause a problem.
  • an adhesive layer forming step is performed.
  • a substrate in which a metal layer 12 is formed on a support plate 11 is prepared.
  • the support plate 11 has a degree of rigidity required for process conditions.
  • the support plate 11 is formed of a rigid SUS (stainless steel) plate or aluminum plate as a support device.
  • the metal layer 12 is formed by depositing a copper plating foil having a predetermined thickness.
  • the metal layer 12 is formed by attaching a copper foil if the support plate 11 is an aluminum plate.
  • the adhesive layer 10 is applied onto the metal layer 12 with an adhesive made of an insulating material, for example, by a dispenser or printing. That is, the adhesive layer 10 is bonded to the metal layer 12.
  • a component group mounting process is performed.
  • a component-embedded substrate in which a plurality of types of electrical or electronic components 3 are built is used as a reference.
  • This component mounting step is a step of mounting the electronic or electrical component 3 on the adhesive layer 10.
  • the mounted component 3 includes an active component and a passive component.
  • the component 3 has a component main body 3a and an electrode 3b.
  • the electrode 3b is bonded to an adhesive that forms the adhesive layer 10. That is, in the component mounting process, the component 3 is mounted with the electrode 3 b aligned with the position of the adhesive layer 10.
  • the laminating step is for laminating an insulating material to be the insulating layer 2 on the component 3 and embedding the component 3 in the insulating material.
  • This step is performed by laying up an insulating material such as a prepreg on the side opposite to the side on which the metal layer 12 is disposed with respect to the component 3 and pressing it while heating under vacuum.
  • This press is performed using, for example, a vacuum press machine. Note that it is preferable to use an insulating material having a thermal expansion coefficient close to that of the component 3.
  • Another metal layer 4 is formed on the surface opposite to the metal layer 12 with the insulating layer 2 interposed therebetween.
  • a via formation process is performed.
  • the support plate 11 is removed.
  • the metal layer 12 is exposed on one surface of the insulating layer 2.
  • drilling is performed using a laser or the like to form the via 13.
  • the via 13 is formed so as to reach the surface of the electrode 3 b from the metal layer 12 through the adhesive layer 10.
  • through conduction holes or other conduction vias may be formed at this point in order to obtain electrical connection between each layer or front and back.
  • a desmear process is performed to remove the resin remaining during the via formation.
  • the electrode 3b described above is formed of a central portion 8 serving as a base and a metal film 9 covering the central portion 8.
  • the metal film 9 made of copper is formed by plating the central portion 8 formed of nickel, silver, sintered copper, or the like.
  • the thickness of the metal film 9 is 5 ⁇ m to 15 ⁇ m, but most is 5 ⁇ m to 10 ⁇ m.
  • the soft etching process the metal film 9 exposed at the bottom of the via 13 is dissolved to extend the via 13 into the metal film 9.
  • the soft etching process is performed by using a chemical solution such as sodium persulfate or potassium persulfate and slightly dissolving the metal film 9.
  • a plating process and a pattern forming process are performed.
  • a plating process (conducting process) is performed, and copper is deposited in the via 13 to form the conductive via 7.
  • the conductor pattern 6 is formed on both surfaces of the insulating layer 2 using etching or the like.
  • the component-embedded substrate 1 obtained through such a process includes an insulating layer 2, a component 3, a conductor pattern 6, an adhesive layer 10, and a conductive via 7.
  • the insulating layer 2 is obtained by curing the above-described insulating material (such as a prepreg), and the component 3 is connected to the conductor pattern 6 via the adhesive layer 10.
  • the conductor pattern 6 is formed on the surface of the insulating layer 2.
  • the present invention is premised on being applied to a component-embedded substrate 15 in which a component group 14 composed of a plurality of types of components 3 is embedded in an insulating layer 2 as shown in FIG.
  • the components 3 constituting the component group 14 here are a capacitor 16, a resistor 17, an inductor 18, and an active component 19.
  • FIG. 8 shows a state after the end of the soft etching process when such a component group 14 is embedded.
  • vias are formed with a laser and soft etching is performed after desmearing. If multiple types of parts 16 to 19 are embedded in this way, the manufacturer that manufactures each part.
  • the etching rate is often different for each metal film 9 of the electrode film, such as different from each other, or even from the same manufacturer with different establishments. For this reason, even if the substrate manufacturer performs the soft etching process under the same conditions, the dissolved thickness of the metal film 9 is different, and there is a concern that the connection reliability between the conductor pattern 6 and the electrode 3b may be defective. However, since the etching rates of the components 16 to 19 forming the component group 14 embedded in the component-embedded substrate 15 according to the present invention are all the same, even if the substrate manufacturer performs the soft etching process under the same conditions, The metal film 9 is similarly dissolved by the electrode 3b.
  • the metal film 9 is 8 ⁇ m
  • the etching rate of the metal film 9 of the parts 16 to 19 is made uniform at 2 ⁇ m / min, then 5 ⁇ m will be dissolved if the substrate manufacturer performs the soft etching process for 2.5 minutes.
  • the metal film 9 is exposed to a fresh surface. That is, the via 13 is formed so as to enter the metal film 9. Thereby, the metal film 9 in the same dissolved state can be efficiently obtained without exposing the central portion 8.
  • the substrate maker can achieve the standardization so that the etching rates are uniform for each of the component manufacturers of the components 16-19.
  • FIG. 9 shows the relationship between the etching time and the etching amount depending on the etching rate.
  • a solid line A indicates a case where the etching rate is 2 ⁇ m
  • a broken line B indicates a case where the etching rate is 4 ⁇ m.
  • the soft etching time needs to be at least 1.5 minutes considering the entry of the chemical into the via bottom. Usually it takes 2.5 minutes. Since the metal film is often 8 ⁇ m, if the etching rate is 4 ⁇ m, it will dissolve 10 ⁇ m in 2.5 minutes, and this will expose the central part of nickel or the like.
  • the etching rate is 2 ⁇ m
  • the etching amount is 5 ⁇ m even after 2.5 minutes, so that the metal film with a thickness of 8 ⁇ m remains 3 ⁇ m. Therefore, adjusting the etching rate according to the thickness of the metal film is very useful for the substrate manufacturing process when a large number of components are incorporated. The applicant has confirmed that an etching rate of 1 ⁇ m / min or more is sufficiently practical.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

This component-embedded substrate (15) comprises: a conductor pattern formed on the surface of a substrate; an adhesive layer (10) formed on the inner side of the conductor pattern; an electric or electronic component (3) that adheres to the adhesive layer (10); an electrode (3a) of the component (3); an insulating layer (2) made of an insulating material in which the component (3) is embedded; and a conduction section that penetrates the adhesive layer (10) and electrically connects the conductor pattern and the electrode (3a). A component group (16-20) including a plurality of types of said components (3) is embedded in the insulating layer (2). Each said electrode (3a) is covered with a metal-made metal film. Each said conduction section is formed so as to enter the metal film. The metal films on the respective electrodes (3a) of the respective components (3) included in the component group (16-20) all have the same etching rate or each have an etching rate of from 1 µm/minute to 2 µm/minute.

Description

部品内蔵基板及びその製造方法Component built-in substrate and manufacturing method thereof
 本発明は、部品内蔵基板及びその製造方法に関する。 The present invention relates to a component-embedded substrate and a manufacturing method thereof.
 部品内蔵基板の製造方法としては、種々の方法がある(例えば特許文献1参照)。この方法は、銅箔上へディスペンサー又は印刷工法により接着層を形成し、その上に内蔵すべき部品を搭載し、接着層を硬化して部品を固定するものである。そして、積層プレスにより、部品を絶縁材内に埋め込み、外側から部品の端子に到達するようなビアをレーザ加工により形成する。そして、このビアにめっき加工を施して導通ビアとし、端子との電気的接続を図っている。 There are various methods for manufacturing a component-embedded substrate (see, for example, Patent Document 1). In this method, an adhesive layer is formed on a copper foil by a dispenser or a printing method, a component to be incorporated is mounted thereon, the adhesive layer is cured, and the component is fixed. Then, by laminating press, the component is embedded in the insulating material, and a via that reaches the terminal of the component from the outside is formed by laser processing. Then, the via is plated to form a conductive via so as to be electrically connected to the terminal.
 近年、内蔵される部品の多様化が進み、様々な種類の電気又は電子的な部品が用いられている。これらの部品が有する端子の電極は銅めっきが施された銅電極で形成されている。ビアを形成した後、この銅電極をわずかにソフトエッチング処理することで銅の部分を溶かしている。 In recent years, diversification of built-in parts has progressed, and various types of electrical or electronic parts have been used. The electrode of the terminal which these components have is formed with the copper electrode by which the copper plating was given. After the via is formed, the copper portion is melted by slightly soft-etching the copper electrode.
 しかしながら、種々の部品を内蔵する場合、これらの部品のメーカーが異なっていたり、同じメーカーでも製造する事業所が異なっていたりするため、銅電極はそれぞれの部品ごとに異なった製造プロセスで形成されている。これにより部品の銅電極ごとにエッチングレートが異なり、基板メーカーが同一条件でソフトエッチング処理をしても銅電極の溶解厚さが異なってしまうので、基板配線と銅電極との接続信頼性に不具合を生じることが懸念される。 However, when various parts are built in, the manufacturers of these parts are different, or even the same manufacturer manufactures different offices. Therefore, the copper electrode is formed by a different manufacturing process for each part. Yes. As a result, the etching rate differs for each copper electrode of the component, and even if the board manufacturer performs soft etching processing under the same conditions, the dissolved thickness of the copper electrode will differ, so the connection reliability between the board wiring and the copper electrode will be defective It is feared that this will occur.
特開2010-27917号公報JP 2010-27917 A
 本発明は、上記従来技術を考慮したものであり、複数種類の電気又は電子的な部品を内蔵する場合であっても、ソフトエッチング処理による銅電極の溶解厚さを揃えることができる部品内蔵基板及びその製造方法を提供することを目的とする。 The present invention takes the above-mentioned conventional technology into consideration, and even when a plurality of types of electrical or electronic components are incorporated, a component-embedded substrate that can align the melt thickness of the copper electrode by the soft etching process And it aims at providing the manufacturing method.
 前記目的を達成するため、本発明では、基板表面に形成された導体パターンと、該導体パターンの内側に形成された接着層と、該接着層と接着する電気又は電子的な部品と、該部品が有する電極と、前記部品を埋設する絶縁材からなる絶縁層と、前記接着層を貫通し、前記導体パターンと前記電極とを電気的に接続する導通部とを備えた部品内蔵基板において、前記絶縁層には、複数種類の前記部品からなる部品群が埋設され、前記電極は、金属製の金属膜で被膜され、前記導通部は、前記金属膜内に入り込んで形成され、前記部品群に含まれる前記部品の前記電極が有する前記金属膜は、全て同一又は1μm/分~2μm/分のエッチングレートを有していることを特徴とする部品内蔵基板を提供する。 In order to achieve the object, in the present invention, a conductor pattern formed on a substrate surface, an adhesive layer formed inside the conductor pattern, an electrical or electronic component that adheres to the adhesive layer, and the component In the component-embedded substrate, comprising: an electrode comprising: an insulating layer made of an insulating material that embeds the component; and a conductive portion that penetrates the adhesive layer and electrically connects the conductor pattern and the electrode. A part group consisting of a plurality of types of parts is embedded in the insulating layer, the electrode is coated with a metal metal film, and the conductive portion is formed so as to penetrate into the metal film. Provided is a component-embedded substrate in which all of the metal films of the electrodes of the component included have the same or an etching rate of 1 μm / min to 2 μm / min.
 好ましくは、前記部品群を形成する前記部品は、コンデンサ、抵抗器、インダクタ及び能動部品である。 Preferably, the components forming the component group are capacitors, resistors, inductors, and active components.
 また、本発明では、支持板上に形成された金属層に絶縁材料からなる前記接着層を前記部品に対応して複数形成する接着層形成工程と、前記接着層に前記部品群を搭載する部品群搭載工程と、前記部品群に対して前記絶縁材を積層して前記絶縁層内に前記部品を埋設する積層工程と、前記支持板を除去し、前記金属層及び前記接着層を貫通し前記部品群を形成する前記部品が有するそれぞれの前記電極まで到達するビアを複数形成するビア形成工程と、前記ビアに露出している前記金属膜を溶解して前記ビアを前記金属膜内に延設するソフトエッチング工程と、前記ビアの表面にめっきを析出させて前記導通部を形成するめっき工程と、前記金属層を含む導体パターンを形成するパターン形成工程とを備えたことを特徴とする部品内蔵基板の製造方法も提供する。 In the present invention, an adhesive layer forming step of forming a plurality of adhesive layers made of an insulating material corresponding to the components on a metal layer formed on a support plate, and a component on which the component group is mounted on the adhesive layer A group mounting step, a stacking step of stacking the insulating material on the component group and embedding the component in the insulating layer, removing the support plate, penetrating the metal layer and the adhesive layer, A via forming step of forming a plurality of vias reaching each of the electrodes included in the component forming a component group; and melting the metal film exposed to the via and extending the via into the metal film Built-in component comprising: a soft etching step for forming, a plating step for depositing plating on the surface of the via to form the conductive portion, and a pattern forming step for forming a conductor pattern including the metal layer substrate The manufacturing method for providing.
 本発明によれば、内蔵される部品群には複数種類からなる部品が含まれている。このような部品が例えばめっき処理にて銅のような金属膜で皮膜された電極を有している場合、導通部による導体パターンとの接続信頼性を向上させるために金属膜を一部ソフトエッチング処理にて溶解させる。このソフトエッチング処理は基板メーカーが同一条件で各部品の金属膜に対して行うため、各金属膜が有するエッチングレートが異なると、金属膜の溶解厚さが異なってしまう。このため、基板配線と電極との接続信頼性に不具合を生じることが懸念されてしまうが、部品群に含まれる部品の電極が有する金属膜が全て同一のエッチングレートであるため、全ての金属膜において同一深さの溝を形成することができる。このため、基板全体としての導体パターンと部品との接続信頼性が向上する。 According to the present invention, the built-in component group includes a plurality of types of components. When such a part has an electrode coated with a metal film such as copper by plating, for example, the metal film is partly soft etched to improve the connection reliability with the conductor pattern by the conductive part. Dissolve by processing. Since this soft etching process is performed on the metal film of each component by the substrate manufacturer under the same conditions, the dissolved thickness of the metal film differs if the etching rate of each metal film is different. For this reason, there is a concern that the connection reliability between the substrate wiring and the electrode may cause a problem. However, since all the metal films of the electrodes of the components included in the component group have the same etching rate, all the metal films In this case, grooves having the same depth can be formed. For this reason, the connection reliability of the conductor pattern and the component as the whole substrate is improved.
本発明に係る部品内蔵基板の製造方法を順番に説明するための概略図である。It is the schematic for demonstrating in order the manufacturing method of the component built-in board which concerns on this invention. 本発明に係る部品内蔵基板の製造方法を順番に説明するための概略図である。It is the schematic for demonstrating in order the manufacturing method of the component built-in board which concerns on this invention. 本発明に係る部品内蔵基板の製造方法を順番に説明するための概略図である。It is the schematic for demonstrating in order the manufacturing method of the component built-in board which concerns on this invention. 本発明に係る部品内蔵基板の製造方法を順番に説明するための概略図である。It is the schematic for demonstrating in order the manufacturing method of the component built-in board which concerns on this invention. 本発明に係る部品内蔵基板の製造方法を順番に説明するための概略図である。It is the schematic for demonstrating in order the manufacturing method of the component built-in board which concerns on this invention. 本発明に係る部品内蔵基板の製造方法を順番に説明するための概略図である。It is the schematic for demonstrating in order the manufacturing method of the component built-in board which concerns on this invention. 本発明に係る部品内蔵基板の製造方法を順番に説明するための概略図である。It is the schematic for demonstrating in order the manufacturing method of the component built-in board which concerns on this invention. 本発明に係る部品内蔵基板の概略図である。1 is a schematic view of a component built-in substrate according to the present invention. エッチングレートを示すグラフである。It is a graph which shows an etching rate.
 本発明に係る部品内蔵基板の製造方法が適用される基本的な構成を図1~図7を用いて説明する。 A basic configuration to which the method for manufacturing a component-embedded substrate according to the present invention is applied will be described with reference to FIGS.
 まず、図1及び図2に示すように、接着層形成工程を行う。この工程は、まず、図1に示すように、例えば支持板11上に金属層12が形成されたものを用意する。なお、支持板11は、プロセス条件にて必要とされる程度の剛性を有する。支持板11は、支持機材として剛性のあるSUS(ステンレス)板又はアルミ板等で形成されている。金属層12は例えば支持板11がSUS板であれば所定厚さの銅めっき箔を析出させたものである。あるいは金属層12は支持板11がアルミ板であれば銅箔を貼り付けたものである。そして、図2に示すように、金属層12上に絶縁材料からなる接着剤で接着層10を例えばディスペンサーや印刷等で塗布する。すなわち、接着層10は金属層12と接着される。 First, as shown in FIGS. 1 and 2, an adhesive layer forming step is performed. In this step, first, as shown in FIG. 1, for example, a substrate in which a metal layer 12 is formed on a support plate 11 is prepared. The support plate 11 has a degree of rigidity required for process conditions. The support plate 11 is formed of a rigid SUS (stainless steel) plate or aluminum plate as a support device. For example, when the support plate 11 is a SUS plate, the metal layer 12 is formed by depositing a copper plating foil having a predetermined thickness. Alternatively, the metal layer 12 is formed by attaching a copper foil if the support plate 11 is an aluminum plate. Then, as shown in FIG. 2, the adhesive layer 10 is applied onto the metal layer 12 with an adhesive made of an insulating material, for example, by a dispenser or printing. That is, the adhesive layer 10 is bonded to the metal layer 12.
 次に、図3に示すように、部品群搭載工程を行う。本発明では、複数種類の電気又は電子的な部品3が内蔵される部品内蔵基板を対照にしているが、便宜上図3では1個の部品を搭載したものを記載して説明する。この部品搭載工程は、接着層10に電子又は電気的な部品3を搭載する工程である。搭載される部品3には能動部品や受動部品も含まれる。部品3は部品本体3aと電極3bを有している。電極3bは接着層10を形成する接着剤と接着される。すなわち、部品搭載工程では、電極3bを接着層10の位置に合わせて部品3が搭載される。 Next, as shown in FIG. 3, a component group mounting process is performed. In the present invention, a component-embedded substrate in which a plurality of types of electrical or electronic components 3 are built is used as a reference. However, in FIG. This component mounting step is a step of mounting the electronic or electrical component 3 on the adhesive layer 10. The mounted component 3 includes an active component and a passive component. The component 3 has a component main body 3a and an electrode 3b. The electrode 3b is bonded to an adhesive that forms the adhesive layer 10. That is, in the component mounting process, the component 3 is mounted with the electrode 3 b aligned with the position of the adhesive layer 10.
 そして、図4に示すように、積層工程が行われる。積層工程は、部品3に対して絶縁層2となるべき絶縁材を積層して絶縁材内に部品3を埋設するためのものである。この工程は、部品3に対して金属層12が配された側とは反対側にプリプレグ等の絶縁材をレイアップし、これを真空下で加熱しながらプレスして行う。このプレスは、例えば真空加圧式のプレス機を用いて行われる。なお、絶縁材は、熱膨張係数が部品3に近いものを使用すれば好ましい。絶縁層2を介した金属層12と反対側の面には、別の金属層4が形成される。 Then, as shown in FIG. 4, a lamination process is performed. The laminating step is for laminating an insulating material to be the insulating layer 2 on the component 3 and embedding the component 3 in the insulating material. This step is performed by laying up an insulating material such as a prepreg on the side opposite to the side on which the metal layer 12 is disposed with respect to the component 3 and pressing it while heating under vacuum. This press is performed using, for example, a vacuum press machine. Note that it is preferable to use an insulating material having a thermal expansion coefficient close to that of the component 3. Another metal layer 4 is formed on the surface opposite to the metal layer 12 with the insulating layer 2 interposed therebetween.
 この後、図5に示すように、ビア形成工程を行う。この工程では、まず支持板11が除去される。これにより、絶縁層2の一方の面には金属層12が露出される。そして、レーザ等を用いて孔あけを行い、ビア13を形成する。具体的には、ビア13は金属層12から接着層10を通って電極3bの表面まで到達するように形成される。また、構造に応じて、各層間又は表裏の電気的な接続を得るため貫通導通孔または他の導通ビアをこの時点で形成してもよい。ビア形成後、デスミア処理が施され、ビア形成の際に残留している樹脂が除去される。 Thereafter, as shown in FIG. 5, a via formation process is performed. In this step, first, the support plate 11 is removed. Thereby, the metal layer 12 is exposed on one surface of the insulating layer 2. Then, drilling is performed using a laser or the like to form the via 13. Specifically, the via 13 is formed so as to reach the surface of the electrode 3 b from the metal layer 12 through the adhesive layer 10. Also, depending on the structure, through conduction holes or other conduction vias may be formed at this point in order to obtain electrical connection between each layer or front and back. After the via is formed, a desmear process is performed to remove the resin remaining during the via formation.
 この後、図6に示すように、ソフトエッチング工程が行われる。ここで、上述した電極3bは、下地となる中心部8とこの中心部8を被膜する金属膜9で形成されている。具体的には、ニッケル、銀、焼結銅等で形成されている中心部8に対してめっき処理を施して銅からなる金属膜9を形成している。この金属膜9の厚みは、5μm~15μmであるが、多くは5μm~10μmである。ソフトエッチング工程は、ビア13の底に露出している金属膜9を溶解してビア13を金属膜9内に延設するものである。ソフトエッチング処理は、金属膜9が銅の場合は過硫酸ナトリウムや過硫酸カリウム等の薬液を用い、わずかに金属膜9を溶解することによって行われる。これにより、金属膜9表面の酸化物や有機物が除去され、新鮮な金属の表面が露出することになる。したがって、この後のめっき処理において析出する金属との密着性が高まり、結果として電気的な接続信頼性が向上する。 Thereafter, a soft etching process is performed as shown in FIG. Here, the electrode 3b described above is formed of a central portion 8 serving as a base and a metal film 9 covering the central portion 8. Specifically, the metal film 9 made of copper is formed by plating the central portion 8 formed of nickel, silver, sintered copper, or the like. The thickness of the metal film 9 is 5 μm to 15 μm, but most is 5 μm to 10 μm. In the soft etching process, the metal film 9 exposed at the bottom of the via 13 is dissolved to extend the via 13 into the metal film 9. When the metal film 9 is copper, the soft etching process is performed by using a chemical solution such as sodium persulfate or potassium persulfate and slightly dissolving the metal film 9. As a result, oxides and organic substances on the surface of the metal film 9 are removed, and a fresh metal surface is exposed. Accordingly, the adhesion with the metal deposited in the subsequent plating process is increased, and as a result, the electrical connection reliability is improved.
 この後、図7に示すように、めっき工程とパターン形成工程が行われる。めっき工程では、めっき処理(導通処理)を施し、ビア13内に銅を析出させて導通ビア7を形成する。そして、パターン形成工程では、エッチング等を用いて絶縁層2の両面に導体パターン6を形成する。このような工程を経て得られた部品内蔵基板1は、図7に示すように、絶縁層2と部品3と、導体パターン6と、接着層10と、導通ビア7とを備えている。絶縁層2は上述した絶縁材(プリプレグ等)が硬化したものであり、部品3は接着層10を介して導体パターン6と接続されている。導体パターン6は絶縁層2の表面に形成されている。 Thereafter, as shown in FIG. 7, a plating process and a pattern forming process are performed. In the plating process, a plating process (conducting process) is performed, and copper is deposited in the via 13 to form the conductive via 7. In the pattern forming step, the conductor pattern 6 is formed on both surfaces of the insulating layer 2 using etching or the like. As shown in FIG. 7, the component-embedded substrate 1 obtained through such a process includes an insulating layer 2, a component 3, a conductor pattern 6, an adhesive layer 10, and a conductive via 7. The insulating layer 2 is obtained by curing the above-described insulating material (such as a prepreg), and the component 3 is connected to the conductor pattern 6 via the adhesive layer 10. The conductor pattern 6 is formed on the surface of the insulating layer 2.
 本発明では、図8に示すように、絶縁層2に複数種類の部品3からなる部品群14が埋設された部品内蔵基板15に適用されることを前提としている。ここでの部品群14を構成する部品3は、コンデンサ16、抵抗器17、インダクタ18、能動部品19である。なお、図8は、このような部品群14を埋設した場合のソフトエッチング工程終了後の状態を示している。上述したように、レーザにてビアを形成してデスミア処理後にソフトエッチング処理をするが、このように複数種類の部品16~19が埋設されているような場合は、それぞれの部品を製造するメーカーが異なっていたり、同じメーカーでも事業所が異なっていたりと、電極被膜の金属膜9ごとにエッチングレートが異なっていることが多い。このため、基板メーカーが同一条件でソフトエッチング処理をしても金属膜9の溶解厚さが異なってしまい、導体パターン6と電極3bとの接続信頼性に不具合を生じることが懸念される。しかしながら、本発明に係る部品内蔵基板15で埋設されている部品群14を形成する部品16~19のエッチングレートは全て同一であるので、基板メーカーが同一条件でソフトエッチング処理をしても、全ての電極3bで金属膜9は同様に溶解される。 The present invention is premised on being applied to a component-embedded substrate 15 in which a component group 14 composed of a plurality of types of components 3 is embedded in an insulating layer 2 as shown in FIG. The components 3 constituting the component group 14 here are a capacitor 16, a resistor 17, an inductor 18, and an active component 19. FIG. 8 shows a state after the end of the soft etching process when such a component group 14 is embedded. As described above, vias are formed with a laser and soft etching is performed after desmearing. If multiple types of parts 16 to 19 are embedded in this way, the manufacturer that manufactures each part. The etching rate is often different for each metal film 9 of the electrode film, such as different from each other, or even from the same manufacturer with different establishments. For this reason, even if the substrate manufacturer performs the soft etching process under the same conditions, the dissolved thickness of the metal film 9 is different, and there is a concern that the connection reliability between the conductor pattern 6 and the electrode 3b may be defective. However, since the etching rates of the components 16 to 19 forming the component group 14 embedded in the component-embedded substrate 15 according to the present invention are all the same, even if the substrate manufacturer performs the soft etching process under the same conditions, The metal film 9 is similarly dissolved by the electrode 3b.
 例えば、金属膜9が8μmの場合、部品16~19の金属膜9のエッチングレートを2μm/分で揃えれば、基板メーカーがソフトエッチング処理を2.5分行えば5μm溶解されることになり、3μmを残して金属膜9は新鮮な表面が露出されることになる。すなわち、ビア13は金属膜9内に入り込んで形成されることになる。これにより、中心部8が露出することなく、効率的に同様な溶解状態の金属膜9を得ることができる。 For example, if the metal film 9 is 8 μm, if the etching rate of the metal film 9 of the parts 16 to 19 is made uniform at 2 μm / min, then 5 μm will be dissolved if the substrate manufacturer performs the soft etching process for 2.5 minutes. As a result, the metal film 9 is exposed to a fresh surface. That is, the via 13 is formed so as to enter the metal film 9. Thereby, the metal film 9 in the same dissolved state can be efficiently obtained without exposing the central portion 8.
 このような部品内蔵基板15を得るため、一例としては、基板メーカーが部品16~19の部品メーカーのそれぞれに対し、エッチングレートを揃えるように標準化を図ることで実現することができる。 In order to obtain such a component-embedded substrate 15, for example, the substrate maker can achieve the standardization so that the etching rates are uniform for each of the component manufacturers of the components 16-19.
 図9はエッチングレートの違いによるエッチング時間とエッチング量との関係を示している。実線Aはエッチングレート2μmの場合であり、破線Bはエッチングレート4μmの場合を示している。ソフトエッチングの時間は、薬液のビア底への入り込み等を考慮すると最低でも1.5分は必要である。通常は2.5分行われる。金属膜としては8μmの場合が多いことから、エッチングレートが4μmであると、2.5分では10μm溶解させることになってしまい、これはニッケルなどの中心部が露出してしまうことになる。これに対し、エッチングレートが2μmであると、2.5分行っても5μmのエッチング量なので、8μmの厚さの金属膜は3μm残ることになる。したがって金属膜の厚さに応じてエッチングレートを揃えるということは、多数の部品が内蔵される場合にあっては、基板製造プロセスにとって大変有用である。なお、エッチングレートが1μm/分以上であれば十分に実用可能であることを出願人は確認している。 FIG. 9 shows the relationship between the etching time and the etching amount depending on the etching rate. A solid line A indicates a case where the etching rate is 2 μm, and a broken line B indicates a case where the etching rate is 4 μm. The soft etching time needs to be at least 1.5 minutes considering the entry of the chemical into the via bottom. Usually it takes 2.5 minutes. Since the metal film is often 8 μm, if the etching rate is 4 μm, it will dissolve 10 μm in 2.5 minutes, and this will expose the central part of nickel or the like. On the other hand, if the etching rate is 2 μm, the etching amount is 5 μm even after 2.5 minutes, so that the metal film with a thickness of 8 μm remains 3 μm. Therefore, adjusting the etching rate according to the thickness of the metal film is very useful for the substrate manufacturing process when a large number of components are incorporated. The applicant has confirmed that an etching rate of 1 μm / min or more is sufficiently practical.
1 部品内蔵基板
2 絶縁層
3 電気又は電子的な部品
3a 部品本体
3b 電極
4 金属層
6 導体パターン
7 導通ビア
8 中心部
9 金属膜
10 接着層
11 支持板
12 金属層
13 ビア
14 部品群
15 部品内蔵基板
16 コンデンサ
17 抵抗器
18 インダクタ
19 能動部品
DESCRIPTION OF SYMBOLS 1 Component built-in board 2 Insulation layer 3 Electrical or electronic component 3a Component main body 3b Electrode 4 Metal layer 6 Conductive pattern 7 Conductive via 8 Central part 9 Metal film 10 Adhesive layer 11 Support plate 12 Metal layer 13 Via 14 Component group 15 Component Built-in substrate 16 Capacitor 17 Resistor 18 Inductor 19 Active component

Claims (3)

  1.  基板表面に形成された導体パターンと、
     該導体パターンの内側に形成された接着層と、
     該接着層と接着する電気又は電子的な部品と、
     該部品が有する電極と、
     前記部品を埋設する絶縁材からなる絶縁層と、
     前記接着層を貫通し、前記導体パターンと前記電極とを電気的に接続する導通部と
    を備えた部品内蔵基板において、
     前記絶縁層には、複数種類の前記部品からなる部品群が埋設され、
     前記電極は、金属製の金属膜で被膜され、
     前記導通部は、前記金属膜内に入り込んで形成され、
     前記部品群に含まれる前記部品の前記電極が有する前記金属膜は、全て同一又は1μm/分~2μm/分のエッチングレートを有していることを特徴とする部品内蔵基板。
    A conductor pattern formed on the substrate surface;
    An adhesive layer formed inside the conductor pattern;
    An electrical or electronic component that adheres to the adhesive layer;
    An electrode of the component;
    An insulating layer made of an insulating material for embedding the component;
    In the component-embedded substrate that includes a conductive portion that penetrates the adhesive layer and electrically connects the conductor pattern and the electrode,
    In the insulating layer, a component group consisting of a plurality of types of the components is embedded,
    The electrode is coated with a metallic metal film,
    The conduction part is formed so as to enter the metal film,
    The component-embedded substrate, wherein all of the metal films of the electrodes of the component included in the component group have the same or an etching rate of 1 μm / min to 2 μm / min.
  2.  前記部品群を形成する前記部品は、コンデンサ、抵抗器、インダクタ及び能動部品であることを特徴とする請求項1に記載の部品内蔵基板。 2. The component built-in board according to claim 1, wherein the components forming the component group are a capacitor, a resistor, an inductor, and an active component.
  3.  支持板上に形成された金属層に絶縁材料からなる前記接着層を前記部品に対応して複数形成する接着層形成工程と、
     前記接着層に前記部品群を搭載する部品群搭載工程と、
     前記部品群に対して前記絶縁材を積層して前記絶縁層内に前記部品を埋設する積層工程と、
     前記支持板を除去し、前記金属層及び前記接着層を貫通し前記部品群を形成する前記部品が有するそれぞれの前記電極まで到達するビアを複数形成するビア形成工程と、
     前記ビアに露出している前記金属膜を溶解して前記ビアを前記金属膜内に延設するソフトエッチング工程と、
     前記ビアの表面にめっきを析出させて前記導通部を形成するめっき工程と、
     前記金属層を含む導体パターンを形成するパターン形成工程と
    を備えたことを特徴とする請求項1に記載の部品内蔵基板の製造方法。
    An adhesive layer forming step of forming a plurality of the adhesive layers made of an insulating material on the metal layer formed on the support plate corresponding to the component;
    A component group mounting step of mounting the component group on the adhesive layer;
    A stacking step of stacking the insulating material on the component group and embedding the component in the insulating layer;
    A via forming step of removing the support plate and forming a plurality of vias that reach each of the electrodes of the component that penetrates the metal layer and the adhesive layer to form the component group;
    A soft etching step of dissolving the metal film exposed in the via and extending the via into the metal film;
    A plating step of depositing plating on the surface of the via to form the conductive portion;
    The method for manufacturing a component-embedded board according to claim 1, further comprising a pattern forming step of forming a conductor pattern including the metal layer.
PCT/JP2012/073297 2012-09-12 2012-09-12 Component-embedded substrate and method for producing same WO2014041628A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11261216A (en) * 1998-03-09 1999-09-24 Ibiden Co Ltd Printed wiring board and its manufacture
JP2002100870A (en) * 1999-09-02 2002-04-05 Ibiden Co Ltd Printed wiring board and manufacturing method thereof
JP2006523375A (en) * 2003-04-01 2006-10-12 イムベラ エレクトロニクス オサケユキチュア Electronic module manufacturing method and electronic module

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11261216A (en) * 1998-03-09 1999-09-24 Ibiden Co Ltd Printed wiring board and its manufacture
JP2002100870A (en) * 1999-09-02 2002-04-05 Ibiden Co Ltd Printed wiring board and manufacturing method thereof
JP2006523375A (en) * 2003-04-01 2006-10-12 イムベラ エレクトロニクス オサケユキチュア Electronic module manufacturing method and electronic module

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