WO2013133170A1

WO2013133170A1 - Transmission device

Info

Publication number: WO2013133170A1
Application number: PCT/JP2013/055702
Authority: WO
Inventors: 和明國弘
Original assignee: 日本電気株式会社
Priority date: 2012-03-06
Filing date: 2013-03-01
Publication date: 2013-09-12
Also published as: JPWO2013133170A1

Abstract

[Problem] To provide a transmission device (10) which amplifies and outputs a modulation signal (11) with high efficiency and high linearity. [Solution] A transmission device (10) is provided with a power amplifier (20) as an amplifier, a power supply device (30), and a delayer (40). The power amplifier (20) comprises an input terminal (21) which receives as input a modulation signal (11) containing an amplitude modulation component (12) and a phase modulation component, and a power supply terminal (22) which receives as input a power supply voltage (Vout), said power amplifier (20) using the power supply voltage (Vout) to amplify and output a modulation signal (11). The power supply device (30) comprises a switching amplifier section (50) and a linear amplifier section (60) and feeds to the power supply terminal (22) a power supply voltage (Vout) following the waveform of the amplitude modulation component (12) of the modulation signal (11). The delayer (40) is connected between the power supply terminal (22) and the input terminal (21) and compensates for the timing deviation between the operations of the switching amplifier section (50) and the linear amplifier section (60).

Description

Transmitter

The present invention relates to a transmission apparatus mainly used for wireless communication, and in particular, from a power supply apparatus having a function of changing an output voltage according to the magnitude of an input signal, and an amplifier using the output voltage of the power supply apparatus as a power supply voltage. This relates to a transmission apparatus.

Digital modulation methods used in recent wireless communications such as cellular phones and wireless LANs (Local Area Networks) employ modulation formats such as QPSK (Quadrature Phase Shift Keying) and multilevel QAM (Quadrature Amplitude Modulation). Yes. In such a modulation format, the signal trajectory is generally accompanied by amplitude modulation at the time of transition between symbols. Therefore, the amplitude (envelope) of the signal changes with time in the high frequency modulation signal superimposed on the carrier signal in the microwave band. At this time, the ratio between the peak power and the average power of the high-frequency modulation signal is called PAPR (Peak-to-Average Power Ratio). When a signal having a large PAPR is amplified, in order to ensure high linearity, it is necessary to supply a sufficiently large power from the power source to the amplifier so that the waveform is not distorted even with respect to the peak power. In other words, it is necessary to operate the amplifier with a margin (backoff) in a power region sufficiently lower than the saturation power limited by the power supply voltage. In general, in a linear amplifier that performs class A operation or class B operation, the power efficiency is maximized in the vicinity of the saturated output power, so that the average efficiency is lowered when operated in a region where the back-off is large.

In the orthogonal frequency division multiplexing (OFDM) system using multicarriers used in next-generation mobile phones, wireless LANs, and digital TV broadcasting, the PAPR tends to increase, so the average efficiency of the amplifier Is further reduced. Therefore, it is desirable that the amplifier has high efficiency even in a power region with a large back-off.

A transmission method called envelope tracking (ET) is known as a method for amplifying a signal with high efficiency over a wide dynamic range in a power region with a large back-off. For example, an example is reported in Non-Patent Document 1.

In a modulation power supply device used in an ET transmission device, generally, an amplitude modulation component is converted into a pulse modulation signal, and switching amplification is performed using a class D amplifier or the like. However, in order to realize a modulation power supply apparatus having a wide band, high power and high speed switching amplification is required. Therefore, as a method of modulating the power supply in a high efficiency and wide band, a technique for linking a broadband wide-band linear amplifier and a narrow-band high-efficiency switching amplifier has been proposed. It is described in Patent Document 2.

FIG. 9 shows the configuration of an envelope tracking transmission device described in Non-Patent Document 2 as Related Technology 1. The transmission device 100 includes a power amplifier 120 and a power supply device 130. The power supply device 130 includes a current detection unit 140, a switching amplifier unit 150, and a linear amplifier unit 160. In the power supply device 130, the linear amplifier unit 160 having a wide band but low power efficiency and the switching amplifier unit 150 having a narrow band and high power efficiency are linked to each other, whereby a high-efficiency and wide-band power supply voltage Vout (waveform 114 ) Is supplied to the power amplifier 120.

When the analog amplitude signal 112a is input to the linear amplifier unit 160 having the voltage follower configuration configured by the operational amplifier 161, the current Ic output from the linear amplifier unit 160 is converted into a voltage by the current detection resistor 141. Input to the comparator 142. At this time, the polarity of the output of the comparator 142 is selected so that the current flows out from the linear amplifier section 160 (Ic> 0) is High, and the current flows (Ic <0) is Low. Thereby, the pulse width modulation signal 113 becomes a signal corresponding to the intensity of the analog amplitude signal 112a. This pulse width modulation signal 113 is used as a control signal for the switching element 152.

The switching element 152 constitutes a switching converter together with the diode 153. When the pulse width modulation signal 113 is High, the switching element 152 is turned on (conductive state). At this time, the switching element 152 flows the current Im from the DC power supply 132 toward the power amplifier 120 that is a load. On the other hand, when the pulse width modulation signal 113 is Low, the switching element 152 is turned off (non-conducting state). At this time, the inductor 154 outputs a current Im from the ground (hereinafter referred to as “GND”) via the diode 153 in order to maintain the flowing current.

The power supply device 130 combines the current Im and the current Ic and supplies the current Iout to the power amplifier 120. By repeating the above switching operation, the current Iout is supplied alternately to the power amplifier 120 mainly from the DC power supply 132 and GND. On the other hand, the power supply voltage Vout (waveform 114) becomes a voltage waveform following the waveform of the analog amplitude signal 112a by the operation of the linear amplifier unit 160.

Further, another modulation power supply device that modulates the power supply with high efficiency and wide bandwidth is proposed in Patent Document 1. The configuration of the power supply circuit of Patent Document 1 is a modification of a part of the configuration of the modulation power supply device of Non-Patent Document 2 shown in FIG. The configuration of an envelope tracking transmission device described in Patent Document 1 is shown in FIG.

Hereinafter, the transmission apparatus 200 of the related technique 2 will be described with reference to FIG. A power amplifier 201 is connected to the digital modulation signal generation unit 220 via a harmonic modulation circuit 221. The harmonic modulation circuit 221 is connected between the digital modulation signal generation unit 220 and the power amplifier 201, and generates a high frequency signal H by performing high frequency modulation on the baseband signal SB output from the digital modulation signal generation unit 220. The high frequency signal H is sent to the power amplifier 201.

The power amplifier 201 amplifies and outputs the high frequency signal H output from the harmonic modulation circuit 221. In the power amplifier 201, the saturation output power changes according to the magnitudes of the drain voltage Vds and the drain current Ids. For example, in the power amplifier 201, when the drain voltage Vds decreases, the saturation output power decreases, and when the drain voltage Vds increases, the saturation output power increases. Even if the power of the high-frequency signal H changes, the power amplifier 201 has a level close to the saturation output. It is possible to increase the efficiency by operating with The power amplifier 201 is composed of an FET.

The drain terminal of the power amplifier 201 is connected to the digital modulation signal generation unit 220 via the linear amplifier unit 213. The linear amplifier unit 213 supplies the first drain voltage corresponding to the amplitude value of the envelope signal (first control signal E) output from the digital modulation signal generation unit 220 to the power amplifier 201. The drain current value supplied from the linear amplifier unit 213 to the power amplifier 201 is small.

A switching amplifier unit 223 is connected to the digital modulation signal generation unit 220 via a time correction circuit 222. The switching amplifier unit 223 includes a switch driver circuit 224 and a low speed switch power source 216. The switch driver circuit 224 receives an on / off signal SH output from the digital modulation signal generation unit 220 and corrected at an earlier timing by the time correction circuit 222, and a low-speed switch according to the on / off signal SH. The power source 216 is turned on / off. The low speed switch power source 216 is for supplying a large current to the power amplifier 201. A DC power source 217 is connected to one end side of the low-speed switch power source 216, and a drain terminal of the power amplifier 201 is connected to the other end side via a low-pass filter 218. The DC power supply 217 can supply a large current to the power amplifier 201 in order to supplement the amount of current to the power amplifier 201.

The digital modulation signal generation unit 220 generates a first control signal E that follows a change in the amplitude signal, outputs the first control signal E to the linear amplifier unit 213, and also controls a second control signal S that is turned on / off according to the amplitude signal. Is output to the switching amplifier unit 223. The power supply device 230 adds up the output current of the linear amplifier unit 213 and the output current of the switching amplifier unit 223 and supplies the sum to the power amplifier 201. By adopting such a configuration, a delay in timing of the switching amplifier unit 223 with respect to the linear amplifier unit 213 is suppressed, and the amplitude signal is accurately tracked to some extent even with a high-speed and large-current signal.

Next, the technique disclosed in Patent Document 2 will be described as a transmission apparatus of Related Technique 3. The transmission apparatus of Related Technology 3 is an envelope tracking type high-frequency power amplifying apparatus that expands an output power level at which high efficiency characteristics can be obtained by switching amplification paths. A delay time correcting means for matching the timings of the modulation signal and the amplitude signal is provided in the path of the modulation signal. This delay time correcting means is common in an envelope tracking type high frequency power amplifier.

Japanese Patent Laying-Open No. 2011-66845 (paragraphs 0020 to 0021, FIG. 1) JP 2011-120142 A

However, the transmission apparatus 100 of Related Technology 1 shown in FIG. 9 has the following problems. The problem is that when a high-speed and high-power analog amplitude signal 112a is input, the power efficiency of the power supply device 130 is lowered, or the power supply device 130 cannot accurately track the analog amplitude signal 112a. As a result, there arises a problem that the power efficiency of the entire transmission apparatus 100 is reduced and the output signal 115 of the transmission apparatus 100 is distorted. This is because the timings of the operations of the linear amplifier unit 160 and the switching amplifier unit 150 are shifted. The reason will be described below.

In the original operation principle of the power supply apparatus 130, the direction of the current Ic flowing through the linear amplifier unit 160 is detected by the comparator 142, and the switching amplifier unit 150 is controlled based on the result. Accordingly, the switching amplifier unit 150 and the linear amplifier unit 160 operate in a coordinated manner so that the current Ic flowing through the low efficiency linear amplifier unit 160 is minimized. As the switching element 152 constituting the switching amplifier unit 150, an FET is normally used. However, in order to operate with high efficiency, it is necessary to have a sufficiently low on-resistance with respect to the load resistance. For this reason, in high load (high power) applications, it is necessary to increase the element size, which increases the input capacitance of the FET.

In general, a driver amplifier 151 is required to drive the switching element 152 with a pulse modulation signal 113 made of a rectangular wave. When the input capacitance of the switching element 152 that is the load of the driver amplifier 151 is large, the rise time and the fall time of the pulse modulation signal 113 formed of a rectangular wave are increased, and the detection result of the comparator 142 is transmitted to the switching amplifier unit 150. There is a delay before it is done. As a result, the linear amplifier unit 160 and the switching amplifier unit 150 do not cooperate. Then, since the linear amplifier unit 160 needs a large current to track the waveform of the analog amplitude signal 112a, the power efficiency of the power supply device 130 decreases. Alternatively, since the linear amplifier unit 160 cannot obtain a sufficient current, the waveform of the analog amplitude signal 112a cannot be tracked.

Further, the transmission apparatus 200 of Related Technology 2 shown in FIG. 10 has the following problems. The first problem is that the power efficiency of the power supply device 230 decreases due to load fluctuations and variations in element characteristics, and the power supply device 230 cannot accurately track the amplitude signal. As a result, there arises a problem that the power efficiency of the entire transmission apparatus 200 is reduced and the output signal of the transmission apparatus 200 is distorted. This is because, in the power supply device 230, feedback is not applied to any of the linear amplifier unit 213, the switching amplifier unit 223, and the power amplifier 201. The reason will be described below.

In order to compensate for the delay of the switch driver circuit 224, the time correction circuit 222 operates in a feed-forward manner so that the timing of the switching amplifier unit 223 matches the linear amplifier unit 213. Therefore, even if the linear amplifier unit 213 and the switching amplifier unit 223 perform an ideal operation under a certain condition, it cannot be compensated if the condition is shifted due to a load variation or a variation in element characteristics. In particular, in a large-scale transmission apparatus, a case where a plurality of transmission apparatuses are connected in parallel to the common control signal generation unit 220 can be considered. In this case, it is considered that the amount of delay varies depending on the variation of individual components. However, since the delay cannot be adjusted individually, the power efficiency of the entire apparatus is reduced, and the amplitude signal cannot be accurately tracked.

The second problem is that a delay occurs in the power supply device 230. Therefore, in order to compensate for the delay of the switch driver circuit 224, it is necessary to advance the second control signal S input to the switching amplifier unit 223 earlier than the first control signal E input to the linear amplifier unit 213. is there. Actually, since the event cannot be prefetched, it is necessary to delay the first control signal E with respect to the second control signal S in the digital modulation signal generation unit 220. Furthermore, since it takes a finite time to generate the second control signal S, a delay occurs in the input / output of the power supply device 230. There is also a problem that the scale and power consumption of the digital modulation signal generation unit 220 are increased.

Therefore, an object of the present invention is to provide a highly efficient and highly linear device comprising a power supply device having a function of changing an output voltage according to the magnitude of an input signal and an amplifier using the output voltage of the power supply device as a power supply voltage. Is to provide a transmission apparatus.

The transmission device according to the present invention is:
An amplifier having an input terminal for inputting a modulation signal including an amplitude modulation component and a phase modulation component, and a power supply terminal for inputting a power supply voltage, and amplifying and outputting the modulation signal using the power supply voltage;
A power supply device having a switching amplifier unit and a linear amplifier unit, and supplying the power supply voltage following the waveform of the amplitude modulation component of the modulation signal to the power supply terminal;
A delay device connected between the power supply terminal and the input terminal to compensate for a timing shift in operation between the switching amplifier unit and the linear amplifier unit;
Is provided.

According to the present invention, a delay device connected between the power supply terminal and the input terminal of the amplifier compensates for a timing shift in operation between the switching amplifier unit and the linear amplifier unit of the power supply device, thereby enabling simple and high accuracy. In addition, the efficiency of the transmission apparatus can be improved.

2 is a block diagram illustrating an overview of a transmission apparatus according to Embodiment 1. FIG. 2 is a circuit diagram illustrating a specific example of a power supply device according to Embodiment 1. FIG. FIG. 3 is a circuit diagram illustrating a specific example of a power amplifier and a delay device in the first embodiment. FIG. 4A is a waveform diagram for explaining an ideal operation of the transmitting apparatus (comparative example) of related technology 1, and FIG. 4A shows the timing relationship between the analog amplitude signal and the output voltage of the switching element. B] shows the timing relationship between the current output from the switching amplifier unit and the current flowing through the power amplifier, and FIG. 4C shows the current flowing through the linear amplifier unit. It is a wave form chart for explaining a subject of a transmitting device (comparative example) of related technology 1. FIG. 5 [A] shows a timing relation between an analog amplitude signal and an output voltage of a switching element, and FIG. The timing relationship between the current output from the switching amplifier unit and the current flowing through the power amplifier is shown. FIG. 5C shows the current flowing through the linear amplifier unit. 6A and 6B are waveform diagrams for explaining the operation of the transmission apparatus according to the first embodiment. FIG. 6A shows the timing relationship between the analog amplitude signal and the output voltage of the switching element, and FIG. The timing relationship between the output current and the current flowing through the power amplifier is shown, and FIG. 6 [C] shows the current flowing through the linear amplifier section. 6 is a block diagram illustrating an outline of a transmission apparatus according to Embodiment 2. FIG. 6 is a circuit diagram illustrating a specific example of a power supply device according to Embodiment 2. FIG. It is a circuit diagram which shows the transmission apparatus of related technology 1. It is a circuit diagram which shows the transmission apparatus of related technology 2.

Hereinafter, embodiments for carrying out the present invention (hereinafter referred to as “embodiments”) will be described with reference to the accompanying drawings. In the present specification and drawings, the same reference numerals are used for substantially the same components.

FIG. 1 is a block diagram illustrating an outline of the transmission apparatus according to the first embodiment. FIG. 2 is a circuit diagram illustrating a specific example of the power supply device according to the first embodiment. FIG. 3 is a circuit diagram illustrating a specific example of the power amplifier and the delay device in the transmission apparatus according to the first embodiment. The outline of the transmission apparatus according to the first embodiment will be described below with reference to these drawings.

The transmission device 10 according to the first embodiment includes a power amplifier 20 as an amplifier, a power supply device 30, and a delay device 40. The power amplifier 20 includes an input terminal 21 that inputs a modulation signal 11 including an amplitude modulation component 12 and a phase modulation component, and a power supply terminal 22 that inputs a power supply voltage Vout. The power amplifier 20 uses the power supply voltage Vout to output the modulation signal 11. Amplify and output. The power supply device 30 includes a switching amplifier unit 50 and a linear amplifier unit 60, and supplies a power supply voltage Vout that follows the waveform of the amplitude modulation component 12 of the modulation signal 11 to the power supply terminal 22. The delay device 40 is connected between the power supply terminal 22 and the input terminal 21 and compensates for a timing shift in operation between the switching amplifier unit 50 and the linear amplifier unit 60.

The power supply device 30 further includes a control signal generation unit 70. The control signal generation unit 70 receives the amplitude modulation component 12, generates a signal (analog amplitude signal 12 a) that represents the amplitude modulation component 12 in analog form, outputs the signal to the switching amplifier unit 50, and pulse-modulates the amplitude modulation component 12. The generated signal (pulse modulated signal 13) is generated and output to the linear amplifier unit 60.

The switching amplifier unit 50 has a switching converter configuration including at least one switching element 52 and an inductor 54 that smoothes the output current of the switching element 52. The linear amplifier unit 60 has a voltage follower configuration including at least one operational amplifier 61 and a feedback path for returning the output signal of the operational amplifier 61 to the input.

The delay device 40 includes

resistors

41 and 42 and

capacitors

43 and 44. The product of the resistance values R1 and R2 of the

resistors

41 and 42 and the capacitance values C1 and C2 of the capacitors 43 and 44 (R1 + R2). The delay amount τ is determined by a time constant consisting of × (C1 // C2).

According to the first embodiment, operation delay between the switching amplifier unit 50 and the linear amplifier unit 60 of the power supply device 30 is caused by the delay device 40 connected between the power supply terminal 22 and the input terminal 21 of the power amplifier 20. By compensating for this, the efficiency of the transmitter 10 can be improved easily and with high accuracy.

Next, the transmission device 10 according to the first embodiment will be described in more detail.

FIG. 1 is a block diagram illustrating a configuration of the transmission apparatus 10 according to the first embodiment.

The modulation signal 11 is input to the power amplifier 20. The power amplifier 20 outputs the amplified modulation signal 15. The amplitude modulation component 12 of the modulation signal 11 is input to the power supply device 30 including the switching amplifier unit 50 and the linear amplifier unit 60. The power supply voltage Vout output from the power supply device 30 is supplied to the power supply terminal 22 of the power amplifier 20. The power supply voltage 14 is a waveform of the power supply voltage Vout. The power supply terminal 22 is connected to the input terminal 21 via the delay device 40.

FIG. 2 is a diagram more specifically showing the configuration of the power supply device 30 in FIG.

The amplitude modulation component 12 of the modulation signal 11 is input to the control signal generator 70. The control signal generation unit 70 outputs an analog amplitude signal 12a obtained by analog conversion of the amplitude modulation component 12, and a pulse modulation signal 13 obtained by pulse modulation of the amplitude modulation component 12. The pulse modulation signal 13 is generated in the control signal generation unit 70 by, for example, pulse width modulation (PWM), delta sigma modulation, or the like. The analog amplitude signal 12 a is input to the linear amplifier unit 60. The linear amplifier unit 60 has a voltage follower configuration including an operational amplifier 61, and outputs a power supply voltage Vout having a waveform following the voltage waveform of the analog amplitude signal 12a of the amplitude modulation component 12, and also outputs a current Ic. .

The pulse modulation signal 13 of the amplitude modulation component 12 is input to the driver amplifier 51. The driver amplifier 51 amplifies the input pulse while maintaining the waveform, and outputs the amplified pulse to the switching element 52. The switching amplifier unit 50 includes a driver amplifier 51, a switching element 52, a diode 53 as a rectifying element, and an inductor 54. The switching element 52 performs an on / off operation according to the output signal of the driver amplifier 51. A current is alternately supplied from the DC power source 32 when the switching element 52 is on, and from the diode 53 when the switching element 52 is off. The switching amplifier unit 50 outputs a current Im smoothed by the inductor 54.

The output side of the linear amplifier unit 60 and the output side of the switching amplifier unit 50 are coupled by an output terminal 31, and the output terminal 31 is connected to the power supply terminal 22 of the power amplifier 20. The power supply terminal 22 is connected to the input terminal 21 of the power amplifier 20 via the delay device 40. At the output terminal 31 of the power supply device 30, a relationship of Ic + Im = Iout is established between the current Ic output from the linear amplifier unit 60, the current Im output from the switching amplifier unit 50, and the current Iout flowing through the power amplifier 20. .

FIG. 3 is a diagram more specifically showing the configuration of the power amplifier 20 and the delay device 40 in FIG.

The power amplifier 20 is composed of a source grounded FET 24 having a source terminal 24s grounded. The modulation signal 11 is input to the gate terminal 24 g of the FET 24, and the power supply terminal 22 is connected to the drain terminal 24 d of the FET 24. The drain terminal 24d is connected to the gate terminal 24g via a delay device 40 formed by

resistors

41 and 42 and

capacitors

43 and 44. That is, a series circuit composed of the capacitor 43 and the resistor 41 is connected between the power supply terminal 22 and the input terminal 21, and a series circuit composed of the resistor 42 and the capacitor 44 is connected between the input terminal 21 and GND. Has been. FIG. 3 also shows a gate voltage Vg which is a DC bias voltage. The gate voltage Vg is applied to the gate terminal 24g via the inductor 24L and the input terminal 21, and determines the operating point of the FET 24.

Here, the resistance values of the

resistors

41 and 42 are R1 and R2, and the capacitance values of the

capacitors

43 and 44 are C1 and C2. At this time, the power supply voltage Vout which is a drain voltage is attenuated by R2 / (R1 + R2) and is fed back to the input side of the FET 24 with a time constant determined by approximately τ = (R1 + R2) × (C1 // C2). Is done. The common source FET 24 is a voltage controlled current source in which the current Iout which is a drain current is determined by the gate-source voltage Vgs. The change in the voltage Vgs is delayed by τ with respect to the power supply voltage Vout by the delay device 40. Therefore, the current Iout is also delayed by τ with respect to the power supply voltage Vout.

In the power supply device 30 shown in FIG. 2, the linear amplifier unit 60 is broadband and highly linear. Therefore, the power supply voltage Vout output from the linear amplifier unit 60 has a voltage waveform that follows the analog amplitude signal 12a with high accuracy. On the other hand, the linear amplifier unit 60 has low power efficiency. Therefore, the current Im output from the linear amplifier unit 60 is supplied by synchronizing the current Im output from the switching amplifier unit 50 having a narrow band but high power efficiency with the analog amplitude signal 12a. It is desirable to operate so that Im becomes small. However, since the driver amplifier 51 usually has a delay of about several tens [ns] to several hundreds [ns], the current Im output from the switching amplifier unit 50 is output from the linear amplifier unit 60 as it is. Delayed from the current Ic. As a result, the power efficiency of the entire power supply device 30 is reduced. Therefore, in the first embodiment, the delay amount τ of the delay device 40 shown in FIG. 3 is adjusted so as to match the delay amount of the driver amplifier 51, thereby matching the timings of the current Iout and the current Im. The current Ic flowing through 60 is reduced.

4 and 5 show waveform diagrams of the transmission apparatus 100 of the related technique 1 shown in FIG. 9 as a comparative example. FIG. 6 shows a waveform diagram of the transmission apparatus 10 of the first embodiment shown in FIG. Hereinafter, the comparative example and the first embodiment will be described in comparison.

FIG. 4 is a waveform diagram for explaining an ideal operation of the transmission apparatus 100 of the related technique 1. Hereinafter, a description will be given based on FIGS. 4 and 9. 4A shows the timing relationship between the analog amplitude signal 112a and the output voltage Vsw of the switching element 152, and FIG. 4B shows the current Im output from the switching amplifier unit 150 and the current Iout flowing through the power amplifier 120. 4C shows the current Ic flowing through the linear amplifier section 160. FIG.

FIG. 4 shows ideal current and voltage waveforms when a 2 [MHz] sine wave is input to the power supply device 130. In the region where the amplitude of the analog amplitude signal 112a is large, the pulse modulation signal 113 is generated so that the pulse becomes high. Then, the switching element 152 is turned on / off so as to be synchronized with the pulse modulation signal 113, whereby the output voltage Vsw is obtained (FIG. 4 [A]). As a result, the current Im smoothed by the inductor 154 and output from the switching amplifier unit 150 and the current Iout flowing through the power amplifier 120 take values close to each other (FIG. 4B). Since the current Ic flowing through the low-efficiency linear amplifier unit 160 is the difference between the current Im and the current Iout, only a small value flows, so the efficiency of the entire power supply device 130 is increased.

FIG. 5 is a waveform diagram for explaining the problem of the transmission apparatus 100 of the related technique 1. Hereinafter, a description will be given based on FIGS. 5 and 9. 5A shows the timing relationship between the analog amplitude signal 112a and the output voltage Vsw of the switching element 152, and FIG. 5B shows the current Im output from the switching amplifier unit 150 and the current Iout flowing through the power amplifier 120. FIG. 5C shows the current Ic flowing through the linear amplifier unit 160.

FIG. 5 shows actual current and voltage waveforms when a sine wave of 2 [MHz] is input to the power supply device 130. Even if the pulse modulation signal 113 is generated so that the pulse becomes high in the region where the amplitude of the analog amplitude signal 112a is large, the driver amplifier 151 has a delay of about 50 [ns], so that the output voltage of the switching element 152 There is a delay in Vsw (FIG. 5 [A]). As a result, the phase of the current Iout flowing through the power amplifier 120 and the current Im output from the switching amplifier unit 150 are shifted (FIG. 5 [B]). Since the current Ic flowing through the linear amplifier section 160 is the difference between the current Iout and the current Im, the current Ic has a large value as shown in FIG. 5C, and the power consumption of the entire power supply device 130 increases. Alternatively, since the current Ic exceeds the allowable value of the linear amplifier unit 160, the power supply device 130 cannot follow the analog amplitude signal 112a.

FIG. 6 is a waveform diagram for explaining the operation of the transmission apparatus 10 according to the first embodiment. Hereinafter, a description will be given based on FIGS. 2 and 6. 6A shows the timing relationship between the analog amplitude signal 12a and the output voltage Vsw of the switching element 52, and FIG. 6B shows the current Im output from the switching amplifier unit 50 and the current Iout flowing through the power amplifier 20. 6C shows the current Ic flowing through the linear amplifier unit 60. FIG.

FIG. 6 shows current and voltage waveforms when a 2 [MHz] sine wave is input to the power supply device 30. The control signal generation unit 70 generates the pulse modulation signal 13 so that the pulse becomes High in a region where the amplitude of the analog amplitude signal 12a is large. However, the delay of about 50 [ns] of the driver amplifier 51 causes a delay in the pulse modulation signal 13 (FIG. 6 [A]). However, since the current Iout flowing through the power amplifier 20 can be delayed with respect to the power supply voltage Vout by the action of the delay device 40, the phase of the current Iout and the current Im output from the switching amplifier unit 50 can be made uniform. (FIG. 6 [B]). As a result, since the current Ic flowing through the linear amplifier unit 60 is the difference between the current Iout and the current Im, the current Ic becomes a small value as shown in FIG. 6C, and the power consumption of the entire power supply device 30 is reduced. Brought about.

Next, the related technology 2 as another comparative example will be described in comparison with the first embodiment.

In the above-mentioned Patent Document 1, as described with reference to FIG. 10, the time of the pulse signal (second control signal S) is advanced in time by the time correction circuit 222 in anticipation of the delay in the switch driver circuit 224. Are listed. However, in an actual use state where an arbitrary signal is input, it is impossible to advance in time. In addition, relatively the same effect can be obtained by delaying the analog amplitude signal (first control signal E), but it is extremely difficult to delay the analog signal from several tens [ns] to several hundreds [ns] without distortion. difficult. When delaying by the line length of the analog amplitude signal path, a very long line is required, so that the apparatus becomes large. When an analog filter is provided in the analog amplitude signal path and delayed, waveform distortion is likely to occur. In the digital modulation signal generation unit 220, it is possible to delay using a digital filter. However, when multiple transmitters are connected in parallel to the common digital modulation signal generator 220 for high power applications such as terrestrial digital transmitters, the delay amount is considered to vary depending on the variation of individual components. Cannot adjust the delay individually.

On the other hand, in the transmission apparatus 10 of the first embodiment, the delay amount τ can be generated individually and in a small size, and since the delay is generated by feedback, there is an effect that the waveform distortion hardly occurs.

Next, the configuration, operation, and effects of the transmission device 100 of the first embodiment will be summarized.

[Configuration] The transmission apparatus 10 according to the first embodiment includes a switching amplifier unit 50 that switches and amplifies the amplitude modulation component 12 of the input modulation signal 11 with high efficiency, and a linear amplifier unit that linearly amplifies the amplitude modulation component 12 with high accuracy. 60, and a power amplifier 20 that amplifies the modulation signal 11 using the power supply voltage Vout output from the power supply device 30. The transmission device 10 further includes a delay device 40 that connects the power supply terminal 22 and the input terminal 21 of the power amplifier 20, and the linear amplifier unit 60 of the power supply device 30 is controlled by the delay amount τ obtained by the delay device 40. The delay of the switching amplifier unit 50 is compensated.

[Operation] The transmission apparatus 10 according to the first embodiment operates with the power supply voltage Vout that follows the waveform of the amplitude modulation component 12 of the input modulation signal 11 and the power supply voltage Vout, and outputs the modulation signal 11. A power amplifier 20 for amplification. The power supply device 30 includes a linear amplifier unit 60 that linearly amplifies the amplitude modulation component 12 and outputs a current Ic, and a switching amplifier unit 50 that performs switching amplification of the amplitude modulation component 12 and outputs a current Im. The total current Ic + Im = Iout is output to the power amplifier 20. The power amplifier 20 can be regarded as a voltage controlled current source, and the flowing current Iout is determined by the average voltage Vin of the input terminal 21. In the transmission apparatus 10 according to the first embodiment, the average voltage Vin of the input terminal 21 operates with a delay by the delay device 40 with respect to the power supply voltage Vout of the power amplifier 20. As a result, the current Iout that is the average current of the power amplifier 20 also flows with a delay from the power supply voltage Vout. In the power supply device 30 according to the first embodiment, the delay of the current Im of the switching amplifier unit 50 with respect to the current Ic of the linear amplifier unit 60 is caused by the delay device 40 connected between the power supply terminal 22 and the input terminal 21 of the power amplifier 20. By compensating for the delay of the current Iout with respect to the power supply voltage Vout, the current Ic (= Iout−Im) of the low-efficiency linear amplifier unit 60 can be set small, and the power efficiency of the power supply device 30, that is, the transmission device 10 as a whole can be reduced. Can be improved.

[Effect] The first effect is that the transmitter 10 having high power efficiency and high linearity can be provided. The reason for this is that in the envelope tracking type transmitter 10, the delay of the switching amplifier 50 with respect to the linear amplifier 60 of the power supply 30 is compensated by delaying the current Iout of the power amplifier 20 with respect to the power supply voltage Vout. This is because the current Ic flowing through the linear amplifier unit 60 with low efficiency can be minimized. In addition, since the current flowing through the linear amplifier unit 60 is small, there is a margin in operation, and the input signal can be followed with high accuracy.

The second effect is that it is possible to provide an envelope tracking transmission device 10 that is resistant to load fluctuations and variations of the power amplifier 20. As a result, a large-scale transmission apparatus including a plurality of ET envelope tracking amplifiers can be realized. The reason is to perform feedback control that generates a delay by feeding back the power supply voltage Vout of the power amplifier 20 to the input side. In addition, since delay compensation is performed with the power amplifier 20 electrically closed, delay compensation can be performed independently even when there are a plurality of amplifiers.

In the first embodiment, the amplitude modulation component 12 of the modulation signal 11 is processed by the analog amplitude signal 12a. However, the interface may be digital, and the amplitude modulation component 12 may be processed by a digital signal. In addition, the switching amplifier unit 50 is not limited to the configuration shown in FIG. 2, but may be a synchronous rectification type switching converter configuration in which the diode 53 is replaced with an FET switch, or a forward type using a transformer or the like. Type switching converter configuration.

FIG. 7 is a block diagram illustrating an outline of the transmission apparatus according to the second embodiment. FIG. 8 is a circuit diagram illustrating a specific example of the power supply device according to the second embodiment. Hereinafter, based on these drawings, a description will be given focusing on differences from the first embodiment.

The transmission device 80 of the second embodiment is different from the transmission device of the first embodiment in a power supply device 35 and a delay device 45. That is, the delay unit 45 has a function of varying the delay amount by varying at least one of the resistance value of the resistor and the capacitance value of the capacitor. Referring to FIG. 3, at least one of the resistance values R1, R2 of the

resistors

41, 42 and the capacitance values C1, C2 of the

capacitors

43, 44 is variable. For example, the

resistors

41 and 42 may be replaced with variable resistance elements such as a linear region of transistors, and the

capacitors

43 and 44 may be replaced with variable capacitance elements such as varactor diodes. The power supply device 35 further includes a delay amount control unit 90 that controls the delay amount τ so that the power consumption of the power supply device 35 is reduced. For example, the delay amount control unit 90 detects the current supplied to the linear amplifier unit 60 and controls the delay amount τ so that the value becomes small. The delay amount control unit 90 illustrated in FIG. 7 includes a DC power supply 91 that supplies current to the linear amplifier unit 60, a resistor 92 that is provided in a path of current that is supplied to the linear amplifier unit 60, and both ends of the resistor 92. And a detector 93 made up of a differential amplifier for inputting the voltage. The output signal of the detector 93 is input to the delay unit 45 and applied to, for example, a variable resistance element or a variable capacitance element.

Next, the transmission device 80 of the second embodiment will be described in more detail.

FIG. 7 is a block diagram illustrating a configuration of the transmission device 80 according to the second embodiment. In the second embodiment, the delay unit 45 is configured by a variable delay unit. The delay amount τ of the delay unit 45 is variable according to the state of the power supply device 35.

FIG. 8 is a diagram showing the configuration of the power supply device 35 in FIG. 7 more specifically. The power supply terminal 22 of the power amplifier 20 is connected to the input terminal 21 via the delay unit 45. The delay unit 45 monitors the current supplied to the linear amplifier unit 60 of the power supply device 35 with the detector 93 and changes the delay amount τ so that the current becomes small. The function of the delay unit 45 is realized by replacing the

resistors

41 and 42 and the

capacitors

43 and 44 shown in FIG. 3 with variable resistance elements and variable capacitance elements. In the second embodiment, the current of the linear amplifier unit 60 is monitored, and the delay amount τ of the delay unit 45 is adjusted in the direction in which the current becomes smaller. When such control is performed, the timings of the current Iout and the current Im can be more accurately matched, so that the current Ic = Iout−Im flowing through the linear amplifier unit 60 can be further reduced. The overall power efficiency of 10 is improved.

In the second embodiment, the delay amount τ is adaptively adjusted by monitoring the current of the linear amplifier 60 that is most sensitive to the delay of the driver amplifier 51. Therefore, according to the second embodiment, in addition to the effects of the first embodiment, even when the optimum delay amount τ is changed due to component characteristic variation due to aging degradation or load impedance variation during operation of the apparatus, the power efficiency Has a synergistic effect that does not deteriorate. Furthermore, since the transmitter 80 can be closed locally to adjust the delay, when using a plurality of transmitters 80 simultaneously for high power applications such as a terrestrial digital transmitter, it is necessary to individually correct delay variations due to element variations and the like. There is also an effect that there is no.

Other configurations, operations, and effects of the second embodiment are the same as those of the first embodiment.

As described above, the present invention has been described with reference to each of the above embodiments, but the present invention is not limited to each of the above embodiments. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention. Further, the present invention includes a combination of some or all of the configurations of the above-described embodiments as appropriate.

Some or all of the above embodiments can be described as in the following supplementary notes, but the present invention is not limited to the following configurations.

[Supplementary Note 1] An amplifier having an input terminal for inputting a modulation signal including an amplitude modulation component and a phase modulation component, and a power supply terminal for inputting a power supply voltage, and amplifying and outputting the modulation signal using the power supply voltage When,
A power supply device having a switching amplifier unit and a linear amplifier unit, and supplying the power supply voltage following the waveform of the amplitude modulation component of the modulation signal to the power supply terminal;
A delay device connected between the power supply terminal and the input terminal to compensate for a timing shift in operation between the switching amplifier unit and the linear amplifier unit;
A transmission device comprising:

[Appendix 2] The power supply device receives the amplitude modulation component, generates a signal representing the amplitude modulation component in an analog form, outputs the signal to the switching amplifier unit, and generates a signal obtained by pulse-modulating the amplitude modulation component And further has a control signal generation unit for outputting to the linear amplifier unit,
The transmission device according to attachment 1.

[Appendix 3] The switching amplifier unit has a switching converter configuration including at least one switching element and an inductor that smoothes an output current of the switching element.
The transmission device according to appendix 1 or 2.

[Supplementary Note 4] The linear amplifier has a voltage follower configuration including at least one operational amplifier and a feedback path for returning an output signal of the operational amplifier to the input.
The transmission device according to any one of supplementary notes 1 to 3.

[Supplementary Note 5] The delay device includes a resistor and a capacitor, and a delay amount is determined by a time constant formed by a product of a resistance value of the resistor and a capacitance value of the capacitor.
The transmission device according to any one of supplementary notes 1 to 4.

[Appendix 6] The delay device has a function of changing the delay amount by changing at least one of a resistance value of the resistor and a capacitance value of the capacitor.
The power supply device further includes a delay amount control unit that controls the delay amount so that power consumption of the power supply device is reduced.
The transmission device according to attachment 5.

[Supplementary Note 7] The delay amount control unit detects the current supplied to the linear amplifier unit, and controls the delay amount so that the value becomes small.
The transmission device according to attachment 6.

This application claims priority based on Japanese Patent Application No. 2012-049233 filed on March 6, 2012, the entire disclosure of which is incorporated herein.

The present invention can be used for applications such as mobile phones, wireless LANs, terminals for WiMAX (Worldwide Interoperability for Microwave Access), base stations, and digital terrestrial broadcasting stations.

DESCRIPTION OF SYMBOLS 10 Transmitter 11 Modulation signal 12 Amplitude modulation component 12a Analog amplitude signal 13 Pulse modulation signal 14 Power supply voltage 15 Modulation signal 20 Power amplifier (amplifier)
21 Input terminal 22 Power supply terminal 23 Output terminal 24 FET

24g Gate terminal

24d Drain terminal

24s Source terminal 24L Inductor 30 Power supply 31 Output terminal 32 DC power supply 35 Power supply 40

Delay device

41, 42

Resistor

43, 44 Capacitor 45 Delay device 50 Switching amplifier section 51 Driver amplifier 52 Switching element 53 Diode (Rectifier element)
54 Inductor 60 Linear Amplifier Unit 61 Operational Amplifier 70 Control Signal Generation Unit 80 Transmitter 90 Delay Amount Control Unit 91 DC Power Supply 92 Resistor 93 Detector Ic, Im, Iout Current Vout Power Supply Voltage Vsw Output Voltage τ Delay Amount

Claims

An amplifier having an input terminal for inputting a modulation signal including an amplitude modulation component and a phase modulation component, and a power supply terminal for inputting a power supply voltage, and amplifying and outputting the modulation signal using the power supply voltage;
A power supply device having a switching amplifier unit and a linear amplifier unit, and supplying the power supply voltage following the waveform of the amplitude modulation component of the modulation signal to the power supply terminal;
A delay device connected between the power supply terminal and the input terminal to compensate for a timing shift in operation between the switching amplifier unit and the linear amplifier unit;
A transmission device comprising:
The power supply device receives the amplitude modulation component, generates a signal representing the amplitude modulation component in an analog form, outputs the signal to the linear amplifier unit, and generates a signal obtained by pulse-modulating the amplitude modulation component to perform the switching. A control signal generator for outputting to the amplifier unit;
2. The transmission device according to claim 1.
The switching amplifier unit has a switching converter configuration having at least one switching element and an inductor that smoothes an output current of the switching element.
The transmission apparatus according to claim 1 or 2.
The linear amplifier has a voltage follower configuration including at least one operational amplifier and a feedback path for returning an output signal of the operational amplifier to an input.
The transmission device according to any one of claims 1 to 3.
The delay device includes a resistor and a capacitor, and a delay amount is determined by a time constant formed by a product of a resistance value of the resistor and a capacitance value of the capacitor.
The transmission device according to any one of claims 1 to 4.
The delay device has a function of changing the delay amount by changing at least one of a resistance value of the resistor and a capacitance value of the capacitor.
The power supply device further includes a delay amount control unit that controls the delay amount so that power consumption of the power supply device is reduced.
The transmission device according to claim 5.
The delay amount control unit detects the current supplied to the linear amplifier unit, and controls the delay amount so that the value becomes small.
The transmission device according to claim 6.