WO2012076927A1 - Diamond semiconductor devices and associated methods - Google Patents
Diamond semiconductor devices and associated methods Download PDFInfo
- Publication number
- WO2012076927A1 WO2012076927A1 PCT/IB2010/003439 IB2010003439W WO2012076927A1 WO 2012076927 A1 WO2012076927 A1 WO 2012076927A1 IB 2010003439 W IB2010003439 W IB 2010003439W WO 2012076927 A1 WO2012076927 A1 WO 2012076927A1
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- WO
- WIPO (PCT)
- Prior art keywords
- layer
- diamond
- semiconductor
- semiconductor layers
- gallium
- Prior art date
Links
- 229910003460 diamond Inorganic materials 0.000 title claims abstract description 204
- 239000010432 diamond Substances 0.000 title claims abstract description 204
- 239000004065 semiconductor Substances 0.000 title claims abstract description 150
- 238000000034 method Methods 0.000 title claims abstract description 68
- 239000000758 substrate Substances 0.000 claims abstract description 73
- 239000013078 crystal Substances 0.000 claims abstract description 33
- 238000010168 coupling process Methods 0.000 claims abstract description 8
- 230000008878 coupling Effects 0.000 claims abstract description 7
- 238000005859 coupling reaction Methods 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims description 27
- 229910002601 GaN Inorganic materials 0.000 claims description 26
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 25
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 16
- NWAIGJYBQQYSPW-UHFFFAOYSA-N azanylidyneindigane Chemical compound [In]#N NWAIGJYBQQYSPW-UHFFFAOYSA-N 0.000 claims description 13
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052582 BN Inorganic materials 0.000 claims description 6
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 6
- 229910052732 germanium Inorganic materials 0.000 claims description 6
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 6
- 150000004767 nitrides Chemical class 0.000 claims description 6
- 229910005540 GaP Inorganic materials 0.000 claims description 5
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 claims description 5
- 229910052984 zinc sulfide Inorganic materials 0.000 claims description 5
- IHGSAQHSAGRWNI-UHFFFAOYSA-N 1-(4-bromophenyl)-2,2,2-trifluoroethanone Chemical compound FC(F)(F)C(=O)C1=CC=C(Br)C=C1 IHGSAQHSAGRWNI-UHFFFAOYSA-N 0.000 claims description 4
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 claims description 4
- 229910000673 Indium arsenide Inorganic materials 0.000 claims description 4
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 4
- 239000005083 Zinc sulfide Substances 0.000 claims description 4
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 4
- FTWRSWRBSVXQPI-UHFFFAOYSA-N alumanylidynearsane;gallanylidynearsane Chemical compound [As]#[Al].[As]#[Ga] FTWRSWRBSVXQPI-UHFFFAOYSA-N 0.000 claims description 4
- MDPILPRLPQYEEN-UHFFFAOYSA-N aluminium arsenide Chemical compound [As]#[Al] MDPILPRLPQYEEN-UHFFFAOYSA-N 0.000 claims description 4
- 229910052796 boron Inorganic materials 0.000 claims description 4
- VTGARNNDLOTBET-UHFFFAOYSA-N gallium antimonide Chemical compound [Sb]#[Ga] VTGARNNDLOTBET-UHFFFAOYSA-N 0.000 claims description 4
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 claims description 4
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 claims description 4
- DRDVZXDWVBGGMH-UHFFFAOYSA-N zinc;sulfide Chemical compound [S-2].[Zn+2] DRDVZXDWVBGGMH-UHFFFAOYSA-N 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 1
- 239000000463 material Substances 0.000 description 53
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 46
- 229910010271 silicon carbide Inorganic materials 0.000 description 45
- 230000008021 deposition Effects 0.000 description 21
- 238000005229 chemical vapour deposition Methods 0.000 description 20
- 238000001816 cooling Methods 0.000 description 20
- 229910052799 carbon Inorganic materials 0.000 description 18
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 17
- 230000001965 increasing effect Effects 0.000 description 15
- 238000005240 physical vapour deposition Methods 0.000 description 15
- 230000006911 nucleation Effects 0.000 description 14
- 238000010899 nucleation Methods 0.000 description 14
- 230000008569 process Effects 0.000 description 12
- 125000004432 carbon atom Chemical group C* 0.000 description 10
- 238000007740 vapor deposition Methods 0.000 description 10
- 238000000576 coating method Methods 0.000 description 9
- 239000003623 enhancer Substances 0.000 description 9
- 239000002245 particle Substances 0.000 description 9
- 239000000203 mixture Substances 0.000 description 8
- 230000037361 pathway Effects 0.000 description 8
- 229910052710 silicon Inorganic materials 0.000 description 8
- 230000007704 transition Effects 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 6
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 239000010703 silicon Substances 0.000 description 6
- 229910003481 amorphous carbon Inorganic materials 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 230000006870 function Effects 0.000 description 5
- 229910052738 indium Inorganic materials 0.000 description 5
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 230000004048 modification Effects 0.000 description 5
- 239000010936 titanium Substances 0.000 description 5
- 238000012546 transfer Methods 0.000 description 5
- 239000002131 composite material Substances 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 4
- 238000001182 laser chemical vapour deposition Methods 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 239000011651 chromium Substances 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 229910052733 gallium Inorganic materials 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 239000011572 manganese Substances 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 238000005498 polishing Methods 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 229910026551 ZrC Inorganic materials 0.000 description 2
- OTCHGXYCWNXDOA-UHFFFAOYSA-N [C].[Zr] Chemical compound [C].[Zr] OTCHGXYCWNXDOA-UHFFFAOYSA-N 0.000 description 2
- 230000009471 action Effects 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000003575 carbonaceous material Substances 0.000 description 2
- 238000003486 chemical etching Methods 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 239000012153 distilled water Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000010439 graphite Substances 0.000 description 2
- 229910002804 graphite Inorganic materials 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 2
- 238000000608 laser ablation Methods 0.000 description 2
- 229910052748 manganese Inorganic materials 0.000 description 2
- 150000001247 metal acetylides Chemical class 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- 238000002207 thermal evaporation Methods 0.000 description 2
- MTPVUVINMAGMJL-UHFFFAOYSA-N trimethyl(1,1,2,2,2-pentafluoroethyl)silane Chemical compound C[Si](C)(C)C(F)(F)C(F)(F)F MTPVUVINMAGMJL-UHFFFAOYSA-N 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 238000005019 vapor deposition process Methods 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- LTPBRCUWZOMYOC-UHFFFAOYSA-N beryllium oxide Inorganic materials O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 150000001721 carbon Chemical group 0.000 description 1
- 238000003763 carbonization Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000002178 crystalline material Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- QFXZANXYUCUTQH-UHFFFAOYSA-N ethynol Chemical group OC#C QFXZANXYUCUTQH-UHFFFAOYSA-N 0.000 description 1
- 238000004050 hot filament vapor deposition Methods 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 238000001727 in vivo Methods 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000010348 incorporation Methods 0.000 description 1
- 238000011534 incubation Methods 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 229910001635 magnesium fluoride Inorganic materials 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 239000013528 metallic particle Substances 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- VSZWPYCFIRKVQL-UHFFFAOYSA-N selanylidenegallium;selenium Chemical compound [Se].[Se]=[Ga].[Se]=[Ga] VSZWPYCFIRKVQL-UHFFFAOYSA-N 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000011856 silicon-based particle Substances 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 239000011343 solid material Substances 0.000 description 1
- 229910052950 sphalerite Inorganic materials 0.000 description 1
- WGPCGCOKHWGKJJ-UHFFFAOYSA-N sulfanylidenezinc Chemical compound [Zn]=S WGPCGCOKHWGKJJ-UHFFFAOYSA-N 0.000 description 1
- 229910052717 sulfur Inorganic materials 0.000 description 1
- 239000011593 sulfur Substances 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- UONOETXJSWQNOL-UHFFFAOYSA-N tungsten carbide Chemical compound [W+]#[C-] UONOETXJSWQNOL-UHFFFAOYSA-N 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
- 238000002211 ultraviolet spectrum Methods 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- -1 without limitation Substances 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0054—Processes for devices with an active region comprising only group IV elements
- H01L33/0058—Processes for devices with an active region comprising only group IV elements comprising amorphous semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02376—Carbon, e.g. diamond-like carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/02447—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02527—Carbon, e.g. diamond-like carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
Definitions
- the present invention relates generally to semiconductor devices and associated methods. Accordingly, the present invention involves the electrical and material science fields.
- Electronic devices generally contain printed circuit boards having integrally connected electronic components that allow the overall functionality of the device. These electronic components, such as processors, transistors, resistors, capacitors, light- emitting diodes (LEDs), etc., generate significant amounts of heat. As it builds, heat can cause various thermal problems associated with such electronic components. Significant amounts of heat can affect the reliability of an electronic device, or even cause it to fail by, for example, causing burn out or shorting both within the electronic components themselves and across the surface of the printed circuit board. Thus, the buildup of heat can ultimately affect the functional life of the electronic device. This is particularly problematic for electronic components with high power and high current demands, as well as for the printed circuit boards that support them.
- LEDs light- emitting diodes
- cooling devices have been employed such as fans, heat sinks, Peltier and liquid cooling devices, etc., as means of reducing heat buildup in electronic devices.
- cooling devices generally must increase in size to be effective and may also require power to operate.
- fans must be increased in size and speed to increase airflow
- heat sinks must be increased in size to increase heat capacity and surface area.
- the demand for smaller electronic devices not only precludes increasing the size of such cooling devices, but may also require a significant size decrease.
- a semiconductor device having a diamond substrate, a transparent diamond layer positioned parallel to the diamond substrate, and a plurality of semiconductor layers coupled between the transparent diamond layer and the diamond substrate.
- the semiconductor device is an LED device and the plurality of
- semiconductor layers is a plurality of LED nitride layers.
- the plurality of semiconductor layers can be arranged in a variety of configuration, however in one aspect the plurality of semiconductor layers may be arranged in series between the diamond substrate and the transparent diamond layer.
- the device may further include a SiC layer coupled to the transparent diamond layer and facing the plurality of semiconductor layers, such that the SiC layer is coupled to at least one of the plurality of semiconductor layers.
- the SiC layer is a single crystal SiC layer.
- the SiC layer has a crystal lattice that is substantially epitaxially matched to the transparent diamond layer.
- the SiC layer has a crystal lattice that is substantially epitaxially matched to at least one of the semiconductor layers.
- the devices according to aspects of the present invention also may include various electrodes.
- the device may include at least one of a p-type electrode or an n-type electrode electrically coupled to at least one of the semiconductor layers.
- the diamond substrate may be p-type doped, and the p-type electrode is the p-type doped diamond substrate.
- the diamond substrate is doped with boron to form the p-type doped diamond substrate.
- the plurality of semiconductor layers may include at least one of silicon germanium, gallium arsenide, gallium nitride, germanium, zinc sulfide, gallium phosphide, gallium antimonide, gallium indium arsenide phosphide, aluminum phosphide, aluminum arsenide, aluminum gallium arsenide, gallium nitride, boron nitride, aluminum nitride, indium arsenide, indium phosphide, indium antimonide, indium nitride, and combinations thereof.
- the semiconductor layers may include gallium nitride.
- the semiconductor layers may include aluminum nitride.
- the present invention also provides methods for making semiconductor devices.
- a method may include forming a transparent diamond layer having a SiC layer coupled thereto, where the SiC layer has a crystal structure that is substantially epitaxially matched to the transparent diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer, and coupling a diamond substrate to at least one of the plurality of semiconductor layers such that the diamond support is oriented parallel to the transparent diamond layer.
- such a method may further include electrically coupling at least one of a p-type electrode or an n-type electrode to at least one of the plurality of semiconductor layers.
- FIG. 1 is a cross-section view of a semiconductor device in accordance with one embodiment of the present invention.
- FIG. 2 is a cross-section view of a semiconductor device in accordance with one embodiment of the present invention.
- FIG. 3 is a cross-section view of a semiconductor device being constructed in accordance with one embodiment of the present invention.
- FIG. 4 is a cross-section view of an LED device in accordance with one embodiment of the present invention.
- FIG. 5 is a cross-section view of an LED device in accordance with one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
- heat transfer heat transfer
- heat movement heat transmission
- heat transmission can be used interchangeably, and refer to the movement of heat from an area of higher temperature to an area of cooler temperature. It is intended that the movement of heat include any mechanism of heat transmission known to one skilled in the art, such as, without limitation, conductive, convective, radiative, etc.
- the term “emitting” refers to the process of moving heat or light from a solid material into the air.
- light-emitting surface refers to a surface of a device or object from which light is intentionally emitted.
- Light may include visible light and light within the ultraviolet spectrum.
- An example of a light-emitting surface may include, without limitation, a nitride layer of an LED, or of semiconductor layers to be incorporated into an LED, from which light is emitted.
- CVD chemical vapor deposition
- diamond refers to a crystalline structure of carbon atoms bonded to other carbon atoms in a lattice of tetrahedral coordination known as sp 3 bonding. Specifically, each carbon atom is surrounded by and bonded to four other carbon atoms, each located on the tip of a regular tetrahedron. Further, the bond length between any two carbon atoms is 1.54 angstroms at ambient temperature conditions, and the angle between any two bonds is 109 degrees, 28 minutes, and 16 seconds although experimental results may vary slightly. The structure and nature of diamond, including its physical and electrical properties are well known in the art.
- distorted tetrahedral coordination refers to a tetrahedral bonding configuration of carbon atoms that is irregular, or has deviated from the normal tetrahedron configuration of diamond as described above. Such distortion generally results in lengthening of some bonds and shortening of others, as well as the variation of the bond angles between the bonds. Additionally, the distortion of the tetrahedron alters the characteristics and properties of the carbon to effectively lie between the characteristics of carbon bonded in sp 3 configuration (i.e. diamond) and carbon bonded in sp 2 configuration (i.e. graphite).
- amorphous diamond is amorphous diamond.
- amorphous diamond refers to a type of diamond-like carbon having carbon atoms as the majority element, with a substantial amount of such carbon atoms bonded in distorted tetrahedral coordination. In one aspect, the amount of carbon in the amorphous diamond can be at least about 90%, with at least about 20% of such carbon being bonded in distorted tetrahedral coordination. Amorphous diamond also has a higher atomic density than that of diamond (176 atoms/cm 3 ). Further, amorphous diamond and diamond materials contract upon melting.
- adynamic refers to a type of layer which is unable to independently retain its shape and/or strength. For example, in the absence of a mold or support layer, an adynamic diamond layer will tend to curl or otherwise deform when the mold or support surface is removed. While a number of reasons may contribute to the adynamic properties of a layer, in one aspect, the reason may be the extreme thinness of the layer.
- growth side and “grown surface” may be used interchangeably and refer to the surface of a film or layer which is grows during a CVD process.
- compositions that is “substantially free of particles would either completely lack particles, or so nearly completely lack particles that the effect would be the same as if it completely lacked particles.
- the present invention provides semiconductor devices having incorporated diamond layers and methods of making such devices.
- Semiconductor devices are often challenging to cool, particularly those that emit light. It should be noted that, even though much of the following description is devoted to light emitting devices such as LEDs, the scope of the claims of the present invention should not be limited thereby and that such teachings are equally applicable to other types of semiconductor devices.
- an LED may consist of a plurality of nitride layers arranged to emit light from a light-emitting surface.
- LEDs continue to be developed that have ever increasing power requirements. This trend of increasing power has created cooling problems for such devices. These cooling problems can be exacerbated by the typically small size of these devices, which may render heat sinks with traditional aluminum heat fins ineffective due to their bulky nature. Additionally, such traditional heat sinks block the emission of light if applied to the light- emitting surface of the LED.
- heat sinks cannot interfere with the function of the nitride layers or the light- emitting surface, they are often located at the junction between the LED and a supporting structure such as a circuit board. Such a heat sink location is relatively remote from the accumulation of much of the heat, namely, the light- emitting surface and the nitride layers.
- the maximum operating wattage of an LED may be exceeded by drawing heat from the semiconductor layers of the LED with a diamond layer in order to operate the LED at an operating wattage that is higher than the maximum operating wattage for that LED.
- More effective cooling can be achieved within a semiconductor device if diamond layers can be incorporated close to the semiconducting layers.
- One barrier to integration concerns the high dielectric properties of diamond materials, particularly those that have substantially single crystal lattice configurations.
- Optimum cooling conditions may be achieved if the diamond layer is within the conductive pathway of the semiconductor device, however such configurations have been difficult to achieve due to the dielectric properties of diamond. It has now been discovered that a conductive diamond layer can function as an electrode and be coupled to semiconductor layers and thus be within the conductive pathway of the device.
- LED devices can be constructed having a linear conductive pathway through the semiconductive layers between the electrodes.
- Many prior LED devices were constructed such that the conductive pathway from the n-type electrode was at a right angle to the conductive pathway from the p- type electrode.
- Such an "L" shaped conductive pathway caused electrons and holes to be oriented at right angles to one another, thus reducing the efficiency of the device.
- the linear conductive pathway according to aspects of the present invention causes electrons and holes to be oriented along the same linear pathway, thus improving the efficiency of the LED device.
- locating heat-generating semiconductor layers between layers of diamond materials in a "sandwich-like" configuration greatly improves the thermal cooling of semiconductor devices, particularly high power LEDs. It may be beneficial to utilize at least one of the diamond layers as a conductive diamond layer in some aspects, and as such, a high level of epitaxial lattice matching between the conductive diamond layer and an associated semiconductor layer is preferred. Although there may be thermal cooling benefits to lattice matching all associated diamond layers, diamond layers that are nonconductive do not necessarily require such matching.
- an LED device may include a diamond substrate 12, a transparent diamond layer 14 positioned parallel to the diamond substrate 12, and a plurality of semiconductor layers 16 coupled between the transparent diamond layer 14 and the diamond substrate 12. Light generated by the semiconductor layers 16 is emitted 15 through the transparent diamond layer 14.
- a reflective layer 13 may be applied to the diamond substrate 12 to reflect light that is emitted toward the diamond substrate 12 back through the semiconductor layers 16 and the transparent diamond layer 14 to thus improve the efficiency of the LED device.
- Such a refiective layer may be formed from a variety of reflective materials that are known to those of ordinary skill in the art. One example of such a refiective material would be a layer of chromium metal or other reflective metal.
- a SiC layer 18 may be coupled to the transparent diamond layer 14 in order to improve the lattice matching between the transparent diamond layer 14 and the semiconductor layers 16.
- the transparent diamond layer may also be conductive, thus functioning as an electrode for the semiconductor device.
- an electrode of opposite polarity may be coupled to the semiconductor layers opposite the transparent conductive diamond layer (not shown).
- Fig. 3 shows selected steps of a method constructing a semiconductor substrate that may be used to form an LED device according to particular aspects of the present invention.
- a single crystal Si growth substrate 34 is provided upon which other materials are formed. Although it is not required that the Si growth substrate be single crystal, such a single crystal lattice configuration may facilitate deposition of additional materials with fewer lattice mismatches as compared to a non-single crystal substrate. It may be beneficial to thoroughly clean the Si growth substrate to remove any non-crystalline Si or non-Si particles from the wafer prior to deposition that may affect the lattice mismatch between the Si growth substrate and the layers formed thereon. Any method of cleaning the Si growth substrate would be considered to be within the present scope, however, in one aspect the substrate can be soaked in KOH and ultrasonically cleaned with distilled water.
- an epitaxial layer of single crystal SiC 32 and an epitaxial transparent diamond layer 36 may be formed thereon, such that the single crystal SiC layer 32 is located between the Si growth substrate 34 and the transparent diamond layer 36.
- the SiC layer may be formed separately from the diamond layer, or it may be formed as a result of, or in conjunction with, the deposition of the diamond layer.
- the SiC layer may be formed as a result of a gradation process from Si to diamond, as is described below.
- the SiC layer may be created in vivo by the deposition of an amorphous diamond layer onto the Si growth substrate, as is also described below.
- a Si layer 38 may be deposited on the transparent diamond layer 36.
- the Si layer 38 improves the bonding of the Si carrier substrate 42 to the transparent diamond layer 36.
- the Si carrier substrate 42 has a Si(3 ⁇ 4 layer for bonding to the Si layer 38.
- the Si growth substrate 34 may be removed to expose the SiC layer 32.
- the SiC layer 32 may be used as a growth surface for the deposition of semiconductor materials (not shown).
- the Si carrier substrate 42 and the Si layer 38 may be removed to expose the transparent diamond layer 36.
- the diamond substrate may be coupled to the semiconductor layers as has been described (not shown).
- Diamond materials have excellent thermal conductivity properties that make them ideal for incorporation into semiconductor devices, such as LEDs.
- the transfer of heat that is present in the semiconductor device can thus be accelerated from the device through a diamond material.
- the present invention is not limited as to specific theories of heat transmission.
- the accelerated movement of heat from inside the device can be at least partially due to heat movement into and through a diamond layer. Due to the heat conductive properties of diamond, heat can rapidly spread laterally through the diamond layer and to the edges of a semiconductor device. Heat present around the edges will be more rapidly dissipated into the air or into surrounding structures, such as heat spreaders or device supports.
- heat can be conducted through a semiconductor material to a DLC layer, spread laterally through the DLC layer, and subsequently emitted to the air along the edges or other exposed surfaces. Due to the high heat conductive and radiative properties of DLC, heat movement from the DLC layer to air can be greater than heat movement from the semiconductor layer to air. Also, heat movement from the semiconductor device to the DLC layer can be greater than heat movement from the semiconductor device to the air. As such, the layer of DLC can serve to accelerate heat transfer away from the semiconductor layer more rapidly than heat can be transferred through the semiconductor device itself, or from the semiconductor device to the air.
- various diamond materials may be utilized to provide accelerated heat transferring properties to a semiconductor device.
- Non-limiting examples of such diamond materials may include diamond, DLC, amorphous diamond, and combinations thereof. It should be noted, however, that any form of natural or synthetic diamond material that may be utilized to cool a semiconductor device is considered to be within the present scope.
- diamond layers may be formed by any means known, including various vapor deposition techniques. Any number of known vapor deposition techniques may be used to form these diamond layers. The most common vapor deposition techniques include chemical vapor deposition (CVD) and physical vapor deposition (PVD), although any similar method can be used if similar properties and results are obtained.
- CVD chemical vapor deposition
- PVD physical vapor deposition
- CVD techniques such as hot filament, microwave plasma, oxyacetylene flame, rf-CVD, laser CVD (LCVD), metal-organic CVD (MOCVD), laser ablation, conformal diamond coating processes, and direct current arc techniques may be utilized.
- Typical CVD techniques use gas reactants to deposit the diamond or diamond-like material in a layer, or film. These gases generally include a small amount (i.e. less than about 5%) of a carbonaceous material, such as methane, diluted in hydrogen.
- gases generally include a small amount (i.e. less than about 5%) of a carbonaceous material, such as methane, diluted in hydrogen.
- a variety of specific CVD processes, including equipment and conditions, as well as those used for boron nitride layers, are well known to those skilled in the art.
- PVD techniques such as sputtering, cathodic arc, and thermal evaporation may be utilized.
- specific deposition conditions may be used in order to adjust the exact type of material to be formed, whether DLC, amorphous diamond, or pure diamond.
- many semiconductor devices such as LEDs may be degraded by high temperature. Care may need to be taken to avoid damage during diamond deposition by forming at lower temperatures.
- the semiconductor contains InN, deposition temperatures of up to about 600 ° C may be used.
- layers may be thermally stable up to about 1000 ° C.
- preformed layers can be brazed, glued, or otherwise affixed to the semiconductor layer or to a support substrate of the semiconductor device using methods which do not unduly interfere with the heat transference of the diamond layer or the functionality of the device.
- An optional nucleation enhancing layer can be formed on the growth surface of a substrate in order to improve the quality and deposition time of a diamond layer.
- a diamond layer can be formed by depositing applicable nuclei, such as diamond nuclei, on a diamond growth surface of a substrate and then growing the nuclei into a film or layer using a vapor deposition technique.
- a thin nucleation enhancer layer can be coated upon the substrate to enhance the growth of the diamond layer. Diamond nuclei are then placed upon the nucleation enhancer layer, and the growth of the diamond layer proceeds via CVD.
- the nucleation enhancer may be a material selected from the group consisting of metals, metal alloys, metal compounds, carbides, carbide formers, and mixtures thereof.
- carbide forming materials may include, without limitation, tungsten (W), tantalum (Ta), titanium (Ti), zirconium (Zr), chromium (Cr), molybdenum (Mo), silicon (Si), and manganese (Mn).
- carbides include tungsten carbide (WC), silicon carbide (SiC), titanium carbide (TiC), zirconium carbide (ZrC), and mixtures thereof among others.
- the nucleation enhancer layer when used, is a layer which is thin enough that it does not to adversely affect the thermal transmission properties of the diamond layer.
- the thickness of the nucleation enhancer layer may be less than about 0.1 micrometers. In another aspect, the thickness may be less than about 10 nanometers. In yet another aspect, the thickness of the nucleation enhancer layer is less than about 5 nanometers. In a further aspect of the invention, the thickness of the nucleation enhancer layer is less than about 3 nanometers.
- diamond particle quality can be increased by reducing the methane flow rate, and increasing the total gas pressure during the early phase of diamond deposition. Such measures, decrease the decomposition rate of carbon, and increase the concentration of hydrogen atoms. Thus a significantly higher percentage of the carbon will be deposited in a sp 3 bonding configuration, and the quality of the diamond nuclei formed is increased.
- the nucleation rate of diamond particles deposited on the growth surface of the substrate or the nucleation enhancer layer may be increased in order to reduce the amount of interstitial space between diamond particles.
- ways to increase nucleation rates include, but are not limited to; applying a negative bias in an appropriate amount, often about 100 volts, to the growth surface; polishing the growth surface with a fine diamond paste or powder, which may partially remain on the growth surface; and controlling the composition of the growth surface such as by ion implantation of C, Si, Cr, Mn, Ti, V, Zr, W, Mo, Ta, and the like by PVD or PECVD.
- PVD processes are typically at lower temperatures than CVD processes and in some cases can be below about 200° C such as about 150° C. Other methods of increasing diamond nucleation will be readily apparent to those skilled in the art.
- the diamond layer may be formed as a conformal diamond layer.
- Conformal diamond coating processes can provide a number of advantages over conventional diamond film processes. Conformal diamond coating can be performed on a wide variety of substrates, including non-planar substrates.
- a growth surface can be pretreated under diamond growth conditions in the absence of a bias to form a carbon film.
- the diamond growth conditions can be conditions that are conventional CVD deposition conditions for diamond without an applied bias.
- a thin carbon film can be formed which is typically less than about 100 angstroms.
- the pretreatment step can be performed at almost any growth temperature such as from about 200 °C to about 900 °C, although lower temperatures below about 500 °C may be preferred.
- the thin carbon film appears to form within a short time, e.g., less than one hour, and is a hydrogen terminated amorphous carbon.
- the growth surface may then be subjected to diamond growth conditions to form a conformal diamond layer.
- the diamond growth conditions may be those conditions which are commonly used in traditional CVD diamond growth.
- the diamond film produced using the above pretreatment steps results in a conformal diamond film that typically begins growth substantially over the entire growth surface with substantially no incubation time.
- a continuous film e.g. substantially no grain boundaries, can develop within about 80 nm of growth. Diamond layers having substantially no grain boundaries may move heat more efficiently than those layers having grain boundaries.
- various techniques may be employed to render a diamond layer conductive. Such techniques are known to those of ordinary skill in the art.
- various impurities may be doped into the crystal lattice of the diamond layer.
- Such impurities may include elements such as Si, B, P, N, Li, Al, Ga, etc.
- the diamond layer may be doped with B.
- Impurities may also include metallic particles within the crystal lattice, provided they do not interfere with the function of the device, such as by blocking light emitted from an LED.
- such a substrate includes a substantially single crystal diamond layer having a substantially single crystal SiC layer epitaxially coupled thereto.
- the substantially single crystal nature of the SiC layer facilitates the deposition of a semiconductor such as GaN or AIN as a substantially single crystal. Additionally, the epitaxial relationship from the diamond layer through the SiC layer and to the semiconductor layer increases thermal conduction to the diamond layer, thus improving the cooling properties of the device.
- such a substrate may be created by grading a single crystal Si wafer into a single crystal diamond layer.
- the Si wafer would gradually transition from Si to SiC and then to diamond.
- Techniques for such grading are further discussed in the Applicant's copending U.S. Patent Application entitled “Graded Crystalline Materials And Associated Methods", and filed on May 3 1, 2007 under Attorney Docket No. 00802- 32733.NP, which is incorporated herein by reference.
- substantially single crystal diamond layers are substantially transparent to light and are thus useful in constructing light-emitting semiconductor devices such as LEDs and laser diodes.
- the resulting structure includes a substantially single crystal diamond layer having a substantially single crystal SiC layer epitaxially coupled thereto.
- Semiconductor layers may be epitaxially formed on the SiC layer by any method know to one of ordinary skill in the art. In one aspect such deposition may occur in a graded manner similar to the techniques used in forming the diamond layer on the Si wafer.
- a diamond support may be coupled thereto.
- Numerous methods of coupling are known to one of ordinary skill in the art, such as brazing, gluing, annealing, etc. It should be noted that any coupling method may be used, provided the functionality of the diamond support is not substantially affected.
- a reflective layer of a carbide forming metal may be applied to a surface of a semiconductor layer.
- One example of such a metal is titanium.
- the diamond support may then be formed on the titanium reflective layer and thus coupled to the semiconductive layer by titanium carbide bonds forming between the reflective layer and the diamond substrate.
- the diamond layers according to aspects of the present invention may be of any thickness that would allow thermal cooling of a semiconductor device. Thicknesses may vary depending on the application and the semiconductor device configuration. For example, greater cooling requirements may require thicker diamond layers.
- the thickness may also vary depending on the material used in the diamond layer. That being said, in one aspect a diamond layer may be from about 10 to about 50 microns thick. In another example, a diamond layer may be less than or equal to about 10 microns thick. In yet another example, a diamond layer may be from about 50 microns to about 100 microns thick. In a further example, a diamond layer may be greater than about 50 microns thick. In yet a further example, a diamond layer may be an adynamic diamond layer.
- SiC layers according to aspects of the present invention may have a variety of thicknesses, depending on the method of deposition of the SiC layer and the intended uses of the device.
- the SiC layer may be merely thick enough to orient the crystal lattice of the layers being formed thereon.
- thicker SiC layers may be beneficial.
- the SiC layer may be less than or equal to about 1 micron thick.
- the SiC layer may be less than or equal to about 500 nanometers thick.
- the SiC layer may be less than or equal to about 1 nanometer thick.
- the SiC layer may be greater than about 1 micron thick.
- the semiconductor devices according to aspects of the present invention include a plurality of semiconductor layers associated with one or more diamond layers. These semiconductor layers may be associated with a diamond layer by a variety of methods known to one of ordinary skill in the art. In one aspect of the present invention, however, one or more semiconductor layers may be formed on a diamond layer, or as is described above, on a SiC layer coupled to a diamond layer.
- a semiconductor layer may be formed on a substrate such as a SiC layer using a variety of techniques known to those of ordinary skill in the art.
- a substrate such as a SiC layer
- MOCVD process is a technique known to those of ordinary skill in the art.
- the semiconductor layer may include any material that is suitable for forming electronic devices, semiconductor devices, or the like. Many semiconductors are based on silicon, gallium, indium, and germanium. However, suitable materials for the semiconductor layer can include, without limitation, silicon, silicon carbide, silicon germanium, gallium arsenide, gallium nitride, germanium, zinc sulfide, gallium phosphide, gallium antimonide, gallium indium arsenide phosphide, aluminum phosphide, aluminum arsenide, aluminum gallium arsenide, gallium nitride, boron nitride, aluminum nitride, indium arsenide, indium phosphide, indium antimonide, indium nitride, and composites thereof.
- the semiconductor layer can include silicon, silicon carbide, gallium arsenide, gallium nitride, gallium phosphide, aluminum nitride, indium nitride, indium gallium nitride, aluminum gallium nitride, or composites of these materials.
- non-silicon based devices can be formed such as those based on gallium arsenide, gallium nitride, germanium, boron nitride, aluminum nitride, indium-based materials, and composites thereof.
- the semiconductor layer can comprise gallium nitride, indium gallium nitride, indium nitride, and combinations thereof.
- the semiconductor material is gallium nitride.
- the semiconductor material is aluminum nitride.
- Other semiconductor materials which can be used include AI2O3, BeO, W, Mo, C-Y2O3, c- (Yo.9Lao.
- the semiconductor layer may include any semiconductor material known, and should not be limited to those materials described herein. Additionally, semiconductor materials may be of any structural configuration known, for example, without limitation, cubic (zincblende or sphalerite), wurtzitic, rhombohedral, graphitic, turbostratic, pyrolytic, hexagonal, amorphous, or combinations thereof. As has been described, the semiconductor layer 14 may be formed by any method known to one of ordinary skill in the art.
- vapor deposition can be utilized to deposit such layers and that allow deposition to occur in a graded manner.
- surface processing may be performed between any of the deposition steps described in order to provide a smooth surface for subsequent deposition. Such processing may be accomplished by any means known, such as by chemical etching, polishing, buffing, grinding, etc.
- Such a gradual transition may greatly reduce the lattice mismatch observed when forming ⁇ on InN directly.
- Surface processing may be performed between any of the deposition steps described in order to provide a smooth surface for subsequent deposition. Such processing may be accomplished by any means known, such as by chemical etching, polishing, buffing, grinding, etc.
- electrodes may be incorporated into an LED device as an electrical contact for the semiconductive layers.
- Various electrodes, particularly p-type and n-type electrodes, including their use and formation, are well known to those of ordinary skill in the art, and will not be discussed in detail herein.
- a "flip-chip" design for an LED device is described.
- a semiconductor substrate 42 is made as described above and as shown in FIG. 3.
- An n-type semiconductive material 44 such as n-Gan is formed on the semiconductor substrate 42, followed by the formation of MQW layers 46, and a p-type semiconductor material 48 such as p-GaN.
- the n-type semiconductive material 44 is electrically coupled to an n-type electrode 50
- the p-type semiconductive material 48 is electrically coupled to a p-type electrode 52.
- a reflective layer 54 and associated diamond substrate 56 may then be flip-chip bonded to the n-type electrode 50 and the p-type electrode 52. If the reflective layer 54 is conductive it may require division into two electrically isolated portions to facilitate functionality of the device (not shown).
- the nontransparent layers of the semiconductor substrate need to be removed to expose the transparent diamond layer 58.
- light is generated by the semiconductor layers and emitted 62 through the SiC layer 60 and the transparent diamond layer 58. Additionally, light that is transmitted toward the diamond substrate 56 is reflected by the reflective layer 54 and transmitted back through the semiconductor layers to be emitted through the transparent diamond layer 58. Examples
- a single crystal Si wafer is obtained and cleaned by soaking in KOH and ultrasound cleaning with distilled water to remove any non- crystalline Si and foreign debris.
- a conformal amorphous carbon coating is applied to the cleaned surface of the Si wafer by exposing the wafer to CVD deposition conditions without an applied bias. Following carbonization of the surface, amorphous diamond is deposited for approximately 30 minutes at 800° in 1 % CFL4 and 99% H 2 . The amorphous carbon coating is then removed with H 2 or F 2 treatment for about 60 minutes, at 900°. Removal of the amorphous carbon coating exposes an epitaxial SiC layer that has formed in situ between the Si wafer and the amorphous carbon coating. The thickness of the SiC layer is approximately 10 nm.
- a transparent diamond coating 10 microns thick is then deposited onto the SiC layer by CVD deposition of CFL4 for approximately 10 hours. After 10 hours, the CH 4 source is then switched to S1FL4 for approximately 10 minutes to deposit a 1 micron thick Si layer.
- An LED device may be constructed as follows:
- a semiconductor substrate is obtained as in Example 1.
- GaN semiconductor layers are deposited onto the exposed SiC layer by MOCVD with GaFb and NH3 source materials.
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Abstract
Semiconductor devices and methods for making such devices are provided. One such method may include forming a transparent diamond layer having a SiC layer coupled thereto, where the SiC layer has a crystal structure that is substantially epitaxially matched to the transparent diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer, and coupling a diamond substrate to at least one of the plurality of semiconductor layers such that the diamond support is oriented parallel to the transparent diamond layer. In one aspect such a method may further include electrically coupling at least one of a p-type electrode or an n-type electrode to at least one of the plurality of semiconductor layers.
Description
DIAMOND SEMICONDUCTOR DEVICES AND ASSOCIATED METHODS
FIELD OF THE INVENTION
The present invention relates generally to semiconductor devices and associated methods. Accordingly, the present invention involves the electrical and material science fields.
BACKGROUND OF THE INVENTION
In many developed countries, major portions of the populations consider electronic devices to be integral to their lives. Such increasing use and dependence has generated a demand for electronics devices that are smaller and faster. As electronic circuitry increases in speed and decreases in size, cooling of such devices becomes problematic.
Electronic devices generally contain printed circuit boards having integrally connected electronic components that allow the overall functionality of the device. These electronic components, such as processors, transistors, resistors, capacitors, light- emitting diodes (LEDs), etc., generate significant amounts of heat. As it builds, heat can cause various thermal problems associated with such electronic components. Significant amounts of heat can affect the reliability of an electronic device, or even cause it to fail by, for example, causing burn out or shorting both within the electronic components themselves and across the surface of the printed circuit board. Thus, the buildup of heat can ultimately affect the functional life of the electronic device. This is particularly problematic for electronic components with high power and high current demands, as well as for the printed circuit boards that support them.
Various cooling devices have been employed such as fans, heat sinks, Peltier and liquid cooling devices, etc., as means of reducing heat buildup in electronic devices. As increased speed and power consumption cause increasing heat buildup, such cooling devices generally must increase in size to be effective and may also require power to operate. For example, fans must be increased in size and speed to increase airflow, and heat sinks must be increased in size to increase heat capacity and surface area. The demand for smaller electronic devices, however, not only precludes increasing the size of such cooling devices, but may also require a significant size decrease.
As a result, methods and associated devices are being sought to provide adequate cooling of electronic devices while minimizing size and power constraints placed on such devices due to cooling.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides diamond semiconductor devices having improved thermal properties and methods for making such devices. In one aspect, for example, a semiconductor device is provided having a diamond substrate, a transparent diamond layer positioned parallel to the diamond substrate, and a plurality of semiconductor layers coupled between the transparent diamond layer and the diamond substrate. In one specific aspect, the semiconductor device is an LED device and the plurality of
semiconductor layers is a plurality of LED nitride layers. The plurality of semiconductor layers can be arranged in a variety of configuration, however in one aspect the plurality of semiconductor layers may be arranged in series between the diamond substrate and the transparent diamond layer.
In various aspects of the present invention, semiconductor devices are provided having very low lattice mismatches between material layers. Such low lattice mismatches may be achieved through the use of a high quality SiC layer. In one aspect, for example, the device may further include a SiC layer coupled to the transparent diamond layer and facing the plurality of semiconductor layers, such that the SiC layer is coupled to at least one of the plurality of semiconductor layers. In another aspect the SiC layer is a single crystal SiC layer. In yet another aspect the SiC layer has a crystal lattice that is substantially epitaxially matched to the transparent diamond layer. In a further aspect, the SiC layer has a crystal lattice that is substantially epitaxially matched to at least one of the semiconductor layers.
The devices according to aspects of the present invention also may include various electrodes. In one aspect, for example, the device may include at least one of a p-type electrode or an n-type electrode electrically coupled to at least one of the semiconductor layers. In another aspect, the diamond substrate may be p-type doped, and the p-type electrode is the p-type doped diamond substrate. In one specific aspect, the diamond substrate is doped with boron to form the p-type doped diamond substrate.
A variety of semiconductor materials may be used in various aspects the present invention depending on the intended use of resulting devices. For example, and without limitation, the plurality of semiconductor layers may include at least one of silicon germanium, gallium arsenide, gallium nitride, germanium, zinc sulfide, gallium phosphide, gallium antimonide, gallium indium arsenide phosphide, aluminum phosphide, aluminum arsenide, aluminum gallium arsenide, gallium nitride, boron nitride, aluminum nitride, indium arsenide, indium phosphide, indium antimonide, indium nitride, and combinations
thereof. In one specific aspect the semiconductor layers may include gallium nitride. In another specific aspect the semiconductor layers may include aluminum nitride.
The present invention also provides methods for making semiconductor devices. In one aspect such a method may include forming a transparent diamond layer having a SiC layer coupled thereto, where the SiC layer has a crystal structure that is substantially epitaxially matched to the transparent diamond layer, forming epitaxially a plurality of semiconductor layers on the SiC layer, and coupling a diamond substrate to at least one of the plurality of semiconductor layers such that the diamond support is oriented parallel to the transparent diamond layer. In another aspect such a method may further include electrically coupling at least one of a p-type electrode or an n-type electrode to at least one of the plurality of semiconductor layers.
There has thus been outlined, rather broadly, various features of the invention so that the detailed description thereof that follows may be better understood, and so that the present contribution to the art may be better appreciated. Other features of the present invention will become clearer from the following detailed description of the invention, taken with the accompanying claims, or may be learned by the practice of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a cross-section view of a semiconductor device in accordance with one embodiment of the present invention.
FIG. 2 is a cross-section view of a semiconductor device in accordance with one embodiment of the present invention.
FIG. 3 is a cross-section view of a semiconductor device being constructed in accordance with one embodiment of the present invention.
FIG. 4 is a cross-section view of an LED device in accordance with one embodiment of the present invention.
FIG. 5 is a cross-section view of an LED device in accordance with one embodiment of the present invention. DETAILED DESCRIPTION OF THE INVENTION
Definitions
In describing and claiming the present invention, the following terminology will be used in accordance with the definitions set forth below.
The singular forms "a," "an," and, "the" include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to "a heat source" includes reference to one or more of such sources, and reference to "the diamond layer" includes reference to one or more of such layers.
The terms "heat transfer," "heat movement," and "heat transmission" can be used interchangeably, and refer to the movement of heat from an area of higher temperature to an area of cooler temperature. It is intended that the movement of heat include any mechanism of heat transmission known to one skilled in the art, such as, without limitation, conductive, convective, radiative, etc.
As used herein, the term "emitting" refers to the process of moving heat or light from a solid material into the air.
As used herein, "light-emitting surface" refers to a surface of a device or object from which light is intentionally emitted. Light may include visible light and light within the ultraviolet spectrum. An example of a light-emitting surface may include, without limitation, a nitride layer of an LED, or of semiconductor layers to be incorporated into an LED, from which light is emitted.
As used herein, "vapor deposited" refers to materials which are formed using vapor deposition techniques. "Vapor deposition" refers to a process of forming or depositing materials on a substrate through the vapor phase. Vapor deposition processes can include any process such as, but not limited to, chemical vapor deposition (CVD) and physical vapor deposition (PVD). A wide variety of variations of each vapor deposition method can be performed by those skilled in the art. Examples of vapor deposition methods include hot filament CVD, rf-CVD, laser CVD (LCVD), laser ablation, conformal diamond coating processes, metal-organic CVD (MOCVD), sputtering, thermal evaporation PVD, ionized metal PVD (IMPVD), electron beam PVD (EBPVD), reactive PVD, and the like.
As used herein, "chemical vapor deposition," or "CVD" refers to any method of chemically forming or depositing diamond particles in a vapor form upon a surface. Various CVD techniques are well known in the art.
As used herein, "physical vapor deposition," or "PVD" refers to any method of physically forming or depositing diamond particles in a vapor form upon a surface. Various PVD techniques are well known in the art.
As used herein, "diamond" refers to a crystalline structure of carbon atoms bonded to other carbon atoms in a lattice of tetrahedral coordination known as sp3 bonding. Specifically, each carbon atom is surrounded by and bonded to four other carbon atoms, each
located on the tip of a regular tetrahedron. Further, the bond length between any two carbon atoms is 1.54 angstroms at ambient temperature conditions, and the angle between any two bonds is 109 degrees, 28 minutes, and 16 seconds although experimental results may vary slightly. The structure and nature of diamond, including its physical and electrical properties are well known in the art.
As used herein, "distorted tetrahedral coordination" refers to a tetrahedral bonding configuration of carbon atoms that is irregular, or has deviated from the normal tetrahedron configuration of diamond as described above. Such distortion generally results in lengthening of some bonds and shortening of others, as well as the variation of the bond angles between the bonds. Additionally, the distortion of the tetrahedron alters the characteristics and properties of the carbon to effectively lie between the characteristics of carbon bonded in sp3 configuration (i.e. diamond) and carbon bonded in sp2 configuration (i.e. graphite). One example of material having carbon atoms bonded in distorted tetrahedral bonding is amorphous diamond.
As used herein, "diamond- like carbon" refers to a carbonaceous material having carbon atoms as the majority element, with a substantial amount of such carbon atoms bonded in distorted tetrahedral coordination. Diamond-like carbon (DLC) can typically be formed by PVD processes, although CVD or other processes could be used such as vapor deposition processes. Notably, a variety of other elements can be included in the DLC material as either impurities, or as dopants, including without limitation, hydrogen, sulfur, phosphorous, boron, nitrogen, silicon, tungsten, etc.
As used herein, "amorphous diamond" refers to a type of diamond-like carbon having carbon atoms as the majority element, with a substantial amount of such carbon atoms bonded in distorted tetrahedral coordination. In one aspect, the amount of carbon in the amorphous diamond can be at least about 90%, with at least about 20% of such carbon being bonded in distorted tetrahedral coordination. Amorphous diamond also has a higher atomic density than that of diamond (176 atoms/cm3). Further, amorphous diamond and diamond materials contract upon melting.
As used herein, "adynamic" refers to a type of layer which is unable to independently retain its shape and/or strength. For example, in the absence of a mold or support layer, an adynamic diamond layer will tend to curl or otherwise deform when the mold or support surface is removed. While a number of reasons may contribute to the adynamic properties of a layer, in one aspect, the reason may be the extreme thinness of the layer.
As used herein, "growth side," and "grown surface" may be used interchangeably and refer to the surface of a film or layer which is grows during a CVD process.
As used herein, "substrate" refers to a support surface to which various materials can be joined in forming a semiconductor or semiconductor-on-diamond device. The substrate may be any shape, thickness, or material, required in order to achieve a specific result, and includes but is not limited to metals, alloys, ceramics, and mixtures thereof. Further, in some aspects, the substrate may be an existing semiconductor device or wafer, or may be a material which is capable of being joined to a suitable device.
As used herein, the term "substantially" refers to the complete or nearly
complete extent or degree of an action, characteristic, property, state, structure, item, or result. For example, an object that is "substantially" enclosed would mean that the object is either completely enclosed or nearly completely enclosed. The exact allowable degree of deviation from absolute completeness may in some cases depend on the specific context. However, generally speaking the nearness of completion will be so as to have the same overall result as if absolute and total completion were obtained. The use
of "substantially" is equally applicable when used in a negative connotation to refer to the complete or near complete lack of an action, characteristic, property, state, structure, item, or result. For example, a composition that is "substantially free of particles would either completely lack particles, or so nearly completely lack particles that the effect would be the same as if it completely lacked particles. In other words, a composition that is
"substantially free of an ingredient or element may still actually contain such item as long as there is no measurable effect thereof.
As used herein, the term "about" is used to provide flexibility to a numerical range endpoint by providing that a given value may be "a little above" or "a little below" the endpoint.
As used herein, a plurality of items, structural elements, compositional elements, and/or materials may be presented in a common list for convenience. However, these lists should be construed as though each member of the list is individually identified as a separate and unique member. Thus, no individual member of such list should be construed as a de facto equivalent of any other member of the same list solely based on their presentation in a common group without indications to the contrary.
Concentrations, amounts, and other numerical data may be expressed or presented herein in a range format. It is to be understood that such a range format is used merely for convenience and brevity and thus should be interpreted flexibly to include not only the
numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited. As an illustration, a numerical range of "about 1 to about 5" should be interpreted to include not only the explicitly recited values of about 1 to about 5, but also include individual values and sub-ranges within the indicated range. Thus, included in this numerical range are individual values such as 2, 3, and 4 and sub-ranges such as from 1-3, from 2-4, and from 3-5, etc., as well as 1, 2, 3, 4, and 5, individually.
This same principle applies to ranges reciting only one numerical value as a minimum or a maximum. Furthermore, such an interpretation should apply regardless of the breadth of the range or the characteristics being described.
The Invention
The present invention provides semiconductor devices having incorporated diamond layers and methods of making such devices. Semiconductor devices are often challenging to cool, particularly those that emit light. It should be noted that, even though much of the following description is devoted to light emitting devices such as LEDs, the scope of the claims of the present invention should not be limited thereby and that such teachings are equally applicable to other types of semiconductor devices.
Much of the heat generated by semiconductor devices tends to build up within the semiconducting layers, thus affecting the efficiency of the device. For example, an LED may consist of a plurality of nitride layers arranged to emit light from a light-emitting surface. As they have become increasingly important in electronics and lighting devices, LEDs continue to be developed that have ever increasing power requirements. This trend of increasing power has created cooling problems for such devices. These cooling problems can be exacerbated by the typically small size of these devices, which may render heat sinks with traditional aluminum heat fins ineffective due to their bulky nature. Additionally, such traditional heat sinks block the emission of light if applied to the light- emitting surface of the LED. Because heat sinks cannot interfere with the function of the nitride layers or the light- emitting surface, they are often located at the junction between the LED and a supporting structure such as a circuit board. Such a heat sink location is relatively remote from the accumulation of much of the heat, namely, the light- emitting surface and the nitride layers.
It has been discovered that forming a diamond layer within the LED package allows adequate cooling even at high power, while at the same time maintaining a small LED package size. Additionally, in one aspect the maximum operating wattage of an LED may
be exceeded by drawing heat from the semiconductor layers of the LED with a diamond layer in order to operate the LED at an operating wattage that is higher than the maximum operating wattage for that LED.
Additionally, in both semiconductor devices that emit light and those that don't, heat may be trapped within the semiconducting layers due to the relatively poor thermal conductivity of materials that often make up these layers. Additionally, crystal lattice mismatches between semiconductive layers slow the conduction of heat, thus facilitating further heat buildup. Semiconductor devices have now been developed incorporating layers of diamond that provide, among other things, improved cooling properties to the device. Such layers of diamond increase the flow of heat laterally through the semiconductor device to thus reduce the amount of heat trapped within the semiconductor layers. This lateral heat transmission may thus effectively improve the thermal properties of many semiconductor devices. Furthermore, devices according to aspects of the present invention have increased lattice matching, thus further improving their thermal cooling properties. Additionally, it should be noted that the beneficial properties provided by diamond layers may extend beyond cooling, and as such, the present scope should not be limited thereto.
More effective cooling can be achieved within a semiconductor device if diamond layers can be incorporated close to the semiconducting layers. One barrier to integration concerns the high dielectric properties of diamond materials, particularly those that have substantially single crystal lattice configurations. Optimum cooling conditions may be achieved if the diamond layer is within the conductive pathway of the semiconductor device, however such configurations have been difficult to achieve due to the dielectric properties of diamond. It has now been discovered that a conductive diamond layer can function as an electrode and be coupled to semiconductor layers and thus be within the conductive pathway of the device.
Additionally, by utilizing a conductive diamond layer as an electrode, LED devices can be constructed having a linear conductive pathway through the semiconductive layers between the electrodes. Many prior LED devices were constructed such that the conductive pathway from the n-type electrode was at a right angle to the conductive pathway from the p- type electrode. Such an "L" shaped conductive pathway caused electrons and holes to be oriented at right angles to one another, thus reducing the efficiency of the device. The linear conductive pathway according to aspects of the present invention causes electrons and holes to be oriented along the same linear pathway, thus improving the efficiency of the LED device.
Furthermore, it has been discovered that locating heat-generating semiconductor layers between layers of diamond materials in a "sandwich-like" configuration greatly improves the thermal cooling of semiconductor devices, particularly high power LEDs. It may be beneficial to utilize at least one of the diamond layers as a conductive diamond layer in some aspects, and as such, a high level of epitaxial lattice matching between the conductive diamond layer and an associated semiconductor layer is preferred. Although there may be thermal cooling benefits to lattice matching all associated diamond layers, diamond layers that are nonconductive do not necessarily require such matching.
Accordingly, in one aspect of the present invention, an LED device is provided. As is shown in FIG. 1, such a device may include a diamond substrate 12, a transparent diamond layer 14 positioned parallel to the diamond substrate 12, and a plurality of semiconductor layers 16 coupled between the transparent diamond layer 14 and the diamond substrate 12. Light generated by the semiconductor layers 16 is emitted 15 through the transparent diamond layer 14. A reflective layer 13 may be applied to the diamond substrate 12 to reflect light that is emitted toward the diamond substrate 12 back through the semiconductor layers 16 and the transparent diamond layer 14 to thus improve the efficiency of the LED device. Such a refiective layer may be formed from a variety of reflective materials that are known to those of ordinary skill in the art. One example of such a refiective material would be a layer of chromium metal or other reflective metal.
In another aspect, as is shown in FIG. 2, a SiC layer 18 may be coupled to the transparent diamond layer 14 in order to improve the lattice matching between the transparent diamond layer 14 and the semiconductor layers 16. In some aspects the transparent diamond layer may also be conductive, thus functioning as an electrode for the semiconductor device. In such cases, an electrode of opposite polarity may be coupled to the semiconductor layers opposite the transparent conductive diamond layer (not shown).
Fig. 3 shows selected steps of a method constructing a semiconductor substrate that may be used to form an LED device according to particular aspects of the present invention. A single crystal Si growth substrate 34 is provided upon which other materials are formed. Although it is not required that the Si growth substrate be single crystal, such a single crystal lattice configuration may facilitate deposition of additional materials with fewer lattice mismatches as compared to a non-single crystal substrate. It may be beneficial to thoroughly clean the Si growth substrate to remove any non-crystalline Si or non-Si particles from the wafer prior to deposition that may affect the lattice mismatch between the Si growth substrate and the layers formed thereon. Any method of cleaning the Si growth substrate
would be considered to be within the present scope, however, in one aspect the substrate can be soaked in KOH and ultrasonically cleaned with distilled water.
Following cleaning of the Si growth substrate 34, an epitaxial layer of single crystal SiC 32 and an epitaxial transparent diamond layer 36 may be formed thereon, such that the single crystal SiC layer 32 is located between the Si growth substrate 34 and the transparent diamond layer 36. The SiC layer may be formed separately from the diamond layer, or it may be formed as a result of, or in conjunction with, the deposition of the diamond layer. For example, the SiC layer may be formed as a result of a gradation process from Si to diamond, as is described below. Additionally, the SiC layer may be created in vivo by the deposition of an amorphous diamond layer onto the Si growth substrate, as is also described below.
Subsequently, a Si layer 38 may be deposited on the transparent diamond layer 36. The Si layer 38 improves the bonding of the Si carrier substrate 42 to the transparent diamond layer 36. The Si carrier substrate 42 has a Si(¾ layer for bonding to the Si layer 38. Following the wafer bonding of the Si carrier substrate 42 to the Si layer 38, the Si growth substrate 34 may be removed to expose the SiC layer 32. As has been described, the SiC layer 32 may be used as a growth surface for the deposition of semiconductor materials (not shown). In one aspect, following formation of the LED layers on the SiC layer 32, the Si carrier substrate 42 and the Si layer 38 may be removed to expose the transparent diamond layer 36. The diamond substrate may be coupled to the semiconductor layers as has been described (not shown).
Diamond materials have excellent thermal conductivity properties that make them ideal for incorporation into semiconductor devices, such as LEDs. The transfer of heat that is present in the semiconductor device can thus be accelerated from the device through a diamond material. It should be noted that the present invention is not limited as to specific theories of heat transmission. As such, in one aspect the accelerated movement of heat from inside the device can be at least partially due to heat movement into and through a diamond layer. Due to the heat conductive properties of diamond, heat can rapidly spread laterally through the diamond layer and to the edges of a semiconductor device. Heat present around the edges will be more rapidly dissipated into the air or into surrounding structures, such as heat spreaders or device supports. Additionally, diamond layers having a major portion of surface area exposed to air will more rapidly dissipate heat from a device in which such a layer is incorporated. Because the thermal conductivity of diamond is greater than the thermal conductivity of a semiconductor layer or other structure to which it is thermally
coupled, a heat sink is established by the diamond layer. As such, heat that builds up in the semiconductor layer is drawn into the diamond layer and spread laterally to be discharged from the device. Such accelerated heat transfer may result in semiconductor devices with much cooler operational temperatures. Additionally, the acceleration of heat transfer not only cools a semiconductor device, but may also reduce the heat load on many electronic components that are spatially located nearby the semiconductor device.
In some aspects of the present invention, a portion of a diamond layer may be exposed to the air. Such exposure may be limited to the edges of the layer in some cases, or it may be a larger proportion of surface area, such as would be the case for a diamond layer having one side exposed. In such aspects, the accelerated movement of heat away from a semiconductor layer may be at least partially due to heat movement from the diamond layer to air. For example, a diamond material such as diamond-like carbon (DLC) has exceptional heat emissivity characteristics even at temperatures below 100° C, and as such, may effectively radiate heat directly to the air. Many semiconductor materials that comprise a device conduct heat much better than they emit heat. As such, heat can be conducted through a semiconductor material to a DLC layer, spread laterally through the DLC layer, and subsequently emitted to the air along the edges or other exposed surfaces. Due to the high heat conductive and radiative properties of DLC, heat movement from the DLC layer to air can be greater than heat movement from the semiconductor layer to air. Also, heat movement from the semiconductor device to the DLC layer can be greater than heat movement from the semiconductor device to the air. As such, the layer of DLC can serve to accelerate heat transfer away from the semiconductor layer more rapidly than heat can be transferred through the semiconductor device itself, or from the semiconductor device to the air.
As has been suggested, various diamond materials may be utilized to provide accelerated heat transferring properties to a semiconductor device. Non-limiting examples of such diamond materials may include diamond, DLC, amorphous diamond, and combinations thereof. It should be noted, however, that any form of natural or synthetic diamond material that may be utilized to cool a semiconductor device is considered to be within the present scope.
It should be understood that the following is a very general discussion of diamond deposition techniques that may or may not apply to a particular diamond layer or application, and that such techniques may vary widely between the various aspects of the present invention. Generally, diamond layers may be formed by any means known, including
various vapor deposition techniques. Any number of known vapor deposition techniques may be used to form these diamond layers. The most common vapor deposition techniques include chemical vapor deposition (CVD) and physical vapor deposition (PVD), although any similar method can be used if similar properties and results are obtained. In one aspect, CVD techniques such as hot filament, microwave plasma, oxyacetylene flame, rf-CVD, laser CVD (LCVD), metal-organic CVD (MOCVD), laser ablation, conformal diamond coating processes, and direct current arc techniques may be utilized. Typical CVD techniques use gas reactants to deposit the diamond or diamond-like material in a layer, or film. These gases generally include a small amount (i.e. less than about 5%) of a carbonaceous material, such as methane, diluted in hydrogen. A variety of specific CVD processes, including equipment and conditions, as well as those used for boron nitride layers, are well known to those skilled in the art. In another aspect, PVD techniques such as sputtering, cathodic arc, and thermal evaporation may be utilized. Further, specific deposition conditions may be used in order to adjust the exact type of material to be formed, whether DLC, amorphous diamond, or pure diamond. It should also be noted that many semiconductor devices such as LEDs may be degraded by high temperature. Care may need to be taken to avoid damage during diamond deposition by forming at lower temperatures. For example, if the semiconductor contains InN, deposition temperatures of up to about 600 ° C may be used. In the case of GaN, layers may be thermally stable up to about 1000 ° C. Additionally, preformed layers can be brazed, glued, or otherwise affixed to the semiconductor layer or to a support substrate of the semiconductor device using methods which do not unduly interfere with the heat transference of the diamond layer or the functionality of the device.
An optional nucleation enhancing layer can be formed on the growth surface of a substrate in order to improve the quality and deposition time of a diamond layer.
Specifically, a diamond layer can be formed by depositing applicable nuclei, such as diamond nuclei, on a diamond growth surface of a substrate and then growing the nuclei into a film or layer using a vapor deposition technique. In one aspect of the present invention, a thin nucleation enhancer layer can be coated upon the substrate to enhance the growth of the diamond layer. Diamond nuclei are then placed upon the nucleation enhancer layer, and the growth of the diamond layer proceeds via CVD.
A variety of suitable materials will be recognized by those in skilled in the art which can serve as a nucleation enhancer. In one aspect of the present invention, the nucleation enhancer may be a material selected from the group consisting of metals, metal alloys, metal compounds, carbides, carbide formers, and mixtures thereof. Examples of carbide forming
materials may include, without limitation, tungsten (W), tantalum (Ta), titanium (Ti), zirconium (Zr), chromium (Cr), molybdenum (Mo), silicon (Si), and manganese (Mn). Additionally, examples of carbides include tungsten carbide (WC), silicon carbide (SiC), titanium carbide (TiC), zirconium carbide (ZrC), and mixtures thereof among others.
The nucleation enhancer layer, when used, is a layer which is thin enough that it does not to adversely affect the thermal transmission properties of the diamond layer. In one aspect, the thickness of the nucleation enhancer layer may be less than about 0.1 micrometers. In another aspect, the thickness may be less than about 10 nanometers. In yet another aspect, the thickness of the nucleation enhancer layer is less than about 5 nanometers. In a further aspect of the invention, the thickness of the nucleation enhancer layer is less than about 3 nanometers.
Various methods may be employed to increase the quality of the diamond in the nucleation surface of the diamond layer which is created by vapor deposition techniques. For example, diamond particle quality can be increased by reducing the methane flow rate, and increasing the total gas pressure during the early phase of diamond deposition. Such measures, decrease the decomposition rate of carbon, and increase the concentration of hydrogen atoms. Thus a significantly higher percentage of the carbon will be deposited in a sp3 bonding configuration, and the quality of the diamond nuclei formed is increased.
Additionally, the nucleation rate of diamond particles deposited on the growth surface of the substrate or the nucleation enhancer layer may be increased in order to reduce the amount of interstitial space between diamond particles. Examples of ways to increase nucleation rates include, but are not limited to; applying a negative bias in an appropriate amount, often about 100 volts, to the growth surface; polishing the growth surface with a fine diamond paste or powder, which may partially remain on the growth surface; and controlling the composition of the growth surface such as by ion implantation of C, Si, Cr, Mn, Ti, V, Zr, W, Mo, Ta, and the like by PVD or PECVD. PVD processes are typically at lower temperatures than CVD processes and in some cases can be below about 200° C such as about 150° C. Other methods of increasing diamond nucleation will be readily apparent to those skilled in the art.
In one aspect of the present invention, the diamond layer may be formed as a conformal diamond layer. Conformal diamond coating processes can provide a number of advantages over conventional diamond film processes. Conformal diamond coating can be performed on a wide variety of substrates, including non-planar substrates. A growth surface can be pretreated under diamond growth conditions in the absence of a bias to form a
carbon film. The diamond growth conditions can be conditions that are conventional CVD deposition conditions for diamond without an applied bias. As a result, a thin carbon film can be formed which is typically less than about 100 angstroms. The pretreatment step can be performed at almost any growth temperature such as from about 200 °C to about 900 °C, although lower temperatures below about 500 °C may be preferred. Without being bound to any particular theory, the thin carbon film appears to form within a short time, e.g., less than one hour, and is a hydrogen terminated amorphous carbon.
Following formation of the thin carbon film, the growth surface may then be subjected to diamond growth conditions to form a conformal diamond layer. The diamond growth conditions may be those conditions which are commonly used in traditional CVD diamond growth. However, unlike conventional diamond film growth, the diamond film produced using the above pretreatment steps results in a conformal diamond film that typically begins growth substantially over the entire growth surface with substantially no incubation time. In addition, a continuous film, e.g. substantially no grain boundaries, can develop within about 80 nm of growth. Diamond layers having substantially no grain boundaries may move heat more efficiently than those layers having grain boundaries.
Various techniques may be employed to render a diamond layer conductive. Such techniques are known to those of ordinary skill in the art. For example, various impurities may be doped into the crystal lattice of the diamond layer. Such impurities may include elements such as Si, B, P, N, Li, Al, Ga, etc. In one specific aspect, for example, the diamond layer may be doped with B. Impurities may also include metallic particles within the crystal lattice, provided they do not interfere with the function of the device, such as by blocking light emitted from an LED.
For some diamond layers, particularly those on which semiconductor layers are to be formed, it may be beneficial to create a growth substrate upon which the semiconductor material can be formed with minimal crystal lattice dislocations as a substantially single crystal. Additionally, diamond layers having low crystal lattice dislocations tend to be transparent to light. Minimizing crystal lattice dislocations may be facilitated by utilizing a growth substrate that is substantially a single crystal and has properties such that strong bonding interactions with the semiconductor material may be achieved. In one aspect, such a substrate includes a substantially single crystal diamond layer having a substantially single crystal SiC layer epitaxially coupled thereto. The substantially single crystal nature of the SiC layer facilitates the deposition of a semiconductor such as GaN or AIN as a substantially single crystal. Additionally, the epitaxial relationship from the diamond layer through the
SiC layer and to the semiconductor layer increases thermal conduction to the diamond layer, thus improving the cooling properties of the device.
Various methods are possible for building such a diamond/SiC composite substrate. Any such method would be considered to be within the scope of the present invention. For example, in one aspect such a substrate may be created by grading a single crystal Si wafer into a single crystal diamond layer. In other words, the Si wafer would gradually transition from Si to SiC and then to diamond. Techniques for such grading are further discussed in the Applicant's copending U.S. Patent Application entitled "Graded Crystalline Materials And Associated Methods", and filed on May 3 1, 2007 under Attorney Docket No. 00802- 32733.NP, which is incorporated herein by reference. In addition to the above described benefits of minimizing crystal dislocations, substantially single crystal diamond layers are substantially transparent to light and are thus useful in constructing light-emitting semiconductor devices such as LEDs and laser diodes.
The resulting structure includes a substantially single crystal diamond layer having a substantially single crystal SiC layer epitaxially coupled thereto. Semiconductor layers may be epitaxially formed on the SiC layer by any method know to one of ordinary skill in the art. In one aspect such deposition may occur in a graded manner similar to the techniques used in forming the diamond layer on the Si wafer. Following formation of the
semiconductor layers, a diamond support may be coupled thereto. Numerous methods of coupling are known to one of ordinary skill in the art, such as brazing, gluing, annealing, etc. It should be noted that any coupling method may be used, provided the functionality of the diamond support is not substantially affected. In one specific aspect, a reflective layer of a carbide forming metal may be applied to a surface of a semiconductor layer. One example of such a metal is titanium. The diamond support may then be formed on the titanium reflective layer and thus coupled to the semiconductive layer by titanium carbide bonds forming between the reflective layer and the diamond substrate.
The diamond layers according to aspects of the present invention may be of any thickness that would allow thermal cooling of a semiconductor device. Thicknesses may vary depending on the application and the semiconductor device configuration. For example, greater cooling requirements may require thicker diamond layers. The thickness may also vary depending on the material used in the diamond layer. That being said, in one aspect a diamond layer may be from about 10 to about 50 microns thick. In another example, a diamond layer may be less than or equal to about 10 microns thick. In yet another example, a diamond layer may be from about 50 microns to about 100 microns
thick. In a further example, a diamond layer may be greater than about 50 microns thick. In yet a further example, a diamond layer may be an adynamic diamond layer.
SiC layers according to aspects of the present invention may have a variety of thicknesses, depending on the method of deposition of the SiC layer and the intended uses of the device. In some aspects the SiC layer may be merely thick enough to orient the crystal lattice of the layers being formed thereon. In other aspects, thicker SiC layers may be beneficial. With such variation in mind, in one aspect the SiC layer may be less than or equal to about 1 micron thick. In another aspect, the SiC layer may be less than or equal to about 500 nanometers thick. In yet another aspect, the SiC layer may be less than or equal to about 1 nanometer thick. In a further aspect, the SiC layer may be greater than about 1 micron thick.
As has been described, the semiconductor devices according to aspects of the present invention include a plurality of semiconductor layers associated with one or more diamond layers. These semiconductor layers may be associated with a diamond layer by a variety of methods known to one of ordinary skill in the art. In one aspect of the present invention, however, one or more semiconductor layers may be formed on a diamond layer, or as is described above, on a SiC layer coupled to a diamond layer.
A semiconductor layer may be formed on a substrate such as a SiC layer using a variety of techniques known to those of ordinary skill in the art. One example of such a technique is a MOCVD process.
The semiconductor layer may include any material that is suitable for forming electronic devices, semiconductor devices, or the like. Many semiconductors are based on silicon, gallium, indium, and germanium. However, suitable materials for the semiconductor layer can include, without limitation, silicon, silicon carbide, silicon germanium, gallium arsenide, gallium nitride, germanium, zinc sulfide, gallium phosphide, gallium antimonide, gallium indium arsenide phosphide, aluminum phosphide, aluminum arsenide, aluminum gallium arsenide, gallium nitride, boron nitride, aluminum nitride, indium arsenide, indium phosphide, indium antimonide, indium nitride, and composites thereof. In one aspect, however, the semiconductor layer can include silicon, silicon carbide, gallium arsenide, gallium nitride, gallium phosphide, aluminum nitride, indium nitride, indium gallium nitride, aluminum gallium nitride, or composites of these materials.
In some additional embodiments, non-silicon based devices can be formed such as those based on gallium arsenide, gallium nitride, germanium, boron nitride, aluminum nitride, indium-based materials, and composites thereof. In another embodiment, the
semiconductor layer can comprise gallium nitride, indium gallium nitride, indium nitride, and combinations thereof. In one specific aspect, the semiconductor material is gallium nitride. In another specific aspect, the semiconductor material is aluminum nitride. Other semiconductor materials which can be used include AI2O3, BeO, W, Mo, C-Y2O3, c- (Yo.9Lao. i)203, C-AI23O27N5, c-MgAkO/i, t-MgF2, graphite, and mixtures thereof. It should be understood that the semiconductor layer may include any semiconductor material known, and should not be limited to those materials described herein. Additionally, semiconductor materials may be of any structural configuration known, for example, without limitation, cubic (zincblende or sphalerite), wurtzitic, rhombohedral, graphitic, turbostratic, pyrolytic, hexagonal, amorphous, or combinations thereof. As has been described, the semiconductor layer 14 may be formed by any method known to one of ordinary skill in the art. Various known methods of vapor deposition can be utilized to deposit such layers and that allow deposition to occur in a graded manner. Additionally, surface processing may be performed between any of the deposition steps described in order to provide a smooth surface for subsequent deposition. Such processing may be accomplished by any means known, such as by chemical etching, polishing, buffing, grinding, etc.
In one aspect of the present invention, at least one of the semiconductor layers may be gallium nitride (GaN). GaN semiconductor layers may be useful in constructing LEDs and other semiconductor devices. In some cases it may be beneficial to gradually transition between the SiC or other substrate and the semiconductor layer. For example, gradually transitioning an indium nitride (InN) semiconductor substrate into a GaN semiconductor layer may occur by fixing the concentration of the N being vapor deposited and varying the deposited concentration of Ga and of In such that a ratio of Ga:In gradually transitions from about 0:1 to about 1 :0. In other words, the sources of Ga and In are varied such that as the In concentration is decreased, the Ga concentration is increased. The gradual transition functions to greatly reduce the lattice mismatch observed when forming GaN directly on InN.
In another aspect, at least one of the semiconductor layers may be a layer of aluminum nitride (AIN). The AIN layer may be deposited onto a substrate by any means known to one of ordinary skill in the art. As with the GaN layer described above, gradually transitioning between semiconductor layers may improve the functionality of the semiconductor device. For example, in one aspect AIN may be deposited onto a semiconductor substrate of InN by gradually transitioning the layer of InN into the layer of AIN. Such a gradual transition may include, for example, gradually transitioning the layer of
InN into the layer of A1N by fixing the concentration of N being deposited and varying the deposited concentration of In and of Al such that a ratio of In:Al gradually transitions from about 0:1 to about 1 :0. Such a gradual transition may greatly reduce the lattice mismatch observed when forming ΑΓΝ on InN directly. Surface processing may be performed between any of the deposition steps described in order to provide a smooth surface for subsequent deposition. Such processing may be accomplished by any means known, such as by chemical etching, polishing, buffing, grinding, etc.
As has been described, electrodes may be incorporated into an LED device as an electrical contact for the semiconductive layers. Various electrodes, particularly p-type and n-type electrodes, including their use and formation, are well known to those of ordinary skill in the art, and will not be discussed in detail herein.
In one specific aspect of the present invention as shown in FIG. 4, a "flip-chip" design for an LED device is described. A semiconductor substrate 42 is made as described above and as shown in FIG. 3. An n-type semiconductive material 44 such as n-Gan is formed on the semiconductor substrate 42, followed by the formation of MQW layers 46, and a p-type semiconductor material 48 such as p-GaN. The n-type semiconductive material 44 is electrically coupled to an n-type electrode 50, and the p-type semiconductive material 48 is electrically coupled to a p-type electrode 52. A reflective layer 54 and associated diamond substrate 56 may then be flip-chip bonded to the n-type electrode 50 and the p-type electrode 52. If the reflective layer 54 is conductive it may require division into two electrically isolated portions to facilitate functionality of the device (not shown).
As is shown in FIG. 5, in order to emit light the nontransparent layers of the semiconductor substrate need to be removed to expose the transparent diamond layer 58. Upon activation of the LED device, light is generated by the semiconductor layers and emitted 62 through the SiC layer 60 and the transparent diamond layer 58. Additionally, light that is transmitted toward the diamond substrate 56 is reflected by the reflective layer 54 and transmitted back through the semiconductor layers to be emitted through the transparent diamond layer 58. Examples
The following examples illustrate various techniques of making a semiconductor device such as an LED according to aspects of the present invention. However, it is to be understood that the following are only exemplary or illustrative of the application of the principles of the present invention. Numerous modifications and alternative compositions,
methods, and systems can be devised by those skilled in the art without departing from the spirit and scope of the present invention. The appended claims are intended to cover such modifications and arrangements. Thus, while the present invention has been described above with particularity, the following Examples provide further detail in connection with several specific embodiments of the invention.
Example 1
A semiconductor substrate may be formed as follows:
A single crystal Si wafer is obtained and cleaned by soaking in KOH and ultrasound cleaning with distilled water to remove any non- crystalline Si and foreign debris. A conformal amorphous carbon coating is applied to the cleaned surface of the Si wafer by exposing the wafer to CVD deposition conditions without an applied bias. Following carbonization of the surface, amorphous diamond is deposited for approximately 30 minutes at 800° in 1 % CFL4 and 99% H2. The amorphous carbon coating is then removed with H2 or F2 treatment for about 60 minutes, at 900°. Removal of the amorphous carbon coating exposes an epitaxial SiC layer that has formed in situ between the Si wafer and the amorphous carbon coating. The thickness of the SiC layer is approximately 10 nm.
A transparent diamond coating 10 microns thick is then deposited onto the SiC layer by CVD deposition of CFL4 for approximately 10 hours. After 10 hours, the CH4 source is then switched to S1FL4 for approximately 10 minutes to deposit a 1 micron thick Si layer.
A Si carrier substrate having a S1O2 surface is wafer bonded to the 1 micron thick Si layer at the Si(¾ surface. Following wafer bonding, the single crystal Si wafer is removed to expose the SiC layer by etching with FIF + 3FINO2 + H2O. Further details regarding etching Si materials may be found in US Patent No. 4,981,818, which is incorporated herein by reference.
Example 2
An LED device may be constructed as follows:
A semiconductor substrate is obtained as in Example 1. GaN semiconductor layers are deposited onto the exposed SiC layer by MOCVD with GaFb and NH3 source materials. Of course, it is to be understood that the above-described arrangements are only illustrative of the application of the principles of the present invention. Numerous modifications and alternative arrangements may be devised by those skilled in the art without departing from the spirit and scope of the present invention and the appended claims are intended to cover such modifications and arrangements. Thus, while the present
invention has been described above with particularity and detail in connection with what is presently deemed to be the most practical and preferred embodiments of the invention, it will be apparent to those of ordinary skill in the art that numerous modifications, including, but not limited to, variations in size, materials, shape, form, function and manner of operation, assembly and use may be made without departing from the principles and concepts set forth herein.
Claims
1. A semiconductor device, comprising:
a diamond substrate;
a transparent diamond layer positioned parallel to the diamond substrate;
a plurality of semiconductor layers coupled between the transparent diamond layer and the diamond substrate.
2. The device of claim 1 , wherein the semiconductor device is an LED device and the plurality of semiconductor layers is a plurality of LED nitride layers.
3. The device of claim 1 , wherein the plurality of semiconductor layers is arranged in series between the diamond substrate and the transparent diamond layer.
4. The device of claim 1 , further comprising a SiC layer coupled to the transparent diamond layer and facing the plurality of semiconductor layers, such that the SiC layer is coupled to at least one of the plurality of semiconductor layers.
5. The device of claim 4, wherein the SiC layer is a single crystal SiC layer.
6. The device of claim 5, wherein the SiC layer has a crystal lattice that is substantially epitaxially matched to the transparent diamond layer.
7. The device of claim 5, wherein the SiC layer has a crystal lattice that is substantially epitaxially matched to at least one of the semiconductor layers.
8. The device of claim 1 , further comprising at least one of a p-type electrode or an n-type electrode electrically coupled to at least one of the semiconductor layers.
9. The device of claim 8, wherein the diamond substrate is p-type doped, and the p-type electrode is the p-type doped diamond substrate.
10. The device of claim 9, wherein the diamond substrate is doped with boron to form the p- type doped diamond substrate.
11. The device of claim 1, wherein the plurality of semiconductor layers includes at least one member selected from the group consisting of silicon germanium, gallium arsenide, gallium nitride, germanium, zinc sulfide, gallium phosphide, gallium antimonide, gallium indium arsenide phosphide, aluminum phosphide, aluminum arsenide, aluminum gallium arsenide, gallium nitride, boron nitride, aluminum nitride, indium arsenide, indium phosphide, indium antimonide, indium nitride, and combinations thereof.
12. The device of claim 1 1 , wherein at least one of the semiconductor layers is gallium nitride.
13. The device of claim 1 1 , wherein at least one of the semiconductor layers is aluminum nitride.
14. A method of making a semiconductor device, comprising:
forming a transparent diamond layer having a SiC layer coupled thereto, where the SiC layer has a crystal structure that is substantially epitaxially matched to the transparent diamond layer;
depositing epitaxially at least one of a plurality of semiconductor layers on the SiC layer opposite the transparent diamond layer; and
coupling a diamond substrate to at least one of the plurality of semiconductor layers such that the diamond substrate is oriented parallel to the transparent diamond layer, and the plurality of semiconductor layers are located between the transparent diamond layer and the diamond substrate.
15. The method of claim 14, further comprising electrically coupling at least one of a p-type electrode or an n-type electrode to at least one of the plurality of semiconductor layers.
16. The method of claim 14, wherein the plurality of semiconductor layers includes at least one member selected from the group consisting of silicon germanium, gallium arsenide, gallium nitride, germanium, zinc sulfide, gallium phosphide, gallium antimonide, gallium indium arsenide phosphide, aluminum phosphide, aluminum arsenide, aluminum gallium arsenide, gallium nitride, boron nitride, aluminum nitride, indium arsenide, indium phosphide, indium antimonide, indium nitride, and combinations thereof.
17. The method of claim 14, wherein the semiconductor layer is gallium nitride.
18. The method of claim 14, wherein the semiconductor layer is aluminum nitride.
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GB2518752A (en) * | 2013-09-02 | 2015-04-01 | Element Six Technologies Us Corp | Semiconductor device structures comprising polycrystalline CVD diamond with improved near-substrate thermal conductivity |
JP2016157740A (en) * | 2015-02-23 | 2016-09-01 | 日本電信電話株式会社 | Light emission element |
CN107039373A (en) * | 2017-05-31 | 2017-08-11 | 母凤文 | Gallium nitride device structure and preparation method thereof |
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CN101271940A (en) * | 2007-03-21 | 2008-09-24 | 亿光电子工业股份有限公司 | Semiconductor illuminating device and production method thereof |
CN101378099A (en) * | 2007-08-27 | 2009-03-04 | 中国砂轮企业股份有限公司 | Light emitting diode and manufacturing method thereof |
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EP0488753A1 (en) * | 1990-11-28 | 1992-06-03 | De Beers Industrial Diamond Division (Proprietary) Limited | Light emitting diamond device |
US20060017055A1 (en) * | 2004-07-23 | 2006-01-26 | Eastman Kodak Company | Method for manufacturing a display device with low temperature diamond coatings |
CN101271940A (en) * | 2007-03-21 | 2008-09-24 | 亿光电子工业股份有限公司 | Semiconductor illuminating device and production method thereof |
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GB2518752A (en) * | 2013-09-02 | 2015-04-01 | Element Six Technologies Us Corp | Semiconductor device structures comprising polycrystalline CVD diamond with improved near-substrate thermal conductivity |
US9548257B2 (en) | 2013-09-02 | 2017-01-17 | Rfhic Corporation | Semiconductor device structures comprising polycrystalline CVD diamond with improved near-substrate thermal conductivity |
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CN107039373A (en) * | 2017-05-31 | 2017-08-11 | 母凤文 | Gallium nitride device structure and preparation method thereof |
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