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WO2009110530A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
WO2009110530A1
WO2009110530A1 PCT/JP2009/054127 JP2009054127W WO2009110530A1 WO 2009110530 A1 WO2009110530 A1 WO 2009110530A1 JP 2009054127 W JP2009054127 W JP 2009054127W WO 2009110530 A1 WO2009110530 A1 WO 2009110530A1
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WO
WIPO (PCT)
Prior art keywords
layer
magnetization
free layer
magnetization free
semiconductor device
Prior art date
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PCT/JP2009/054127
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French (fr)
Japanese (ja)
Inventor
俊輔 深見
延行 石綿
哲広 鈴木
則和 大嶋
聖万 永原
Original Assignee
日本電気株式会社
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Priority to JP2010501942A priority Critical patent/JP5435298B2/en
Publication of WO2009110530A1 publication Critical patent/WO2009110530A1/en

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1655Bit-line or column circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1657Word-line or row circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1659Cell access
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1673Reading or sensing circuits or methods
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/10Magnetoresistive devices

Definitions

  • the present invention relates to a semiconductor device, and more particularly to a semiconductor device using a magnetoresistive effect element for a memory cell.
  • Magnetic Random Access Memory Magnetic Random Access Memory
  • MRAM Magnetic Random Access Memory
  • MRAM Magnetic Random Access Memory
  • a magnetoresistive effect element is integrated in a memory cell, and data is stored as the magnetization direction of the ferromagnetic layer of the magnetoresistive effect element.
  • MRAMs Several types have been proposed corresponding to the method of switching the magnetization of the ferromagnetic layer.
  • the most common MRAM is a current-induced magnetic field writing type MRAM.
  • this MRAM wiring for passing a write current is arranged around the magnetoresistive effect element, and the magnetization direction of the ferromagnetic layer of the magnetoresistive effect element is switched by a current magnetic field generated by passing the write current.
  • this MRAM can be written in 1 nanosecond or less, and is suitable as a high-speed MRAM.
  • there has been a report of successful operation verification at 250 MHz N. Sakimura et al., “A 250-MHz 1-Mbit Embedded MRAM Macro Usage 2T1MTJ Cell Bitline Separation and Half-ShipCritichi” Conference, 2007. ASSCC '07. IEEE Asian. P. 216.).
  • the magnetic field for switching the magnetization of the magnetic material in which the thermal stability and the disturbance magnetic field resistance are ensured is generally about several tens [Oe].
  • a large write current of about several mA is required.
  • Even the lowest reported write current is about 1 mA (H. Honjo et al., “Performance of write-line-inserted MTJ for low-write-current MRAM cell”, 52nd MagnetismensMet 2007 (MMM 2007), p. 481.).
  • the write current is large, the chip area is inevitably increased, and the power consumption required for writing increases.
  • the write current further increases and does not scale.
  • spin polarized current writing type MRAM As another MRAM, there is a spin polarized current writing type MRAM.
  • a spin-polarized current is injected into the ferromagnetic conductor of the magnetoresistive element, and the magnetization is caused by a direct interaction between the spin of the conduction electron carrying the current and the magnetic moment of the conductor.
  • spin Transfer Magnetization Switching The presence or absence of spin injection magnetization reversal depends on the current density (not the absolute value of the current). Accordingly, when spin injection magnetization reversal is used for data writing, the write current is reduced if the size of the memory cell is reduced. That is, the spin injection magnetization reversal method is excellent in scaling. When the write current is small, the chip area is small, and high integration and large scale are possible. However, the writing time tends to be longer than that of the current-induced magnetic field writing type MRAM (example: 1 nsec. Or more).
  • a semiconductor device such as a system LSI (Large-Scale Integration) equipped with logic and memory
  • LSI Large-Scale Integration
  • an area that requires high-speed operation, large capacity and high integration That is, there are areas that require a low write current, and a memory is provided in each area.
  • a register or cache is provided as a memory in an area requiring high-speed operation
  • a main storage device or an auxiliary storage device is provided as a memory in an area requiring large capacity and high integration. Since the performance and functions required for each memory are different from each other, one type of memory cannot be used.
  • FF Flip-Flop
  • SRAM Static Random Access Memory
  • DRAM Dynamic Random Access Memory
  • flash memory etc.
  • an object of the present invention is to provide a memory-embedded semiconductor device capable of achieving both high-speed processing and large-capacity processing in an internal memory.
  • the semiconductor device of the present invention has a first magnetic random access memory having a first memory cell and a second memory cell that operates at a higher speed than the first memory cell, and is the same as the first magnetic random access memory. And a second magnetic random access memory provided in the chip.
  • the first memory cell includes a first magnetization fixed layer whose magnetization direction is fixed, a first magnetization free layer whose magnetization direction can be reversed, a first magnetization fixed layer, and a first magnetization free layer sandwiched between the first magnetization fixed layer and the first magnetization free layer.
  • the first magnetization fixed layer and the first magnetization free layer are made of a ferromagnetic material and have perpendicular magnetic anisotropy.
  • the second magnetization fixed layer and the second magnetization free layer are made of a ferromagnetic material and have in-plane magnetic anisotropy.
  • the first magnetization free layer and the second magnetization free layer are magnetically coupled to each other.
  • the second memory cell includes a third magnetization free layer, a third magnetization fixed layer, and a second nonmagnetic layer provided between the third magnetization free layer and the third magnetization fixed layer.
  • the third magnetization free layer and the third magnetization fixed layer are made of a ferromagnetic material.
  • FIG. 1 is a schematic diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.
  • FIG. 2 is a perspective view showing the configuration of the magnetoresistive element in each MRAM of this embodiment.
  • FIG. 3A is a perspective view showing the structure of the main part of the magnetoresistive effect element of this embodiment.
  • FIG. 3B is a plan view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 3C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 4A is a cross-sectional view for explaining the state of magnetic flux in the magnetoresistive effect element of this embodiment.
  • FIG. 4A is a cross-sectional view for explaining the state of magnetic flux in the magnetoresistive effect element of this embodiment.
  • FIG. 4B is a plan view for explaining the state of magnetic flux in the magnetoresistive effect element of this embodiment.
  • FIG. 5A is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment.
  • FIG. 5B is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment.
  • FIG. 6A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9.
  • FIG. 6B is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9.
  • FIG. 7A is a circuit diagram showing a configuration example of a memory cell in which the magnetoresistive effect element of this embodiment is integrated.
  • FIG. 7B is a circuit diagram showing a configuration example of an MRAM in which the magnetoresistive effect element of this embodiment is integrated.
  • FIG. 8 is a circuit diagram showing another configuration example of the memory cell in which the magnetoresistive effect element of this embodiment is integrated.
  • FIG. 9 is a perspective view showing a configuration of a first modification of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention.
  • FIG. 10 is a plan view showing the structure of the main part of the magnetoresistive effect element of this embodiment.
  • FIG. 11A is a conceptual diagram for explaining a method of reading data from a magnetoresistive element.
  • FIG. 11B is a conceptual diagram for explaining a method of reading data from the magnetoresistive effect element.
  • FIG. 12A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element.
  • FIG. 12B is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element.
  • FIG. 13 is a perspective view showing a configuration of a second modification of the magnetoresistive element in each MRAM according to the present embodiment.
  • FIG. 14A is a perspective view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 14B is a plan view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 14C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 15A is a perspective view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 15B is a plan view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 15C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 16A is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment.
  • FIG. 16B is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment.
  • FIG. 17A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9.
  • FIG. 17A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9.
  • FIG. 17B is a conceptual diagram for explaining a method of reading data to the magnetoresistive effect element 9.
  • FIG. 18A is a perspective view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 18B is a plan view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 18C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 18D is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 19A is a perspective view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 19B is a plan view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 19C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example.
  • FIG. 20A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9.
  • FIG. 20B is a conceptual diagram for explaining a method of reading data to the magnetoresistive effect element 9.
  • FIG. 1 is a schematic diagram showing a configuration of a semiconductor device according to an embodiment of the present invention.
  • the semiconductor device 1 of the present embodiment is a memory-embedded semiconductor device.
  • the semiconductor device 1 is exemplified by a memory-embedded LSI formed on one chip, and includes a logic unit 2 and a memory unit 3.
  • the logic unit 2 is an area that requires high-speed operation, and has a logic circuit that performs a logical operation.
  • the logic unit 2 further includes MRAMs 4-1 to 4-4 capable of high speed operation.
  • the MRAMs 4-1 to 4-4 are exemplified as current-induced magnetic field writing type MRAMs, and are used as registers, L1 caches (primary caches), and L2 caches (secondary caches).
  • L1 caches primary caches
  • L2 caches secondary caches
  • the current-induced magnetic field writing type MRAM is theoretically 1 nsec. The following writing is possible, and it is suitable as an MRAM capable of high-speed operation.
  • the write current is large, the area of the MRAM is relatively large.
  • the memory is used as a memory having a relatively small capacity such as a register, an L1 cache, or an L2 cache, the area of the entire chip is large. The impact on is very small.
  • the memory unit 3 is an area that requires large capacity and high integration (that is, low write current), and has a memory circuit for storing data.
  • As the storage circuit large-capacity and highly integrated MRAMs 5-1 to 5-3 are included.
  • the MRAMs 5-1 to 5-3 are exemplified as spin-polarized current writing type MRAMs, and are used as a main storage device or an auxiliary storage device. Hereinafter, when it is not necessary to distinguish between them, they are simply abbreviated as MRAM5.
  • the spin-polarized current writing type MRAM is exemplified by a spin injection magnetization switching type MRAM.
  • the magnetoresistive effect element includes a first ferromagnetic layer having a reversible magnetization (often referred to as a magnetization free layer) and a second ferromagnetic layer having a fixed magnetization ( (Often referred to as a magnetization fixed layer) and a tunnel body provided with a tunnel barrier layer provided between these ferromagnetic layers.
  • Such MRAM data writing utilizes the interaction between spin-polarized conduction electrons and localized electrons in the magnetization free layer when a current is passed between the magnetization free layer and the magnetization fixed layer.
  • the magnetoresistive effect element is a two-terminal element having a terminal connected to the magnetization free layer and a terminal connected to the magnetization fixed layer. Therefore, this MRAM is effective for reducing the area.
  • the spin-injection magnetization reversal type MRAM has an excellent scaling property and is suitable as an MRAM capable of high integration and large scale.
  • the operation speed is relatively low, the influence is extremely small because it is used as a memory that does not require high-speed operation as compared with a register such as a main storage device or an auxiliary storage device.
  • the semiconductor device 1 when all of the storage elements of the logic unit 2 and the memory unit 3 are nonvolatile memory MRAMs, it is preferable that data can be retained in the MRAMs even when the power is turned off. In that case, power off can be set to the basic state (instant on). Thereby, power consumption can be reduced.
  • the memory elements of the logic unit 2 and the memory unit 3 are nonvolatile memory MRAMs
  • the memory elements can be manufactured in the same process as described later, which is preferable.
  • the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • the semiconductor device of the present invention is not limited to the configuration illustrated in FIG. That is, the number, shape, arrangement, etc. of the MRAM in each part, such as the shape and arrangement of the logic part 2 and the memory part 3, can be freely modified within the scope of the technical idea of the present invention.
  • FIG. 2 is a perspective view showing the configuration of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention.
  • the magnetoresistive effect element 8 and the magnetoresistive effect element 9 according to the embodiment of the present invention are formed on the same chip.
  • the white arrow in each component in the figure indicates the direction of magnetization (the same applies hereinafter).
  • the magnetoresistive effect element 8 is used in a memory cell of the MRAM 4 (operating frequency is preferably 200 MHz or more) for high speed operation. This is a current-induced magnetic field writing type magnetoresistive effect element.
  • the magnetoresistive effect element 8 includes a magnetization free layer 140, a magnetization fixed layer 160, and a nonmagnetic layer 150 provided between the magnetization free layer 140 and the magnetization fixed layer 160.
  • an electrode layer, a diffusion prevention layer, a base layer, and the like are appropriately provided.
  • the magnetization free layer 140 and the magnetization fixed layer 160 are made of a ferromagnetic material.
  • the magnetization free layer 140 and the magnetization fixed layer 160 are in-plane magnetization films having in-plane magnetic anisotropy. That is, the magnetization free layer 140 and the magnetization fixed layer 160 have magnetic anisotropy in the in-plane direction (xy in-plane direction).
  • the nonmagnetic layer 150 is made of an insulator, and a magnetic tunnel junction (MTJ) is formed by the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160.
  • the nonmagnetic layer 150 is preferably made of an insulator, but may be made of a semiconductor or a conductor. Specific materials of the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 will be described later.
  • the magnetization fixed layer 160 has a fixed magnetization.
  • the fixed magnetization is set in a direction perpendicular to the longitudinal direction (y direction) of the magnetization fixed layer 160 or has a vertical component.
  • the magnetization free layer 140 has reversible magnetization.
  • the easy axis of magnetization of the magnetization free layer 140 is set to be perpendicular to the longitudinal direction (y direction) of the magnetization fixed layer 160 or to have a perpendicular component.
  • Such magnetic anisotropy can be imparted by shape magnetic anisotropy.
  • the magnetization of the magnetization free layer 140 is either a parallel component or an antiparallel component with respect to the magnetization of the magnetization fixed layer 160. You can have either.
  • the magnetization direction of the magnetization free layer 140 corresponds to stored data.
  • a write current is passed through the magnetization fixed layer 160.
  • the magnetization of the magnetization free layer 140 is reversed by a current-induced magnetic field generated by the write current.
  • the direction of the current-induced magnetic field generated by the direction of the write current can be controlled to change the magnetization of the magnetization free layer 140 to a desired direction.
  • desired data is recorded in the magnetization free layer 140.
  • the magnetization fixed layer 160 may be referred to as a base electrode because of its role.
  • Such a writing method in which a writing current is supplied to the magnetization fixed layer 160, that is, the base electrode can also be referred to as a base writing type.
  • the write current since the write current is directly supplied to the magnetoresistive effect element 8, the magnitude of the current-induced magnetic field becomes relatively large. Therefore, the write current can be reduced. Moreover, since the magnetization fixed layer 160 introduces a write current, it is desirable that the electric resistance is relatively small. Therefore, the electric resistance may be lowered by making a conductive layer adjacent to the magnetization fixed layer 160.
  • a read current is passed between the magnetization fixed layer 160 and the magnetization free layer 140 through the nonmagnetic layer 150.
  • data is read by detecting a change in resistance according to the relative angle between the magnetization of the magnetization fixed layer 160 and the magnetization of the magnetization free layer 140.
  • the magnetization of the magnetization fixed layer 160 and the magnetization of the magnetization free layer 140 are parallel (for example, “0” is stored)
  • the low resistance state is realized
  • the magnetization of the magnetization fixed layer 160 and the magnetization of the magnetization free layer 140 are realized.
  • a change in resistance of the magnetoresistive effect element 8 is detected as a voltage signal or a current signal, and data stored in the magnetoresistive effect element 8 is determined using the voltage signal or the current signal.
  • the magnetoresistive element 9 is used in a memory cell of MRAM 5 (desirably having a write current of 0.5 mA or less) for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
  • the magnetoresistive effect element 9 includes a first magnetization fixed layer 10, a first nonmagnetic layer 20, a first magnetization free layer 30, a second magnetization free layer 40, a second nonmagnetic layer 50, and a second magnetization fixed layer 60. It has.
  • the first magnetization fixed layer 10 is provided adjacent to one surface of the first nonmagnetic layer 20, and the first magnetization free layer 30 is provided adjacent to the other surface of the first nonmagnetic layer 20. Yes.
  • the first nonmagnetic layer 20 is sandwiched between the first magnetization fixed layer 10 and the first magnetization free layer 30.
  • the second magnetization fixed layer 60 is provided adjacent to one surface of the second nonmagnetic layer 50, and the second magnetization free layer 40 is provided adjacent to the other surface of the second nonmagnetic layer 50. It has been. That is, the second nonmagnetic layer 50 is sandwiched between the second magnetization fixed layer 60 and the second magnetization free layer 40.
  • the magnetoresistive effect element 9 further includes a first conductive layer 70 and a second conductive layer 80.
  • the first conductive layer 70 is provided so as to be electrically connected to the first magnetization free layer 30 and the second magnetization free layer 40.
  • the first conductive layer 70 is sandwiched between the first magnetization free layer 30 and the second magnetization free layer 40.
  • the second conductive layer 80 is provided so as to be electrically connected to the first conductive layer 70.
  • the first conductive layer 70 and the second conductive layer 80 may be omitted. An embodiment in which the second conductive layer 80 is omitted will be described later.
  • Each of the first nonmagnetic layer 20 and the second nonmagnetic layer 50 is a nonmagnetic layer formed of a nonmagnetic material.
  • the first nonmagnetic layer 20 and the second nonmagnetic layer 50 may have any electrical characteristics, and the material may be a conductor, an insulator, or a semiconductor.
  • the second nonmagnetic layer 50 is preferably formed of an insulator.
  • Each of the first magnetization fixed layer 10, the first magnetization free layer 30, the second magnetization free layer 40, and the second magnetization fixed layer 60 is formed of a ferromagnetic material.
  • the first magnetization fixed layer 10 and the first magnetization free layer 30 are a perpendicular magnetization film having a perpendicular magnetic anisotropy. That is, the first magnetization fixed layer 10 and the first magnetization free layer 30 have magnetic anisotropy in the direction perpendicular to the film surface (z-axis direction).
  • the second magnetization free layer 40 and the second magnetization fixed layer 60 are in-plane magnetization films having in-plane magnetic anisotropy.
  • the second magnetization free layer 40 and the second magnetization fixed layer 60 have magnetic anisotropy in the film plane parallel direction (xy in-plane direction).
  • the direction of the easy magnetization axis of the second magnetization free layer 40 is arbitrary.
  • the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 form a magnetic tunnel junction (MTJ) for writing.
  • the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 form a magnetic tunnel junction (MTJ) for reading.
  • the magnetoresistive effect element 8 and the magnetoresistive effect element 9 according to the embodiment of the present invention are formed on the same chip.
  • the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 are the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer of the magnetoresistance effect element 9, respectively.
  • 60 and the same material are simultaneously formed in the same layer. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • FIGS. 3B and 3C are schematic views schematically showing the configuration of the magnetoresistive effect element 9 according to the embodiment of the present invention.
  • FIG. 3A is a perspective view
  • FIGS. 3B and 3C are an xy plan view and an xz sectional view in the xyz coordinate system shown in FIG. 3A, respectively.
  • the magnetoresistive effect element 9 has a laminated structure composed of a plurality of layers, and the lamination direction is defined as the z-axis direction.
  • a plane parallel to each layer of the stacked structure is an xy plane.
  • FIG. 3C shows the magnetization direction of each layer.
  • the magnetization direction of the first magnetization fixed layer 10 is substantially fixed in one direction.
  • the magnetization direction of the first magnetization free layer 30 can be reversed. Since the first magnetization fixed layer 10 and the first magnetization free layer 30 have perpendicular magnetic anisotropy, their magnetization directions are substantially parallel to the z-axis.
  • the magnetization of the first magnetization fixed layer 10 is fixed in the + z direction.
  • the magnetization of the first magnetization free layer 30 is allowed to be in the + z direction or the ⁇ z direction. That is, the magnetization direction of the first magnetization free layer 30 can be parallel or antiparallel to the magnetization direction of the first magnetization fixed layer 10.
  • the magnetization direction of the second magnetization fixed layer 60 is substantially fixed in one direction.
  • the magnetization direction of the second magnetization free layer 40 can be reversed. Since the second magnetization fixed layer 60 and the second magnetization free layer 40 have in-plane magnetic anisotropy, their magnetization directions are substantially parallel to the film surface (xy plane).
  • the magnetization of the second magnetization fixed layer 60 is fixed in the + x direction.
  • the magnetization of the second magnetization free layer 40 is allowed to have a component in the + x direction or the ⁇ x direction. That is, the magnetization direction of the second magnetization free layer 40 can have a component parallel or antiparallel to the magnetization direction of the second magnetization fixed layer 60.
  • the magnetoresistive effect element 9 includes the “first magnetoresistive effect element” including the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30, and the second A “second magnetoresistive element” including the magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 is included.
  • the first magnetoresistance effect element includes a perpendicular magnetization film
  • the second magnetoresistance effect element includes an in-plane magnetization film.
  • the first magnetoresistance effect element is used for data writing
  • the second magnetoresistance effect element is used for data reading.
  • the first magnetization free layer 30 of the first magnetoresistance effect element and the second magnetization free layer 40 of the second magnetoresistance effect element are formed in different layers, but are magnetically coupled to each other.
  • the magnetization state of the first magnetization free layer 30 and the magnetization state of the second magnetization free layer 40 affect each other.
  • FIG. 3B also shows the positions of the center of gravity G30 of the first magnetization free layer 30 and the center of gravity G40 of the second magnetization free layer 40 in the xy plane.
  • ⁇ i means the total sum related to i.
  • the center of gravity is the intersection of diagonal lines, and in the case of an ellipse, the center of gravity is the center.
  • the centroid G30 of the first magnetization free layer 30 and the centroid G40 of the second magnetization free layer 40 are shifted in the xy plane. That is, in the xy plane, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the “first direction” parallel to the film surface.
  • the first direction (shift direction) is the ⁇ x direction.
  • the first magnetization free layer 30 and the second magnetization free layer 40 may overlap at least partially, or may not overlap.
  • each layer in the xy plane is not limited to a rectangle, and may be a circle, an ellipse, a rhombus, a hexagon, or the like.
  • irregularities can be appropriately provided on the surface of each layer so that appropriate characteristics can be obtained.
  • the area of each layer is arbitrary.
  • each layer of the magnetoresistive effect element 9 will be exemplified.
  • the materials shown below are all examples, and any material may be used in practice as long as the above-described magnetization state can be realized.
  • the first magnetization fixed layer 10 and the first magnetization free layer 30 that are perpendicular magnetization films are formed of a ferromagnetic material including at least one material selected from Fe, Co, and Ni. Moreover, perpendicular magnetic anisotropy can be stabilized by adding Pt or Pd.
  • Pt or Pd perpendicular magnetic anisotropy
  • Specific materials include Co, Co—Pt, Co—Pd, Co—Cr, Co—Pt—Cr, Co—Cr—Ta, Co—Cr—B, Co—Cr—Pt—B, and Co—Cr.
  • -Ta-B Co-V, Co-Mo, Co-W, Co-Ti, Co-Ru, Co-Rh, Fe-Pt, Fe-Pd, Fe-Co-Pt, Fe-Co-Pd, Sm -Co, Gd-Fe-Co, Tb-Fe-Co, Gd-Tb-Fe-Co and the like are exemplified.
  • perpendicular magnetic anisotropy can also be exhibited by laminating a layer containing any one material selected from Fe, Co, and Ni with different layers. Specifically, a laminated film of Co / Pd, Co / Pt, Co / Ni, Fe / Au, etc. is exemplified.
  • the second magnetization free layer 40 and the second magnetization fixed layer 60 that are in-plane magnetization films are formed of a ferromagnetic material including at least one material selected from Fe, Co, and Ni.
  • a ferromagnetic material including at least one material selected from Fe, Co, and Ni.
  • B, C, N, O, Al, Si, P, Ti, V, Cr, Mn, Cu, Zn, Zr, Nb, Mo, Tc, Ru, Rh, Ag, Hf, Ta, W , Re, Os, Ir, Au, etc. can be added to adjust the magnetic properties.
  • Specific examples of the material include Ni—Fe, Co—Fe, Fe—Co—Ni, Ni—Fe—Zr, Co—Fe—B, and Co—Fe—Zr—B.
  • the first nonmagnetic layer 20 can be used for various materials.
  • a conductor such as Al, Cr, or Cu can be used.
  • an insulator such as Mg—O may be used.
  • the first nonmagnetic layer 20 included in the first magnetoresistive effect element used for writing exists on the path of the write current. Generally, it is desirable that the resistance of the write current path is low. In this respect, a material having low resistance is preferable.
  • Mg—O is preferable.
  • the material of the first nonmagnetic layer 20 can be appropriately selected according to the application of the magnetoresistive effect element 9.
  • the second nonmagnetic layer 50 is preferably formed of an insulating material.
  • the material include Mg—O, Al—O, Al—N, Ni—O, and Hf—O.
  • the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are included in the second magnetoresistive effect element used for reading. Exists. For this reason, it is preferable to use a material that exhibits a high MR ratio. For example, in recent years, it has been reported that a very large MR ratio of 500% is obtained in a magnetic tunnel junction (MTJ) of a Co—Fe—B / Mg—O / Co—Fe—B system (Hayakawa et al. , “Effective of high annealing temperature on giant tunnel magnetorelatency ratio of CoFeB / MgO / CoFeB magnetotunnel junctions”, Applied Vs. From this point of view, the second nonmagnetic layer 50 preferably contains Mg—O. Further, it is preferable that at least one of the second magnetization free layer 40 and the second magnetization fixed layer 60 contains Co—Fe—B.
  • MTJ magnetic tunnel junction
  • a laminated film (laminated ferri-coupled film) in which the magnetizations are antiparallel coupled can be applied to a magnetization fixed layer such as the first magnetization fixed layer 10 or the second magnetization fixed layer 60.
  • the magnetization of the magnetization fixed layer can be more firmly fixed, and the influence of the leakage magnetic field to the outside can be reduced.
  • magnetostatic coupling or exchange coupling based on RKKY interaction can be considered.
  • the second magnetization fixed layer 60 can be formed of a laminated film of Co—Fe—B / Ru / Co—Fe—B.
  • the upper and lower Co—Fe—B films are antiparallel coupled by the RKKY interaction of the Ru film.
  • the fixed magnetization can be made stronger and the leakage magnetic field to the outside can be reduced.
  • the magnetization can be more firmly fixed by making the antiferromagnetic layer adjacent to the magnetization fixed layer such as the first magnetization fixed layer 10 or the second magnetization fixed layer 60.
  • the material of the antiferromagnetic layer include Pt—Mn, Ir—Mn, and Fe—Mn.
  • Pt—Mn antiferromagnetic layer is adjacent to the second magnetization fixed layer 60 of Co—Fe—B / Ru / Co—Fe—B.
  • the first conductive layer 70 and the second conductive layer 80 are preferably formed of a material having a small electrical resistance. Further, by appropriately selecting the material of the first conductive layer 70, the second magnetization free layer 40 directly below can be protected from the processing process. In this respect, a material having high chemical stability is desirable. Further, the growth of the first magnetization free layer 30 can be controlled by appropriately selecting the material of the first conductive layer 70 as the underlayer of the first magnetization free layer 30.
  • the first conductive layer 70 sandwiched between the first magnetization free layer 30 and the second magnetization free layer 40 may be formed of a magnetic material such as Fe, Co, or Ni.
  • the leakage magnetic flux from the first magnetization free layer 30 can be efficiently transmitted to the second magnetization free layer 40, which is preferable from the viewpoint of the magnetic coupling described above.
  • the first conductive layer 70 is preferably formed of a material having high magnetic permeability.
  • the same material as the 2nd magnetization free layer 40, the 2nd nonmagnetic layer 50, and the 2nd magnetization fixed layer 60 is used for the magnetization free layer 140 of the magnetoresistive effect element 8, the nonmagnetic layer 150, and the magnetization fixed layer 160, respectively. be able to.
  • the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 are the second magnetization free layer 40 and the second nonmagnetic layer, respectively. 50 and the same material as the second magnetization fixed layer 60.
  • FIG. 4A and 4B schematically show a leakage magnetic field (leakage magnetic flux) generated in the periphery by the magnetization of the first magnetization free layer 30.
  • FIG. 4A shows a state in the xz plane
  • FIG. 4B shows a state in the xy plane.
  • the magnetic field lines of the leakage magnetic field have a dipole shape as shown in FIG. 4A and come out from the upper surface (positive magnetic pole side) of the first magnetization free layer 30 and smoothly connect to the lower surface (negative magnetic pole side).
  • the leakage magnetic field spreads radially from the center of gravity G30 of the first magnetization free layer 30.
  • the leakage magnetic field is substantially in the z direction, and as the end of the first magnetization free layer 30 is approached, the leakage magnetic field has a larger xy component (component in the film plane parallel direction). Will have.
  • the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the “first direction” in the xy plane. Accordingly, the leakage magnetic field generated by the magnetization of the first magnetization free layer 30 has an xy component along the “first direction” at the position of the center of gravity G40 of the second magnetization free layer 40. That is, the magnetization of the first magnetization free layer 30 exerts a magnetic force substantially parallel or substantially antiparallel to the “first direction” on the second magnetization free layer 40. As a result, the magnetization of the second magnetization free layer 40 has a component substantially parallel or substantially antiparallel to the “first direction”.
  • FIGS. 5A and 5B illustrate two memory states that the magnetoresistive effect element 1 can take.
  • the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction
  • the magnetization direction of the second magnetization fixed layer 60 is fixed in the + x direction.
  • the shift direction (first direction) of the center G40 of the second magnetization free layer 40 with respect to the center G30 of the first magnetization free layer 30 is the ⁇ x direction.
  • This first direction is also arbitrary. However, it is desirable that the first direction is substantially parallel or substantially antiparallel to the magnetization direction of the second magnetization fixed layer 60.
  • the magnetization of the first magnetization free layer 30 is in the + z direction.
  • the leakage magnetic field from the first magnetization free layer 30 has a + x component along the first direction at the position of the center of gravity G40 of the second magnetization free layer 40. Therefore, due to the magnetic coupling between the first magnetization free layer 30 and the second magnetization free layer 40, the magnetization of the second magnetization free layer 40 has a component in the + x direction.
  • the magnetization direction of the second magnetization free layer 40 has a component “parallel” to the magnetization direction of the second magnetization fixed layer 60, and the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer.
  • the resistance value of the second magnetoresistive element composed of 60 is relatively small.
  • the memory state shown in FIG. 5A is hereinafter referred to as a “0” state (exa state in which data “0” is stored).
  • the magnetization of the first magnetization free layer 30 faces the ⁇ z direction.
  • the leakage magnetic field from the first magnetization free layer 30 has a ⁇ x component along the first direction at the position of the center of gravity G40 of the second magnetization free layer 40. Accordingly, the magnetic coupling between the first magnetization free layer 30 and the second magnetization free layer 40 causes the magnetization of the second magnetization free layer 40 to have a component in the ⁇ x direction.
  • the memory state shown in FIG. 5B is hereinafter referred to as a “1” state (example: a state in which data “1” is stored).
  • the magnetization direction of the second magnetization free layer 40 is changed to the first magnetization free layer due to the shift of the center of gravity between the first magnetization free layer 30 and the second magnetization free layer 40 and magnetic coupling. It is uniquely determined according to the magnetization direction of 30.
  • the magnetization direction of the first magnetization free layer 30 is reversed, the magnetization direction of the second magnetization free layer 40 also changes.
  • a difference occurs in the relative angle of the magnetization direction between the second magnetization free layer 40 and the second magnetization fixed layer 60, and two memory states of “0” state and “1” state are realized. That is, two memory states are realized according to the magnetization direction of the first magnetization free layer 30.
  • the direction of fixed magnetization of the second magnetization fixed layer 60 is substantially parallel or substantially antiparallel to the direction of shift of the center of gravity (first direction) between the first magnetization free layer 30 and the second magnetization free layer 40.
  • first direction the direction of shift of the center of gravity
  • variable magnetization of the second magnetization free layer 40 has a component that is substantially parallel or substantially antiparallel to the first direction depending on the magnetization direction of the first magnetization free layer 30.
  • the information stored as the perpendicular magnetization component in the first magnetization free layer 30 is transmitted to the magnetization component in the film surface direction of the second magnetization free layer 40 through magnetic coupling.
  • the magnetic coupling method is not limited to the one using the above-described leakage magnetic field.
  • the first magnetization free layer 30 and the second magnetization free layer 40 can be magnetically related by any magnetic coupling method such as a method using exchange coupling.
  • the magnetization of the second magnetization free layer 40 is completely saturated by the leakage magnetic field from the first magnetization free layer 30 is described.
  • the magnetization of the second magnetization free layer 40 may not be completely saturated. It is only necessary that the magnetization direction of the second magnetization free layer 40 varies depending on the magnetization direction of the first magnetization free layer 30.
  • the easy axis of magnetization of the second magnetization free layer 40 may be along any direction.
  • the magnetization of the second magnetization free layer 40 is reversed between the directions along the easy magnetization axis.
  • the magnetization of the second magnetization free layer 40 rotates in the hard axis direction centering on the easy axis.
  • the magnetic anisotropy of the second magnetization free layer 40 is not extremely large. This is because if the magnetic anisotropy of the second magnetization free layer 40 becomes extremely large, magnetization reversal by a leakage magnetic field from the first magnetization free layer 30 becomes difficult. Further, the magnetic anisotropy of the second magnetization free layer 40 may be imparted by crystal magnetic anisotropy or may be imparted by shape magnetic anisotropy.
  • the second magnetization free layer 40 may be a laminated film made of a plurality of ferromagnetic materials. A layer made of a non-magnetic material may be inserted between these ferromagnetic materials as long as the magnetization state is not disturbed.
  • 5A and 5B are also conceptual diagrams for explaining a method of reading data from the magnetoresistive effect element 9.
  • data reading the magnitude of the resistance value due to the magnetoresistive effect is detected.
  • a “second magnetoresistive element” composed of the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 is used, and the second magnetization free layer 40 and the second magnetization fixed layer 60 are used.
  • a read current Iread flows between the two.
  • FIG. 5A shows the case of the “0” state.
  • the magnetization direction of the second magnetization free layer 40 is substantially parallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistance effect element is relatively small.
  • FIG. 5B shows the case of the “1” state.
  • the magnetization direction of the second magnetization free layer 40 is substantially antiparallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistive element is relatively large. That is, the read current Iread or the magnitude of the read voltage corresponding to the read current Iread varies depending on the “0” state or the “1” state. Therefore, by comparing the read current Iread or the read voltage with a predetermined reference level, it is possible to determine whether the state is “0” or “1”. That is, information recorded in the magnetoresistive effect element 1 can be read.
  • the read current Iread flows through the first conductive layer 70 and the second conductive layer 80.
  • the method of flowing the read current Iread to the second magnetoresistance effect element is not limited to the example shown in FIGS. 5A and 5B. It suffices for the read current Iread to flow bidirectionally between the second magnetization free layer 40 and the second magnetization fixed layer 60, and the current paths in other portions can be designed as appropriate.
  • FIGS. 6A and 6B are conceptual diagrams for explaining a method of writing data to the magnetoresistive effect element 9.
  • Data writing is realized by the “spin injection magnetization reversal method”. Specifically, a “first magnetoresistive effect element” including the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 is used, and the first magnetization fixed layer 10 and the first magnetization free layer are used. A write current Iwrite is passed between the layers 30.
  • FIG. 6A shows a transition from the “0” state (see FIG. 5A) to the “1” state (see FIG. 5B), that is, the path of the write current Iwrite at the time of writing “1”.
  • the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and the conduction electrons having the spin angular momentum in the ⁇ z direction are compared with the conduction electrons having the spin angular momentum in the + z direction. More reflections are made at the interface of the single magnetization fixed layer 10.
  • the first magnetization free layer 30 electrons having a spin angular momentum in the ⁇ z direction become the majority, and magnetization reversal in the ⁇ z direction is induced.
  • the magnetization of the first magnetization free layer 30 is reversed in the ⁇ z direction, the magnetization of the second magnetization free layer 40 is rotated in the ⁇ x direction by the magnetic coupling described above. That is, the “1” state shown in FIG. 5B is obtained.
  • FIG. 6B shows a transition from the “1” state (see FIG. 5B) to the “0” state (see FIG. 5A), that is, the path of the write current Iwrite at the time of writing “0”.
  • the write current Iwrite is introduced in the direction of the arrow in the “1” state.
  • the write current Iwrite flows from the first magnetization free layer 30 to the first magnetization fixed layer 10 through the first nonmagnetic layer 20, and the conduction electrons pass through the first magnetization fixed layer 10 through the first nonmagnetic layer 20. It flows to one magnetization free layer 30.
  • the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and many conduction electrons having a spin angular momentum in the + z direction flow into the first magnetization free layer 30.
  • electrons having a spin angular momentum in the + z direction become majority, and magnetization reversal in the + z direction is induced.
  • the magnetization of the first magnetization free layer 30 is reversed in the + z direction, the magnetization of the second magnetization free layer 40 is rotated in the + x direction due to the magnetic coupling described above. That is, the “0” state shown in FIG. 5A is obtained.
  • the write current Iwrite flows from the first magnetoresistive element to the second conductive layer 80 via the first conductive layer 70.
  • the write current Iwrite Iwrite flows from the second conductive layer 80 into the first magnetoresistive element via the first conductive layer 70.
  • the method of flowing the write current Iwrite to the first magnetoresistive effect element is not limited to the example shown in FIGS. 6A and 6B.
  • the write current Iwrite only has to flow bidirectionally between the first magnetization fixed layer 10 and the first magnetization free layer 30, and the current paths in other parts can be appropriately designed.
  • the area of the junction between the first magnetization fixed layer 10 and the first magnetization free layer 30 is appropriately small. This is because as the area becomes smaller, the current density increases and the current value required for writing can be reduced.
  • the feature length is preferably 100 nm or less.
  • the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are used at the time of data writing.
  • the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are referred to as a “write layer group”.
  • the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are used at the time of data reading. In this sense, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are referred to as a “read layer group”.
  • the write layer group and the read layer group are provided separately, but are related to each other through magnetic coupling.
  • Information written to the first magnetization free layer 30 of the write layer group is transmitted to the second magnetization free layer 40 of the read layer group via magnetic coupling.
  • the write layer group and the read layer group can be optimized independently so that desired characteristics can be obtained.
  • the magnetoresistive effect element 9 is used as the memory element of the memory cell 201.
  • This circuit configuration is similarly applied to the memory cell 201 (using the magnetoresistive effect element 8 as a storage element) of the MRAM 4 of the present embodiment.
  • FIG. 7A is a circuit diagram showing a configuration example of a memory cell in which the magnetoresistive effect element of this embodiment is integrated.
  • FIG. 7A shows a circuit configuration of a single memory cell 201. In practice, however, a plurality of memory cells 201 are arranged in an array and integrated in the MRAM 5 (or 4). Those skilled in the art will appreciate.
  • the terminal connected to the second magnetization fixed layer 60 is connected to the ground line GND for reading via the node N3.
  • a terminal connected to the first magnetization fixed layer 10 is connected to one of the source / drain of the MOS transistor M1 via the node N1.
  • the other of the source / drain is connected to the bit line BL1.
  • a terminal connected to the second conductive layer 80 is connected to one of the source / drain of the MOS transistor M2 via the node N2.
  • the other of the source / drain is connected to the bit line BL2.
  • the gates of the MOS transistors M1 and M2 are connected to a common word line WL. That is, 210 in the figure corresponds to the first magnetization fixed layer 10, the first nonmagnetic layer 20, the first magnetization free layer 30, the first conductive layer 70, and the second conductive layer 80 of the first magnetoresistive effect element. .
  • one of two terminals connected to both ends of the magnetization fixed layer 160 is connected to one source / drain of the MOS transistor M1 via the node N1, and the other Is connected to one source / drain of MOS transistor M2 via node N2.
  • a terminal connected to the magnetization free layer 140 is connected to a ground line GND for reading via a node N3. That is, 210 in the figure corresponds to the magnetization fixed layer 160.
  • FIG. 7B is a block diagram showing a configuration example of an MRAM in which the memory cells of this embodiment are integrated.
  • the MRAM 260 includes a memory cell array 261 in which a plurality of memory cells 201 are arranged in a matrix.
  • the memory cell array 261 includes a reference cell 201r that is referred to when reading data together with the memory cell 201 used for data recording described with reference to FIG. 7A.
  • the structure of the reference cell 201r is the same as that of the memory cell 201.
  • the word line WL is connected to the X selector 262.
  • the X selector 262 selects the word line WL connected to the target memory cell 201s as the selected word line WLs during the data write operation and the read operation.
  • the bit line BL1 is connected to the Y-side current termination circuit 264, and the bit line BL2 is connected to the Y selector 263.
  • the Y selector 263 selects the bit line BL2 connected to the target memory cell 201s as the selected bit line BL2s during the data write operation and the read operation.
  • the Y-side current termination circuit 264 selects the bit line BL1 connected to the target memory cell 201s as the selected bit line BL1s.
  • the Y-side current source circuit 265 supplies or draws a predetermined write current (Iwrite) to the selected bit line BL2s during the data write operation.
  • the Y-side power supply circuit 266 supplies a predetermined voltage to the Y-side current termination circuit 264 during the data write operation. As a result, the write current (Iwrite) flows into or out of the Y selector 263.
  • These X selector 262, Y selector 263, Y side current termination circuit 264, Y side current source circuit 265, and Y side power supply circuit 266 are “write current supply circuits for supplying a write current (Iwrite) to the memory cell 201. Is comprised.
  • the read current adding circuit 267 supplies a predetermined read current (Iread) to the selected second bit line BL2s during the data read operation.
  • the Y-side current termination circuit 264 sets the bit line BL1 to “Open”.
  • the read current load circuit 267 supplies a predetermined read current (Iread) to the reference bit line BL2r connected to the reference cell 201r.
  • the sense amplifier 268 reads data from the target memory cell 201s based on the difference between the potential of the reference bit line BL2r and the potential of the selected bit line BL2s, and outputs the data.
  • the X selector 262, Y selector 263, Y-side current termination circuit 264, read current addition circuit 267, and sense amplifier 268 constitute a “read current supply circuit” for supplying a read current (Iread) to the memory cell 201. is doing.
  • the word line WL is pulled up to a “high” level, and the MOS transistors M1 and M2 are turned “ON”.
  • One of the bit lines BL1 and BL2 is pulled up to the “high” level, and the other is pulled down to the “low” level.
  • Which of the bit lines BL1 and BL2 is pulled up to a “high” level and which is pulled down to a “low” level is determined by data to be written in the magnetoresistive element 9 (or magnetoresistive element 8). Is done. That is, it is determined according to the direction of the current flowing through the first magnetization free layer 10 (or the magnetization fixed layer 160). As described above, data “0” and “1” can be written separately.
  • the word line WL is pulled up to the “high” level, and the MOS transistors M1 and M2 are turned “ON”.
  • One of the bit lines BL1 and BL2 is pulled up to the “high” level, and the other is set to “open” (floating).
  • a read current passing through the magnetoresistive effect element 9 (or the magnetoresistive effect element 8) from one of the bit lines BL1 and BL2 is transferred to the second conductive layer 80, the first conductive layer 70, the second magnetization free layer 40, the first 2 It flows to the ground line GND via the nonmagnetic layer 50 and the second magnetization fixed layer 60 (or the magnetization fixed layer 160, the nonmagnetic layer 150, and the magnetization free layer 140).
  • the potential of the bit line through which the read current flows or the magnitude of the read current depends on a change in resistance of the magnetoresistive effect element 9 (or magnetoresistive effect element 8) due to the magnetoresistive effect. By detecting this change in resistance as a voltage signal or a current signal, high-speed reading can be performed.
  • circuit configuration shown in FIGS. 7A and 7B and the circuit operation described here are merely examples of a method for carrying out the present invention, and can be implemented by other circuit configurations.
  • FIG. 8 is a circuit diagram showing another configuration example of the memory cell in which the magnetoresistive effect element of this embodiment is integrated.
  • FIG. 8 shows a circuit configuration of a single memory cell 202, it will be understood by those skilled in the art that a plurality of memory cells 202 are actually arranged in an array and integrated in an MRAM. It will be understood.
  • the circuit configuration of FIG. 8 is applied to the current-induced magnetic field writing type magnetoresistive element 8, it has been reported that operation at 500 MHz or higher is possible (N. Sakimura et al., IEEE JOURNAL). OF SOLID-STATE CIRCUITS, Vol. 42, 2007, p. 830.).
  • two MTJ1 and MTJ2 are used for one memory cell 202.
  • Complementary data (“0” and “1” or “1” and “0") are stored in MTJ1 and MTJ2.
  • a read signal is sensed by the MOS transistors M13 and M14.
  • magnetoresistive effect elements 8 (MTJ1) and 8 (MTJ2) are used as MTJ1 and MTJ2
  • magnetoresistive effect element 8 one of the two terminals connected to both ends of magnetization fixed layer 160 is a MOS transistor.
  • One source / drain of M11 is connected via node N11, and the other is connected to one end of magnetization fixed layer 160 of magnetoresistive effect element 8 (MTJ1) via node N12.
  • a terminal connected to the magnetization free layer 140 is connected to a wiring SPL that supplies a read current via a node N14.
  • one of two terminals connected to both ends of the magnetization fixed layer 160 is connected to the other end of the magnetization fixed layer 160 of the magnetoresistive effect element 8 (MTJ2) via the node N12.
  • the other is connected to one source / drain of the MOS transistor M12 via a node N13.
  • a terminal connected to the magnetization free layer 140 is connected to a ground line GND for reading via a node N15. That is, 211 and 212 in the figure correspond to the magnetization fixed layer 160 of the first magnetoresistance effect element 8 (MTJ1) and 8 (MTJ2), respectively.
  • the terminal connected to the second magnetization fixed layer 60 is a wiring for supplying a read current Connected to SPL via node N14.
  • a terminal connected to the first magnetization free layer 10 is connected to one source / drain of the MOS transistor M11 via a node N11.
  • a terminal connected to the second conductive layer 80 is connected to the first magnetization free layer 30 of the magnetoresistive effect element 9 (MTJ1) via the node N12.
  • a terminal connected to the first magnetization fixed layer 10 is connected to a ground line GND for reading via a node N15.
  • a terminal connected to the first magnetization free layer 30 is connected to the second conductive layer 80 of the magnetoresistive effect element 9 (MTJ2) via the node N12.
  • Second conductive layer 80 is connected to one source / drain of MOS transistor M12 via node N13. That is, 211 and 212 in the figure are the first magnetization free layer 10, the first nonmagnetic layer 20, the first magnetization fixed layer 30, and the first conductive layer of the magnetoresistive effect elements 9 (MTJ1) and 9 (MTJ2), respectively. 70 corresponds to the second conductive layer 80.
  • the word line RWL is pulled up to “high” level, and the MOS transistor M15 is turned “ON”. Further, the read voltage supply line SPL is pulled up to the “high” level.
  • the read current passing through the paths of the node N14, MTJ2, node N12, MTJ1, and node N15 from the read voltage supply line SPL is the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed of MTJ1 and MTJ2. It flows to the ground line GND via the layer 60 (or the magnetization fixed layer 160, the nonmagnetic layer 150, and the magnetization free layer 140 of MTJ1 and MTJ2).
  • the potential of the node N12 between MTJ2 and MTJ1 depends on complementary data stored in MTJ2 and MTJ1. Therefore, the potential of the node N12 is sensed by the MOS transistors M13 and M14 and output to the bit line RBL, thereby enabling high-speed reading.
  • circuit configuration shown in FIG. 8 and the circuit operation described here are merely examples of a method for carrying out the present invention, and can be implemented by other circuit configurations.
  • the magnetoresistive effect element 1 in the MRAM using the spin transfer magnetization reversal method, it is possible to independently improve the writing characteristics, the recording data holding characteristics, and the reading characteristics. This is because, in the magnetoresistive effect element 1 according to this embodiment, the portion responsible for writing and recording data is different from the portion responsible for reading.
  • a write threshold current density of 5 MA / cm 2 or less is obtained by using a perpendicular magnetization film in which various constants are appropriately set. Can perform spin injection magnetization reversal.
  • the aforementioned Hayaka et al. Applied Physics Letters, Vol. 89, p.
  • an MR ratio close to 500% can be obtained by using an MTJ having a certain laminated structure.
  • the second magnetization free layer 40 and the second magnetization fixed layer 60 that are responsible for data reading with in-plane magnetization films it is possible to increase the MR ratio and increase the read signal.
  • the recording layer in this case, the first magnetization free layer 30
  • the recording layer is used.
  • (E.g.) is preferably moderately small.
  • the spin polarizability of the magnetic layer is lowered.
  • the MR ratio that contributes to the magnitude of the read signal decreases. That is, it is difficult to improve read characteristics with a perpendicular magnetic film suitable for reducing the write threshold current density.
  • an appropriate type of MRAM is selected and arranged in a memory-mounted semiconductor device according to a required function.
  • a memory for a logic circuit that requires high-speed operation a current-induced magnetic field writing type MRAM capable of high-speed operation is used.
  • a memory for a main storage device that requires low current (large capacity and high integration) A spin-injection magnetization reversal MRAM capable of reducing current (capacitance / high integration) is used.
  • a nonvolatile memory mixed system memory-mounted semiconductor device that achieves both high-speed processing and large-capacity processing can be obtained.
  • the memory cell since the memory cell is non-volatile, the power can be turned off to a basic state (instant on), and power consumption can be reduced. Furthermore, even if different types of MRAM are mounted on the same chip, they can be manufactured using the same process and the same material. As a result, a semiconductor device can be manufactured at a low cost and in a short time.
  • FIG. 9 is a perspective view showing a configuration of a first modification of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention.
  • the magnetoresistive effect element 8a and the magnetoresistive effect element 9a according to the first modification of the embodiment of the present invention are formed on the same chip.
  • the configuration of the magnetoresistive effect element 8a for the MRAM 4 for high speed operation and the magnetoresistive effect element 9a for the MRAM 5 for high integration and large capacity is the magnetoresistive effect element 8 and the magnetoresistive effect element 9 of FIG. And different.
  • the magnetoresistive effect element 8a is used in a memory cell of the MRAM 4 for high speed operation. This is a current-induced magnetic field writing type magnetoresistive effect element.
  • the magnetoresistive effect element 8a includes a magnetization free layer 140, a magnetization fixed layer 160a, a nonmagnetic layer 150 provided between the magnetization free layer 140 and the magnetization fixed layer 160a, and a conductivity provided in the vicinity of the magnetization free layer 140.
  • Layer 190 is provided.
  • the magnetization free layer 140, the magnetization fixed layer 160a, and the nonmagnetic layer 150 are the same as the magnetization free layer 140, the magnetization fixed layer 160, and the nonmagnetic layer 150 in FIG.
  • the magnetization fixed layer 160a differs from the magnetization fixed layer 160 of FIG. 2 in that a write current is not passed.
  • the conductive layer 190 is a wiring layer for data writing, and is formed of a conductor.
  • the direction of magnetization of the magnetization free layer 140 is controlled by a current-induced magnetic field generated by a write current flowing inside the conductive layer 190. That is, data is written in the magnetoresistive effect element 8a by the current-induced magnetic field. Since the write current flows through the conductive layer 190 formed of a high conductivity conductor such as copper (Cu) or aluminum (Al), not the fixed magnetization layer (ferromagnetic material), the write wiring resistance is further reduced. I can do it.
  • the conductive layer 190 is electrically connected to the magnetization fixed layer 160a through the contact 101. The other configuration is the same as that in the case of FIG.
  • a write current is passed through the conductive layer 190 from one end to the other end of the conductive layer 190.
  • the magnetization of the magnetization free layer 140 is reversed by a current-induced magnetic field generated by the write current.
  • the direction of the current-induced magnetic field generated by the direction of the write current can be controlled to change the magnetization of the magnetization free layer 140 to a desired direction.
  • desired data is recorded in the magnetization free layer 140.
  • Such a writing method in which a writing current is allowed to flow through the conductive layer 190 can be called a wiring layer writing type because a wiring dedicated to writing is provided.
  • a read current is passed through the paths of the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160a.
  • data is read by detecting a change in resistance according to the relative angle between the magnetization of the magnetization fixed layer 160a and the magnetization of the magnetization free layer 140.
  • a change in resistance of the magnetoresistive effect element 8a is detected as a voltage signal or a current signal, and data stored in the magnetoresistive effect element 8a is determined using the voltage signal or the current signal.
  • the magnetoresistive effect element 9a is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
  • the magnetoresistive effect element 9a includes a first magnetoresistive effect element for writing and a second magnetoresistive effect element for reading.
  • the first magnetoresistive element includes a first magnetization fixed layer 10, a first magnetization free layer 30, and a first nonmagnetic layer 20 sandwiched between the first magnetization fixed layer 10 and the first magnetization free layer 30. .
  • the second magnetoresistance effect element includes a second magnetization free layer 40, a second magnetization fixed layer 60, and a second nonmagnetic layer 50 sandwiched between the second magnetization fixed layer 60 and the second magnetization free layer 40.
  • the magnetoresistive element 9 a further includes a first conductive layer 70 and a second conductive layer 80.
  • the first conductive layer 70 is provided so as to be electrically connected to the first magnetization free layer 30 and the second magnetization free layer 40.
  • the first conductive layer 70 is sandwiched between the first magnetization free layer 30 and the second magnetization free layer 40.
  • the second conductive layer 80 is provided so as to be electrically connected to the first conductive layer 70.
  • first conductive layer 70 and the second conductive layer 80 may be omitted.
  • An embodiment in which the second conductive layer 80 is omitted will be described later.
  • the magnetoresistive effect element 9a has a configuration in which the first magnetoresistive effect element and the second magnetoresistive effect element of the magnetoresistive effect element 9 in FIG. 2 are changed to positions opposite to each other with the first conductive layer 70 interposed therebetween. Have. Further, the magnetization fixed layer 60 is electrically connected to the conductive layer 90 (wiring layer) via the contact 102.
  • the first magnetization free layer 30 of the first magnetoresistance effect element and the second magnetization free layer 40 of the second magnetoresistance effect element are formed in different layers, but are magnetically coupled to each other.
  • the magnetization state of the first magnetization free layer 30 and the magnetization state of the second magnetization free layer 40 affect each other.
  • the magnetoresistive effect element 8a and the magnetoresistive effect element 9a according to the embodiment of the present invention are formed on the same chip.
  • the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160a of the magnetoresistive effect element 8a are respectively the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer of the magnetoresistive effect element 9a.
  • 60 and the same material are simultaneously formed in the same layer.
  • the conductive layer 190 is simultaneously formed using the same material in the same layer as the conductive layer 90. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • FIG. 10 is a schematic view schematically showing the configuration of the magnetoresistive effect element 9a according to the embodiment of the present invention.
  • FIG. 10 is an xy plan view in the xyz coordinate system shown in FIG. 9.
  • the magnetoresistive effect element 9a has a laminated structure composed of a plurality of layers, and the lamination direction is defined as the z-axis direction.
  • a plane parallel to each layer of the stacked structure is an xy plane.
  • FIG. 10 shows the positions of the centroid G30 of the first magnetization free layer 30 and the centroid G40 of the second magnetization free layer 40 in the xy plane.
  • ⁇ i means the total sum related to i.
  • the center of gravity is the intersection of diagonal lines, and in the case of an ellipse, the center of gravity is the center.
  • the centroid G30 of the first magnetization free layer 30 and the centroid G40 of the second magnetization free layer 40 are shifted in the xy plane. That is, in the xy plane, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the “first direction” parallel to the film surface.
  • the first direction (shift direction) is the + x direction.
  • the first magnetization free layer 30 and the second magnetization free layer 40 may overlap at least partially, or may not overlap.
  • each layer in the xy plane is not limited to a rectangle, and may be a circle, an ellipse, a rhombus, a hexagon, or the like.
  • irregularities can be appropriately provided on the surface of each layer so that appropriate characteristics can be obtained.
  • the area of each layer is arbitrary.
  • magnetoresistive effect element 9a Other configurations and principles regarding the magnetoresistive effect element 9a are the same as those in FIG.
  • the materials of the layers of the magnetoresistive effect element 9a and the magnetoresistive effect element 8a are the same as in the case of FIG.
  • 11A and 11B are conceptual diagrams for explaining a method of reading data to the magnetoresistive effect element 9a.
  • the magnitude of the resistance value due to the magnetoresistive effect is detected.
  • the second magnetoresistive element (second magnetization free layer 40, second nonmagnetic layer 50, and second magnetization fixed layer 60) is used, and the second magnetization free layer 40 and the second magnetization fixed layer 60 are separated from each other. A read current Iread flows between them.
  • FIG. 11A shows the case of the “0” state.
  • the magnetization direction of the second magnetization free layer 40 is substantially parallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistance effect element is relatively small.
  • FIG. 11B shows the case of the “1” state.
  • the magnetization direction of the second magnetization free layer 40 is substantially antiparallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistive element is relatively large. That is, the read current Iread or the magnitude of the read voltage corresponding to the read current Iread varies depending on the “0” state or the “1” state. Therefore, by comparing the read current Iread or the read voltage with a predetermined reference level, it is possible to determine whether the state is “0” or “1”. That is, the information recorded in the magnetoresistive effect element 9a can be read.
  • the read current Iread flows through the first conductive layer 70 and the second conductive layer 80.
  • the method of flowing the read current Iread to the second magnetoresistive effect element is not limited to the example shown in FIGS. 11A and 11B. It suffices for the read current Iread to flow bidirectionally between the second magnetization free layer 40 and the second magnetization fixed layer 60, and the current paths in other portions can be designed as appropriate.
  • 12A and 12B are conceptual diagrams for explaining a method of writing data to the magnetoresistive effect element 9.
  • Data writing is realized by the “spin injection magnetization reversal method”. Specifically, the first magnetoresistance effect element (the first magnetization fixed layer 10, the first nonmagnetic layer 20 and the first magnetization free layer 30) is used, and the first magnetization fixed layer 10 and the first magnetization free layer 30 are used. A write current Iwrite is passed between the two.
  • FIG. 12A shows the transition from the “0” state (see FIG. 11A) to the “1” state (see FIG. 11B), that is, the path of the write current Iwrite at the time of writing “1”.
  • a write current Iwrite is introduced in the direction of the arrow in the “0” state as shown in FIG. 12A.
  • the write current Iwrite flows from the first magnetization fixed layer 10 to the first magnetization free layer 30 through the first nonmagnetic layer 20, and the conduction electrons pass through the first magnetization free layer 30 through the first nonmagnetic layer 20. It flows to one magnetization fixed layer 10.
  • FIG. 12A shows the transition from the “0” state (see FIG. 11A) to the “1” state (see FIG. 11B), that is, the path of the write current Iwrite at the time of writing “1”.
  • the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and the conduction electrons having the spin angular momentum in the ⁇ z direction are compared with the conduction electrons having the spin angular momentum in the + z direction. More reflections are made at the interface of the single magnetization fixed layer 10.
  • electrons having a spin angular momentum in the ⁇ z direction become the majority, and magnetization reversal in the ⁇ z direction is induced.
  • the magnetization of the first magnetization free layer 30 is reversed in the ⁇ z direction, the magnetization of the second magnetization free layer 40 is rotated in the ⁇ x direction by the magnetic coupling described above. That is, the “1” state shown in FIG. 11B is obtained.
  • FIG. 12B shows a transition from the “1” state (see FIG. 11B) to the “0” state (see FIG. 11A), that is, the path of the write current Iwrite when writing “0”.
  • a write current Iwrite is introduced in the direction of the arrow in the “1” state as shown in FIG. 12B.
  • the write current Iwrite flows from the first magnetization free layer 30 to the first magnetization fixed layer 10 through the first nonmagnetic layer 20, and the conduction electrons pass through the first magnetization fixed layer 10 through the first nonmagnetic layer 20. It flows to one magnetization free layer 30.
  • FIG. 12B shows a transition from the “1” state (see FIG. 11B) to the “0” state (see FIG. 11A), that is, the path of the write current Iwrite when writing “0”.
  • the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and many conduction electrons having a spin angular momentum in the + z direction flow into the first magnetization free layer 30.
  • electrons having a spin angular momentum in the + z direction become majority, and magnetization reversal in the + z direction is induced.
  • the magnetization of the first magnetization free layer 30 is reversed in the + z direction, the magnetization of the second magnetization free layer 40 is rotated in the + x direction due to the magnetic coupling described above. That is, the “0” state shown in FIG. 11A is obtained.
  • the write current Iwrite flows from the first magnetoresistive element through the first conductive layer 70 to the second conductive layer 80.
  • the write current Iwrite Iwrite flows from the second conductive layer 80 into the first magnetoresistive element via the first conductive layer 70.
  • the method of flowing the write current Iwrite to the first magnetoresistance effect element is not limited to the example shown in FIGS. 12A and 12B.
  • the write current Iwrite only has to flow bidirectionally between the first magnetization fixed layer 10 and the first magnetization free layer 30, and the current paths in other parts can be appropriately designed.
  • the area of the junction between the first magnetization fixed layer 10 and the first magnetization free layer 30 is appropriately small. This is because as the area becomes smaller, the current density increases and the current value required for writing can be reduced.
  • the feature length is preferably 100 nm or less.
  • the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are used at the time of data writing.
  • the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are referred to as a “write layer group”.
  • the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are used at the time of data reading. In this sense, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are referred to as a “read layer group”.
  • the write layer group and the read layer group are provided separately, but are related to each other through magnetic coupling.
  • Information written to the first magnetization free layer 30 of the write layer group is transmitted to the second magnetization free layer 40 of the read layer group via magnetic coupling.
  • the write layer group and the read layer group can be optimized independently so that desired characteristics can be obtained.
  • FIG. 13 is a perspective view showing a configuration of a second modification of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention.
  • the magnetoresistive effect element 8b and the magnetoresistive effect element 9b according to the second modification of the embodiment of the present invention are formed on the same chip.
  • the configurations of the magnetoresistive effect element 8b for the MRAM 4 for high-speed operation and the magnetoresistive effect element 9b for the MRAM 5 for high integration and large capacity (low current) are respectively shown in FIG. Different from the magnetoresistive effect element 9.
  • the magnetoresistive effect element 8b is used in a memory cell of the MRAM 4 for high speed operation. This is a current-induced magnetic field writing type magnetoresistive effect element.
  • the magnetoresistive effect element 8b includes a magnetization free layer 140, a magnetization fixed layer 160, a nonmagnetic layer 150 provided between the magnetization free layer 140 and the magnetization fixed layer 160, and the nonmagnetic layer 150 sandwiching the magnetization fixed layer 160. And a magnetization free layer 140a provided on the opposite side to the magnetization fixed layer 160 with the nonmagnetic layer 151 interposed therebetween.
  • an electrode layer, a diffusion prevention layer, a base layer, and the like are appropriately provided.
  • the magnetization free layer 140, the magnetization fixed layer 160, and the nonmagnetic layer 150 are the same as the magnetization free layer 140, the magnetization fixed layer 160, and the nonmagnetic layer 150 in FIG.
  • the magnetoresistive effect element 8b differs from the magnetoresistive effect element 8 of FIG. 2 in that it includes a magnetization free layer 140a provided on the opposite side of the nonmagnetic layer 150 with the magnetization fixed layer 160 interposed therebetween.
  • the magnetization free layer 140a is preferably made of the same ferromagnetic material as the magnetization free layer 140, has the same in-plane magnetic anisotropy, and has a reversible magnetization in the reverse direction.
  • the magnetization free layer 60a is antiferromagnetically magnetically coupled to the magnetization free layer 60 and stabilizes the magnetization of each other.
  • the magnetization free layer 140a and the magnetization free layer 140 located on both sides of the magnetization fixed layer 160 have a function of amplifying a current-induced magnetic field generated by a write current flowing through the magnetization fixed layer 160 during a write operation. Yes.
  • the nonmagnetic layer 151 has a function of cutting the magnetic coupling between the magnetization fixed layer 160 and the magnetization free layer 140a.
  • the nonmagnetic layer 151 may be made of any material as long as it is a nonmagnetic material. The other configuration is the same as that in the case of FIG.
  • the current induced magnetic field due to the write current flowing through the magnetization fixed layer 160 is amplified by the magnetization free layer 140a and the magnetization free layer 140, Except that the magnetization free layer 140a is magnetized in the opposite direction to the magnetization free layer 140 by the current-induced magnetic field, the description is omitted because it is the same as in FIG.
  • Such a writing method in which a fixed magnetization layer 160 serving as a writing wiring layer is positioned between the magnetization free layer 140a and the magnetization free layer 140 and a writing current is passed therethrough can also be referred to as an intermediate wiring layer writing type.
  • the method for reading data from the magnetoresistive effect element 8b of the present embodiment is the same as in the case of FIG.
  • the magnetization free layer 140 and the magnetization free layer 140a are depicted as having substantially the same shape, but the shapes of the two layers may be different.
  • the magnetization free layer 140a may have the same shape as the magnetization fixed layer 160.
  • the magnetization of the magnetization free layer 140a is oriented in the y direction, which is the longitudinal direction in a steady state, and rotates in the direction of the current-induced magnetic field when a current is introduced into the magnetization fixed layer 160. It is possible to efficiently apply a magnetic field.
  • the magnetization free layer 140a having such a role is often referred to as a cladding layer or a yoke layer.
  • the magnetoresistive effect element 9b is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
  • the magnetoresistive effect element 9b includes a first magnetoresistive effect element for writing and a second magnetoresistive effect element for reading.
  • This magnetoresistive effect element 9b is the same as the magnetoresistive effect element 9 of FIG. However, it differs from the magnetoresistive element 9 of FIG. 2 in that the nonmagnetic layer 51 and the magnetic layer 41 are provided under the second magnetization fixed layer 60. However, the nonmagnetic layer 51 and the magnetic layer 41 do not have any influence on the element operation, and may be omitted. Other configurations and operations are the same as in the case of FIG.
  • the magnetoresistive effect element 8b and the magnetoresistive effect element 9b according to the embodiment of the present invention are formed on the same chip.
  • the magnetization free layer 140, the nonmagnetic layer 150, the magnetization fixed layer 160, and the magnetization free layer 140a of the magnetoresistive effect element 8b are respectively the second magnetization free layer 40, the second nonmagnetic layer 50, and the magnetoresistance effect element 9b.
  • the second magnetization fixed layer 40 and the magnetic layer 41 are simultaneously formed of the same material in the same layer. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • the third modification relates to the positional relationship in the z-axis direction (stacking direction) of each layer constituting the magnetoresistive effect element 9c.
  • the magnetoresistive effect element 9c is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
  • the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 constitute a “write layer group”, and the second magnetization free layer 40 and the second nonmagnetic layer 50.
  • the second magnetization fixed layer 60 constitutes a “read layer group”.
  • the first conductive layer 70 and the second conductive layer 80 constitute a “plug group” that introduces a current into the write layer group and the read layer group.
  • the positional relationship among the write layer group, the read layer group, and the plug group is not limited to that shown in the above example.
  • the first magnetization free layer 30 of the write layer group and the second magnetization free layer 40 of the read layer group may be formed in different layers and magnetically coupled to each other.
  • FIG. 14A to FIG. 14C are schematic views schematically showing a configuration of a third modification of the magnetoresistive effect element according to the present example.
  • FIG. 14A is a perspective view
  • FIGS. 14B and 14C are an xy plan view and an xz sectional view in the xyz coordinate system shown in FIG. 14A, respectively.
  • the write layer group is provided above the read layer group.
  • the second conductive layer 80 is provided on the writing layer group side (upper side) with respect to the first conductive layer 70.
  • the first magnetization free layer 30 of the write layer group and the second magnetization free layer 40 of the read layer group are magnetically coupled to each other.
  • the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the xy plane. Therefore, the magnetization direction of the second magnetization free layer 40 is uniquely determined by the leakage magnetic field that spreads radially from the first magnetization free layer 30.
  • the write current Iwrite flows from the plug group to the write layer group or from the write layer group to the plug group.
  • the direction of the write current Iwrite both “0” write and “1” write can be realized.
  • the read current Iread is introduced into the read layer group by using the plug group.
  • the write layer group, the read layer group, and the plug group can be considered.
  • the distance between the first magnetization free layer 30 and the second magnetization free layer 40 is small. It is preferable. Therefore, as described above, the first magnetization fixed layer 10, the first nonmagnetic layer 20, the first magnetization free layer 30, the first conductive layer 70, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second The magnetization fixed layer 60 is preferably laminated from the bottom or the top in this order. As will be described later, the first conductive layer 70 can be omitted.
  • the semiconductor device 1 can be configured with the same combination as in FIG. 2 with respect to the magnetoresistive effect element 8 for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9c and the magnetoresistive effect element 8 according to this modification can be formed on the same chip.
  • the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 are the same as the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 of the magnetoresistive effect element 9c, respectively.
  • the same layer and the same material are simultaneously formed. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9c and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time with the same material and the same layer.
  • the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9c and the magnetoresistive effect element 8b according to this modification can be formed on the same chip at the same time with the same material and the same layer. Even in these cases, formation by the same process is possible.
  • the fourth modification relates to the number of write layer groups constituting the magnetoresistive effect element 9d.
  • the magnetoresistive effect element 9d is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
  • the magnetoresistance effect element 9d according to the fourth modification includes a plurality of write layer groups.
  • Each of the plurality of write layer groups includes the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 described above.
  • FIGS. 15A to 15C are schematic views schematically showing a configuration of a fourth modification of the magnetoresistive effect element according to the present example.
  • FIG. 15A is a perspective view showing an example of the structure of the magnetoresistive effect element 9d.
  • 15B and 15C are respectively an xy plan view and an xz side view of the structure shown in FIG. 15A.
  • the magnetoresistive element 9d includes a first write layer group, a second write layer group, a first conductive layer 70, and a read layer group (40 to 60). Yes.
  • the first write layer group includes a first magnetization fixed layer 10a, a first nonmagnetic layer 20a, and a first magnetization free layer 30a.
  • the second write layer group includes a first magnetization fixed layer 10b, a first nonmagnetic layer 20b, and a first magnetization free layer 30b.
  • the first magnetization fixed layer 10a and the first magnetization fixed layer 10b are formed in the same layer and have the same material, shape, and film thickness.
  • the first nonmagnetic layer 20a and the first nonmagnetic layer 20b are formed in the same layer and have the same material, shape, and film thickness.
  • the first magnetization free layer 30a and the first magnetization free layer 30b are formed in the same layer and have the same material, shape, and film thickness. By having the same layer, the same material, and the same film thickness, they can be formed by the same process.
  • both the first magnetization free layer 30a and the first magnetization free layer 30b are in contact with one surface of the first conductive layer 70, and the other surface has a second magnetization magnetization.
  • the free layer 40 is in contact.
  • the first magnetization free layer 30a and the second magnetization free layer 40 are magnetically coupled to each other.
  • the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30a of the first magnetization free layer 30a. Therefore, the magnetization of the first magnetization free layer 30 a exerts a magnetic force in the in-plane direction on the second magnetization free layer 40.
  • the first magnetization free layer 30b and the second magnetization free layer 40 are magnetically coupled to each other.
  • the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30b of the first magnetization free layer 30b. Accordingly, the magnetization of the first magnetization free layer 30 b exerts a magnetic force in the in-plane direction on the second magnetization free layer 40.
  • the centroid G40 of the second magnetization free layer 40 is located between the centroid G30a of the first magnetization free layer 30a and the centroid G30b of the first magnetization free layer 30b in the xy plane.
  • the centroid G30a of the first magnetization free layer 30a, the centroid G40 of the second magnetization free layer 40, and the centroid G30b of the first magnetization free layer 30b are aligned on the xy plane. In the example shown in FIGS.
  • the centroid G40 of the second magnetization free layer 40 is shifted in the + x direction from the centroid G30a of the first magnetization free layer 30a, and the centroid G30b of the first magnetization free layer 30b is The second magnetization free layer 40 is shifted from the center of gravity G40 in the + x direction.
  • FIGS. 16A and 16B each illustrate two memory states that the magnetoresistive effect element 9d shown in FIGS. 15A to 15C can take.
  • the magnetization directions of the first magnetization fixed layers 10a and 10b are parallel to each other and fixed in the same + z direction.
  • the magnetization direction of the second magnetization fixed layer 60 is fixed in the + x direction.
  • the magnetization of the first magnetization free layer 30a faces the + z direction, while the magnetization of the first magnetization free layer 30b faces the -z direction. That is, the magnetization directions of the first magnetization free layers 30a and 30b are substantially antiparallel to each other.
  • both the leakage magnetic fields from the first magnetization free layers 30a and 30b have a + x component at the position of the center of gravity G40 of the second magnetization free layer 40. This is because the center of gravity G40 of the second magnetization free layer 40 is located between the centers of gravity G30a and G30b of the first magnetization free layers 30a and 30b.
  • the center of gravity G40 is located between the centers of gravity G30a and G30b and the magnetization directions of the first magnetization free layers 30a and 30b are antiparallel, the magnetic force generated by the first magnetization free layers 30a and 30b is reduced to the second magnetization free layer. It strengthens each other at 40 positions. The strengthening effect of magnetic force is maximized when the centers of gravity G30a, G40, and G30b are aligned.
  • the magnetization of the second magnetization free layer 40 has a component in the + x direction.
  • the magnetization direction of the second magnetization free layer 40 has a component “parallel” to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistive element is relatively small (“0”). Status).
  • the magnetization of the first magnetization free layer 30a faces the ⁇ z direction
  • the magnetization of the first magnetization free layer 30b faces the + z direction.
  • both the leakage magnetic fields from the first magnetization free layers 30 a and 30 b have a ⁇ x component at the position of the center of gravity G 40 of the second magnetization free layer 40.
  • the magnetization of the second magnetization free layer 40 has a component in the ⁇ x direction.
  • the magnetization direction of the second magnetization free layer 40 has a component “antiparallel” to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistance effect element is relatively large (“1”). "Status).
  • the write current Iwrite flows between the first magnetization fixed layer 10 and the first magnetization free layer 30 in each of the write layer groups.
  • the direction of the write current Iwrite in each write layer group is appropriately set so that the magnetization of each first magnetization free layer 30 is reversed.
  • FIG. 17A shows an example of the write current Iwrite in the fourth modification.
  • the magnetization directions of the first magnetization fixed layers 10a and 10b are parallel to each other, and the magnetization directions of the first magnetization free layers 30a and 30b are antiparallel to each other. Therefore, the direction of the write current Iwrite flowing between the first magnetization fixed layer 10a and the first magnetization free layer 30a of the first write layer group is the same as that of the first magnetization fixed layer 10b and the first magnetization fixed layer 10b of the second write layer group. It is set opposite to the direction of the write current Iwrite flowing between the magnetization free layer 30b.
  • the write current Iwrite flows from the first magnetization fixed layer 10 to the first magnetization free layer 30 in one write layer group
  • the write current Iwrite is transferred from the first magnetization free layer 30 to the first magnetization free layer 30 in the other write layer group. 1 flows to the magnetization fixed layer 10.
  • both antiparallel magnetizations of the first magnetization free layers 30a and 30b are reversed.
  • the write current Iwrite is passed between the first write layer group and the second write layer group via the first conductive layer 70, and the direction of the write current Iwrite is changed.
  • the method for introducing the write current Iwrite is not limited thereto.
  • a read current Iread flows between the second magnetization free layer 40 and the second magnetization fixed layer 60 of the read layer group.
  • the method of introducing the read current Iread into the read layer group can be designed as appropriate.
  • FIG. 17B shows an example of a method for introducing the read current Iread in the fourth modification.
  • the read current Iread is introduced via the second write layer group.
  • the read current Iread may pass through the first write layer group, or may pass through both the first write layer group and the second write layer group.
  • the fourth modification can be combined with the previous modification. Moreover, according to the 4th modification, the following effect is acquired additionally.
  • the read signal further increases.
  • two or more first magnetization free layers 30 that are sources of leakage magnetic fields that contribute to the rotation of magnetization of the second magnetization free layer 40 are provided. Therefore, the magnitude of the magnetic field acting on the second magnetization free layer 40 is more than twice, and the magnetization of the second magnetization free layer 40 rotates more greatly. As a result, a large magnetoresistive effect is exhibited, and a large read signal is obtained.
  • the manufacturing process is simplified. That is, according to this modification, the first writing layer group and the second writing layer group can be manufactured in the same process. Therefore, the number of manufacturing processes is reduced, and the manufacturing cost is reduced.
  • the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 for the MRAM 4 in FIG. 2 are replaced with the second magnetization free layer 40 and the second nonmagnetic layer 50 of the readout layer group.
  • the second magnetization fixed layer 60 and the second magnetization fixed layer 60 can be simultaneously formed using the same material.
  • the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • the semiconductor device 1 can be configured with the same combination as in FIG. 9 with respect to the magnetoresistive effect element 8a for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9d and the magnetoresistive effect element 8a according to this modification can be formed on the same chip at the same time with the same material and the same layer.
  • the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9d and the magnetoresistive effect element 8b according to this modification can be formed on the same chip at the same time with the same material and the same layer. Even in these cases, formation by the same process is possible.
  • the fifth modification relates to the positional relationship in the xy plane between the first magnetization free layer 30 and the second magnetization free layer 40 constituting the magnetoresistive effect element 9e.
  • the magnetoresistive effect element 9d is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
  • the positional relationship between the first magnetization free layer 30 and the second magnetization free layer 40 is not limited to the above-described example.
  • the center of gravity G40 of the second magnetization free layer 40 only needs to be positioned in the “first direction” with respect to the center of gravity G30 of the first magnetization free layer 30.
  • FIG. 18A to 18D are schematic views schematically showing the configuration of a fifth modification of the magnetoresistive effect element according to this example.
  • FIG. 18A is a perspective view showing an example of the structure of the magnetoresistive effect element 9e.
  • 18B, 18C, and 18D are respectively an xy plan view, an xz sectional view, and a yz sectional view of the structure shown in FIG. 18A.
  • the shift direction (first direction) between the first magnetization free layer 30 and the second magnetization free layer 40 in the xy plane is different from the longitudinal direction of the first conductive layer 70. Yes.
  • the longitudinal direction of the first conductive layer 70 is the x-axis direction
  • the first direction is a y-axis direction different from the x-axis direction. That is, in the xy plane, the center G40 of the second magnetization free layer 40 is shifted from the center G30 of the first magnetization free layer 30 in the y-axis direction. Therefore, the magnetization direction of the second magnetization free layer 40 is uniquely determined by the leakage magnetic field that spreads radially from the first magnetization free layer 30.
  • the magnetization direction of the second magnetization free layer 40 has a component in the + y direction or the ⁇ y direction depending on the magnetization direction of the first magnetization free layer 30.
  • the magnetization direction of the second magnetization fixed layer 60 is preferably fixed in either the + y direction or the ⁇ y direction.
  • the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 for the MRAM 4 in FIG. 2 are replaced with the second magnetization free layer 40 of the readout layer group of the magnetoresistive effect element 9e,
  • the second nonmagnetic layer 50 and the second magnetization fixed layer 60 can be simultaneously formed of the same material in the same layer.
  • the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • the semiconductor device 1 can be configured with the same combination as in FIG. 9 with respect to the magnetoresistive effect element 8a for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9e and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time using the same material with the same layers.
  • the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9e and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time using the same material with the same layers. Even in these cases, formation by the same process is possible.
  • the configuration of a sixth modification of the magnetoresistive element in each MRAM according to the embodiment of the present invention will be described.
  • the second conductive layer 80 constituting the magnetoresistive effect element 9f is omitted.
  • the magnetoresistive effect element 9d is used in a memory cell of the MRAM 5 (desirably, the write current is 0.5 mA or less) for high integration and large capacity (low current).
  • This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
  • FIGS. 19A to 19C are schematic views schematically showing the configuration of a sixth modification of the magnetoresistive effect element according to this example.
  • FIG. 19A is a perspective view showing an example of the structure of the magnetoresistive element 9f.
  • 19B and 19C are respectively an xy plan view and an xz side view of the structure shown in FIG. 19A.
  • the second conductive layer 80 is omitted, and the magnetoresistive effect element 9f is a two-terminal element.
  • the first magnetization free layer 30 and the second magnetization free layer 40 are magnetically coupled, and the center G40 of the second magnetization free layer 40 is shifted from the center G30 of the first magnetization free layer 30. ing. Therefore, the magnetization direction of the second magnetization free layer 40 is uniquely determined according to the magnetization direction of the first magnetization free layer 30.
  • the 20A and 20B show paths of the write current Iwrite and the read current Iread in the present modification, respectively. Since the magnetoresistive effect element 9f according to this modification is a two-terminal element, the write current Iwrite introduced into the write layer group at the time of data writing also flows through the read layer group. Further, the read current Iread introduced into the read layer group at the time of data reading also flows through the write layer group. That is, the path of the write current Iwrite and the path of the read current Iread are the same.
  • the read current Iread is set small. Further, it is necessary to prevent the spin injection magnetization reversal from occurring in the second magnetization free layer 40 due to the write current Iwrite during data writing. For this purpose, it is desirable to make the current density of the write current Iwrite flowing through the read layer group (40, 50, 60) smaller than the current density of the write current Iwrite flowing through the write layer group (10, 20, 30). For example, the area of the read layer group in the xy plane is designed to be larger than the area of the write layer group in the xy plane.
  • the magnetoresistive effect element 9f is a two-terminal element, it is preferable to provide one transistor per memory cell.
  • a transistor may be connected to either the first magnetization fixed layer 10 or the second magnetization fixed layer 60.
  • the transistor M2 and the bit line BL2 can be omitted from the circuit configuration shown in FIG. 7A. As a result, the area of the magnetic memory cell is reduced.
  • the sixth modification can be combined with other modifications.
  • the semiconductor device 1 can be configured with the same combination as in FIG. 2 with respect to the magnetoresistive effect element 8 for the MRAM 4 in FIG. That is, according to this modification, the magnetoresistive effect element 9f and the magnetoresistive effect element 8 are formed on the same chip.
  • the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 are the same as the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 of the magnetoresistive effect element 9f, respectively.
  • the same layer and the same material are simultaneously formed. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
  • the semiconductor device 1 can be configured with the same combination as in FIG. 9 with respect to the magnetoresistive effect element 8a for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9f and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time with the same material and the same layer.
  • the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9f and the magnetoresistive effect element 8b according to the present modification can be formed on the same chip at the same time using the same material and the same layers. Even in these cases, formation by the same process is possible.
  • a material having a heat generation effect may be inserted into the write current path.
  • the temperature of the element rises due to heat generation, and a heat-assisted recording effect can be obtained at the time of data writing.
  • a magnetic field induced by arranging a wiring in the vicinity of the magnetoresistive effect element and passing a current through the wiring may be used as an assist magnetic field at the time of spin injection magnetization reversal.
  • Example of this invention and its various modifications are described above, this invention should not be limited to the above-mentioned Example and modification. Those skilled in the art will readily understand that a plurality of the above-described modified examples can be applied in combination as long as there is no contradiction.
  • the semiconductor device of the present invention can achieve both high-speed processing and large-capacity processing in the internal memory as a memory-embedded semiconductor device.

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Abstract

Disclosed is a semiconductor device equipped with a first magnetic random access memory that has a first memory cell (9), and a second magnetic random access memory that has a second memory cell (8) which operates at a higher speed than the first memory cell (9) and that is provided within the same chip as the aforementioned first magnetic random access memory. First memory cell (9) is a spin injection magnetization inversion type MRAM. Data is stored based on the position of the magnetic wall of a magnetization-free layer. The layer in which write current flows and the layer in which readout current flows are not the same. Second memory cell (8) is a current-induced magnetic field type MRAM. Data is stored based on a magnetic field induced by the write current.

Description

半導体装置Semiconductor device
 本発明は、半導体装置に関し、特に、磁気抵抗効果素子をメモリセルに用いる半導体装置に関する。 The present invention relates to a semiconductor device, and more particularly to a semiconductor device using a magnetoresistive effect element for a memory cell.
 磁気ランダムアクセスメモリ(Magnetic Random Access Memory;MRAM)は高速動作、および無限回の書き換えが可能な不揮発性メモリとして期待され、開発が盛んに行われている。MRAMではメモリセルに磁気抵抗効果素子が集積化され、磁気抵抗効果素子の強磁性層の磁化の向きとしてデータが記憶される。この強磁性層の磁化をスイッチングさせる方法に対応していくつかの種類のMRAMが提案されている。 Magnetic Random Access Memory (Magnetic Random Access Memory; MRAM) is expected to be a non-volatile memory capable of high-speed operation and infinite rewriting, and has been actively developed. In the MRAM, a magnetoresistive effect element is integrated in a memory cell, and data is stored as the magnetization direction of the ferromagnetic layer of the magnetoresistive effect element. Several types of MRAMs have been proposed corresponding to the method of switching the magnetization of the ferromagnetic layer.
 最も一般的なMRAMとしては、電流誘起磁界書き込み型のMRAMがある。このMRAMでは、磁気抵抗効果素子の周辺に書き込み電流を流すための配線を配置し、書き込み電流を流すことで発生する電流磁界によって磁気抵抗効果素子の強磁性層の磁化の方向をスイッチングさせる。このMRAMでは、原理的には1ナノ秒以下での書き込みが可能であり、高速MRAMとして好適である。例えば、250MHzでの動作実証に成功した報告がある(N.Sakimura et al.,“A 250-MHz 1-Mbit Embedded MRAM Macro Using 2T1MTJ Cell with Bitline Separation and Half-Pitch Shift Architecture”,Solid-State Circuits Conference,2007.ASSCC’07.IEEE Asian.p.216.)。更に、500MHzでの動作に適した回路構成も提案されている(N.Sakimura et al.,“MRAM Cell Technology for Over 500-MHz SoC”,IEEE JOURNAL OF SOLID-STATE CIRCUITS,Vol.42,2007,p.830.)。 The most common MRAM is a current-induced magnetic field writing type MRAM. In this MRAM, wiring for passing a write current is arranged around the magnetoresistive effect element, and the magnetization direction of the ferromagnetic layer of the magnetoresistive effect element is switched by a current magnetic field generated by passing the write current. In principle, this MRAM can be written in 1 nanosecond or less, and is suitable as a high-speed MRAM. For example, there has been a report of successful operation verification at 250 MHz (N. Sakimura et al., “A 250-MHz 1-Mbit Embedded MRAM Macro Usage 2T1MTJ Cell Bitline Separation and Half-ShipCritichi” Conference, 2007. ASSCC '07. IEEE Asian. P. 216.). Furthermore, a circuit configuration suitable for operation at 500 MHz has also been proposed (N. Sakimura et al., “MRAM Cell Technology for Over 500-MHz SoC”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 42. p.830.).
 しかし、熱安定性、外乱磁界耐性が確保された磁性体の磁化をスイッチングするための磁界は一般的には数10[Oe]程度となる。このような磁界を発生させるためには数mA程度の大きな書き込み電流が必要となる。報告されている書き込み電流の中で最も低いものでも1mA程度である(H.Honjo et al.,“Performance of write-line-inserted MTJ for low-write-current MRAM cell”,52nd Magnetism and Magnetic Materials Conference 2007(MMM 2007).p.481.)。書き込み電流が大きいと、チップ面積が大きくならざるを得ず、また書き込みに要する消費電力も増大する。これに加えて、メモリセルが微細化されると、書き込み電流はさらに増大し、スケーリングしない。 However, the magnetic field for switching the magnetization of the magnetic material in which the thermal stability and the disturbance magnetic field resistance are ensured is generally about several tens [Oe]. In order to generate such a magnetic field, a large write current of about several mA is required. Even the lowest reported write current is about 1 mA (H. Honjo et al., “Performance of write-line-inserted MTJ for low-write-current MRAM cell”, 52nd MagnetismensMet 2007 (MMM 2007), p. 481.). When the write current is large, the chip area is inevitably increased, and the power consumption required for writing increases. In addition to this, when the memory cell is miniaturized, the write current further increases and does not scale.
 他のMRAMとしては、スピン偏極電流書き込み型のMRAMがある。このMRAMでは、磁気抵抗効果素子の強磁性導体にスピン偏極電流(spin-polarized current)が注入され、その電流を担う伝導電子のスピンと導体の磁気モーメントとの間の直接相互作用によって磁化が反転する(以下、「スピン注入磁化反転:Spin Transfer Magnetization Switching」と参照される)。スピン注入磁化反転の発生の有無は、(電流の絶対値ではなく)電流密度に依存する。したがって、スピン注入磁化反転をデータ書き込みに利用する場合、メモリセルのサイズが小さくなれば、書き込み電流も低減される。すなわち、スピン注入磁化反転方式はスケーリング性に優れている。書き込み電流が小さいと、チップ面積が小さくなり、高集積化や大規模化が可能となる。ただし、電流誘起磁界書き込み型のMRAMに比較して、書き込み時間が長い傾向(例示:1nsec.以上)にある。 As another MRAM, there is a spin polarized current writing type MRAM. In this MRAM, a spin-polarized current is injected into the ferromagnetic conductor of the magnetoresistive element, and the magnetization is caused by a direct interaction between the spin of the conduction electron carrying the current and the magnetic moment of the conductor. (Hereinafter referred to as “Spin Transfer Magnetization Switching”). The presence or absence of spin injection magnetization reversal depends on the current density (not the absolute value of the current). Accordingly, when spin injection magnetization reversal is used for data writing, the write current is reduced if the size of the memory cell is reduced. That is, the spin injection magnetization reversal method is excellent in scaling. When the write current is small, the chip area is small, and high integration and large scale are possible. However, the writing time tends to be longer than that of the current-induced magnetic field writing type MRAM (example: 1 nsec. Or more).
 システムLSI(Large-Scale Integration)のようなロジックとメモリを搭載した半導体装置(以下、「メモリ混載型半導体装置」とも参照される)では、高速動作が必要な領域と、大容量・高集積(つまり低書き込み電流)が必要な領域とがあり、それぞれの領域にはメモリが設けられている。例えば、高速動作が必要な領域のメモリとしてはレジスタやキャッシュが設けられ、大容量・高集積が必要な領域のメモリとしては主記憶装置や補助記憶装置が設けられている。各メモリに要求される性能や機能は互いに異なるため、一種類のメモリで対応することは出来ない。したがって、これまで、複数の種類のメモリ(FF(Flip-Flop)、SRAM(Static Random Access Memory)、DRAM(Dynamic Random Access Memory)、フラッシュメモリなど)のうちから選択した少なくとも一つを高速動作が必要な領域に、他の少なくとも一つを大容量・高集積の領域にそれぞれ用いていた。しかし、その場合、各メモリで使用する材料やプロセスが互いに異なるため、プロセス数が増加してしまう。その結果、製造コストの増加や製造期間の長期化、製造歩留まりの低下等の問題を招くおそれがある。 In a semiconductor device (hereinafter also referred to as a “memory-embedded semiconductor device”) such as a system LSI (Large-Scale Integration) equipped with logic and memory, an area that requires high-speed operation, large capacity and high integration ( That is, there are areas that require a low write current, and a memory is provided in each area. For example, a register or cache is provided as a memory in an area requiring high-speed operation, and a main storage device or an auxiliary storage device is provided as a memory in an area requiring large capacity and high integration. Since the performance and functions required for each memory are different from each other, one type of memory cannot be used. Therefore, at least one of a plurality of types of memory (FF (Flip-Flop), SRAM (Static Random Access Memory), DRAM (Dynamic Random Access Memory), flash memory, etc.) has been operated at high speed so far. At least one of the other required areas was used for a large capacity / highly integrated area. However, in this case, the number of processes increases because the materials and processes used in each memory are different from each other. As a result, problems such as an increase in manufacturing cost, a prolonged manufacturing period, and a decrease in manufacturing yield may occur.
 したがって、本発明の目的は、内部のメモリにおける高速処理と大容量処理とを両立させることが可能なメモリ混載型の半導体装置を提供することにある。 Therefore, an object of the present invention is to provide a memory-embedded semiconductor device capable of achieving both high-speed processing and large-capacity processing in an internal memory.
 本発明の半導体装置は、第1メモリセルを有する第1磁気ランダムアクセスメモリと、第1メモリセルと比較して高速で動作する第2メモリセルを有し、前記第1磁気ランダムアクセスメモリと同一チップ内に設けられた第2磁気ランダムアクセスメモリとを具備する。第1メモリセルは、磁化方向が固定された第1磁化固定層と、磁化方向が反転可能な第1磁化自由層と、第1磁化固定層と第1磁化自由層とに挟まれた第1非磁性層と、磁化方向が固定された第2磁化固定層と、磁化方向が反転可能な第2磁化自由層と、第2磁化固定層と第2磁化自由層とに挟まれた第2非磁性層とを備える。第1磁化固定層と第1磁化自由層は、強磁性体から構成され、且つ、垂直磁気異方性を有する。第2磁化固定層と第2磁化自由層は、強磁性体から構成され、且つ、面内磁気異方性を有する。第1磁化自由層と第2磁化自由層は、互いに磁気的に結合している。各層に平行な第1平面において、第2磁化自由層の重心は、第1磁化自由層の重心からずれている。第2磁化固定層の磁化方向は、第1磁化自由層と第2磁化自由層との間の重心のずれ方向と略平行あるいは略反平行である。第2メモリセルは、第3磁化自由層と、第3磁化固定層と、第3磁化自由層と第3磁化固定層との間に設けられた第2非磁性層とを備える。第3磁化自由層及び第3磁化固定層は、強磁性体から構成されている。 The semiconductor device of the present invention has a first magnetic random access memory having a first memory cell and a second memory cell that operates at a higher speed than the first memory cell, and is the same as the first magnetic random access memory. And a second magnetic random access memory provided in the chip. The first memory cell includes a first magnetization fixed layer whose magnetization direction is fixed, a first magnetization free layer whose magnetization direction can be reversed, a first magnetization fixed layer, and a first magnetization free layer sandwiched between the first magnetization fixed layer and the first magnetization free layer. A nonmagnetic layer; a second magnetization fixed layer whose magnetization direction is fixed; a second magnetization free layer whose magnetization direction is reversible; a second non-magnetic layer sandwiched between the second magnetization fixed layer and the second magnetization free layer A magnetic layer. The first magnetization fixed layer and the first magnetization free layer are made of a ferromagnetic material and have perpendicular magnetic anisotropy. The second magnetization fixed layer and the second magnetization free layer are made of a ferromagnetic material and have in-plane magnetic anisotropy. The first magnetization free layer and the second magnetization free layer are magnetically coupled to each other. In the first plane parallel to each layer, the center of gravity of the second magnetization free layer is shifted from the center of gravity of the first magnetization free layer. The magnetization direction of the second magnetization fixed layer is substantially parallel or substantially antiparallel to the direction of deviation of the center of gravity between the first magnetization free layer and the second magnetization free layer. The second memory cell includes a third magnetization free layer, a third magnetization fixed layer, and a second nonmagnetic layer provided between the third magnetization free layer and the third magnetization fixed layer. The third magnetization free layer and the third magnetization fixed layer are made of a ferromagnetic material.
図1は、本発明の実施例に係る半導体装置の構成を示す模式図である。FIG. 1 is a schematic diagram showing a configuration of a semiconductor device according to an embodiment of the present invention. 図2は、本実施例の各MRAMにおける磁気抵抗効果素子の構成を示す斜視図である。FIG. 2 is a perspective view showing the configuration of the magnetoresistive element in each MRAM of this embodiment. 図3Aは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す斜視図である。FIG. 3A is a perspective view showing the structure of the main part of the magnetoresistive effect element of this embodiment. 図3Bは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す平面図である。FIG. 3B is a plan view showing the structure of the main part of the magnetoresistive element of this example. 図3Cは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す断面図である。FIG. 3C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example. 図4Aは、本実施例の磁気抵抗効果素子における磁束の状態を説明するための断面図である。FIG. 4A is a cross-sectional view for explaining the state of magnetic flux in the magnetoresistive effect element of this embodiment. 図4Bは、本実施例の磁気抵抗効果素子における磁束の状態を説明するための平面である。FIG. 4B is a plan view for explaining the state of magnetic flux in the magnetoresistive effect element of this embodiment. 図5Aは、本実施例の磁気抵抗効果素子が取りうる2つの状態を説明するための断面図である。FIG. 5A is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment. 図5Bは、本実施例の磁気抵抗効果素子が取りうる2つの状態を説明するための断面図である。FIG. 5B is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment. 図6Aは、磁気抵抗効果素子9へのデータ書き込み方法を説明するための概念図である。FIG. 6A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9. 図6Bは、磁気抵抗効果素子9へのデータ書き込み方法を説明するための概念図である。FIG. 6B is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9. 図7Aは、本実施例の磁気抵抗効果素子が集積化されたメモリセルの構成例を示す回路図である。FIG. 7A is a circuit diagram showing a configuration example of a memory cell in which the magnetoresistive effect element of this embodiment is integrated. 図7Bは、本実施例の磁気抵抗効果素子が集積化されたMRAMの構成例を示す回路図である。FIG. 7B is a circuit diagram showing a configuration example of an MRAM in which the magnetoresistive effect element of this embodiment is integrated. 図8は、本実施例の磁気抵抗効果素子が集積化されたメモリセルの他の構成例を示す回路図である。FIG. 8 is a circuit diagram showing another configuration example of the memory cell in which the magnetoresistive effect element of this embodiment is integrated. 図9は、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第1変形例の構成を示す斜視図である。FIG. 9 is a perspective view showing a configuration of a first modification of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention. 図10は、本実施例の磁気抵抗効果素子の主要な部分の構造を表す平面図である。FIG. 10 is a plan view showing the structure of the main part of the magnetoresistive effect element of this embodiment. 図11Aは、磁気抵抗効果素子へのデータ読み出し方法を説明するための概念図である。FIG. 11A is a conceptual diagram for explaining a method of reading data from a magnetoresistive element. 図11Bは、磁気抵抗効果素子へのデータ読み出し方法を説明するための概念図である。FIG. 11B is a conceptual diagram for explaining a method of reading data from the magnetoresistive effect element. 図12Aは、磁気抵抗効果素子へのデータ書き込み方法を説明するための概念図である。FIG. 12A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element. 図12Bは、磁気抵抗効果素子へのデータ書き込み方法を説明するための概念図である。FIG. 12B is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element. 図13は、本実施例に係る各MRAMにおける磁気抵抗効果素子の第2変形例の構成を示す斜視図である。FIG. 13 is a perspective view showing a configuration of a second modification of the magnetoresistive element in each MRAM according to the present embodiment. 図14Aは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す斜視図である。FIG. 14A is a perspective view showing the structure of the main part of the magnetoresistive element of this example. 図14Bは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す平面図である。FIG. 14B is a plan view showing the structure of the main part of the magnetoresistive element of this example. 図14Cは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す断面図である。FIG. 14C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example. 図15Aは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す斜視図である。FIG. 15A is a perspective view showing the structure of the main part of the magnetoresistive element of this example. 図15Bは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す平面図である。FIG. 15B is a plan view showing the structure of the main part of the magnetoresistive element of this example. 図15Cは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す断面図である。FIG. 15C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example. 図16Aは、本実施例の磁気抵抗効果素子が取りうる2つの状態を説明するための断面図である。FIG. 16A is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment. 図16Bは、本実施例の磁気抵抗効果素子が取りうる2つの状態を説明するための断面図である。FIG. 16B is a cross-sectional view for explaining two states that can be taken by the magnetoresistive element of this embodiment. 図17Aは、磁気抵抗効果素子9へのデータ書き込み方法を説明するための概念図である。FIG. 17A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9. 図17Bは、磁気抵抗効果素子9へのデータ読み出し方法を説明するための概念図である。FIG. 17B is a conceptual diagram for explaining a method of reading data to the magnetoresistive effect element 9. 図18Aは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す斜視図である。FIG. 18A is a perspective view showing the structure of the main part of the magnetoresistive element of this example. 図18Bは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す平面図である。FIG. 18B is a plan view showing the structure of the main part of the magnetoresistive element of this example. 図18Cは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す断面図である。FIG. 18C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example. 図18Dは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す断面図である。FIG. 18D is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example. 図19Aは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す斜視図である。FIG. 19A is a perspective view showing the structure of the main part of the magnetoresistive element of this example. 図19Bは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す平面図である。FIG. 19B is a plan view showing the structure of the main part of the magnetoresistive element of this example. 図19Cは、本実施例の磁気抵抗効果素子の主要な部分の構造を表す断面図である。FIG. 19C is a cross-sectional view showing the structure of the main part of the magnetoresistive element of this example. 図20Aは、磁気抵抗効果素子9へのデータ書き込み方法を説明するための概念図である。FIG. 20A is a conceptual diagram for explaining a method of writing data to the magnetoresistive effect element 9. 図20Bは、磁気抵抗効果素子9へのデータ読み出し方法を説明するための概念図である。FIG. 20B is a conceptual diagram for explaining a method of reading data to the magnetoresistive effect element 9.
 以下、本発明の半導体装置の実施例について説明する。図1は、本発明の実施例に係る半導体装置の構成を示す模式図である。本実施例の半導体装置1は、メモリ混載型の半導体装置である。その半導体装置1は、一つのチップ上に形成されたメモリ混載型のLSIに例示され、ロジック部2とメモリ部3とを具備する。 Hereinafter, embodiments of the semiconductor device of the present invention will be described. FIG. 1 is a schematic diagram showing a configuration of a semiconductor device according to an embodiment of the present invention. The semiconductor device 1 of the present embodiment is a memory-embedded semiconductor device. The semiconductor device 1 is exemplified by a memory-embedded LSI formed on one chip, and includes a logic unit 2 and a memory unit 3.
 ロジック部2は、高速動作が必要な領域であり、論理演算を行う論理回路を有している。ロジック部2は、更に、高速動作が可能なMRAM4-1~4-4を含んでいる。MRAM4-1~4-4は、電流誘起磁界書き込み型のMRAMに例示され、レジスタやL1キャッシュ(1次キャッシュ)やL2キャッシュ(2次キャッシュ)として用いられている。以下、特に区別する必要がない場合、単にMRAM4と省略して表記する。 The logic unit 2 is an area that requires high-speed operation, and has a logic circuit that performs a logical operation. The logic unit 2 further includes MRAMs 4-1 to 4-4 capable of high speed operation. The MRAMs 4-1 to 4-4 are exemplified as current-induced magnetic field writing type MRAMs, and are used as registers, L1 caches (primary caches), and L2 caches (secondary caches). Hereinafter, when it is not necessary to distinguish between them, they are simply abbreviated as MRAM4.
 電流誘起磁界書き込み型のMRAMは、既述のように原理的には1nsec.以下での書き込みが可能であり、高速動作が可能なMRAMとして好適である。また、一般的には、書き込み電流が大きいため本MRAMの面積は相対的に大きくなるが、レジスタやL1キャッシュやL2キャッシュのような相対的に容量が小さいメモリとして用いられるため、チップ全体の面積に対する影響は極めて小さい。 The current-induced magnetic field writing type MRAM is theoretically 1 nsec. The following writing is possible, and it is suitable as an MRAM capable of high-speed operation. In general, since the write current is large, the area of the MRAM is relatively large. However, since the memory is used as a memory having a relatively small capacity such as a register, an L1 cache, or an L2 cache, the area of the entire chip is large. The impact on is very small.
 メモリ部3は、大容量・高集積(つまり低書き込み電流)が必要な領域であり、データを記憶する記憶回路を有している。その記憶回路として、大容量・高集積のMRAM5-1~5-3を含んでいる。MRAM5-1~5-3は、スピン偏極電流書き込み型のMRAMに例示され、主記憶装置や補助記憶装置として用いられている。以下、特に区別する必要がない場合、単にMRAM5と省略して表記する。 The memory unit 3 is an area that requires large capacity and high integration (that is, low write current), and has a memory circuit for storing data. As the storage circuit, large-capacity and highly integrated MRAMs 5-1 to 5-3 are included. The MRAMs 5-1 to 5-3 are exemplified as spin-polarized current writing type MRAMs, and are used as a main storage device or an auxiliary storage device. Hereinafter, when it is not necessary to distinguish between them, they are simply abbreviated as MRAM5.
 スピン偏極電流書き込み型のMRAMは、スピン注入磁化反転型のMRAMに例示される。
 スピン注入磁化反転型のMRAMでは、磁気抵抗効果素子が、反転可能な磁化を有する第1の強磁性層(しばしば、磁化自由層と呼ばれる)と、磁化が固定された第2の強磁性層(しばしば、磁化固定層と呼ばれる)と、これらの強磁性層の間に設けられたトンネルバリア層を備える積層体で構成される。このようなMRAMのデータ書き込みでは、磁化自由層と磁化固定層の間で電流を流したときのスピン偏極した伝導電子の磁化自由層中の局在電子との間の相互作用を利用して磁化自由層の磁化が反転される。この場合、磁気抵抗効果素子は、磁化自由層に接続される端子と磁化固定層に接続される端子とを有する2端子の素子となる。そのため、このMRAMは、小面積化に有効である。
The spin-polarized current writing type MRAM is exemplified by a spin injection magnetization switching type MRAM.
In the spin injection magnetization reversal type MRAM, the magnetoresistive effect element includes a first ferromagnetic layer having a reversible magnetization (often referred to as a magnetization free layer) and a second ferromagnetic layer having a fixed magnetization ( (Often referred to as a magnetization fixed layer) and a tunnel body provided with a tunnel barrier layer provided between these ferromagnetic layers. Such MRAM data writing utilizes the interaction between spin-polarized conduction electrons and localized electrons in the magnetization free layer when a current is passed between the magnetization free layer and the magnetization fixed layer. The magnetization of the magnetization free layer is reversed. In this case, the magnetoresistive effect element is a two-terminal element having a terminal connected to the magnetization free layer and a terminal connected to the magnetization fixed layer. Therefore, this MRAM is effective for reducing the area.
 書き込み電流の低減に関し、例えば、スピン注入磁化反転型のMRAMでは0.2mAでの書き込みを実証した報告がある(T.Kawahara et al.,“2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read”,Solid-State Circuits Conference,2007.ISSCC 2007.Digest of Technical Papers.IEEE International.p.480.)。ただし、書き込み電流は、原理的にナノ秒領域で急激に増加するとの報告がある(T.Aoki et al.,“Spin transfer switching in nano second switching speed region for MgO based ferromagnetic tunnel junctions”,The 31st Annual Conference on MAGNETICS in Japan(2007),The Magnetics Society of Japan .p.340.)。また、低電流化のためには、垂直磁気異方性を有するタイプが面内磁気異方性を有するタイプと比較して有利との報告がある(M.Nakayama et al.,“TbCoFe/CoFeB/MgO/CoFeB/TbCoFe magnetoresistive tunneling junctions with perpendicular magnetic anisotropy”,52nd Magnetism and Magnetic Materials Conference 2007(MMM 2007).p.80.)。 Regarding the reduction of the write current, for example, there is a report demonstrating the write at 0.2 mA in the spin injection magnetization reversal type MRAM (T. Kawahara et al., “2 Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by -Bit Bidirectional Current Write and Parallelizing-Direction Current Read ", Solid-State Circuits Confence, 2007. ISSCC 2007. DigestEnt. However, it has been reported that the write current increases rapidly in the nanosecond region in principle (T. Aoki et al., “Spin transfer switching in nano second switching speed region for MgO based ferromechanical 31”. Conference on MAGNETICS in Japan (2007), The Magnetics Society of Japan.p.340.). In addition, there is a report that a type having perpendicular magnetic anisotropy is more advantageous than a type having in-plane magnetic anisotropy for reducing current (M. Nakayama et al., “TbCoFe / CoFeB”). / MgO / CoFeB / TbCoFe magnetotunative tunneling junctions with perpendental magnetic anisotropy ", 52nd Magnetism and MagneticMen.M200.
 スピン注入磁化反転型のMRAMは、既述のようにスケーリング性に優れており、高集積化や大規模化が可能なMRAMとして好適である。また、動作速度は相対的に小さいが、主記憶装置や補助記憶装置のようなレジスタ等と比較して高速動作を要求されないメモリとして用いられるため、その影響は極めて小さい。 As described above, the spin-injection magnetization reversal type MRAM has an excellent scaling property and is suitable as an MRAM capable of high integration and large scale. In addition, although the operation speed is relatively low, the influence is extremely small because it is used as a memory that does not require high-speed operation as compared with a register such as a main storage device or an auxiliary storage device.
 上記半導体装置1において、ロジック部2及びメモリ部3の記憶素子を全て不揮発性メモリのMRAMとした場合、電源オフの状態においても、それらMRAMにおいてデータを保持し続けることが出来、好ましい。その場合、電源オフを基本の状態(インスタントオン)とすることができる。それにより、消費電力を低下させることが出来る。 In the semiconductor device 1, when all of the storage elements of the logic unit 2 and the memory unit 3 are nonvolatile memory MRAMs, it is preferable that data can be retained in the MRAMs even when the power is turned off. In that case, power off can be set to the basic state (instant on). Thereby, power consumption can be reduced.
 更に、上記半導体装置1において、ロジック部2及びメモリ部3の記憶素子を不揮発性メモリのMRAMとした場合、後述されるように記憶素子を同一プロセスで製造することが出来、好ましい。このように、異なる種類のMRAMを同一プロセスで製造することで、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 Furthermore, in the semiconductor device 1, when the memory elements of the logic unit 2 and the memory unit 3 are nonvolatile memory MRAMs, the memory elements can be manufactured in the same process as described later, which is preferable. Thus, by manufacturing different types of MRAMs in the same process, the semiconductor device 1 can be manufactured at a low cost and in a short time.
 なお、本発明の半導体装置は、図1に例示される構成に限定されるものではない。すなわち、ロジック部2及びメモリ部3の形状や配置等、各部でのMRAMの数や形状や配置等は、本発明の技術的思想の範囲内で自由に変形することが可能である。 Note that the semiconductor device of the present invention is not limited to the configuration illustrated in FIG. That is, the number, shape, arrangement, etc. of the MRAM in each part, such as the shape and arrangement of the logic part 2 and the memory part 3, can be freely modified within the scope of the technical idea of the present invention.
 次に、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の構成について説明する。図2は、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の構成を示す斜視図である。本発明の実施例に係る磁気抵抗効果素子8と磁気抵抗効果素子9とは同一のチップ上に形成されている。ただし、図中の各構成内の白抜き矢印は、磁化の向きを示している(以下同じ)。 Next, the configuration of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention will be described. FIG. 2 is a perspective view showing the configuration of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention. The magnetoresistive effect element 8 and the magnetoresistive effect element 9 according to the embodiment of the present invention are formed on the same chip. However, the white arrow in each component in the figure indicates the direction of magnetization (the same applies hereinafter).
 磁気抵抗効果素子8は、高速動作向けのMRAM4(動作周波数は200MHz以上であることが望ましい)のメモリセルに用いられている。電流誘起磁界書き込み型の磁気抵抗効果素子である。この磁気抵抗効果素子8は、磁化自由層140、磁化固定層160、磁化自由層140と磁化固定層160との間に設けられた非磁性層150を備えている。図示されていないが、上述の層に加えて、電極層、拡散防止層、下地層などが適宜設けられることが望ましい。 The magnetoresistive effect element 8 is used in a memory cell of the MRAM 4 (operating frequency is preferably 200 MHz or more) for high speed operation. This is a current-induced magnetic field writing type magnetoresistive effect element. The magnetoresistive effect element 8 includes a magnetization free layer 140, a magnetization fixed layer 160, and a nonmagnetic layer 150 provided between the magnetization free layer 140 and the magnetization fixed layer 160. Although not shown, in addition to the above-described layers, it is desirable that an electrode layer, a diffusion prevention layer, a base layer, and the like are appropriately provided.
 磁化自由層140及び磁化固定層160は、強磁性体から構成されている。磁化自由層140及び磁化固定層160は、面内磁気異方性(in-plane magnetic anisotropy)を有する面内磁化膜(in-plane magnetization film)である。つまり、磁化自由層140及び磁化固定層160は、膜面内方向(xy面内方向)の磁気異方性を有している。本実施例では、非磁性層150は絶縁体により構成されており、磁化自由層140、非磁性層150、及び磁化固定層160で磁気トンネル接合(MTJ)が形成されている。非磁性層150は、絶縁体により構成されることが望ましいが、半導体や導体から構成されてもよい。磁化自由層140、非磁性層150及び磁化固定層160の具体的な材料については後述される。 The magnetization free layer 140 and the magnetization fixed layer 160 are made of a ferromagnetic material. The magnetization free layer 140 and the magnetization fixed layer 160 are in-plane magnetization films having in-plane magnetic anisotropy. That is, the magnetization free layer 140 and the magnetization fixed layer 160 have magnetic anisotropy in the in-plane direction (xy in-plane direction). In this embodiment, the nonmagnetic layer 150 is made of an insulator, and a magnetic tunnel junction (MTJ) is formed by the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160. The nonmagnetic layer 150 is preferably made of an insulator, but may be made of a semiconductor or a conductor. Specific materials of the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 will be described later.
 磁化固定層160は固定された磁化を有する。この固定磁化は、磁化固定層160の長手方向(y方向)と垂直方向とするか、または垂直方向成分を有するようにする。一方、磁化自由層140は反転可能な磁化を有する。また磁化自由層140の磁化容易軸は磁化固定層160の長手方向(y方向)と垂直方向とするか、または垂直方向成分を有するようにする。このような磁気異方性は形状磁気異方性によって付与することができる。 The magnetization fixed layer 160 has a fixed magnetization. The fixed magnetization is set in a direction perpendicular to the longitudinal direction (y direction) of the magnetization fixed layer 160 or has a vertical component. On the other hand, the magnetization free layer 140 has reversible magnetization. Further, the easy axis of magnetization of the magnetization free layer 140 is set to be perpendicular to the longitudinal direction (y direction) of the magnetization fixed layer 160 or to have a perpendicular component. Such magnetic anisotropy can be imparted by shape magnetic anisotropy.
 磁化固定層160の固定磁化、及び磁化自由層140の磁化容易軸が上述の通りであるとき、磁化自由層140の磁化は磁化固定層160の磁化に対して、平行成分か反平行成分のうちのいずれかを持ちうる。本実施例の磁気抵抗効果素子8においては、磁化自由層140の磁化の方向が記憶されるデータに対応する。 When the fixed magnetization of the magnetization fixed layer 160 and the magnetization easy axis of the magnetization free layer 140 are as described above, the magnetization of the magnetization free layer 140 is either a parallel component or an antiparallel component with respect to the magnetization of the magnetization fixed layer 160. You can have either. In the magnetoresistive effect element 8 of the present embodiment, the magnetization direction of the magnetization free layer 140 corresponds to stored data.
 次に、本実施例の磁気抵抗効果素子8のデータの書き込み方法について説明する。まず、磁化固定層160に書き込み電流を流す。その書き込み電流により発生する電流誘起磁界により、磁化自由層140の磁化を反転させる。そのとき、書き込み電流の向きで発生する電流誘起磁界の向きを制御して、磁化自由層140の磁化を所望の向きに変化させることが出来る。それにより、磁化自由層140に所望のデータを記録する。磁化固定層160はその役割からベース電極と参照されることもある。そして、磁化固定層160、すなわちベース電極に書き込み電流を流すこのような書き込み方式をベース書き込み型とも言うことができる。この方式では、磁気抵抗効果素子8に直接書き込み電流を流すので、電流誘起磁界の大きさが相対的に大きくなる。そのため、書き込み電流を小さくすることが出来る。また、磁化固定層160は書き込み電流を導入することから、電気抵抗が比較的小さいことが望ましい。そのために、磁化固定層160に導電層を隣接させて電気抵抗を下げてもよい。 Next, a method for writing data in the magnetoresistive effect element 8 of this embodiment will be described. First, a write current is passed through the magnetization fixed layer 160. The magnetization of the magnetization free layer 140 is reversed by a current-induced magnetic field generated by the write current. At that time, the direction of the current-induced magnetic field generated by the direction of the write current can be controlled to change the magnetization of the magnetization free layer 140 to a desired direction. Thereby, desired data is recorded in the magnetization free layer 140. The magnetization fixed layer 160 may be referred to as a base electrode because of its role. Such a writing method in which a writing current is supplied to the magnetization fixed layer 160, that is, the base electrode, can also be referred to as a base writing type. In this method, since the write current is directly supplied to the magnetoresistive effect element 8, the magnitude of the current-induced magnetic field becomes relatively large. Therefore, the write current can be reduced. Moreover, since the magnetization fixed layer 160 introduces a write current, it is desirable that the electric resistance is relatively small. Therefore, the electric resistance may be lowered by making a conductive layer adjacent to the magnetization fixed layer 160.
 次に、本実施例の磁気抵抗効果素子8からのデータの読み出し方法について説明する。まず、非磁性層150を介して磁化固定層160と磁化自由層140との間で読み出し電流を流す。そして、磁化固定層160の磁化と磁化自由層140の磁化との間の相対角に応じた抵抗の変化を検出することでデータを読み出す。たとえば、磁化固定層160の磁化と磁化自由層140の磁化とが平行の場合(例示:“0”を記憶)、低抵抗状態が実現され、磁化固定層160の磁化と磁化自由層140の磁化とが反平行の場合(例示:“1”を記憶)、高抵抗状態が実現される。磁気抵抗効果素子8の抵抗の変化が、電圧信号、又は電流信号として検知され、その電圧信号、又は電流信号を用いて磁気抵抗効果素子8に記憶されているデータが判別される。 Next, a method for reading data from the magnetoresistive effect element 8 of this embodiment will be described. First, a read current is passed between the magnetization fixed layer 160 and the magnetization free layer 140 through the nonmagnetic layer 150. Then, data is read by detecting a change in resistance according to the relative angle between the magnetization of the magnetization fixed layer 160 and the magnetization of the magnetization free layer 140. For example, when the magnetization of the magnetization fixed layer 160 and the magnetization of the magnetization free layer 140 are parallel (for example, “0” is stored), the low resistance state is realized, and the magnetization of the magnetization fixed layer 160 and the magnetization of the magnetization free layer 140 are realized. Are antiparallel (example: “1” is stored), a high resistance state is realized. A change in resistance of the magnetoresistive effect element 8 is detected as a voltage signal or a current signal, and data stored in the magnetoresistive effect element 8 is determined using the voltage signal or the current signal.
 磁気抵抗効果素子9は、高集積・大容量(低電流)向けのMRAM5(書き込み電流が0.5mA以下であることが望ましい)のメモリセルに用いられている。スピン偏極電流書き込み型のスピン注入磁化反転型の磁気抵抗効果素子である。この磁気抵抗効果素子9は、第1磁化固定層10、第1非磁性層20、第1磁化自由層30、第2磁化自由層40、第2非磁性層50、及び第2磁化固定層60を備えている。第1磁化固定層10は、第1非磁性層20の一方の面に隣接して設けられ、第1磁化自由層30は、第1非磁性層20の他方の面に隣接して設けられている。つまり、第1非磁性層20は、第1磁化固定層10と第1磁化自由層30とに挟まれている。また、第2磁化固定層60は、第2非磁性層50の一方の面に隣接して設けられ、第2磁化自由層40は、第2非磁性層50の他方の面に隣接して設けられている。つまり、第2非磁性層50は、第2磁化固定層60と第2磁化自由層40とに挟まれている。 The magnetoresistive element 9 is used in a memory cell of MRAM 5 (desirably having a write current of 0.5 mA or less) for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element. The magnetoresistive effect element 9 includes a first magnetization fixed layer 10, a first nonmagnetic layer 20, a first magnetization free layer 30, a second magnetization free layer 40, a second nonmagnetic layer 50, and a second magnetization fixed layer 60. It has. The first magnetization fixed layer 10 is provided adjacent to one surface of the first nonmagnetic layer 20, and the first magnetization free layer 30 is provided adjacent to the other surface of the first nonmagnetic layer 20. Yes. That is, the first nonmagnetic layer 20 is sandwiched between the first magnetization fixed layer 10 and the first magnetization free layer 30. The second magnetization fixed layer 60 is provided adjacent to one surface of the second nonmagnetic layer 50, and the second magnetization free layer 40 is provided adjacent to the other surface of the second nonmagnetic layer 50. It has been. That is, the second nonmagnetic layer 50 is sandwiched between the second magnetization fixed layer 60 and the second magnetization free layer 40.
 また、磁気抵抗効果素子9は更に、第1導電層70及び第2導電層80を備えている。第1導電層70は、第1磁化自由層30及び第2磁化自由層40に電気的に接続するように設けられている。特に、図2に示されるように、第1導電層70は、第1磁化自由層30と第2磁化自由層40の間に挟まれている。第2導電層80は、第1導電層70に電気的に接続するように設けられている。なお、第1導電層70や第2導電層80を省略することも可能である。第2導電層80を省略した実施形態については後に説明される。また、図示されていないが、上述の層に加えて、電極層、拡散防止層、下地層などが適宜設けられることが望ましい。 The magnetoresistive effect element 9 further includes a first conductive layer 70 and a second conductive layer 80. The first conductive layer 70 is provided so as to be electrically connected to the first magnetization free layer 30 and the second magnetization free layer 40. In particular, as shown in FIG. 2, the first conductive layer 70 is sandwiched between the first magnetization free layer 30 and the second magnetization free layer 40. The second conductive layer 80 is provided so as to be electrically connected to the first conductive layer 70. Note that the first conductive layer 70 and the second conductive layer 80 may be omitted. An embodiment in which the second conductive layer 80 is omitted will be described later. Although not shown, it is desirable that an electrode layer, a diffusion prevention layer, a base layer, and the like be appropriately provided in addition to the above-described layers.
 第1非磁性層20及び第2非磁性層50の各々は、非磁性体により形成される非磁性層である。第1非磁性層20及び第2非磁性層50の電気特性はいかようであってもよく、その材料は導電体でも絶縁体でも半導体でも構わない。但し、第2非磁性層50については絶縁体により形成されることが好適である。 Each of the first nonmagnetic layer 20 and the second nonmagnetic layer 50 is a nonmagnetic layer formed of a nonmagnetic material. The first nonmagnetic layer 20 and the second nonmagnetic layer 50 may have any electrical characteristics, and the material may be a conductor, an insulator, or a semiconductor. However, the second nonmagnetic layer 50 is preferably formed of an insulator.
 第1磁化固定層10、第1磁化自由層30、第2磁化自由層40、及び第2磁化固定層60の各々は、強磁性体により形成される。このうち第1磁化固定層10及び第1磁化自由層30は、垂直磁気異方性(perpendicular magnetic anisotropy)を有する垂直磁化膜(perpendicular magnetization film)である。つまり、第1磁化固定層10及び第1磁化自由層30は、膜面垂直方向(z軸方向)の磁気異方性を有する。一方、第2磁化自由層40及び第2磁化固定層60は、面内磁気異方性を有する面内磁化膜である。つまり、第2磁化自由層40及び第2磁化固定層60は、膜面平行方向(xy面内方向)の磁気異方性を有する。第2磁化自由層40の磁化容易軸の方向は任意である。後述されるように、本実施例では、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30は、書き込み用の磁気トンネル接合(MTJ)を形成している。また、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60は、読み出し用の磁気トンネル接合(MTJ)を形成している。 Each of the first magnetization fixed layer 10, the first magnetization free layer 30, the second magnetization free layer 40, and the second magnetization fixed layer 60 is formed of a ferromagnetic material. Among these, the first magnetization fixed layer 10 and the first magnetization free layer 30 are a perpendicular magnetization film having a perpendicular magnetic anisotropy. That is, the first magnetization fixed layer 10 and the first magnetization free layer 30 have magnetic anisotropy in the direction perpendicular to the film surface (z-axis direction). On the other hand, the second magnetization free layer 40 and the second magnetization fixed layer 60 are in-plane magnetization films having in-plane magnetic anisotropy. That is, the second magnetization free layer 40 and the second magnetization fixed layer 60 have magnetic anisotropy in the film plane parallel direction (xy in-plane direction). The direction of the easy magnetization axis of the second magnetization free layer 40 is arbitrary. As will be described later, in the present embodiment, the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 form a magnetic tunnel junction (MTJ) for writing. Further, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 form a magnetic tunnel junction (MTJ) for reading.
 本発明の実施例に係る磁気抵抗効果素子8と磁気抵抗効果素子9とは同一のチップ上に形成されている。そして、磁気抵抗効果素子8の磁化自由層140、非磁性層150及び磁化固定層160は、それぞれ磁気抵抗効果素子9の第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同一レイヤーに同一材料で同時に形成される。すなわち、MRAM4とMRAM5とは、同一のプロセスでの形成が可能であり、プロセス数は増大しない。それにより、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 The magnetoresistive effect element 8 and the magnetoresistive effect element 9 according to the embodiment of the present invention are formed on the same chip. The magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 are the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer of the magnetoresistance effect element 9, respectively. 60 and the same material are simultaneously formed in the same layer. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
 次に、本実施例の磁気抵抗効果素子9について、より詳細に説明する。 Next, the magnetoresistive effect element 9 of this embodiment will be described in more detail.
 図3A~図3Cは、本発明の実施例に係る磁気抵抗効果素子9の構成を模式的に示す概略図である。詳細には、図3Aは斜視図であり、図3B及び図3Cは、それぞれ、図3Aに示されるxyz座標系におけるxy平面図及びxz断面図である。なお、磁気抵抗効果素子9は複数の層からなる積層構造を有しており、その積層方向がz軸方向として規定される。積層構造の各層に平行な平面がxy平面である。 3A to 3C are schematic views schematically showing the configuration of the magnetoresistive effect element 9 according to the embodiment of the present invention. Specifically, FIG. 3A is a perspective view, and FIGS. 3B and 3C are an xy plan view and an xz sectional view in the xyz coordinate system shown in FIG. 3A, respectively. The magnetoresistive effect element 9 has a laminated structure composed of a plurality of layers, and the lamination direction is defined as the z-axis direction. A plane parallel to each layer of the stacked structure is an xy plane.
 図3Cには、各層の磁化方向が示されている。第1磁化固定層10の磁化方向は、実質的に一方向に固定されている。一方、第1磁化自由層30の磁化方向は、反転可能である。第1磁化固定層10及び第1磁化自由層30は垂直磁気異方性を有しているため、それらの磁化方向はz軸と略平行となる。図3Cで示された例では、第1磁化固定層10の磁化は、+z方向に固定されている。一方、第1磁化自由層30の磁化は、+z方向あるいは-z方向となることが許される。つまり、第1磁化自由層30の磁化方向は、第1磁化固定層10の磁化方向に対して平行または反平行となり得る。 FIG. 3C shows the magnetization direction of each layer. The magnetization direction of the first magnetization fixed layer 10 is substantially fixed in one direction. On the other hand, the magnetization direction of the first magnetization free layer 30 can be reversed. Since the first magnetization fixed layer 10 and the first magnetization free layer 30 have perpendicular magnetic anisotropy, their magnetization directions are substantially parallel to the z-axis. In the example shown in FIG. 3C, the magnetization of the first magnetization fixed layer 10 is fixed in the + z direction. On the other hand, the magnetization of the first magnetization free layer 30 is allowed to be in the + z direction or the −z direction. That is, the magnetization direction of the first magnetization free layer 30 can be parallel or antiparallel to the magnetization direction of the first magnetization fixed layer 10.
 また、第2磁化固定層60の磁化方向は、実質的に一方向に固定されている。一方、第2磁化自由層40の磁化方向は、反転可能である。第2磁化固定層60及び第2磁化自由層40は面内磁気異方性を有しているため、それらの磁化方向は膜面(xy平面)に略平行となる。図3Cで示された例では、第2磁化固定層60の磁化は、+x方向に固定されている。一方、第2磁化自由層40の磁化は、+x方向あるいは-x方向の成分を持つことが許されている。つまり、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向に対して平行または反平行の成分を持ち得る。 Further, the magnetization direction of the second magnetization fixed layer 60 is substantially fixed in one direction. On the other hand, the magnetization direction of the second magnetization free layer 40 can be reversed. Since the second magnetization fixed layer 60 and the second magnetization free layer 40 have in-plane magnetic anisotropy, their magnetization directions are substantially parallel to the film surface (xy plane). In the example shown in FIG. 3C, the magnetization of the second magnetization fixed layer 60 is fixed in the + x direction. On the other hand, the magnetization of the second magnetization free layer 40 is allowed to have a component in the + x direction or the −x direction. That is, the magnetization direction of the second magnetization free layer 40 can have a component parallel or antiparallel to the magnetization direction of the second magnetization fixed layer 60.
 このように、本実施例に係る磁気抵抗効果素子9は、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30からなる「第1磁気抵抗効果素子」と、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60からなる「第2磁気抵抗効果素子」とを含んでいる。第1磁気抵抗効果素子は垂直磁化膜を含んでおり、第2磁気抵抗効果素子は面内磁化膜を含んでいることに留意されたい。後述されるように、第1磁気抵抗効果素子はデータ書き込みで用いられ、第2磁気抵抗効果素子はデータ読み出しで用いられる。 As described above, the magnetoresistive effect element 9 according to this example includes the “first magnetoresistive effect element” including the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30, and the second A “second magnetoresistive element” including the magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 is included. Note that the first magnetoresistance effect element includes a perpendicular magnetization film, and the second magnetoresistance effect element includes an in-plane magnetization film. As will be described later, the first magnetoresistance effect element is used for data writing, and the second magnetoresistance effect element is used for data reading.
 また、第1磁気抵抗効果素子の第1磁化自由層30と第2磁気抵抗効果素子の第2磁化自由層40とは、異なる層に形成されているが、互いに磁気的に結合している。言い換えれば、第1磁化自由層30の磁化状態と第2磁化自由層40の磁化状態とは、互いに影響を及ぼし合う。特に、後述されるように、第1磁化自由層30の磁化状態が第2磁化自由層40の磁化状態に影響を及ぼすことが重要である。 Also, the first magnetization free layer 30 of the first magnetoresistance effect element and the second magnetization free layer 40 of the second magnetoresistance effect element are formed in different layers, but are magnetically coupled to each other. In other words, the magnetization state of the first magnetization free layer 30 and the magnetization state of the second magnetization free layer 40 affect each other. In particular, as described later, it is important that the magnetization state of the first magnetization free layer 30 affects the magnetization state of the second magnetization free layer 40.
 また、図3Bには、xy平面における、第1磁化自由層30の重心G30及び第2磁化自由層40の重心G40の位置が示されている。ここでいう重心とは、xy平面における幾何学的な意味での重心である。すなわち、幾何学形状の任意の点iの位置ベクトルがRi=(Xi,Yi)であるとき、重心の位置ベクトルRg=(Xg,Yg)は、Σi(Ri-Rg)=0の関係を満たす。ここでΣiは、iに関する総和を意味する。例えば、長方形や平行四辺形の場合、重心は対角線の交点であり、楕円形の場合、重心はその中心である。 FIG. 3B also shows the positions of the center of gravity G30 of the first magnetization free layer 30 and the center of gravity G40 of the second magnetization free layer 40 in the xy plane. The center of gravity referred to here is the center of gravity in the geometric sense on the xy plane. That is, when the position vector of an arbitrary point i of the geometric shape is Ri = (Xi, Yi), the center-of-gravity position vector Rg = (Xg, Yg) satisfies the relationship of Σi (Ri−Rg) = 0. . Here, Σi means the total sum related to i. For example, in the case of a rectangle or parallelogram, the center of gravity is the intersection of diagonal lines, and in the case of an ellipse, the center of gravity is the center.
 本実施例によれば、第1磁化自由層30の重心G30と第2磁化自由層40の重心G40は、xy平面においてずれている。つまり、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30の重心G30から、膜面に平行な“第1の方向”にずれている。図3Bで示された例では、第1の方向(ずれ方向)は-x方向である。第1磁化自由層30と第2磁化自由層40は、少なくとも一部オーバーラップしていてもよいし、オーバーラップしていなくてもよい。 According to the present embodiment, the centroid G30 of the first magnetization free layer 30 and the centroid G40 of the second magnetization free layer 40 are shifted in the xy plane. That is, in the xy plane, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the “first direction” parallel to the film surface. In the example shown in FIG. 3B, the first direction (shift direction) is the −x direction. The first magnetization free layer 30 and the second magnetization free layer 40 may overlap at least partially, or may not overlap.
 尚、各層のxy平面における形状は長方形に限られず、円形、楕円形、ひし形、六角形などであってもよい。また、適切な特性が得られるように、各層の表面に適宜凹凸を設けることも可能である。また、各層の面積についても任意性がある。 The shape of each layer in the xy plane is not limited to a rectangle, and may be a circle, an ellipse, a rhombus, a hexagon, or the like. In addition, irregularities can be appropriately provided on the surface of each layer so that appropriate characteristics can be obtained. Also, the area of each layer is arbitrary.
 次に、磁気抵抗効果素子9の各層の材料について例示する。以下に示される材料は全て例であり、実際には上述のような磁化状態が実現できればいかなる材料を用いても構わない。 Next, the material of each layer of the magnetoresistive effect element 9 will be exemplified. The materials shown below are all examples, and any material may be used in practice as long as the above-described magnetization state can be realized.
 垂直磁化膜である第1磁化固定層10及び第1磁化自由層30は、Fe、Co、Niのうちから選択される少なくとも一つの材料を含む強磁性体で形成される。また、PtやPdを添加することにより、垂直磁気異方性を安定化することができる。これに加えて、B、C、N、O、Al、Si、P、Ti、V、Cr、Mn、Cu、Zn、Zr、Nb、Mo、Tc、Ru、Rh、Ag、Hf、Ta、W、Re、Os、Ir、Au、Smなどを添加することにより、磁気特性を調整することができる。具体的な材料としては、Co、Co-Pt、Co-Pd、Co-Cr、Co-Pt-Cr、Co-Cr-Ta、Co-Cr-B、Co-Cr-Pt-B、Co-Cr-Ta-B、Co-V、Co-Mo、Co-W、Co-Ti、Co-Ru、Co-Rh、Fe-Pt、Fe-Pd、Fe-Co-Pt、Fe-Co-Pd、Sm-Co、Gd-Fe-Co、Tb-Fe-Co、Gd-Tb-Fe-Coなどが例示される。そのほか、Fe、Co、Niのうちから選択されるいずれか一つの材料を含む層を、異なる層と積層させることにより垂直磁気異方性を発現させることもできる。具体的には、Co/Pd、Co/Pt、Co/Ni、Fe/Auなどの積層膜が例示される。 The first magnetization fixed layer 10 and the first magnetization free layer 30 that are perpendicular magnetization films are formed of a ferromagnetic material including at least one material selected from Fe, Co, and Ni. Moreover, perpendicular magnetic anisotropy can be stabilized by adding Pt or Pd. In addition to this, B, C, N, O, Al, Si, P, Ti, V, Cr, Mn, Cu, Zn, Zr, Nb, Mo, Tc, Ru, Rh, Ag, Hf, Ta, W , Re, Os, Ir, Au, Sm, etc. can be added to adjust the magnetic properties. Specific materials include Co, Co—Pt, Co—Pd, Co—Cr, Co—Pt—Cr, Co—Cr—Ta, Co—Cr—B, Co—Cr—Pt—B, and Co—Cr. -Ta-B, Co-V, Co-Mo, Co-W, Co-Ti, Co-Ru, Co-Rh, Fe-Pt, Fe-Pd, Fe-Co-Pt, Fe-Co-Pd, Sm -Co, Gd-Fe-Co, Tb-Fe-Co, Gd-Tb-Fe-Co and the like are exemplified. In addition, perpendicular magnetic anisotropy can also be exhibited by laminating a layer containing any one material selected from Fe, Co, and Ni with different layers. Specifically, a laminated film of Co / Pd, Co / Pt, Co / Ni, Fe / Au, etc. is exemplified.
 面内磁化膜である第2磁化自由層40及び第2磁化固定層60は、Fe、Co、Niのうちから選択される少なくとも一つの材料を含む強磁性体で形成される。これに加えて、B、C、N、O、Al、Si、P、Ti、V、Cr、Mn、Cu、Zn、Zr、Nb、Mo、Tc、Ru、Rh、Ag、Hf、Ta、W、Re、Os、Ir、Auなどを添加することにより、磁気特性を調整することができる。具体的な材料としては、Ni-Fe、Co-Fe、Fe-Co-Ni、Ni-Fe-Zr、Co-Fe-B、Co-Fe-Zr-Bなどが例示される。 The second magnetization free layer 40 and the second magnetization fixed layer 60 that are in-plane magnetization films are formed of a ferromagnetic material including at least one material selected from Fe, Co, and Ni. In addition to this, B, C, N, O, Al, Si, P, Ti, V, Cr, Mn, Cu, Zn, Zr, Nb, Mo, Tc, Ru, Rh, Ag, Hf, Ta, W , Re, Os, Ir, Au, etc. can be added to adjust the magnetic properties. Specific examples of the material include Ni—Fe, Co—Fe, Fe—Co—Ni, Ni—Fe—Zr, Co—Fe—B, and Co—Fe—Zr—B.
 第1非磁性層20には、様々な材料を用いることができる。例えばAl、Cr、Cuなどの導電体を用いることができる。また、Mg-Oのような絶縁体を用いてもよい。書き込み用に用いられる第1磁気抵抗効果素子に含まれる第1非磁性層20は、後述されるように書き込み電流の経路上に存在する。一般的に、書き込み電流経路の抵抗は低いことが望ましい。この点では、抵抗の低い材料が好ましい。一方、第1非磁性層20が一方のスピン偏極電子を優先的に通過させるようなフィルタリング効果を有していれば、書き込みに要する電流密度は低減される。この点では、Mg-Oが好適である。第1非磁性層20の材料は、当該磁気抵抗効果素子9のアプリケーションに応じて適切に選択され得る。 Various materials can be used for the first nonmagnetic layer 20. For example, a conductor such as Al, Cr, or Cu can be used. Further, an insulator such as Mg—O may be used. As will be described later, the first nonmagnetic layer 20 included in the first magnetoresistive effect element used for writing exists on the path of the write current. Generally, it is desirable that the resistance of the write current path is low. In this respect, a material having low resistance is preferable. On the other hand, if the first nonmagnetic layer 20 has a filtering effect that preferentially passes one spin-polarized electron, the current density required for writing is reduced. In this respect, Mg—O is preferable. The material of the first nonmagnetic layer 20 can be appropriately selected according to the application of the magnetoresistive effect element 9.
 第2非磁性層50は、絶縁性の材料により形成されることが好ましい。具体的な材料としては、Mg-O、Al-O、Al-N、Ni-O、Hf-Oなどが例示される。ただし、半導体や金属を材料として用いることも可能である。 The second nonmagnetic layer 50 is preferably formed of an insulating material. Specific examples of the material include Mg—O, Al—O, Al—N, Ni—O, and Hf—O. However, it is also possible to use a semiconductor or a metal as a material.
 尚、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60は、読み出し用に用いられる第2磁気抵抗効果素子に含まれるので、後述されるように読み出し電流の経路上に存在する。そのため、高いMR比を発現するような材料により形成されることが好ましい。例えば近年、Co-Fe-B/Mg-O/Co-Fe-B系の磁気トンネル接合(MTJ)において500%級の非常に大きなMR比が得られることが報告されている(Hayakawa et al.,“Effect of high annealing temperature on giant tunnel Magnetoresitance ratio of CoFeB/MgO/CoFeB magnetic tunnel junctions”,Applied Physics Letters,Vol.89,p.232510,(2006).)。この観点から言えば、第2非磁性層50は、Mg-Oを含有することが好ましい。また、第2磁化自由層40と第2磁化固定層60の少なくとも1つが、Co-Fe-Bを含有することが好ましい。 The second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are included in the second magnetoresistive effect element used for reading. Exists. For this reason, it is preferable to use a material that exhibits a high MR ratio. For example, in recent years, it has been reported that a very large MR ratio of 500% is obtained in a magnetic tunnel junction (MTJ) of a Co—Fe—B / Mg—O / Co—Fe—B system (Hayakawa et al. , “Effective of high annealing temperature on giant tunnel magnetorelatency ratio of CoFeB / MgO / CoFeB magnetotunnel junctions”, Applied Vs. From this point of view, the second nonmagnetic layer 50 preferably contains Mg—O. Further, it is preferable that at least one of the second magnetization free layer 40 and the second magnetization fixed layer 60 contains Co—Fe—B.
 また、磁化が反平行結合した積層膜(積層フェリ結合膜)を、第1磁化固定層10や第2磁化固定層60といった磁化固定層に適用することもできる。この場合、磁化固定層の磁化をより強固に固定し、外部への漏れ磁界の影響を低減することができる。反平行結合の様式としては、静磁結合や、RKKY相互作用に基づく交換結合が考えられる。例えば、第2磁化固定層60を、Co-Fe-B/Ru/Co-Fe-Bの積層膜で形成することができる。これにより、上下のCo-Fe-B膜は、Ru膜のRKKY相互作用によって反平行結合する。その結果、固定磁化をより強固にし、さらに外部への漏れ磁界を低減することができる。 Also, a laminated film (laminated ferri-coupled film) in which the magnetizations are antiparallel coupled can be applied to a magnetization fixed layer such as the first magnetization fixed layer 10 or the second magnetization fixed layer 60. In this case, the magnetization of the magnetization fixed layer can be more firmly fixed, and the influence of the leakage magnetic field to the outside can be reduced. As a mode of antiparallel coupling, magnetostatic coupling or exchange coupling based on RKKY interaction can be considered. For example, the second magnetization fixed layer 60 can be formed of a laminated film of Co—Fe—B / Ru / Co—Fe—B. Thereby, the upper and lower Co—Fe—B films are antiparallel coupled by the RKKY interaction of the Ru film. As a result, the fixed magnetization can be made stronger and the leakage magnetic field to the outside can be reduced.
 また、第1磁化固定層10や第2磁化固定層60といった磁化固定層に反強磁性層を隣接させることにより、磁化を更に強固に固定することができる。反強磁性層の材料としては、Pt-Mn、Ir-Mn、Fe-Mnなどが例示される。例えば、Co-Fe-B/Ru/Co-Fe-Bの第2磁化固定層60に、Pt-Mnの反強磁性層を隣接させることが考えられる。 Further, the magnetization can be more firmly fixed by making the antiferromagnetic layer adjacent to the magnetization fixed layer such as the first magnetization fixed layer 10 or the second magnetization fixed layer 60. Examples of the material of the antiferromagnetic layer include Pt—Mn, Ir—Mn, and Fe—Mn. For example, it is conceivable that a Pt—Mn antiferromagnetic layer is adjacent to the second magnetization fixed layer 60 of Co—Fe—B / Ru / Co—Fe—B.
 第1導電層70及び第2導電層80は、電気抵抗の小さな材料により形成されることが好ましい。また、第1導電層70の材料を適切に選択することにより、直下の第2磁化自由層40を加工プロセスから保護することができる。この点では、化学安定性の高い材料が望ましい。また、第1磁化自由層30の下地層としての第1導電層70の材料を適切に選択することにより、第1磁化自由層30の成長をコントロールすることができる。 The first conductive layer 70 and the second conductive layer 80 are preferably formed of a material having a small electrical resistance. Further, by appropriately selecting the material of the first conductive layer 70, the second magnetization free layer 40 directly below can be protected from the processing process. In this respect, a material having high chemical stability is desirable. Further, the growth of the first magnetization free layer 30 can be controlled by appropriately selecting the material of the first conductive layer 70 as the underlayer of the first magnetization free layer 30.
 また、第1磁化自由層30と第2磁化自由層40の間に挟まれる第1導電層70は、Fe,Co,Ni等の磁性体により形成されてもよい。この場合、第1磁化自由層30からの漏れ磁束を第2磁化自由層40に効率的に伝達することができ、上述の磁気的結合の観点から好適である。この観点からは、第1導電層70は、透磁率の高い材料で形成されることが好ましい。 Further, the first conductive layer 70 sandwiched between the first magnetization free layer 30 and the second magnetization free layer 40 may be formed of a magnetic material such as Fe, Co, or Ni. In this case, the leakage magnetic flux from the first magnetization free layer 30 can be efficiently transmitted to the second magnetization free layer 40, which is preferable from the viewpoint of the magnetic coupling described above. From this point of view, the first conductive layer 70 is preferably formed of a material having high magnetic permeability.
 なお、磁気抵抗効果素子8の磁化自由層140、非磁性層150及び磁化固定層160は、それぞれ第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同じ材料を用いることができる。磁気抵抗効果素子8と磁気抵抗効果素子9とを同一のプロセスで製造する場合、磁化自由層140、非磁性層150及び磁化固定層160は、それぞれ第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同一の材料となる。 In addition, the same material as the 2nd magnetization free layer 40, the 2nd nonmagnetic layer 50, and the 2nd magnetization fixed layer 60 is used for the magnetization free layer 140 of the magnetoresistive effect element 8, the nonmagnetic layer 150, and the magnetization fixed layer 160, respectively. be able to. When the magnetoresistive effect element 8 and the magnetoresistive effect element 9 are manufactured by the same process, the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 are the second magnetization free layer 40 and the second nonmagnetic layer, respectively. 50 and the same material as the second magnetization fixed layer 60.
 次に、本実施例に係る磁気抵抗効果素子9の原理を詳細に説明する。図4A及び図4Bは、第1磁化自由層30の磁化によって周辺に発生する漏れ磁界(漏れ磁束)を模式的に示している。図4Aはxz面内における状態を示し、図4Bはxy面内における状態を示している。 Next, the principle of the magnetoresistive effect element 9 according to this embodiment will be described in detail. 4A and 4B schematically show a leakage magnetic field (leakage magnetic flux) generated in the periphery by the magnetization of the first magnetization free layer 30. FIG. 4A shows a state in the xz plane, and FIG. 4B shows a state in the xy plane.
 第1磁化自由層30の磁化方向が+z軸方向に一様に揃っている場合を考える。この場合、漏れ磁界の磁力線は、図4Aに示されるようにおおよそダイポール形状を有し、第1磁化自由層30の上面(正磁極側)から出て、滑らかに下面(負磁極側)につながる。また、図4Bに示されるように、漏れ磁界は、第1磁化自由層30の重心G30から放射状に広がる。つまり、第1磁化自由層30の重心G30近傍では、漏れ磁界はほぼz方向であり、第1磁化自由層30の端部に近づくにつれて、漏れ磁界はより大きなxy成分(膜面平行方向成分)を有するようになる。 Consider the case where the magnetization direction of the first magnetization free layer 30 is uniformly aligned in the + z-axis direction. In this case, the magnetic field lines of the leakage magnetic field have a dipole shape as shown in FIG. 4A and come out from the upper surface (positive magnetic pole side) of the first magnetization free layer 30 and smoothly connect to the lower surface (negative magnetic pole side). . As shown in FIG. 4B, the leakage magnetic field spreads radially from the center of gravity G30 of the first magnetization free layer 30. That is, in the vicinity of the center of gravity G30 of the first magnetization free layer 30, the leakage magnetic field is substantially in the z direction, and as the end of the first magnetization free layer 30 is approached, the leakage magnetic field has a larger xy component (component in the film plane parallel direction). Will have.
 上述の通り、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30の重心G30から“第1の方向”にずれている。従って、第1磁化自由層30の磁化によって発生する漏れ磁界は、第2磁化自由層40の重心G40の位置において、“第1の方向”に沿ったxy成分を有することになる。すなわち、第1磁化自由層30の磁化は、第2磁化自由層40に対して“第1の方向”と略平行あるいは略反平行な磁気力を及ぼす。その結果、第2磁化自由層40の磁化は、“第1の方向”と略平行あるいは略反平行の成分を有することになる。 As described above, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the “first direction” in the xy plane. Accordingly, the leakage magnetic field generated by the magnetization of the first magnetization free layer 30 has an xy component along the “first direction” at the position of the center of gravity G40 of the second magnetization free layer 40. That is, the magnetization of the first magnetization free layer 30 exerts a magnetic force substantially parallel or substantially antiparallel to the “first direction” on the second magnetization free layer 40. As a result, the magnetization of the second magnetization free layer 40 has a component substantially parallel or substantially antiparallel to the “first direction”.
 図5A及び図5Bは、それぞれ磁気抵抗効果素子1が取り得る2つのメモリ状態を例示している。図5A及び図5Bで示される例では、第1磁化固定層10の磁化方向は+z方向に固定されており、第2磁化固定層60の磁化方向は+x方向に固定されている。但し、これらのうち一方、または両方の磁化方向が逆であってもよい。また、本例において、第2磁化自由層40の重心G40の第1磁化自由層30の重心G30に対するずれ方向(第1の方向)は、-x方向である。この第1の方向も任意である。但し、第1の方向は、第2磁化固定層60の磁化方向と略平行あるいは略反平行であることが望ましい。 5A and 5B illustrate two memory states that the magnetoresistive effect element 1 can take. In the example shown in FIGS. 5A and 5B, the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and the magnetization direction of the second magnetization fixed layer 60 is fixed in the + x direction. However, one or both of these magnetization directions may be reversed. Further, in this example, the shift direction (first direction) of the center G40 of the second magnetization free layer 40 with respect to the center G30 of the first magnetization free layer 30 is the −x direction. This first direction is also arbitrary. However, it is desirable that the first direction is substantially parallel or substantially antiparallel to the magnetization direction of the second magnetization fixed layer 60.
 図5Aでは、第1磁化自由層30の磁化は+z方向を向いている。この場合、第1磁化自由層30からの漏れ磁界は、第2磁化自由層40の重心G40の位置において、第1の方向に沿った+x成分を有する。従って、第1磁化自由層30と第2磁化自由層40との磁気的結合により、第2磁化自由層40の磁化は+x方向の成分を持つことになる。このとき、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と“平行”成分を持ち、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60からなる第2磁気抵抗効果素子の抵抗値は比較的小さくなる。図5Aで示されるメモリ状態は、以下“0”状態(例示:データ“0”を記憶した状態)と参照される。 In FIG. 5A, the magnetization of the first magnetization free layer 30 is in the + z direction. In this case, the leakage magnetic field from the first magnetization free layer 30 has a + x component along the first direction at the position of the center of gravity G40 of the second magnetization free layer 40. Therefore, due to the magnetic coupling between the first magnetization free layer 30 and the second magnetization free layer 40, the magnetization of the second magnetization free layer 40 has a component in the + x direction. At this time, the magnetization direction of the second magnetization free layer 40 has a component “parallel” to the magnetization direction of the second magnetization fixed layer 60, and the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer. The resistance value of the second magnetoresistive element composed of 60 is relatively small. The memory state shown in FIG. 5A is hereinafter referred to as a “0” state (example: a state in which data “0” is stored).
 一方、図5Bでは、第1磁化自由層30の磁化は-z方向を向いている。この場合、第1磁化自由層30からの漏れ磁界は、第2磁化自由層40の重心G40の位置において、第1の方向に沿った-x成分を有する。従って、第1磁化自由層30と第2磁化自由層40との磁気的結合により、第2磁化自由層40の磁化は-x方向の成分を持つことになる。このとき、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と“反平行”の成分を持ち、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60からなる第2磁気抵抗効果素子の抵抗値は比較的大きくなる。図5Bで示されるメモリ状態は、以下“1”状態(例示:データ“1”を記憶した状態)と参照される。 On the other hand, in FIG. 5B, the magnetization of the first magnetization free layer 30 faces the −z direction. In this case, the leakage magnetic field from the first magnetization free layer 30 has a −x component along the first direction at the position of the center of gravity G40 of the second magnetization free layer 40. Accordingly, the magnetic coupling between the first magnetization free layer 30 and the second magnetization free layer 40 causes the magnetization of the second magnetization free layer 40 to have a component in the −x direction. At this time, the magnetization direction of the second magnetization free layer 40 has a component “antiparallel” to the magnetization direction of the second magnetization fixed layer 60, and the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization The resistance value of the second magnetoresistive effect element composed of the fixed layer 60 is relatively large. The memory state shown in FIG. 5B is hereinafter referred to as a “1” state (example: a state in which data “1” is stored).
 以上に例示されたように、第1磁化自由層30と第2磁化自由層40との間の重心のずれ及び磁気的結合により、第2磁化自由層40の磁化方向は、第1磁化自由層30の磁化方向に応じて“一意的”に決まる。第1磁化自由層30の磁化方向が反転すると、第2磁化自由層40の磁化方向も変わる。その結果、第2磁化自由層40と第2磁化固定層60との間の磁化方向の相対角に違いが生じ、“0”状態及び“1”状態の2つのメモリ状態が実現される。つまり、第1磁化自由層30の磁化方向に応じて、2つのメモリ状態が実現される。 As exemplified above, the magnetization direction of the second magnetization free layer 40 is changed to the first magnetization free layer due to the shift of the center of gravity between the first magnetization free layer 30 and the second magnetization free layer 40 and magnetic coupling. It is uniquely determined according to the magnetization direction of 30. When the magnetization direction of the first magnetization free layer 30 is reversed, the magnetization direction of the second magnetization free layer 40 also changes. As a result, a difference occurs in the relative angle of the magnetization direction between the second magnetization free layer 40 and the second magnetization fixed layer 60, and two memory states of “0” state and “1” state are realized. That is, two memory states are realized according to the magnetization direction of the first magnetization free layer 30.
 尚、第2磁化固定層60の固定磁化の方向は、第1磁化自由層30と第2磁化自由層40との間の重心のずれ方向(第1の方向)と略平行あるいは略反平行であることが好適である。それは、第2磁化自由層40の変動磁化が、第1磁化自由層30の磁化方向に応じて、第1の方向と略平行あるいは略反平行の成分を有するからである。第2磁化固定層60の固定磁化の方向が第1の方向と略平行あるいは略反平行である場合、その固定磁化の方向と第2磁化自由層40の変動磁化の方向との間の相対角の変化が顕著となる。その結果、2つのメモリ状態間の差異が顕著となる。 The direction of fixed magnetization of the second magnetization fixed layer 60 is substantially parallel or substantially antiparallel to the direction of shift of the center of gravity (first direction) between the first magnetization free layer 30 and the second magnetization free layer 40. Preferably it is. This is because the variable magnetization of the second magnetization free layer 40 has a component that is substantially parallel or substantially antiparallel to the first direction depending on the magnetization direction of the first magnetization free layer 30. When the direction of the fixed magnetization of the second magnetization fixed layer 60 is substantially parallel or substantially antiparallel to the first direction, the relative angle between the direction of the fixed magnetization and the direction of the variable magnetization of the second magnetization free layer 40 The change of becomes remarkable. As a result, the difference between the two memory states becomes significant.
 本実施例では、第1磁化自由層30において垂直方向の磁化成分として記憶された情報が、磁気的結合を介して、第2磁化自由層40の膜面方向の磁化成分に伝達されていると言える。そのような情報の伝達が実現される限り、磁気的結合の方式は、上述の漏れ磁界を利用したものに限られない。例えば交換結合を利用した方式など、あらゆる磁気結合方式によって、第1磁化自由層30と第2磁化自由層40とが磁気的に関連付けられ得る。 In this embodiment, the information stored as the perpendicular magnetization component in the first magnetization free layer 30 is transmitted to the magnetization component in the film surface direction of the second magnetization free layer 40 through magnetic coupling. I can say that. As long as such information transmission is realized, the magnetic coupling method is not limited to the one using the above-described leakage magnetic field. For example, the first magnetization free layer 30 and the second magnetization free layer 40 can be magnetically related by any magnetic coupling method such as a method using exchange coupling.
 また、図5A及び図5Bの例では、第2磁化自由層40の磁化が第1磁化自由層30からの漏れ磁界によって完全に飽和する場合が説明されている。実際には、第2磁化自由層40の磁化は飽和しきらなくてもよい。第1磁化自由層30の磁化方向の違いに応じて、第2磁化自由層40の磁化方向に違いが生ずればよい。 Further, in the example of FIGS. 5A and 5B, the case where the magnetization of the second magnetization free layer 40 is completely saturated by the leakage magnetic field from the first magnetization free layer 30 is described. Actually, the magnetization of the second magnetization free layer 40 may not be completely saturated. It is only necessary that the magnetization direction of the second magnetization free layer 40 varies depending on the magnetization direction of the first magnetization free layer 30.
 また、第2磁化自由層40の磁化方向を第1磁化自由層30の磁化方向に応じて変えることができれば、第2磁化自由層40の磁化容易軸はどの方向に沿っていても構わない。上述の例のようにx軸方向に沿った磁化容易軸の場合、第2磁化自由層40の磁化は、磁化容易軸に沿った方向間で反転する。一方、y軸方向に沿った磁化容易軸の場合、第2磁化自由層40の磁化は、磁化容易軸を中心とする磁化困難軸方向へ回転する。 Further, as long as the magnetization direction of the second magnetization free layer 40 can be changed according to the magnetization direction of the first magnetization free layer 30, the easy axis of magnetization of the second magnetization free layer 40 may be along any direction. In the case of the easy magnetization axis along the x-axis direction as in the above example, the magnetization of the second magnetization free layer 40 is reversed between the directions along the easy magnetization axis. On the other hand, in the case of the easy axis along the y-axis direction, the magnetization of the second magnetization free layer 40 rotates in the hard axis direction centering on the easy axis.
 また、第2磁化自由層40の磁気異方性は極度に大きくないことが望ましい。これは、第2磁化自由層40の磁気異方性が極度に大きくなると、第1磁化自由層30からの漏れ磁界による磁化反転が困難になるためである。また、第2磁化自由層40の磁気異方性は、結晶磁気異方性によって付与されてもよく、形状磁気異方性によって付与されてもよい。また、第2磁化自由層40は、複数の強磁性体からなる積層膜であってもよい。それら強磁性体の間には磁化状態を乱さない範囲で非磁性体からなる層が挿入されても構わない。 In addition, it is desirable that the magnetic anisotropy of the second magnetization free layer 40 is not extremely large. This is because if the magnetic anisotropy of the second magnetization free layer 40 becomes extremely large, magnetization reversal by a leakage magnetic field from the first magnetization free layer 30 becomes difficult. Further, the magnetic anisotropy of the second magnetization free layer 40 may be imparted by crystal magnetic anisotropy or may be imparted by shape magnetic anisotropy. The second magnetization free layer 40 may be a laminated film made of a plurality of ferromagnetic materials. A layer made of a non-magnetic material may be inserted between these ferromagnetic materials as long as the magnetization state is not disturbed.
 次に、本実施形態の磁気抵抗効果素子9の動作方法、具体的には、書き込み方法及び読み出し方法について説明する。 Next, an operation method of the magnetoresistive effect element 9 of the present embodiment, specifically, a writing method and a reading method will be described.
 まず、本実施形態の磁気抵抗効果素子9の読み出し方法について説明する。図5A及び図5Bは、磁気抵抗効果素子9へのデータ読み出し方法を説明するための概念図でもある。データ読み出しでは、磁気抵抗効果による抵抗値の大小が検出される。そのために、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60からなる「第2磁気抵抗効果素子」が利用され、第2磁化自由層40と第2磁化固定層60との間に読み出し電流Ireadが流される。 First, a method for reading the magnetoresistive effect element 9 of the present embodiment will be described. 5A and 5B are also conceptual diagrams for explaining a method of reading data from the magnetoresistive effect element 9. In data reading, the magnitude of the resistance value due to the magnetoresistive effect is detected. For this purpose, a “second magnetoresistive element” composed of the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 is used, and the second magnetization free layer 40 and the second magnetization fixed layer 60 are used. A read current Iread flows between the two.
 図5Aには、“0”状態の場合が示されている。この場合、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と略平行であり、第2磁気抵抗効果素子の抵抗値は比較的小さい。一方、図5Bには、“1”状態の場合が示されている。この場合、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と略反平行であり、第2磁気抵抗効果素子の抵抗値は比較的大きい。つまり、読み出し電流Iread、又は読み出し電流Ireadに応じた読み出し電圧の大きさは、“0”状態あるいは“1”状態によって変化する。従って、その読み出し電流Ireadあるいは読み出し電圧を所定のリファレンスレベルと比較することにより、“0”状態か“1”状態かを判定することができる。すなわち、磁気抵抗効果素子1に記録された情報を読み出すことができる。 FIG. 5A shows the case of the “0” state. In this case, the magnetization direction of the second magnetization free layer 40 is substantially parallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistance effect element is relatively small. On the other hand, FIG. 5B shows the case of the “1” state. In this case, the magnetization direction of the second magnetization free layer 40 is substantially antiparallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistive element is relatively large. That is, the read current Iread or the magnitude of the read voltage corresponding to the read current Iread varies depending on the “0” state or the “1” state. Therefore, by comparing the read current Iread or the read voltage with a predetermined reference level, it is possible to determine whether the state is “0” or “1”. That is, information recorded in the magnetoresistive effect element 1 can be read.
 尚、図5A及び図5Bで示された例では、読み出し電流Ireadが第1導電層70及び第2導電層80を経由して流れている。しかしながら、第2磁気抵抗効果素子への読み出し電流Ireadの流し方は、図5Aや図5Bで示された例に限られない。第2磁化自由層40と第2磁化固定層60との間で双方向に読み出し電流Ireadが流れればよく、その他の部分の電流経路は適宜設計され得る。 In the example shown in FIGS. 5A and 5B, the read current Iread flows through the first conductive layer 70 and the second conductive layer 80. However, the method of flowing the read current Iread to the second magnetoresistance effect element is not limited to the example shown in FIGS. 5A and 5B. It suffices for the read current Iread to flow bidirectionally between the second magnetization free layer 40 and the second magnetization fixed layer 60, and the current paths in other portions can be designed as appropriate.
 次に、本実施形態の磁気抵抗効果素子9の書き込み方法について説明する。図6A及び図6Bは、磁気抵抗効果素子9へのデータ書き込み方法を説明するための概念図である。データ書き込みは、「スピン注入磁化反転方式」により実現される。具体的には、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30からなる「第1磁気抵抗効果素子」が利用され、第1磁化固定層10と第1磁化自由層30との間に書き込み電流Iwriteが流される。 Next, a writing method of the magnetoresistive effect element 9 of this embodiment will be described. 6A and 6B are conceptual diagrams for explaining a method of writing data to the magnetoresistive effect element 9. Data writing is realized by the “spin injection magnetization reversal method”. Specifically, a “first magnetoresistive effect element” including the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 is used, and the first magnetization fixed layer 10 and the first magnetization free layer are used. A write current Iwrite is passed between the layers 30.
 図6Aには、“0”状態(図5A参照)から“1”状態(図5B参照)への遷移、すなわち、“1”書き込み時の書き込み電流Iwriteの経路が示されている。図6Aに示されるように、“0”状態において矢印の方向に書き込み電流Iwriteが導入された場合を考える。この場合、書き込み電流Iwriteは、第1磁化固定層10から第1非磁性層20を通して第1磁化自由層30へ流れ、伝導電子は、第1磁化自由層30から第1非磁性層20を通して第1磁化固定層10へと流れる。図6Aでは、第1磁化固定層10の磁化方向は+z方向に固定されており、-z方向のスピン角運動量を有する伝導電子は、+z方向のスピン角運動量を有する伝導電子に比べると、第1磁化固定層10の界面でより多く反射される。結果として、第1磁化自由層30内では、-z方向のスピン角運動量を有する電子がマジョリティとなり、-z方向への磁化反転が誘起される。第1磁化自由層30の磁化が-z方向に反転すると、上述の磁気的結合により、第2磁化自由層40の磁化は-x方向に回転する。すなわち、図5Bで示された“1”状態が得られる。 FIG. 6A shows a transition from the “0” state (see FIG. 5A) to the “1” state (see FIG. 5B), that is, the path of the write current Iwrite at the time of writing “1”. Consider a case where a write current Iwrite is introduced in the direction of an arrow in the “0” state as shown in FIG. 6A. In this case, the write current Iwrite flows from the first magnetization fixed layer 10 to the first magnetization free layer 30 through the first nonmagnetic layer 20, and the conduction electrons pass through the first magnetization free layer 30 through the first nonmagnetic layer 20. It flows to one magnetization fixed layer 10. In FIG. 6A, the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and the conduction electrons having the spin angular momentum in the −z direction are compared with the conduction electrons having the spin angular momentum in the + z direction. More reflections are made at the interface of the single magnetization fixed layer 10. As a result, in the first magnetization free layer 30, electrons having a spin angular momentum in the −z direction become the majority, and magnetization reversal in the −z direction is induced. When the magnetization of the first magnetization free layer 30 is reversed in the −z direction, the magnetization of the second magnetization free layer 40 is rotated in the −x direction by the magnetic coupling described above. That is, the “1” state shown in FIG. 5B is obtained.
 一方、図6Bには、“1”状態(図5B参照)から“0”状態(図5A参照)への遷移、すなわち、“0”書き込み時の書き込み電流Iwriteの経路が示されている。図6Bに示されるように、“1”状態において矢印の方向に書き込み電流Iwriteが導入された場合を考える。この場合、書き込み電流Iwriteは、第1磁化自由層30から第1非磁性層20を通して第1磁化固定層10へ流れ、伝導電子は、第1磁化固定層10から第1非磁性層20を通して第1磁化自由層30へと流れる。図6Bでは、第1磁化固定層10の磁化方向は+z方向に固定されており、+z方向のスピン角運動量を有する多くの伝導電子が第1磁化自由層30へ流れ込む。結果として、第1磁化自由層30内では、+z方向のスピン角運動量を有する電子がマジョリティとなり、+z方向への磁化反転が誘起される。第1磁化自由層30の磁化が+z方向に反転すると、上述の磁気的結合により、第2磁化自由層40の磁化は+x方向に回転する。すなわち、図5Aで示された“0”状態が得られる。 On the other hand, FIG. 6B shows a transition from the “1” state (see FIG. 5B) to the “0” state (see FIG. 5A), that is, the path of the write current Iwrite at the time of writing “0”. As shown in FIG. 6B, consider a case where the write current Iwrite is introduced in the direction of the arrow in the “1” state. In this case, the write current Iwrite flows from the first magnetization free layer 30 to the first magnetization fixed layer 10 through the first nonmagnetic layer 20, and the conduction electrons pass through the first magnetization fixed layer 10 through the first nonmagnetic layer 20. It flows to one magnetization free layer 30. In FIG. 6B, the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and many conduction electrons having a spin angular momentum in the + z direction flow into the first magnetization free layer 30. As a result, in the first magnetization free layer 30, electrons having a spin angular momentum in the + z direction become majority, and magnetization reversal in the + z direction is induced. When the magnetization of the first magnetization free layer 30 is reversed in the + z direction, the magnetization of the second magnetization free layer 40 is rotated in the + x direction due to the magnetic coupling described above. That is, the “0” state shown in FIG. 5A is obtained.
 このようにして、“0”状態からの“1”書き込み、及び、“1”状態からの“0”書き込みが実現される。また、図示されていないが、“0”状態からの“0”書き込み、及び、“1”状態からの“1”書き込み、すなわちオーバーライトも可能である。 In this way, “1” write from the “0” state and “0” write from the “1” state are realized. Although not shown, “0” writing from the “0” state and “1” writing from the “1” state, that is, overwriting is also possible.
 尚、図6Aで示された例では、書き込み電流Iwriteは第1磁気抵抗効果素子から第1導電層70を経由して第2導電層80に流れ出し、図6Bで示された例では、書き込み電流Iwriteは第2導電層80から第1導電層70を経由して第1磁気抵抗効果素子に流れ込んでいる。しかしながら、第1磁気抵抗効果素子への書き込み電流Iwriteの流し方は、図6Aや図6Bで示された例に限られない。第1磁化固定層10と第1磁化自由層30との間で双方向に書き込み電流Iwriteが流れればよく、その他の部分の電流経路は適宜設計され得る。 In the example shown in FIG. 6A, the write current Iwrite flows from the first magnetoresistive element to the second conductive layer 80 via the first conductive layer 70. In the example shown in FIG. 6B, the write current Iwrite Iwrite flows from the second conductive layer 80 into the first magnetoresistive element via the first conductive layer 70. However, the method of flowing the write current Iwrite to the first magnetoresistive effect element is not limited to the example shown in FIGS. 6A and 6B. The write current Iwrite only has to flow bidirectionally between the first magnetization fixed layer 10 and the first magnetization free layer 30, and the current paths in other parts can be appropriately designed.
 また、第1磁化固定層10と第1磁化自由層30との接合に関しては面積が適度に小さいことが望ましい。これは、面積が小さくなるにつれ、電流密度が増加し、書き込みに要する電流値が低減され得るためである。好適には特徴長が100nm以下であることが望ましい。 Further, it is desirable that the area of the junction between the first magnetization fixed layer 10 and the first magnetization free layer 30 is appropriately small. This is because as the area becomes smaller, the current density increases and the current value required for writing can be reduced. The feature length is preferably 100 nm or less.
 以上に説明されたように、本実施例に係る磁気抵抗効果素子9では、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30がデータ書き込み時に用いられる。この意味で、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30は、「書き込み層群」と参照される。一方、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60は、データ読み出し時に用いられる。この意味で、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60は、「読み出し層群」と参照される。 As described above, in the magnetoresistive effect element 9 according to the present embodiment, the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are used at the time of data writing. In this sense, the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are referred to as a “write layer group”. On the other hand, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are used at the time of data reading. In this sense, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are referred to as a “read layer group”.
 本実施例によれば、書き込み層群と読み出し層群は、別々に設けられるが、磁気結合を通して互いに関連し合っている。書き込み層群の第1磁化自由層30に書き込まれた情報は、磁気的結合を介して、読み出し層群の第2磁化自由層40に伝達される。逆に言えば、磁気的結合を介した情報伝達があるため、書き込み用の書き込み層群と読み出し用の読み出し層群を別々に設けることが可能となる。従って、所望の特性が得られるように書き込み層群と読み出し層群をそれぞれ独立に最適化することができ、結果として、書き込み特性の向上と読み出し特性の向上を同時に実現することが可能となる。例えば、書き込み閾値電流密度の低減のために適切な材料特性を有する垂直磁化膜を書き込み層群に適用し、且つ、高いMR比を発現するMTJを読み出し層群に適用することができる。 According to the present embodiment, the write layer group and the read layer group are provided separately, but are related to each other through magnetic coupling. Information written to the first magnetization free layer 30 of the write layer group is transmitted to the second magnetization free layer 40 of the read layer group via magnetic coupling. In other words, since there is information transmission through magnetic coupling, it is possible to separately provide a write layer group for writing and a read layer group for reading. Therefore, the write layer group and the read layer group can be optimized independently so that desired characteristics can be obtained. As a result, it is possible to simultaneously improve the write characteristics and the read characteristics. For example, a perpendicular magnetization film having appropriate material characteristics for reducing the write threshold current density can be applied to the write layer group, and an MTJ that exhibits a high MR ratio can be applied to the read layer group.
 次に、本実施例のMRAM5におけるメモリセル201の回路構成について、図7A及び図7Bを用いて説明する。図7A及び図7Bにおいて、メモリセル201の記憶素子として、磁気抵抗効果素子9が用いられている。この回路構成は、本実施例のMRAM4のメモリセル201(記憶素子として磁気抵抗効果素子8を使用)についても同様に適用される。 Next, the circuit configuration of the memory cell 201 in the MRAM 5 of this embodiment will be described with reference to FIGS. 7A and 7B. 7A and 7B, the magnetoresistive effect element 9 is used as the memory element of the memory cell 201. This circuit configuration is similarly applied to the memory cell 201 (using the magnetoresistive effect element 8 as a storage element) of the MRAM 4 of the present embodiment.
 図7Aは、本実施例の磁気抵抗効果素子が集積化されたメモリセルの構成例を示す回路図である。図7Aには、単一のメモリセル201の回路構成が図示されているが、実際には複数のメモリセル201がアレイ状に配置されてMRAM5(又は4)に集積化されていることは、当業者には理解されよう。 FIG. 7A is a circuit diagram showing a configuration example of a memory cell in which the magnetoresistive effect element of this embodiment is integrated. FIG. 7A shows a circuit configuration of a single memory cell 201. In practice, however, a plurality of memory cells 201 are arranged in an array and integrated in the MRAM 5 (or 4). Those skilled in the art will appreciate.
 磁気抵抗効果素子9の場合、図7Aにおいて、第2磁化固定層60につながる端子は、読み出しのためのグラウンド線GNDにノードN3を介して接続されている。第1磁化固定層10につながる端子は、MOSトランジスタM1のソース/ドレインの一方にノードN1を介して接続されている。そのソース/ドレインの他方は、ビット線BL1に接続されている。第2導電層80につながる端子は、MOSトランジスタM2のソース/ドレインの一方にノードN2を介して接続されている。そのソース/ドレインの他方は、ビット線BL2に接続されている。MOSトランジスタM1、M2のゲートは、共通のワード線WLに接続されている。すなわち、図中の210は第1磁気抵抗効果素子の第1磁化固定層10、第1非磁性層20及び第1磁化自由層30と、第1導電層70及び第2導電層80に対応する。 In the case of the magnetoresistive effect element 9, in FIG. 7A, the terminal connected to the second magnetization fixed layer 60 is connected to the ground line GND for reading via the node N3. A terminal connected to the first magnetization fixed layer 10 is connected to one of the source / drain of the MOS transistor M1 via the node N1. The other of the source / drain is connected to the bit line BL1. A terminal connected to the second conductive layer 80 is connected to one of the source / drain of the MOS transistor M2 via the node N2. The other of the source / drain is connected to the bit line BL2. The gates of the MOS transistors M1 and M2 are connected to a common word line WL. That is, 210 in the figure corresponds to the first magnetization fixed layer 10, the first nonmagnetic layer 20, the first magnetization free layer 30, the first conductive layer 70, and the second conductive layer 80 of the first magnetoresistive effect element. .
 なお、磁気抵抗効果素子8の場合、図7Aにおいて、磁化固定層160の両端に接続される2つの端子は、一方がMOSトランジスタM1の一方のソース/ドレインにノードN1を介して接続され、他方がMOSトランジスタM2の一方のソース/ドレインにノードN2を介して接続される。磁化自由層140に接続される端子は、読み出しのためのグラウンド線GNDにノードN3を介して接続される。すなわち、図中の210は磁化固定層160に対応する。 In the case of the magnetoresistive effect element 8, in FIG. 7A, one of two terminals connected to both ends of the magnetization fixed layer 160 is connected to one source / drain of the MOS transistor M1 via the node N1, and the other Is connected to one source / drain of MOS transistor M2 via node N2. A terminal connected to the magnetization free layer 140 is connected to a ground line GND for reading via a node N3. That is, 210 in the figure corresponds to the magnetization fixed layer 160.
 図7Bは、本実施例のメモリセルが集積化されたMRAMの構成例を示すブロック図である。図7Bにおいて、MRAM260は、複数のメモリセル201がマトリックス状に配置されたメモリセルアレイ261を有している。このメモリセルアレイ261は、図7Aで説明されたデータの記録に用いられるメモリセル201と共に、データ読み出しの際に参照されるリファレンスセル201rを含んでいる。リファレンスセル201rの構造は、メモリセル201と同じである。 FIG. 7B is a block diagram showing a configuration example of an MRAM in which the memory cells of this embodiment are integrated. In FIG. 7B, the MRAM 260 includes a memory cell array 261 in which a plurality of memory cells 201 are arranged in a matrix. The memory cell array 261 includes a reference cell 201r that is referred to when reading data together with the memory cell 201 used for data recording described with reference to FIG. 7A. The structure of the reference cell 201r is the same as that of the memory cell 201.
 ワード線WLは、Xセレクタ262に接続されている。Xセレクタ262は、データの書き込み動作時、及び読出し動作時において、対象メモリセル201sにつながるワード線WLを選択ワード線WLsとして選択する。ビット線BL1はY側電流終端回路264に接続されており、ビット線BL2はYセレクタ263に接続されている。Yセレクタ263は、データの書き込み動作時、及び読出し動作時において、対象メモリセル201sにつながるビット線BL2を選択ビット線BL2sとして選択する。Y側電流終端回路264は、対象メモリセル201sにつながるビット線BL1を選択ビット線BL1sとして選択する。 The word line WL is connected to the X selector 262. The X selector 262 selects the word line WL connected to the target memory cell 201s as the selected word line WLs during the data write operation and the read operation. The bit line BL1 is connected to the Y-side current termination circuit 264, and the bit line BL2 is connected to the Y selector 263. The Y selector 263 selects the bit line BL2 connected to the target memory cell 201s as the selected bit line BL2s during the data write operation and the read operation. The Y-side current termination circuit 264 selects the bit line BL1 connected to the target memory cell 201s as the selected bit line BL1s.
 Y側電流源回路265は、データ書き込み動作時、選択ビット線BL2sに対し、所定の書き込み電流(Iwrite)の供給又は引き込みを行う。Y側電源回路266は、データ書き込み動作時、Y側電流終端回路264に所定の電圧を供給する。その結果、書き込み電流(Iwrite)は、Yセレクタ263へ流れ込む、あるいは、Yセレクタ263から流れ出す。これらXセレクタ262、Yセレクタ263、Y側電流終端回路264、Y側電流源回路265、及びY側電源回路266は、メモリセル201に書き込み電流(Iwrite)を供給するための「書き込み電流供給回路」を構成している。 The Y-side current source circuit 265 supplies or draws a predetermined write current (Iwrite) to the selected bit line BL2s during the data write operation. The Y-side power supply circuit 266 supplies a predetermined voltage to the Y-side current termination circuit 264 during the data write operation. As a result, the write current (Iwrite) flows into or out of the Y selector 263. These X selector 262, Y selector 263, Y side current termination circuit 264, Y side current source circuit 265, and Y side power supply circuit 266 are “write current supply circuits for supplying a write current (Iwrite) to the memory cell 201. Is comprised.
 読み出し電流付加回路267は、データ読み出し動作時、選択第2ビット線BL2sに所定の読み出し電流(Iread)を流す。Y側電流終端回路264は、ビット線BL1を“Open”に設定する。また、読み出し電流負荷回路267は、リファレンスセル201rにつながるリファレンスビット線BL2rに所定の読み出し電流(Iread)を流す。センスアンプ268は、リファレンスビット線BL2rの電位と選択ビット線BL2sの電位の差に基づいて、対象メモリセル201sからデータを読み出し、そのデータを出力する。これらXセレクタ262、Yセレクタ263、Y側電流終端回路264、読み出し電流付加回路267、及びセンスアンプ268は、メモリセル201に読み出し電流(Iread)を供給するための「読み出し電流供給回路」を構成している。 The read current adding circuit 267 supplies a predetermined read current (Iread) to the selected second bit line BL2s during the data read operation. The Y-side current termination circuit 264 sets the bit line BL1 to “Open”. The read current load circuit 267 supplies a predetermined read current (Iread) to the reference bit line BL2r connected to the reference cell 201r. The sense amplifier 268 reads data from the target memory cell 201s based on the difference between the potential of the reference bit line BL2r and the potential of the selected bit line BL2s, and outputs the data. The X selector 262, Y selector 263, Y-side current termination circuit 264, read current addition circuit 267, and sense amplifier 268 constitute a “read current supply circuit” for supplying a read current (Iread) to the memory cell 201. is doing.
 次に、図7A及び図7Bに示されるMRAMにおける書き込み方法、読み出し方法について説明する。まず、書き込みを行う場合、ワード線WLが“high”レベルにプルアップされ、MOSトランジスタM1、M2が“ON”にされる。また、ビット線BL1、BL2のいずれか一方が“high”レベルにプルアップされ、他方が“low”レベルにプルダウンされる。ビット線BL1、BL2のどちらを“high”レベルにプルアップし、どちらを“low”レベルにプルダウンするかは、当該磁気抵抗効果素子9(又は磁気抵抗効果素子8)に書き込まれるべきデータにより決定される。即ち、第1磁化自由層10(又は磁化固定層160)を流れる電流の方向に応じて決定される。以上により、データ“0”と“1”を書き分けることができる。 Next, a writing method and a reading method in the MRAM shown in FIGS. 7A and 7B will be described. First, when writing, the word line WL is pulled up to a “high” level, and the MOS transistors M1 and M2 are turned “ON”. One of the bit lines BL1 and BL2 is pulled up to the “high” level, and the other is pulled down to the “low” level. Which of the bit lines BL1 and BL2 is pulled up to a “high” level and which is pulled down to a “low” level is determined by data to be written in the magnetoresistive element 9 (or magnetoresistive element 8). Is done. That is, it is determined according to the direction of the current flowing through the first magnetization free layer 10 (or the magnetization fixed layer 160). As described above, data “0” and “1” can be written separately.
 一方、読み出しを行う場合、ワード線WLが“high”レベルにプルアップされ、MOSトランジスタM1、M2が“ON”にされる。また、ビット線BL1、BL2のいずれか一方が“high”レベルにプルアップされ、他方が“open”(フローティング)に設定される。このときビット線BL1、BL2の一方から、磁気抵抗効果素子9(又は磁気抵抗効果素子8)を貫通する読み出し電流が第2導電層80、第1導電層70、第2磁化自由層40、第2非磁性層50、第2磁化固定層60(又は磁化固定層160、非磁性層150、磁化自由層140)を経由してグラウンド線GNDへと流れる。読み出し電流が流されるビット線の電位、又は、読み出し電流の大きさは、磁気抵抗効果による磁気抵抗効果素子9(又は磁気抵抗効果素子8)の抵抗の変化に依存する。この抵抗の変化を電圧信号、又は電流信号として検知することにより高速での読み出しが可能となる。 On the other hand, when reading, the word line WL is pulled up to the “high” level, and the MOS transistors M1 and M2 are turned “ON”. One of the bit lines BL1 and BL2 is pulled up to the “high” level, and the other is set to “open” (floating). At this time, a read current passing through the magnetoresistive effect element 9 (or the magnetoresistive effect element 8) from one of the bit lines BL1 and BL2 is transferred to the second conductive layer 80, the first conductive layer 70, the second magnetization free layer 40, the first 2 It flows to the ground line GND via the nonmagnetic layer 50 and the second magnetization fixed layer 60 (or the magnetization fixed layer 160, the nonmagnetic layer 150, and the magnetization free layer 140). The potential of the bit line through which the read current flows or the magnitude of the read current depends on a change in resistance of the magnetoresistive effect element 9 (or magnetoresistive effect element 8) due to the magnetoresistive effect. By detecting this change in resistance as a voltage signal or a current signal, high-speed reading can be performed.
 ただし、図7A及び図7Bに示された回路構成、及び、ここで述べられた回路動作は、本発明を実施する方法の一例に過ぎず、他の回路構成による実施も可能である。 However, the circuit configuration shown in FIGS. 7A and 7B and the circuit operation described here are merely examples of a method for carrying out the present invention, and can be implemented by other circuit configurations.
 電流誘起磁界書き込み型の磁気抵抗効果素子8に対して、図7Aの回路構成を適用した場合、200MHz以上での動作が可能となることが報告されている(N.Sakimura et al.,IEEE JOURNAL OF SOLID-STATE CIRCUITS,Vol.42,2007,p.830.)。ただし、より高速な動作を行うために、図8に示されるような他の回路構成を用いることも可能である。 When the circuit configuration of FIG. 7A is applied to the current-induced magnetic field write type magnetoresistive element 8, it has been reported that operation at 200 MHz or higher is possible (N. Sakimura et al., IEEE JOURNAL). OF SOLID-STATE CIRCUITS, Vol. 42, 2007, p. 830.). However, other circuit configurations as shown in FIG. 8 can be used to perform higher-speed operation.
 図8は、本実施例の磁気抵抗効果素子が集積化されたメモリセルの他の構成例を示す回路図である。図8には、単一のメモリセル202の回路構成が図示されているが、実際には複数のメモリセル202がアレイ状に配置されてMRAMに集積化されていることは、当業者には理解されよう。電流誘起磁界書き込み型の磁気抵抗効果素子8に対して、図8の回路構成を適用した場合、500MHz以上での動作が可能となることが報告されている(N.Sakimura et al.,IEEE JOURNAL OF SOLID-STATE CIRCUITS,Vol.42,2007,p.830.)。 FIG. 8 is a circuit diagram showing another configuration example of the memory cell in which the magnetoresistive effect element of this embodiment is integrated. Although FIG. 8 shows a circuit configuration of a single memory cell 202, it will be understood by those skilled in the art that a plurality of memory cells 202 are actually arranged in an array and integrated in an MRAM. It will be understood. When the circuit configuration of FIG. 8 is applied to the current-induced magnetic field writing type magnetoresistive element 8, it has been reported that operation at 500 MHz or higher is possible (N. Sakimura et al., IEEE JOURNAL). OF SOLID-STATE CIRCUITS, Vol. 42, 2007, p. 830.).
 なお、図8は、一つのメモリセル202に2つのMTJ1とMTJ2が用いられている。MTJ1とMTJ2には相補なデータ(“0”と“1”又は“1”と“0”)が記憶される。加えて、メモリセル202内で、MOSトランジスタM13、M14により読み出し信号がセンスされる。 In FIG. 8, two MTJ1 and MTJ2 are used for one memory cell 202. Complementary data ("0" and "1" or "1" and "0") are stored in MTJ1 and MTJ2. In addition, in the memory cell 202, a read signal is sensed by the MOS transistors M13 and M14.
 MTJ1及びMTJ2として磁気抵抗効果素子8(MTJ1)、8(MTJ2)を用いる場合、磁気抵抗効果素子8(MTJ2)では、磁化固定層160の両端に接続される2つの端子は、一方がMOSトランジスタM11の一方のソース/ドレインにノードN11を介して接続され、他方が磁気抵抗効果素子8(MTJ1)の磁化固定層160の一端にノードN12を介して接続される。磁化自由層140に接続される端子は、読み出し電流を供給する配線SPLにノードN14を介して接続される。磁気抵抗効果素子8(MTJ1)では、磁化固定層160の両端に接続される2つの端子は、一方が磁気抵抗効果素子8(MTJ2)の磁化固定層160の他端にノードN12を介して接続され、他方がMOSトランジスタM12の一方のソース/ドレインにノードN13を介して接続される。磁化自由層140に接続される端子は、読み出しのためのグラウンド線GNDにノードN15を介して接続される。すなわち、図中の211、212は、それぞれ第磁気抵抗効果素子8(MTJ1)、8(MTJ2)の磁化固定層160に対応する。 When magnetoresistive effect elements 8 (MTJ1) and 8 (MTJ2) are used as MTJ1 and MTJ2, in magnetoresistive effect element 8 (MTJ2), one of the two terminals connected to both ends of magnetization fixed layer 160 is a MOS transistor. One source / drain of M11 is connected via node N11, and the other is connected to one end of magnetization fixed layer 160 of magnetoresistive effect element 8 (MTJ1) via node N12. A terminal connected to the magnetization free layer 140 is connected to a wiring SPL that supplies a read current via a node N14. In the magnetoresistive effect element 8 (MTJ1), one of two terminals connected to both ends of the magnetization fixed layer 160 is connected to the other end of the magnetization fixed layer 160 of the magnetoresistive effect element 8 (MTJ2) via the node N12. The other is connected to one source / drain of the MOS transistor M12 via a node N13. A terminal connected to the magnetization free layer 140 is connected to a ground line GND for reading via a node N15. That is, 211 and 212 in the figure correspond to the magnetization fixed layer 160 of the first magnetoresistance effect element 8 (MTJ1) and 8 (MTJ2), respectively.
 MTJ1及びMTJ2として磁気抵抗効果素子9(MTJ1)、9(MTJ2)を用いる場合、磁気抵抗効果素子9(MTJ2)では、第2磁化固定層60に接続される端子は、読み出し電流を供給する配線SPLにノードN14を介して接続される。第1磁化自由層10に接続される端子は、MOSトランジスタM11の一方のソース/ドレインにノードN11を介して接続される。第2導電層80に接続される端子は、磁気抵抗効果素子9(MTJ1)の第1磁化自由層30にノードN12を介して接続される。磁気抵抗効果素子9(MTJ1)では、第1磁化固定層10に接続される端子は、読み出しのためのグラウンド線GNDにノードN15を介して接続される。第1磁化自由層30に接続される端子は、磁気抵抗効果素子9(MTJ2)の第2導電層80にノードN12を介して接続される。第2導電層80は、MOSトランジスタM12の一方のソース/ドレインにノードN13を介して接続される。すなわち、図中の211、212は、それぞれ磁気抵抗効果素子9(MTJ1)、9(MTJ2)の第1磁化自由層10、第1非磁性層20、第1磁化固定層30、第1導電層70、第2導電層80に対応する。 When the magnetoresistive effect elements 9 (MTJ1) and 9 (MTJ2) are used as the MTJ1 and MTJ2, in the magnetoresistive effect element 9 (MTJ2), the terminal connected to the second magnetization fixed layer 60 is a wiring for supplying a read current Connected to SPL via node N14. A terminal connected to the first magnetization free layer 10 is connected to one source / drain of the MOS transistor M11 via a node N11. A terminal connected to the second conductive layer 80 is connected to the first magnetization free layer 30 of the magnetoresistive effect element 9 (MTJ1) via the node N12. In the magnetoresistive effect element 9 (MTJ1), a terminal connected to the first magnetization fixed layer 10 is connected to a ground line GND for reading via a node N15. A terminal connected to the first magnetization free layer 30 is connected to the second conductive layer 80 of the magnetoresistive effect element 9 (MTJ2) via the node N12. Second conductive layer 80 is connected to one source / drain of MOS transistor M12 via node N13. That is, 211 and 212 in the figure are the first magnetization free layer 10, the first nonmagnetic layer 20, the first magnetization fixed layer 30, and the first conductive layer of the magnetoresistive effect elements 9 (MTJ1) and 9 (MTJ2), respectively. 70 corresponds to the second conductive layer 80.
 次に、図8に示されるMRAMにおける書き込み方法、読み出し方法について説明する。まず、書き込みを行う場合、ワード線WWLが“high”レベルにプルアップされ、MOSトランジスタM11、M12が“ON”にされる。また、ビット線WBLa、WBLbのいずれか一方が“high”レベルにプルアップされ、他方が“low”レベルにプルダウンされる。ビット線WBLa、WBLbのどちらを“high”レベルにプルアップし、どちらを“low”レベルにプルダウンするかは、MTJ1及びMTJ2に書き込まれるべきデータにより決定される。即ち、二つの第1磁化自由層30(又は二つの磁化固定層160)を流れる電流の方向に応じて決定される。これにより、MTJ2とMTJ1には相補なデータ(“0”と“1”又は“1”と“0”)が記憶される。 Next, a writing method and a reading method in the MRAM shown in FIG. 8 will be described. First, when writing, the word line WWL is pulled up to a “high” level, and the MOS transistors M11 and M12 are turned “ON”. One of the bit lines WBLa and WBLb is pulled up to the “high” level, and the other is pulled down to the “low” level. Which of the bit lines WBLa and WBLb is pulled up to the “high” level and which is pulled down to the “low” level is determined by the data to be written in the MTJ1 and MTJ2. That is, it is determined according to the direction of the current flowing through the two first magnetization free layers 30 (or the two magnetization fixed layers 160). Thereby, complementary data ("0" and "1" or "1" and "0") are stored in MTJ2 and MTJ1.
 一方、読み出しを行う場合、ワード線RWLが“high”レベルにプルアップされ、MOSトランジスタM15が“ON”にされる。また、読出し電圧供給線SPLが“high”レベルにプルアップされる。このとき読出し電圧供給線SPLから、ノードN14、MTJ2、ノードN12、MTJ1、ノードN15の経路を通る読み出し電流がMTJ1及びMTJ2の第2磁化自由層40、第2非磁性層50及び第2磁化固定層60(又はMTJ1及びMTJ2の磁化固定層160、非磁性層150及び磁化自由層140)を経由してグラウンド線GNDへと流れる。このとき、MTJ2とMTJ1との間のノードN12の電位は、MTJ2とMTJ1に記憶された相補的なデータに依存する。したがって、ノードN12の電位をMOSトランジスタM13、M14でセンスして、ビット線RBLへ出力することにより高速での読み出しが可能となる。 On the other hand, when reading, the word line RWL is pulled up to “high” level, and the MOS transistor M15 is turned “ON”. Further, the read voltage supply line SPL is pulled up to the “high” level. At this time, the read current passing through the paths of the node N14, MTJ2, node N12, MTJ1, and node N15 from the read voltage supply line SPL is the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed of MTJ1 and MTJ2. It flows to the ground line GND via the layer 60 (or the magnetization fixed layer 160, the nonmagnetic layer 150, and the magnetization free layer 140 of MTJ1 and MTJ2). At this time, the potential of the node N12 between MTJ2 and MTJ1 depends on complementary data stored in MTJ2 and MTJ1. Therefore, the potential of the node N12 is sensed by the MOS transistors M13 and M14 and output to the bit line RBL, thereby enabling high-speed reading.
 ただし、図8に示された回路構成、及び、ここで述べられた回路動作は、本発明を実施する方法の一例に過ぎず、他の回路構成による実施も可能である。 However, the circuit configuration shown in FIG. 8 and the circuit operation described here are merely examples of a method for carrying out the present invention, and can be implemented by other circuit configurations.
 本実施例によれば、スピン注入磁化反転方式のMRAMにおいて、書き込み特性及び記録データ保持特性と読み出し特性とを独立に向上させることができる。これは、本実施例に係る磁気抵抗効果素子1において、書き込み及び記録データの保持を担う部分と、読み出しを担う部分が異なることに起因する。特開2007-142364号公報(対応米国出願US2007086121(A1))で述べられているように、諸定数が適切に設定された垂直磁化膜を用いることにより、5MA/cm以下の書き込み閾値電流密度でスピン注入磁化反転を行うことができる。一方、前述のHayakawa et al.,Applied Physics Letters,Vol.89,p.232510,(2006)で述べられているように、ある積層構成からなるMTJを用いることにより、500%に近いMR比を得ることができる。本実施例によれば、データ書き込み/保持を司る第1磁化固定層10及び第1磁化自由層30を垂直磁化膜で形成することにより、書き込み閾値電流密度を低減することが可能となる。且つ、データ読み出しを司る第2磁化自由層40及び第2磁化固定層60を面内磁化膜で形成することにより、MR比を高めて読み出し信号を増大させることが可能となる。 According to this embodiment, in the MRAM using the spin transfer magnetization reversal method, it is possible to independently improve the writing characteristics, the recording data holding characteristics, and the reading characteristics. This is because, in the magnetoresistive effect element 1 according to this embodiment, the portion responsible for writing and recording data is different from the portion responsible for reading. As described in Japanese Patent Application Laid-Open No. 2007-142364 (corresponding US application US2007086121 (A1)), a write threshold current density of 5 MA / cm 2 or less is obtained by using a perpendicular magnetization film in which various constants are appropriately set. Can perform spin injection magnetization reversal. On the other hand, the aforementioned Hayaka et al. , Applied Physics Letters, Vol. 89, p. 232510, (2006), an MR ratio close to 500% can be obtained by using an MTJ having a certain laminated structure. According to the present embodiment, it is possible to reduce the write threshold current density by forming the first magnetization fixed layer 10 and the first magnetization free layer 30 that control data writing / holding with the perpendicular magnetization film. In addition, by forming the second magnetization free layer 40 and the second magnetization fixed layer 60 that are responsible for data reading with in-plane magnetization films, it is possible to increase the MR ratio and increase the read signal.
 ここで、書き込み閾値電流密度を低減するために垂直磁化膜を用いた1つのMTJを考える。その同じMTJの読み出し特性を同時に向上させることは、次の理由から難しいと考えられる。特開2007-142364号公報(対応米国出願US2007086121(A1))でも述べられているように、書き込み閾値電流密度の低減を実現するためには、記録層(今の場合、第1磁化自由層30に相当)の飽和磁化は適度に小さいことが望ましい。しなしながら、一般的に、飽和磁化が小さくなると、磁性層のスピン分極率は低下する。スピン分極率が低下すると、読み出し信号の大きさに寄与するMR比が小さくなってしまう。すなわち、書き込み閾値電流密度の低減に好適な垂直磁化膜では、読み出し特性の向上が図り難い。 Here, consider one MTJ using a perpendicular magnetization film in order to reduce the write threshold current density. It is considered difficult to simultaneously improve the read characteristics of the same MTJ for the following reason. As described in Japanese Patent Application Laid-Open No. 2007-142364 (corresponding US application US2007086121 (A1)), in order to reduce the write threshold current density, the recording layer (in this case, the first magnetization free layer 30) is used. (E.g.) is preferably moderately small. However, generally, when the saturation magnetization is reduced, the spin polarizability of the magnetic layer is lowered. When the spin polarizability decreases, the MR ratio that contributes to the magnitude of the read signal decreases. That is, it is difficult to improve read characteristics with a perpendicular magnetic film suitable for reducing the write threshold current density.
 一方、高いMR比が得られる面内磁化膜(Co-Fe-B等)を用いた1つのMTJを考える。その同じMTJにおいては、書き込み閾値電流密度を十分に低減することは困難である。また、素子サイズが縮小された場合には、保持情報の熱擾乱耐性の確保が難しくなる。本実施例によれば、垂直磁化膜で形成される第1磁化自由層30によって情報が保持されるため、十分な熱擾乱耐性が確保される。それは、一般的な垂直磁化膜では、磁気異方性エネルギー密度(Ku)が十分に大きいためである。 On the other hand, consider one MTJ using an in-plane magnetization film (Co—Fe—B or the like) that provides a high MR ratio. In the same MTJ, it is difficult to sufficiently reduce the write threshold current density. Further, when the element size is reduced, it is difficult to ensure the heat disturbance resistance of the retained information. According to this embodiment, information is held by the first magnetization free layer 30 formed of a perpendicular magnetization film, so that sufficient thermal disturbance resistance is ensured. This is because a general perpendicular magnetization film has a sufficiently large magnetic anisotropy energy density (Ku).
 また、本発明では、メモリ搭載型の半導体装置において、要求される機能に応じて適切な種類のMRAMを選択し配置する。例えば、高速動作が要求される論理回路用のメモリとしては高速動作が可能な電流誘起磁界書き込み型MRAMを用い、低電流(大容量・高集積)が要求される主記憶装置用のメモリとしては低電流化(大容量化・高集積化)が可能なスピン注入磁化反転型MRAMを用いる。これにより、高速処理と大容量処理とを両立させた不揮発性メモリ混載システム(メモリ搭載型半導体装置)を得ることができる。 In the present invention, an appropriate type of MRAM is selected and arranged in a memory-mounted semiconductor device according to a required function. For example, as a memory for a logic circuit that requires high-speed operation, a current-induced magnetic field writing type MRAM capable of high-speed operation is used. As a memory for a main storage device that requires low current (large capacity and high integration), A spin-injection magnetization reversal MRAM capable of reducing current (capacitance / high integration) is used. As a result, a nonvolatile memory mixed system (memory-mounted semiconductor device) that achieves both high-speed processing and large-capacity processing can be obtained.
 また、本発明では、メモリセルが不揮発性であるため、電源オフを基本の状態(インスタントオン)とすることができ、低消費電力化が可能となる。更に、異なる種類のMRAMを同一チップ上に搭載しても、同一プロセス及び同一材料で製造することができる。それにより、低コスト、かつ短時間で半導体装置を製造することが可能となる。 In the present invention, since the memory cell is non-volatile, the power can be turned off to a basic state (instant on), and power consumption can be reduced. Furthermore, even if different types of MRAM are mounted on the same chip, they can be manufactured using the same process and the same material. As a result, a semiconductor device can be manufactured at a low cost and in a short time.
(第1変形例)
 次に、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第1変形例の構成について説明する。図9は、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第1変形例の構成を示す斜視図である。本発明の実施例の第1変形例に係る磁気抵抗効果素子8aと磁気抵抗効果素子9aとは同一のチップ上に形成されている。本変形例では、高速動作向けのMRAM4用の磁気抵抗効果素子8a及び高集積・大容量向けのMRAM5用の磁気抵抗効果素子9aの構成が図2の磁気抵抗効果素子8及び磁気抵抗効果素子9と異なる。
(First modification)
Next, the configuration of a first modification of the magnetoresistive effect element in each MRAM according to an embodiment of the present invention will be described. FIG. 9 is a perspective view showing a configuration of a first modification of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention. The magnetoresistive effect element 8a and the magnetoresistive effect element 9a according to the first modification of the embodiment of the present invention are formed on the same chip. In this modification, the configuration of the magnetoresistive effect element 8a for the MRAM 4 for high speed operation and the magnetoresistive effect element 9a for the MRAM 5 for high integration and large capacity is the magnetoresistive effect element 8 and the magnetoresistive effect element 9 of FIG. And different.
 磁気抵抗効果素子8aは、高速動作向けのMRAM4のメモリセルに用いられている。電流誘起磁界書き込み型の磁気抵抗効果素子である。この磁気抵抗効果素子8aは、磁化自由層140、磁化固定層160a、磁化自由層140と磁化固定層160aとの間に設けられた非磁性層150、磁化自由層140の近傍に設けられた導電層190を備えている。図示されていないが、上述の層に加えて、電極層、拡散防止層、下地層などが適宜設けられることが望ましい。 The magnetoresistive effect element 8a is used in a memory cell of the MRAM 4 for high speed operation. This is a current-induced magnetic field writing type magnetoresistive effect element. The magnetoresistive effect element 8a includes a magnetization free layer 140, a magnetization fixed layer 160a, a nonmagnetic layer 150 provided between the magnetization free layer 140 and the magnetization fixed layer 160a, and a conductivity provided in the vicinity of the magnetization free layer 140. Layer 190 is provided. Although not shown, in addition to the above-described layers, it is desirable that an electrode layer, a diffusion prevention layer, a base layer, and the like are appropriately provided.
 磁化自由層140、磁化固定層160a、非磁性層150は、図2の磁化自由層140、磁化固定層160、非磁性層150と同じである。ただし、磁化固定層160aには書き込み電流が流されない点で、図2の磁化固定層160と異なる。 The magnetization free layer 140, the magnetization fixed layer 160a, and the nonmagnetic layer 150 are the same as the magnetization free layer 140, the magnetization fixed layer 160, and the nonmagnetic layer 150 in FIG. However, the magnetization fixed layer 160a differs from the magnetization fixed layer 160 of FIG. 2 in that a write current is not passed.
 導電層190は、データ書き込み用の配線層であり、導電体で形成されている。導電層190内部を流れる書き込み電流が発生する電流誘起磁界により、磁化自由層140の磁化の向きが制御される。すなわち、当該電流誘起磁界により、磁気抵抗効果素子8aはデータが書き込まれる。書き込み電流を磁化固定層(強磁性体)ではなく、銅(Cu)やアルミニウム(Al)のような高導電率の導電体で形成された導電層190に流すので、書き込み配線抵抗をより低くすることが出来る。導電層190は、磁化固定層160aとコンタクト101を介して電気的に接続されている。
 その他の構成は、図2の場合と同様であるのでその説明を省略する。
The conductive layer 190 is a wiring layer for data writing, and is formed of a conductor. The direction of magnetization of the magnetization free layer 140 is controlled by a current-induced magnetic field generated by a write current flowing inside the conductive layer 190. That is, data is written in the magnetoresistive effect element 8a by the current-induced magnetic field. Since the write current flows through the conductive layer 190 formed of a high conductivity conductor such as copper (Cu) or aluminum (Al), not the fixed magnetization layer (ferromagnetic material), the write wiring resistance is further reduced. I can do it. The conductive layer 190 is electrically connected to the magnetization fixed layer 160a through the contact 101.
The other configuration is the same as that in the case of FIG.
 次に、本実施例の磁気抵抗効果素子8aのデータの書き込み方法について説明する。まず、導電層190のいずれか一端から他端へ向かって、導電層190に書き込み電流を流す。その書き込み電流により発生する電流誘起磁界により、磁化自由層140の磁化を反転させる。そのとき、書き込み電流の向きで発生する電流誘起磁界の向きを制御して、磁化自由層140の磁化を所望の向きに変化させることが出来る。それにより、磁化自由層140に所望のデータを記録する。導電層190に書き込み電流を流すこのような書き込み方式は書き込み専用の配線を設けることから、配線層書き込み型とも言うことができる。 Next, a method of writing data in the magnetoresistive effect element 8a of this embodiment will be described. First, a write current is passed through the conductive layer 190 from one end to the other end of the conductive layer 190. The magnetization of the magnetization free layer 140 is reversed by a current-induced magnetic field generated by the write current. At that time, the direction of the current-induced magnetic field generated by the direction of the write current can be controlled to change the magnetization of the magnetization free layer 140 to a desired direction. Thereby, desired data is recorded in the magnetization free layer 140. Such a writing method in which a writing current is allowed to flow through the conductive layer 190 can be called a wiring layer writing type because a wiring dedicated to writing is provided.
 次に、本実施例の磁気抵抗効果素子8aからのデータの読み出し方法について説明する。まず、磁化自由層140、非磁性層150、磁化固定層160aの経路で読み出し電流を流す。そして、磁化固定層160aの磁化と磁化自由層140の磁化との間の相対角に応じた抵抗の変化を検出することでデータを読み出す。たとえば、磁化固定層160aの磁化と磁化自由層140の磁化とが平行の場合、低抵抗状態が実現され、磁化固定層160aの磁化と磁化自由層140の磁化とが反平行の場合、高抵抗状態が実現される。磁気抵抗効果素子8aの抵抗の変化が、電圧信号、又は電流信号として検知され、その電圧信号、又は電流信号を用いて磁気抵抗効果素子8aに記憶されているデータが判別される。 Next, a method for reading data from the magnetoresistive effect element 8a of this embodiment will be described. First, a read current is passed through the paths of the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160a. Then, data is read by detecting a change in resistance according to the relative angle between the magnetization of the magnetization fixed layer 160a and the magnetization of the magnetization free layer 140. For example, when the magnetization of the magnetization fixed layer 160a and the magnetization of the magnetization free layer 140 are parallel, a low resistance state is realized, and when the magnetization of the magnetization fixed layer 160a and the magnetization of the magnetization free layer 140 are antiparallel, the resistance is high. A state is realized. A change in resistance of the magnetoresistive effect element 8a is detected as a voltage signal or a current signal, and data stored in the magnetoresistive effect element 8a is determined using the voltage signal or the current signal.
 磁気抵抗効果素子9aは、高集積・大容量(低電流)向けのMRAM5のメモリセルに用いられている。スピン偏極電流書き込み型のスピン注入磁化反転型の磁気抵抗効果素子である。この磁気抵抗効果素子9aは、書き込み用の第1磁気抵抗効果素子と読み出し用の第2磁気抵抗効果素子とを備えている。第1磁気抵抗効果素子は、第1磁化固定層10、第1磁化自由層30、及び第1磁化固定層10と第1磁化自由層30とに挟まれている第1非磁性層20を含む。第2磁気抵抗効果素子は、第2磁化自由層40、第2磁化固定層60、及び第2磁化固定層60と第2磁化自由層40とに挟まれている第2非磁性層50を含む。また、磁気抵抗効果素子9aは更に、第1導電層70及び第2導電層80を備えている。第1導電層70は、第1磁化自由層30及び第2磁化自由層40に電気的に接続するように設けられている。特に、図9に示されるように、第1導電層70は、第1磁化自由層30と第2磁化自由層40の間に挟まれている。第2導電層80は、第1導電層70に電気的に接続するように設けられている。なお、第1導電層70や第2導電層80を省略することも可能である。第2導電層80を省略した実施形態については後に説明される。また、図示されていないが、上述の層に加えて、電極層、拡散防止層、下地層などが適宜設けられることが望ましい。 The magnetoresistive effect element 9a is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element. The magnetoresistive effect element 9a includes a first magnetoresistive effect element for writing and a second magnetoresistive effect element for reading. The first magnetoresistive element includes a first magnetization fixed layer 10, a first magnetization free layer 30, and a first nonmagnetic layer 20 sandwiched between the first magnetization fixed layer 10 and the first magnetization free layer 30. . The second magnetoresistance effect element includes a second magnetization free layer 40, a second magnetization fixed layer 60, and a second nonmagnetic layer 50 sandwiched between the second magnetization fixed layer 60 and the second magnetization free layer 40. . The magnetoresistive element 9 a further includes a first conductive layer 70 and a second conductive layer 80. The first conductive layer 70 is provided so as to be electrically connected to the first magnetization free layer 30 and the second magnetization free layer 40. In particular, as shown in FIG. 9, the first conductive layer 70 is sandwiched between the first magnetization free layer 30 and the second magnetization free layer 40. The second conductive layer 80 is provided so as to be electrically connected to the first conductive layer 70. Note that the first conductive layer 70 and the second conductive layer 80 may be omitted. An embodiment in which the second conductive layer 80 is omitted will be described later. Although not shown, it is desirable that an electrode layer, a diffusion prevention layer, a base layer, and the like be appropriately provided in addition to the above-described layers.
 この磁気抵抗効果素子9aは、図2における磁気抵抗効果素子9の第1磁気抵抗効果素子と第2磁気抵抗効果素子とを、第1導電層70を挟んで互いに逆の位置に変更した構成を有している。また、磁化固定層60は、導電層90(配線層)とコンタクト102を介して電気的に接続されている。 The magnetoresistive effect element 9a has a configuration in which the first magnetoresistive effect element and the second magnetoresistive effect element of the magnetoresistive effect element 9 in FIG. 2 are changed to positions opposite to each other with the first conductive layer 70 interposed therebetween. Have. Further, the magnetization fixed layer 60 is electrically connected to the conductive layer 90 (wiring layer) via the contact 102.
 また、第1磁気抵抗効果素子の第1磁化自由層30と第2磁気抵抗効果素子の第2磁化自由層40とは、異なる層に形成されているが、互いに磁気的に結合している。言い換えれば、第1磁化自由層30の磁化状態と第2磁化自由層40の磁化状態とは、互いに影響を及ぼし合う。特に、図2の場合と同様に、第1磁化自由層30の磁化状態が第2磁化自由層40の磁化状態に影響を及ぼすことが重要である。 Also, the first magnetization free layer 30 of the first magnetoresistance effect element and the second magnetization free layer 40 of the second magnetoresistance effect element are formed in different layers, but are magnetically coupled to each other. In other words, the magnetization state of the first magnetization free layer 30 and the magnetization state of the second magnetization free layer 40 affect each other. In particular, as in the case of FIG. 2, it is important that the magnetization state of the first magnetization free layer 30 affects the magnetization state of the second magnetization free layer 40.
 本発明の実施例に係る磁気抵抗効果素子8aと磁気抵抗効果素子9aとは同一のチップ上に形成されている。そして、磁気抵抗効果素子8aの磁化自由層140、非磁性層150及び磁化固定層160aは、それぞれ磁気抵抗効果素子9aの第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同一レイヤーに同一材料で同時に形成される。また、導電層190は、導電層90と同一レイヤーに同一材料で同時に形成される。すなわち、MRAM4とMRAM5とは、同一のプロセスでの形成が可能であり、プロセス数は増大しない。それにより、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 The magnetoresistive effect element 8a and the magnetoresistive effect element 9a according to the embodiment of the present invention are formed on the same chip. The magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160a of the magnetoresistive effect element 8a are respectively the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer of the magnetoresistive effect element 9a. 60 and the same material are simultaneously formed in the same layer. In addition, the conductive layer 190 is simultaneously formed using the same material in the same layer as the conductive layer 90. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
 次に、本実施例の磁気抵抗効果素子9aについて、より詳細に説明する。 Next, the magnetoresistive effect element 9a of the present embodiment will be described in more detail.
 図10は、本発明の実施例に係る磁気抵抗効果素子9aの構成を模式的に示す概略図である。図9に示されるxyz座標系におけるxy平面図である。なお、磁気抵抗効果素子9aは複数の層からなる積層構造を有しており、その積層方向がz軸方向として規定される。積層構造の各層に平行な平面がxy平面である。 FIG. 10 is a schematic view schematically showing the configuration of the magnetoresistive effect element 9a according to the embodiment of the present invention. FIG. 10 is an xy plan view in the xyz coordinate system shown in FIG. 9. The magnetoresistive effect element 9a has a laminated structure composed of a plurality of layers, and the lamination direction is defined as the z-axis direction. A plane parallel to each layer of the stacked structure is an xy plane.
 図10には、xy平面における、第1磁化自由層30の重心G30及び第2磁化自由層40の重心G40の位置が示されている。ここでいう重心とは、xy平面における幾何学的な意味での重心である。すなわち、幾何学形状の任意の点iの位置ベクトルがRi=(Xi,Yi)であるとき、重心の位置ベクトルRg=(Xg,Yg)は、Σi(Ri-Rg)=0の関係を満たす。ここでΣiは、iに関する総和を意味する。例えば、長方形や平行四辺形の場合、重心は対角線の交点であり、楕円形の場合、重心はその中心である。 FIG. 10 shows the positions of the centroid G30 of the first magnetization free layer 30 and the centroid G40 of the second magnetization free layer 40 in the xy plane. The center of gravity referred to here is the center of gravity in the geometric sense on the xy plane. That is, when the position vector of an arbitrary point i of the geometric shape is Ri = (Xi, Yi), the center-of-gravity position vector Rg = (Xg, Yg) satisfies the relationship of Σi (Ri−Rg) = 0. . Here, Σi means the total sum related to i. For example, in the case of a rectangle or parallelogram, the center of gravity is the intersection of diagonal lines, and in the case of an ellipse, the center of gravity is the center.
 本実施例によれば、第1磁化自由層30の重心G30と第2磁化自由層40の重心G40は、xy平面においてずれている。つまり、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30の重心G30から、膜面に平行な“第1の方向”にずれている。図10で示された例では、第1の方向(ずれ方向)は+x方向である。第1磁化自由層30と第2磁化自由層40は、少なくとも一部オーバーラップしていてもよいし、オーバーラップしていなくてもよい。 According to the present embodiment, the centroid G30 of the first magnetization free layer 30 and the centroid G40 of the second magnetization free layer 40 are shifted in the xy plane. That is, in the xy plane, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the “first direction” parallel to the film surface. In the example shown in FIG. 10, the first direction (shift direction) is the + x direction. The first magnetization free layer 30 and the second magnetization free layer 40 may overlap at least partially, or may not overlap.
 尚、各層のxy平面における形状は長方形に限られず、円形、楕円形、ひし形、六角形などであってもよい。また、適切な特性が得られるように、各層の表面に適宜凹凸を設けることも可能である。また、各層の面積についても任意性がある。 The shape of each layer in the xy plane is not limited to a rectangle, and may be a circle, an ellipse, a rhombus, a hexagon, or the like. In addition, irregularities can be appropriately provided on the surface of each layer so that appropriate characteristics can be obtained. Also, the area of each layer is arbitrary.
 磁気抵抗効果素子9aに関するその他の構成及び原理については、図2の場合と同様であるので、その説明を省略する。また、磁気抵抗効果素子9a及び磁気抵抗効果素子8aの各層の材料については、図2の場合と同様であるので、その説明を省略する。 Other configurations and principles regarding the magnetoresistive effect element 9a are the same as those in FIG. The materials of the layers of the magnetoresistive effect element 9a and the magnetoresistive effect element 8a are the same as in the case of FIG.
 次に、本実施形態の磁気抵抗効果素子9aの動作方法、具体的には、書き込み方法及び読み出し方法について説明する。 Next, an operation method of the magnetoresistive effect element 9a of the present embodiment, specifically, a writing method and a reading method will be described.
 まず、本実施形態の磁気抵抗効果素子9aの読み出し方法について説明する。図11A及び図11Bは、磁気抵抗効果素子9aへのデータ読み出し方法を説明するための概念図である。データ読み出しでは、磁気抵抗効果による抵抗値の大小が検出される。そのために、第2磁気抵抗効果素子(第2磁化自由層40、第2非磁性層50及び第2磁化固定層60)が利用され、第2磁化自由層40と第2磁化固定層60との間に読み出し電流Ireadが流される。 First, a method of reading the magnetoresistive effect element 9a of this embodiment will be described. 11A and 11B are conceptual diagrams for explaining a method of reading data to the magnetoresistive effect element 9a. In data reading, the magnitude of the resistance value due to the magnetoresistive effect is detected. For this purpose, the second magnetoresistive element (second magnetization free layer 40, second nonmagnetic layer 50, and second magnetization fixed layer 60) is used, and the second magnetization free layer 40 and the second magnetization fixed layer 60 are separated from each other. A read current Iread flows between them.
 図11Aには、“0”状態の場合が示されている。この場合、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と略平行であり、第2磁気抵抗効果素子の抵抗値は比較的小さい。一方、図11Bには、“1”状態の場合が示されている。この場合、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と略反平行であり、第2磁気抵抗効果素子の抵抗値は比較的大きい。つまり、読み出し電流Iread、又は読み出し電流Ireadに応じた読み出し電圧の大きさは、“0”状態あるいは“1”状態によって変化する。従って、その読み出し電流Ireadあるいは読み出し電圧を所定のリファレンスレベルと比較することにより、“0”状態か“1”状態かを判定することができる。すなわち、磁気抵抗効果素子9aに記録された情報を読み出すことができる。 FIG. 11A shows the case of the “0” state. In this case, the magnetization direction of the second magnetization free layer 40 is substantially parallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistance effect element is relatively small. On the other hand, FIG. 11B shows the case of the “1” state. In this case, the magnetization direction of the second magnetization free layer 40 is substantially antiparallel to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistive element is relatively large. That is, the read current Iread or the magnitude of the read voltage corresponding to the read current Iread varies depending on the “0” state or the “1” state. Therefore, by comparing the read current Iread or the read voltage with a predetermined reference level, it is possible to determine whether the state is “0” or “1”. That is, the information recorded in the magnetoresistive effect element 9a can be read.
 尚、図11A及び図11Bで示された例では、読み出し電流Ireadが第1導電層70及び第2導電層80を経由して流れている。しかしながら、第2磁気抵抗効果素子への読み出し電流Ireadの流し方は、図11Aや図11Bで示された例に限られない。第2磁化自由層40と第2磁化固定層60との間で双方向に読み出し電流Ireadが流れればよく、その他の部分の電流経路は適宜設計され得る。 In the example shown in FIGS. 11A and 11B, the read current Iread flows through the first conductive layer 70 and the second conductive layer 80. However, the method of flowing the read current Iread to the second magnetoresistive effect element is not limited to the example shown in FIGS. 11A and 11B. It suffices for the read current Iread to flow bidirectionally between the second magnetization free layer 40 and the second magnetization fixed layer 60, and the current paths in other portions can be designed as appropriate.
 次に、本実施形態の磁気抵抗効果素子9aの書き込み方法について説明する。図12A及び図12Bは、磁気抵抗効果素子9へのデータ書き込み方法を説明するための概念図である。データ書き込みは、「スピン注入磁化反転方式」により実現される。具体的には、第1磁気抵抗効果素子(第1磁化固定層10、第1非磁性層20及び第1磁化自由層30)が利用され、第1磁化固定層10と第1磁化自由層30との間に書き込み電流Iwriteが流される。 Next, a writing method of the magnetoresistive effect element 9a of this embodiment will be described. 12A and 12B are conceptual diagrams for explaining a method of writing data to the magnetoresistive effect element 9. Data writing is realized by the “spin injection magnetization reversal method”. Specifically, the first magnetoresistance effect element (the first magnetization fixed layer 10, the first nonmagnetic layer 20 and the first magnetization free layer 30) is used, and the first magnetization fixed layer 10 and the first magnetization free layer 30 are used. A write current Iwrite is passed between the two.
 図12Aには、“0”状態(図11A参照)から“1”状態(図11B参照)への遷移、すなわち、“1”書き込み時の書き込み電流Iwriteの経路が示されている。図12Aに示されるように、“0”状態において矢印の方向に書き込み電流Iwriteが導入された場合を考える。この場合、書き込み電流Iwriteは、第1磁化固定層10から第1非磁性層20を通して第1磁化自由層30へ流れ、伝導電子は、第1磁化自由層30から第1非磁性層20を通して第1磁化固定層10へと流れる。図12Aでは、第1磁化固定層10の磁化方向は+z方向に固定されており、-z方向のスピン角運動量を有する伝導電子は、+z方向のスピン角運動量を有する伝導電子に比べると、第1磁化固定層10の界面でより多く反射される。結果として、第1磁化自由層30内では、-z方向のスピン角運動量を有する電子がマジョリティとなり、-z方向への磁化反転が誘起される。第1磁化自由層30の磁化が-z方向に反転すると、上述の磁気的結合により、第2磁化自由層40の磁化は-x方向に回転する。すなわち、図11Bで示された“1”状態が得られる。 FIG. 12A shows the transition from the “0” state (see FIG. 11A) to the “1” state (see FIG. 11B), that is, the path of the write current Iwrite at the time of writing “1”. Consider the case where a write current Iwrite is introduced in the direction of the arrow in the “0” state as shown in FIG. 12A. In this case, the write current Iwrite flows from the first magnetization fixed layer 10 to the first magnetization free layer 30 through the first nonmagnetic layer 20, and the conduction electrons pass through the first magnetization free layer 30 through the first nonmagnetic layer 20. It flows to one magnetization fixed layer 10. In FIG. 12A, the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and the conduction electrons having the spin angular momentum in the −z direction are compared with the conduction electrons having the spin angular momentum in the + z direction. More reflections are made at the interface of the single magnetization fixed layer 10. As a result, in the first magnetization free layer 30, electrons having a spin angular momentum in the −z direction become the majority, and magnetization reversal in the −z direction is induced. When the magnetization of the first magnetization free layer 30 is reversed in the −z direction, the magnetization of the second magnetization free layer 40 is rotated in the −x direction by the magnetic coupling described above. That is, the “1” state shown in FIG. 11B is obtained.
 一方、図12Bには、“1”状態(図11B参照)から“0”状態(図11A参照)への遷移、すなわち、“0”書き込み時の書き込み電流Iwriteの経路が示されている。図12Bに示されるように、“1”状態において矢印の方向に書き込み電流Iwriteが導入された場合を考える。この場合、書き込み電流Iwriteは、第1磁化自由層30から第1非磁性層20を通して第1磁化固定層10へ流れ、伝導電子は、第1磁化固定層10から第1非磁性層20を通して第1磁化自由層30へと流れる。図12Bでは、第1磁化固定層10の磁化方向は+z方向に固定されており、+z方向のスピン角運動量を有する多くの伝導電子が第1磁化自由層30へ流れ込む。結果として、第1磁化自由層30内では、+z方向のスピン角運動量を有する電子がマジョリティとなり、+z方向への磁化反転が誘起される。第1磁化自由層30の磁化が+z方向に反転すると、上述の磁気的結合により、第2磁化自由層40の磁化は+x方向に回転する。すなわち、図11Aで示された“0”状態が得られる。 On the other hand, FIG. 12B shows a transition from the “1” state (see FIG. 11B) to the “0” state (see FIG. 11A), that is, the path of the write current Iwrite when writing “0”. Consider a case where a write current Iwrite is introduced in the direction of the arrow in the “1” state as shown in FIG. 12B. In this case, the write current Iwrite flows from the first magnetization free layer 30 to the first magnetization fixed layer 10 through the first nonmagnetic layer 20, and the conduction electrons pass through the first magnetization fixed layer 10 through the first nonmagnetic layer 20. It flows to one magnetization free layer 30. In FIG. 12B, the magnetization direction of the first magnetization fixed layer 10 is fixed in the + z direction, and many conduction electrons having a spin angular momentum in the + z direction flow into the first magnetization free layer 30. As a result, in the first magnetization free layer 30, electrons having a spin angular momentum in the + z direction become majority, and magnetization reversal in the + z direction is induced. When the magnetization of the first magnetization free layer 30 is reversed in the + z direction, the magnetization of the second magnetization free layer 40 is rotated in the + x direction due to the magnetic coupling described above. That is, the “0” state shown in FIG. 11A is obtained.
 このようにして、“0”状態からの“1”書き込み、及び、“1”状態からの“0”書き込みが実現される。また、図示されていないが、“0”状態からの“0”書き込み、及び、“1”状態からの“1”書き込み、すなわちオーバーライトも可能である。 In this way, “1” write from the “0” state and “0” write from the “1” state are realized. Although not shown, “0” writing from the “0” state and “1” writing from the “1” state, that is, overwriting is also possible.
 尚、図12Aで示された例では、書き込み電流Iwriteは第1磁気抵抗効果素子から第1導電層70を経由して第2導電層80に流れ出し、図12Bで示された例では、書き込み電流Iwriteは第2導電層80から第1導電層70を経由して第1磁気抵抗効果素子に流れ込んでいる。しかしながら、第1磁気抵抗効果素子への書き込み電流Iwriteの流し方は、図12Aや図12Bで示された例に限られない。第1磁化固定層10と第1磁化自由層30との間で双方向に書き込み電流Iwriteが流れればよく、その他の部分の電流経路は適宜設計され得る。 In the example shown in FIG. 12A, the write current Iwrite flows from the first magnetoresistive element through the first conductive layer 70 to the second conductive layer 80. In the example shown in FIG. 12B, the write current Iwrite Iwrite flows from the second conductive layer 80 into the first magnetoresistive element via the first conductive layer 70. However, the method of flowing the write current Iwrite to the first magnetoresistance effect element is not limited to the example shown in FIGS. 12A and 12B. The write current Iwrite only has to flow bidirectionally between the first magnetization fixed layer 10 and the first magnetization free layer 30, and the current paths in other parts can be appropriately designed.
 また、第1磁化固定層10と第1磁化自由層30との接合に関しては面積が適度に小さいことが望ましい。これは、面積が小さくなるにつれ、電流密度が増加し、書き込みに要する電流値が低減され得るためである。好適には特徴長が100nm以下であることが望ましい。 Further, it is desirable that the area of the junction between the first magnetization fixed layer 10 and the first magnetization free layer 30 is appropriately small. This is because as the area becomes smaller, the current density increases and the current value required for writing can be reduced. The feature length is preferably 100 nm or less.
 以上に説明されたように、本実施例に係る磁気抵抗効果素子9では、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30がデータ書き込み時に用いられる。この意味で、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30は、「書き込み層群」と参照される。一方、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60は、データ読み出し時に用いられる。この意味で、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60は、「読み出し層群」と参照される。 As described above, in the magnetoresistive effect element 9 according to the present embodiment, the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are used at the time of data writing. In this sense, the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 are referred to as a “write layer group”. On the other hand, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are used at the time of data reading. In this sense, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 are referred to as a “read layer group”.
 本実施例によれば、書き込み層群と読み出し層群は、別々に設けられるが、磁気結合を通して互いに関連し合っている。書き込み層群の第1磁化自由層30に書き込まれた情報は、磁気的結合を介して、読み出し層群の第2磁化自由層40に伝達される。逆に言えば、磁気的結合を介した情報伝達があるため、書き込み用の書き込み層群と読み出し用の読み出し層群を別々に設けることが可能となる。従って、所望の特性が得られるように書き込み層群と読み出し層群をそれぞれ独立に最適化することができ、結果として、書き込み特性の向上と読み出し特性の向上を同時に実現することが可能となる。例えば、書き込み閾値電流密度の低減のために適切な材料特性を有する垂直磁化膜を書き込み層群に適用し、且つ、高いMR比を発現するMTJを読み出し層群に適用することができる。 According to the present embodiment, the write layer group and the read layer group are provided separately, but are related to each other through magnetic coupling. Information written to the first magnetization free layer 30 of the write layer group is transmitted to the second magnetization free layer 40 of the read layer group via magnetic coupling. In other words, since there is information transmission through magnetic coupling, it is possible to separately provide a write layer group for writing and a read layer group for reading. Therefore, the write layer group and the read layer group can be optimized independently so that desired characteristics can be obtained. As a result, it is possible to simultaneously improve the write characteristics and the read characteristics. For example, a perpendicular magnetization film having appropriate material characteristics for reducing the write threshold current density can be applied to the write layer group, and an MTJ that exhibits a high MR ratio can be applied to the read layer group.
(第2変形例)
 次に、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第2変形例の構成について説明する。図13は、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第2変形例の構成を示す斜視図である。本発明の実施例の第2変形例に係る磁気抵抗効果素子8bと磁気抵抗効果素子9bとは同一のチップ上に形成されている。本変形例では、高速動作向けのMRAM4用の磁気抵抗効果素子8b及び高集積・大容量(低電流)向けのMRAM5用の磁気抵抗効果素子9bの構成がそれぞれ図2の磁気抵抗効果素子8及び磁気抵抗効果素子9と異なる。
(Second modification)
Next, the configuration of the second modification of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention will be described. FIG. 13 is a perspective view showing a configuration of a second modification of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention. The magnetoresistive effect element 8b and the magnetoresistive effect element 9b according to the second modification of the embodiment of the present invention are formed on the same chip. In this modification, the configurations of the magnetoresistive effect element 8b for the MRAM 4 for high-speed operation and the magnetoresistive effect element 9b for the MRAM 5 for high integration and large capacity (low current) are respectively shown in FIG. Different from the magnetoresistive effect element 9.
 磁気抵抗効果素子8bは、高速動作向けのMRAM4のメモリセルに用いられている。電流誘起磁界書き込み型の磁気抵抗効果素子である。この磁気抵抗効果素子8bは、磁化自由層140、磁化固定層160、磁化自由層140と磁化固定層160との間に設けられた非磁性層150、磁化固定層160を挟んで非磁性層150と反対側に設けられた非磁性層151、及び非磁性層151を挟んで磁化固定層160と反対側に設けられた磁化自由層140aを備えている。図示されていないが、上述の層に加えて、電極層、拡散防止層、下地層などが適宜設けられることが望ましい。 The magnetoresistive effect element 8b is used in a memory cell of the MRAM 4 for high speed operation. This is a current-induced magnetic field writing type magnetoresistive effect element. The magnetoresistive effect element 8b includes a magnetization free layer 140, a magnetization fixed layer 160, a nonmagnetic layer 150 provided between the magnetization free layer 140 and the magnetization fixed layer 160, and the nonmagnetic layer 150 sandwiching the magnetization fixed layer 160. And a magnetization free layer 140a provided on the opposite side to the magnetization fixed layer 160 with the nonmagnetic layer 151 interposed therebetween. Although not shown, in addition to the above-described layers, it is desirable that an electrode layer, a diffusion prevention layer, a base layer, and the like are appropriately provided.
 磁化自由層140、磁化固定層160、非磁性層150は、図2の磁化自由層140、磁化固定層160、非磁性層150と同じである。ただし、磁気抵抗効果素子8bは、磁化固定層160を挟んで非磁性層150と反対側に設けられた磁化自由層140aを備えている点で、図2の磁気抵抗効果素子8と異なる。 The magnetization free layer 140, the magnetization fixed layer 160, and the nonmagnetic layer 150 are the same as the magnetization free layer 140, the magnetization fixed layer 160, and the nonmagnetic layer 150 in FIG. However, the magnetoresistive effect element 8b differs from the magnetoresistive effect element 8 of FIG. 2 in that it includes a magnetization free layer 140a provided on the opposite side of the nonmagnetic layer 150 with the magnetization fixed layer 160 interposed therebetween.
 磁化自由層140aは、好適には磁化自由層140と同じ強磁性体の材料で形成され、同じ面内磁気異方性を有し、反転可能な逆方向の磁化を有している。磁化自由層60aは、磁化自由層60と反強磁性的に磁気結合し、互いの磁化を安定化させている。また、磁化固定層160を挟んで両側に位置する磁化自由層140aと磁化自由層140は、書き込み動作時に、磁化固定層160を流れる書き込み電流により発生する電流誘起磁界を増幅する機能を有している。非磁性層151は磁化固定層160と磁化自由層140aとの間での磁気結合を切る働きを有する。非磁性層151は非磁性体であればどのような材料を用いてもよい。
 その他の構成は、図2の場合と同様であるのでその説明を省略する。
The magnetization free layer 140a is preferably made of the same ferromagnetic material as the magnetization free layer 140, has the same in-plane magnetic anisotropy, and has a reversible magnetization in the reverse direction. The magnetization free layer 60a is antiferromagnetically magnetically coupled to the magnetization free layer 60 and stabilizes the magnetization of each other. The magnetization free layer 140a and the magnetization free layer 140 located on both sides of the magnetization fixed layer 160 have a function of amplifying a current-induced magnetic field generated by a write current flowing through the magnetization fixed layer 160 during a write operation. Yes. The nonmagnetic layer 151 has a function of cutting the magnetic coupling between the magnetization fixed layer 160 and the magnetization free layer 140a. The nonmagnetic layer 151 may be made of any material as long as it is a nonmagnetic material.
The other configuration is the same as that in the case of FIG.
 次に、本実施例の磁気抵抗効果素子8bのデータの書き込み方法については、磁化固定層160を流れる書き込み電流による電流誘起磁界が磁化自由層140aと磁化自由層140とによって増幅される点や、その電流誘起磁界により磁化自由層140aが磁化自由層140と逆向きに磁化される点を除けば、図2の場合と同様であるのでその説明を省略する。磁化自由層140aと磁化自由層140との中間に書き込み配線層となる磁化固定層160が位置し、ここに書き込み電流を流すこのような書き込み方式を中間配線層書き込み型とも言うことができる。
 また、本実施例の磁気抵抗効果素子8bからのデータの読み出し方法については、図2の場合と同様であるのでその説明を省略する。
Next, regarding the data writing method of the magnetoresistive effect element 8b of the present embodiment, the current induced magnetic field due to the write current flowing through the magnetization fixed layer 160 is amplified by the magnetization free layer 140a and the magnetization free layer 140, Except that the magnetization free layer 140a is magnetized in the opposite direction to the magnetization free layer 140 by the current-induced magnetic field, the description is omitted because it is the same as in FIG. Such a writing method in which a fixed magnetization layer 160 serving as a writing wiring layer is positioned between the magnetization free layer 140a and the magnetization free layer 140 and a writing current is passed therethrough can also be referred to as an intermediate wiring layer writing type.
The method for reading data from the magnetoresistive effect element 8b of the present embodiment is the same as in the case of FIG.
 また、図13では磁化自由層140と磁化自由層140aはほぼ同じ形状であるものとして描かれているが、この2層の形状は異なってもよい。例えば磁化自由層140aは磁化固定層160と同形状をしていてもよい。この場合には磁化自由層140aの磁化は定常状態ではその長手方向であるy方向を向き、磁化固定層160に電流が導入されたときに、電流誘起磁界の方向に回転し、磁化自由層140に効率的に磁界を印加することができる。このような役割を有する磁化自由層140aはしばしばクラッド層、またはヨーク層などと参照される。 In FIG. 13, the magnetization free layer 140 and the magnetization free layer 140a are depicted as having substantially the same shape, but the shapes of the two layers may be different. For example, the magnetization free layer 140a may have the same shape as the magnetization fixed layer 160. In this case, the magnetization of the magnetization free layer 140a is oriented in the y direction, which is the longitudinal direction in a steady state, and rotates in the direction of the current-induced magnetic field when a current is introduced into the magnetization fixed layer 160. It is possible to efficiently apply a magnetic field. The magnetization free layer 140a having such a role is often referred to as a cladding layer or a yoke layer.
 磁気抵抗効果素子9bは、高集積・大容量(低電流)向けのMRAM5のメモリセルに用いられている。スピン偏極電流書き込み型のスピン注入磁化反転型の磁気抵抗効果素子である。この磁気抵抗効果素子9bは、書き込み用の第1磁気抵抗効果素子と読み出し用の第2磁気抵抗効果素子とを備えている。 The magnetoresistive effect element 9b is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element. The magnetoresistive effect element 9b includes a first magnetoresistive effect element for writing and a second magnetoresistive effect element for reading.
 この磁気抵抗効果素子9bは、図2の磁気抵抗効果素子9と同じである。ただし、第2磁化固定層60下に非磁性層51と磁性層41を有している点で図2の磁気抵抗効果素子9と異なる。ただし、非磁性層51と磁性層41は、素子動作に影響は無いので、無くてもよい。
 その他の構成や動作は、図2の場合と同様であるのでその説明を省略する。
This magnetoresistive effect element 9b is the same as the magnetoresistive effect element 9 of FIG. However, it differs from the magnetoresistive element 9 of FIG. 2 in that the nonmagnetic layer 51 and the magnetic layer 41 are provided under the second magnetization fixed layer 60. However, the nonmagnetic layer 51 and the magnetic layer 41 do not have any influence on the element operation, and may be omitted.
Other configurations and operations are the same as in the case of FIG.
 本発明の実施例に係る磁気抵抗効果素子8bと磁気抵抗効果素子9bとは同一のチップ上に形成されている。そして、磁気抵抗効果素子8bの磁化自由層140、非磁性層150、磁化固定層160及び磁化自由層140aは、それぞれ磁気抵抗効果素子9bの第2磁化自由層40、第2非磁性層50、第2磁化固定層40及び磁性層41と同一レイヤーに同一材料で同時に形成される。すなわち、MRAM4とMRAM5とは、同一のプロセスでの形成が可能であり、プロセス数は増大しない。それにより、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 The magnetoresistive effect element 8b and the magnetoresistive effect element 9b according to the embodiment of the present invention are formed on the same chip. The magnetization free layer 140, the nonmagnetic layer 150, the magnetization fixed layer 160, and the magnetization free layer 140a of the magnetoresistive effect element 8b are respectively the second magnetization free layer 40, the second nonmagnetic layer 50, and the magnetoresistance effect element 9b. The second magnetization fixed layer 40 and the magnetic layer 41 are simultaneously formed of the same material in the same layer. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
(第3変形例)
 次に、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第3変形例の構成について説明する。第3の変形例は、磁気抵抗効果素子9cを構成する各層のz軸方向(積層方向)の位置関係に関する。磁気抵抗効果素子9cは、高集積・大容量(低電流)向けのMRAM5のメモリセルに用いられている。スピン偏極電流書き込み型のスピン注入磁化反転型の磁気抵抗効果素子である。
(Third Modification)
Next, the configuration of a third modification of the magnetoresistive element in each MRAM according to the embodiment of the present invention will be described. The third modification relates to the positional relationship in the z-axis direction (stacking direction) of each layer constituting the magnetoresistive effect element 9c. The magnetoresistive effect element 9c is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
 上述の通り、第1磁化固定層10、第1非磁性層20及び第1磁化自由層30は、「書き込み層群」を構成しており、第2磁化自由層40、第2非磁性層50及び第2磁化固定層60は、「読み出し層群」を構成している。また、第1導電層70及び第2導電層80は、書き込み層群及び読み出し層群に電流を導入する「プラグ群」を構成している。これら書き込み層群、読み出し層群、及びプラグ群の位置関係は、既出の例で示されたものに限られない。書き込み層群の第1磁化自由層30と読み出し層群の第2磁化自由層40が、異なる層に形成され、互いに磁気的に結合していればよい。 As described above, the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 constitute a “write layer group”, and the second magnetization free layer 40 and the second nonmagnetic layer 50. The second magnetization fixed layer 60 constitutes a “read layer group”. The first conductive layer 70 and the second conductive layer 80 constitute a “plug group” that introduces a current into the write layer group and the read layer group. The positional relationship among the write layer group, the read layer group, and the plug group is not limited to that shown in the above example. The first magnetization free layer 30 of the write layer group and the second magnetization free layer 40 of the read layer group may be formed in different layers and magnetically coupled to each other.
 図14A~図14Cは、本実施例に係る磁気抵抗効果素子の第3変形例の構成を模式的に示す概略図である。詳細には、図14Aは斜視図であり、図14B及び図14Cは、それぞれ、図14Aに示されるxyz座標系におけるxy平面図、xz断面図である。 FIG. 14A to FIG. 14C are schematic views schematically showing a configuration of a third modification of the magnetoresistive effect element according to the present example. Specifically, FIG. 14A is a perspective view, and FIGS. 14B and 14C are an xy plan view and an xz sectional view in the xyz coordinate system shown in FIG. 14A, respectively.
 図14A~図14Cで示される例では、書き込み層群が読み出し層群に対して上層に設けられている。一方、第2導電層80は、第1導電層70に対して書き込み層群側(上方側)に設けられている。この場合も、書き込み層群の第1磁化自由層30と読み出し層群の第2磁化自由層40が、互いに磁気的に結合している。更に、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30の重心G30からずれている。従って、第1磁化自由層30からの放射状に広がる漏れ磁界により、第2磁化自由層40の磁化方向は一意に定まる。 In the example shown in FIGS. 14A to 14C, the write layer group is provided above the read layer group. On the other hand, the second conductive layer 80 is provided on the writing layer group side (upper side) with respect to the first conductive layer 70. Also in this case, the first magnetization free layer 30 of the write layer group and the second magnetization free layer 40 of the read layer group are magnetically coupled to each other. Furthermore, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30 of the first magnetization free layer 30 in the xy plane. Therefore, the magnetization direction of the second magnetization free layer 40 is uniquely determined by the leakage magnetic field that spreads radially from the first magnetization free layer 30.
 既出の例と同様に、書き込み電流Iwriteは、プラグ群から書き込み層群へ流れる、あるいは、書き込み層群からプラグ群へ流れる。書き込み電流Iwriteの方向を変えることにより、“0”書き込みと“1”書き込みの両方を実現可能である。また、既出の例と同様に、プラグ群を用いることにより、読み出し電流Ireadが読み出し層群に導入される。 As in the previous example, the write current Iwrite flows from the plug group to the write layer group or from the write layer group to the plug group. By changing the direction of the write current Iwrite, both “0” write and “1” write can be realized. Similarly to the above-described example, the read current Iread is introduced into the read layer group by using the plug group.
 これらの他にも、書き込み層群、読み出し層群、及びプラグ群の位置関係としては様々考えられ得る。但し、第1磁化自由層30と第2磁化自由層40との間の磁気的結合の強度を高めるためには、第1磁化自由層30と第2磁化自由層40との間の距離は小さいことが好ましい。従って、上述の通り、第1磁化固定層10、第1非磁性層20、第1磁化自由層30、第1導電層70、第2磁化自由層40、第2非磁性層50、及び第2磁化固定層60が、この順番で下からあるいは上から積層されていることが好ましい。尚、後述されるように、第1導電層70は省略することも可能である。 In addition to these, various positional relationships among the write layer group, the read layer group, and the plug group can be considered. However, in order to increase the strength of the magnetic coupling between the first magnetization free layer 30 and the second magnetization free layer 40, the distance between the first magnetization free layer 30 and the second magnetization free layer 40 is small. It is preferable. Therefore, as described above, the first magnetization fixed layer 10, the first nonmagnetic layer 20, the first magnetization free layer 30, the first conductive layer 70, the second magnetization free layer 40, the second nonmagnetic layer 50, and the second The magnetization fixed layer 60 is preferably laminated from the bottom or the top in this order. As will be described later, the first conductive layer 70 can be omitted.
 本変形例において、図2のMRAM4用の磁気抵抗効果素子8についても、図2の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9cと磁気抵抗効果素子8とを同一のチップ上に形成することができる。磁気抵抗効果素子8の磁化自由層140、非磁性層150及び磁化固定層160は、それぞれ磁気抵抗効果素子9cの第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同一レイヤーに同一材料で同時に形成される。すなわち、MRAM4とMRAM5とは、同一のプロセスでの形成が可能であり、プロセス数は増大しない。それにより、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 In this modification, the semiconductor device 1 can be configured with the same combination as in FIG. 2 with respect to the magnetoresistive effect element 8 for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9c and the magnetoresistive effect element 8 according to this modification can be formed on the same chip. The magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 are the same as the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 of the magnetoresistive effect element 9c, respectively. The same layer and the same material are simultaneously formed. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
 同様に、図9のMRAM4用の磁気抵抗効果素子8aについても、図9の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9cと磁気抵抗効果素子8aとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。同様に、図13のMRAM4用の磁気抵抗効果素子8bについても、図13の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9cと磁気抵抗効果素子8bとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。これらの場合でも、同一のプロセスでの形成が可能である。 Similarly, also for the magnetoresistive effect element 8a for the MRAM 4 in FIG. 9, the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9c and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time with the same material and the same layer. Similarly, also for the magnetoresistive effect element 8b for the MRAM 4 in FIG. 13, the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9c and the magnetoresistive effect element 8b according to this modification can be formed on the same chip at the same time with the same material and the same layer. Even in these cases, formation by the same process is possible.
(第4変形例)
 次に、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第4変形例の構成について説明する。第4変形例は、磁気抵抗効果素子9dを構成する書き込み層群の数に関する。磁気抵抗効果素子9dは、高集積・大容量(低電流)向けのMRAM5のメモリセルに用いられている。スピン偏極電流書き込み型のスピン注入磁化反転型の磁気抵抗効果素子である。
(Fourth modification)
Next, the configuration of a fourth modification of the magnetoresistive element in each MRAM according to the embodiment of the present invention will be described. The fourth modification relates to the number of write layer groups constituting the magnetoresistive effect element 9d. The magnetoresistive effect element 9d is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
 第4の変形例に係る磁気抵抗効果素子9dは、複数の書き込み層群を備える。そして、複数の書き込み層群の各々が、上述の第1磁化固定層10、第1非磁性層20、及び第1磁化自由層30を有する。 The magnetoresistance effect element 9d according to the fourth modification includes a plurality of write layer groups. Each of the plurality of write layer groups includes the first magnetization fixed layer 10, the first nonmagnetic layer 20, and the first magnetization free layer 30 described above.
 図15A~図15Cは、本実施例に係る磁気抵抗効果素子の第4変形例の構成を模式的に示す概略図である。詳細には、図15Aは、磁気抵抗効果素子9dの構造の一例を示す斜視図である。図15B及び図15Cのそれぞれは、図15Aで示された構造のxy平面図及びxz側面図である。図15A~図15Cで示される例では、磁気抵抗効果素子9dは、第1の書き込み層群、第2の書き込み層群、第1導電層70、及び読み出し層群(40~60)を備えている。第1の書き込み層群は、第1磁化固定層10a、第1非磁性層20a、及び第1磁化自由層30aから構成されている。第2の書き込み層群は、第1磁化固定層10b、第1非磁性層20b、及び第1磁化自由層30bから構成されている。 15A to 15C are schematic views schematically showing a configuration of a fourth modification of the magnetoresistive effect element according to the present example. Specifically, FIG. 15A is a perspective view showing an example of the structure of the magnetoresistive effect element 9d. 15B and 15C are respectively an xy plan view and an xz side view of the structure shown in FIG. 15A. In the example shown in FIGS. 15A to 15C, the magnetoresistive element 9d includes a first write layer group, a second write layer group, a first conductive layer 70, and a read layer group (40 to 60). Yes. The first write layer group includes a first magnetization fixed layer 10a, a first nonmagnetic layer 20a, and a first magnetization free layer 30a. The second write layer group includes a first magnetization fixed layer 10b, a first nonmagnetic layer 20b, and a first magnetization free layer 30b.
 好適には、第1磁化固定層10aと第1磁化固定層10bとは、同じ層に形成され、同じ材質、形状、膜厚を有する。また、第1非磁性層20aと第1非磁性層20bとは、同じ層に形成され、同じ材質、形状、膜厚を有する。また、第1磁化自由層30aと第1磁化自由層30bとは、同じ層に形成され、同じ材質、形状、膜厚を有する。同じ層、同じ材質、同じ膜厚を有することで、同一のプロセスで形成することが出来る。図15A~図15Cで示される例では、第1磁化自由層30aと第1磁化自由層30bは共に、第1導電層70の一方の面に接触しており、他方の面には第2磁化自由層40が接触している。 Preferably, the first magnetization fixed layer 10a and the first magnetization fixed layer 10b are formed in the same layer and have the same material, shape, and film thickness. The first nonmagnetic layer 20a and the first nonmagnetic layer 20b are formed in the same layer and have the same material, shape, and film thickness. The first magnetization free layer 30a and the first magnetization free layer 30b are formed in the same layer and have the same material, shape, and film thickness. By having the same layer, the same material, and the same film thickness, they can be formed by the same process. In the example shown in FIGS. 15A to 15C, both the first magnetization free layer 30a and the first magnetization free layer 30b are in contact with one surface of the first conductive layer 70, and the other surface has a second magnetization magnetization. The free layer 40 is in contact.
 第1磁化自由層30aと第2磁化自由層40は、互いに磁気的に結合している。また、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30aの重心G30aからずれている。従って、第1磁化自由層30aの磁化は、第2磁化自由層40に対して面内方向の磁気力を及ぼす。同様に、第1磁化自由層30bと第2磁化自由層40は、互いに磁気的に結合している。また、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30bの重心G30bからずれている。従って、第1磁化自由層30bの磁化は、第2磁化自由層40に対して面内方向の磁気力を及ぼす。 The first magnetization free layer 30a and the second magnetization free layer 40 are magnetically coupled to each other. In the xy plane, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30a of the first magnetization free layer 30a. Therefore, the magnetization of the first magnetization free layer 30 a exerts a magnetic force in the in-plane direction on the second magnetization free layer 40. Similarly, the first magnetization free layer 30b and the second magnetization free layer 40 are magnetically coupled to each other. In the xy plane, the center of gravity G40 of the second magnetization free layer 40 is shifted from the center of gravity G30b of the first magnetization free layer 30b. Accordingly, the magnetization of the first magnetization free layer 30 b exerts a magnetic force in the in-plane direction on the second magnetization free layer 40.
 好適には、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30aの重心G30aと第1磁化自由層30bの重心G30bとの間に位置する。特に、xy平面において、第1磁化自由層30aの重心G30a、第2磁化自由層40の重心G40、及び第1磁化自由層30bの重心G30bが、一直線上に並んでいることが好適である。図15A~図15Cで示される例では、第2磁化自由層40の重心G40は第1磁化自由層30aの重心G30aから+x方向にずれており、更に、第1磁化自由層30bの重心G30bは第2磁化自由層40の重心G40から+x方向にずれている。 Preferably, the centroid G40 of the second magnetization free layer 40 is located between the centroid G30a of the first magnetization free layer 30a and the centroid G30b of the first magnetization free layer 30b in the xy plane. In particular, it is preferable that the centroid G30a of the first magnetization free layer 30a, the centroid G40 of the second magnetization free layer 40, and the centroid G30b of the first magnetization free layer 30b are aligned on the xy plane. In the example shown in FIGS. 15A to 15C, the centroid G40 of the second magnetization free layer 40 is shifted in the + x direction from the centroid G30a of the first magnetization free layer 30a, and the centroid G30b of the first magnetization free layer 30b is The second magnetization free layer 40 is shifted from the center of gravity G40 in the + x direction.
 図16A及び図16Bのそれぞれは、図15A~図15Cで示された磁気抵抗効果素子9dが取り得る2つのメモリ状態を例示している。図16A及び図16Bで示される例では、第1磁化固定層10a、10bの磁化方向は、互いに平行であり、同じ+z方向に固定されている。第2磁化固定層60の磁化方向は、+x方向に固定されている。 16A and 16B each illustrate two memory states that the magnetoresistive effect element 9d shown in FIGS. 15A to 15C can take. In the example shown in FIGS. 16A and 16B, the magnetization directions of the first magnetization fixed layers 10a and 10b are parallel to each other and fixed in the same + z direction. The magnetization direction of the second magnetization fixed layer 60 is fixed in the + x direction.
 図16Aでは、第1磁化自由層30aの磁化は+z方向を向き、一方、第1磁化自由層30bの磁化は-z方向を向いている。すなわち、第1磁化自由層30a、30bの磁化方向は、互いに略反平行である。この場合、第1磁化自由層30a、30bからの漏れ磁界は共に、第2磁化自由層40の重心G40の位置において+x成分を有する。それは、第2磁化自由層40の重心G40が、第1磁化自由層30a、30bの重心G30a、G30bの間に位置しているからである。言い換えれば、重心G40が重心G30a、G30bの間に位置し、第1磁化自由層30a、30bの磁化方向が反平行のため、第1磁化自由層30a、30bによる磁気力は第2磁化自由層40の位置において互いに強め合う。磁気力の強め合い効果は、重心G30a、G40、G30bが一直線上に並んでいるときに最大となり、好適である。このように、第1磁化自由層30a、30bと第2磁化自由層40との磁気的結合により、第2磁化自由層40の磁化は+x方向の成分を持つことになる。このとき、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と “平行”な成分を持ち、第2磁気抵抗効果素子の抵抗値は比較的小さくなる(“0”状態)。 In FIG. 16A, the magnetization of the first magnetization free layer 30a faces the + z direction, while the magnetization of the first magnetization free layer 30b faces the -z direction. That is, the magnetization directions of the first magnetization free layers 30a and 30b are substantially antiparallel to each other. In this case, both the leakage magnetic fields from the first magnetization free layers 30a and 30b have a + x component at the position of the center of gravity G40 of the second magnetization free layer 40. This is because the center of gravity G40 of the second magnetization free layer 40 is located between the centers of gravity G30a and G30b of the first magnetization free layers 30a and 30b. In other words, since the center of gravity G40 is located between the centers of gravity G30a and G30b and the magnetization directions of the first magnetization free layers 30a and 30b are antiparallel, the magnetic force generated by the first magnetization free layers 30a and 30b is reduced to the second magnetization free layer. It strengthens each other at 40 positions. The strengthening effect of magnetic force is maximized when the centers of gravity G30a, G40, and G30b are aligned. Thus, due to the magnetic coupling between the first magnetization free layers 30a and 30b and the second magnetization free layer 40, the magnetization of the second magnetization free layer 40 has a component in the + x direction. At this time, the magnetization direction of the second magnetization free layer 40 has a component “parallel” to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistive element is relatively small (“0”). Status).
 一方、図16Bでは、第1磁化自由層30aの磁化は-z方向を向き、第1磁化自由層30bの磁化は+z方向を向いている。この場合、第1磁化自由層30a、30bからの漏れ磁界は共に、第2磁化自由層40の重心G40の位置において-x成分を有する。結果として、第2磁化自由層40の磁化は-x方向の成分を持つことになる。このとき、第2磁化自由層40の磁化方向は、第2磁化固定層60の磁化方向と“反平行”な成分を持ち、第2磁気抵抗効果素子の抵抗値は比較的大きくなる(“1”状態)。 On the other hand, in FIG. 16B, the magnetization of the first magnetization free layer 30a faces the −z direction, and the magnetization of the first magnetization free layer 30b faces the + z direction. In this case, both the leakage magnetic fields from the first magnetization free layers 30 a and 30 b have a −x component at the position of the center of gravity G 40 of the second magnetization free layer 40. As a result, the magnetization of the second magnetization free layer 40 has a component in the −x direction. At this time, the magnetization direction of the second magnetization free layer 40 has a component “antiparallel” to the magnetization direction of the second magnetization fixed layer 60, and the resistance value of the second magnetoresistance effect element is relatively large (“1”). "Status).
 第1磁化自由層30a、30bの一方の磁化方向を反転させるとき、他方の磁化方向も同時に反転させる必要がある。そのため、データ書き込み時には、書き込み層群の各々において、第1磁化固定層10と第1磁化自由層30との間に書き込み電流Iwriteが流される。それぞれの書き込み層群における書き込み電流Iwriteの方向は、それぞれの第1磁化自由層30の磁化が反転するように適宜設定される。 When reversing the magnetization direction of one of the first magnetization free layers 30a and 30b, it is necessary to simultaneously reverse the other magnetization direction. Therefore, at the time of data writing, the write current Iwrite flows between the first magnetization fixed layer 10 and the first magnetization free layer 30 in each of the write layer groups. The direction of the write current Iwrite in each write layer group is appropriately set so that the magnetization of each first magnetization free layer 30 is reversed.
 図17Aは、第4の変形例における書き込み電流Iwriteの一例を示している。上述の通り、第1磁化固定層10a、10bの磁化方向は互いに平行であり、第1磁化自由層30a、30bの磁化方向は互いに反平行である。従って、第1の書き込み層群の第1磁化固定層10aと第1磁化自由層30aとの間を流れる書き込み電流Iwriteの方向は、第2の書き込み層群の第1磁化固定層10bと第1磁化自由層30bとの間を流れる書き込み電流Iwriteの方向と逆に設定される。つまり、一方の書き込み層群において、書き込み電流Iwriteが第1磁化固定層10から第1磁化自由層30へ流れるとき、他方の書き込み層群においては、書き込み電流Iwriteは第1磁化自由層30から第1磁化固定層10へ流れる。その結果、第1磁化自由層30a、30bの反平行磁化は共に反転する。図17Aで示される例では、書き込み電流Iwriteは、第1導電層70を経由して第1の書き込み層群と第2の書き込み層群の間に流され、その書き込み電流Iwriteの方向を変えることにより、“0”書き込みと“1”書き込みの両方を実現可能である。但し、書き込み電流Iwriteの導入方法はそれに限られない。 FIG. 17A shows an example of the write current Iwrite in the fourth modification. As described above, the magnetization directions of the first magnetization fixed layers 10a and 10b are parallel to each other, and the magnetization directions of the first magnetization free layers 30a and 30b are antiparallel to each other. Therefore, the direction of the write current Iwrite flowing between the first magnetization fixed layer 10a and the first magnetization free layer 30a of the first write layer group is the same as that of the first magnetization fixed layer 10b and the first magnetization fixed layer 10b of the second write layer group. It is set opposite to the direction of the write current Iwrite flowing between the magnetization free layer 30b. That is, when the write current Iwrite flows from the first magnetization fixed layer 10 to the first magnetization free layer 30 in one write layer group, the write current Iwrite is transferred from the first magnetization free layer 30 to the first magnetization free layer 30 in the other write layer group. 1 flows to the magnetization fixed layer 10. As a result, both antiparallel magnetizations of the first magnetization free layers 30a and 30b are reversed. In the example shown in FIG. 17A, the write current Iwrite is passed between the first write layer group and the second write layer group via the first conductive layer 70, and the direction of the write current Iwrite is changed. Thus, both “0” writing and “1” writing can be realized. However, the method for introducing the write current Iwrite is not limited thereto.
 データ読み出し時には、読み出し層群の第2磁化自由層40と第2磁化固定層60との間に読み出し電流Ireadが流される。読み出し層群への読み出し電流Ireadの導入方法は、適宜設計され得る。図17Bは、第4の変形例における読み出し電流Ireadの導入方法の一例を示している。図17Bで示された例では、読み出し電流Ireadは、第2の書き込み層群を経由して導入される。読み出し電流Ireadは、第1の書き込み層群を経由してもよいし、第1の書き込み層群と第2の書き込み層群の両方を経由しても構わない。 At the time of data reading, a read current Iread flows between the second magnetization free layer 40 and the second magnetization fixed layer 60 of the read layer group. The method of introducing the read current Iread into the read layer group can be designed as appropriate. FIG. 17B shows an example of a method for introducing the read current Iread in the fourth modification. In the example shown in FIG. 17B, the read current Iread is introduced via the second write layer group. The read current Iread may pass through the first write layer group, or may pass through both the first write layer group and the second write layer group.
 第4の変形例は、既出の変形例と組み合わせ可能である。また、第4の変形例によれば、次の効果が追加的に得られる。まず、読み出し信号が更に増大する。本変形例においては、第2磁化自由層40の磁化の回転に寄与する漏れ磁界の発生源である第1磁化自由層30が二つ以上設けられる。従って、第2磁化自由層40に作用する磁界の大きさは2倍以上となり、第2磁化自由層40の磁化はより大きく回転することになる。これにより、大きな磁気抵抗効果が発現され、大きな読み出し信号が得られる。 The fourth modification can be combined with the previous modification. Moreover, according to the 4th modification, the following effect is acquired additionally. First, the read signal further increases. In this modification, two or more first magnetization free layers 30 that are sources of leakage magnetic fields that contribute to the rotation of magnetization of the second magnetization free layer 40 are provided. Therefore, the magnitude of the magnetic field acting on the second magnetization free layer 40 is more than twice, and the magnetization of the second magnetization free layer 40 rotates more greatly. As a result, a large magnetoresistive effect is exhibited, and a large read signal is obtained.
 また、製造プロセスが簡略化される。すなわち、本変形例によれば、第1の書き込み層群と第2の書き込み層群は、同一工程で製造することが可能である。従って、製造工程数が削減され、製造コストが低減される。 Also, the manufacturing process is simplified. That is, according to this modification, the first writing layer group and the second writing layer group can be manufactured in the same process. Therefore, the number of manufacturing processes is reduced, and the manufacturing cost is reduced.
 本変形例において、図2のMRAM4用の磁気抵抗効果素子8の磁化自由層140、非磁性層150及び磁化固定層160を、読み出し層群の第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同一レイヤーに同一材料で同時に形成することができる。その場合、MRAM4とMRAM5とは、同一のプロセスでの形成が可能であり、プロセス数は増大しない。それにより、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 In this modification, the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 for the MRAM 4 in FIG. 2 are replaced with the second magnetization free layer 40 and the second nonmagnetic layer 50 of the readout layer group. In addition, the second magnetization fixed layer 60 and the second magnetization fixed layer 60 can be simultaneously formed using the same material. In that case, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
 同様にすれば、図9のMRAM4用の磁気抵抗効果素子8aについても、図9の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9dと磁気抵抗効果素子8aとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。同様に、図13のMRAM4用の磁気抵抗効果素子8bについても、図13の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9dと磁気抵抗効果素子8bとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。これらの場合でも、同一のプロセスでの形成が可能である。 Similarly, the semiconductor device 1 can be configured with the same combination as in FIG. 9 with respect to the magnetoresistive effect element 8a for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9d and the magnetoresistive effect element 8a according to this modification can be formed on the same chip at the same time with the same material and the same layer. Similarly, also for the magnetoresistive effect element 8b for the MRAM 4 in FIG. 13, the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9d and the magnetoresistive effect element 8b according to this modification can be formed on the same chip at the same time with the same material and the same layer. Even in these cases, formation by the same process is possible.
 (第5変形例)
 次に、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第5変形例の構成について説明する。第5変形例は、磁気抵抗効果素子9eを構成する第1磁化自由層30と第2磁化自由層40のxy平面内の位置関係に関する。磁気抵抗効果素子9dは、高集積・大容量(低電流)向けのMRAM5のメモリセルに用いられている。スピン偏極電流書き込み型のスピン注入磁化反転型の磁気抵抗効果素子である。
(5th modification)
Next, the configuration of the fifth modification example of the magnetoresistive effect element in each MRAM according to the embodiment of the present invention will be described. The fifth modification relates to the positional relationship in the xy plane between the first magnetization free layer 30 and the second magnetization free layer 40 constituting the magnetoresistive effect element 9e. The magnetoresistive effect element 9d is used in a memory cell of the MRAM 5 for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
 第5変形例に係る磁気抵抗効果素子9eは、第1磁化自由層30と第2磁化自由層40の位置関係は既出の例に限られない。xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30の重心G30に対して“第1の方向”に位置していればよい。 In the magnetoresistive effect element 9e according to the fifth modification, the positional relationship between the first magnetization free layer 30 and the second magnetization free layer 40 is not limited to the above-described example. In the xy plane, the center of gravity G40 of the second magnetization free layer 40 only needs to be positioned in the “first direction” with respect to the center of gravity G30 of the first magnetization free layer 30.
 図18A~図18Dは、本実施例に係る磁気抵抗効果素子の第5変形例の構成を模式的に示す概略図である。詳細には、図18Aは、磁気抵抗効果素子9eの構造の一例を示す斜視図である。図18B、図18C及び図18Dのそれぞれは、図18Aで示された構造のxy平面図、xz断面図及びyz断面図である。磁気抵抗効果素子9eで示される例では、xy平面における第1磁化自由層30と第2磁化自由層40とのずれ方向(第1の方向)が、第1導電層70の長手方向と異なっている。具体的には、第1導電層70の長手方向はx軸方向であり、第1の方向はx軸方向と異なるy軸方向である。すなわち、xy平面において、第2磁化自由層40の重心G40は、第1磁化自由層30の重心G30からy軸方向にずれている。従って、第1磁化自由層30からの放射状に広がる漏れ磁界により、第2磁化自由層40の磁化方向は一意に定まる。この場合、第2磁化自由層40の磁化方向は、第1磁化自由層30の磁化方向に応じて、+y方向あるいは-y方向の成分を持つ。第2磁化固定層60の磁化方向は、+y方向と-y方向のいずれか一方に固定されることが望ましい。 18A to 18D are schematic views schematically showing the configuration of a fifth modification of the magnetoresistive effect element according to this example. Specifically, FIG. 18A is a perspective view showing an example of the structure of the magnetoresistive effect element 9e. 18B, 18C, and 18D are respectively an xy plan view, an xz sectional view, and a yz sectional view of the structure shown in FIG. 18A. In the example shown by the magnetoresistive effect element 9e, the shift direction (first direction) between the first magnetization free layer 30 and the second magnetization free layer 40 in the xy plane is different from the longitudinal direction of the first conductive layer 70. Yes. Specifically, the longitudinal direction of the first conductive layer 70 is the x-axis direction, and the first direction is a y-axis direction different from the x-axis direction. That is, in the xy plane, the center G40 of the second magnetization free layer 40 is shifted from the center G30 of the first magnetization free layer 30 in the y-axis direction. Therefore, the magnetization direction of the second magnetization free layer 40 is uniquely determined by the leakage magnetic field that spreads radially from the first magnetization free layer 30. In this case, the magnetization direction of the second magnetization free layer 40 has a component in the + y direction or the −y direction depending on the magnetization direction of the first magnetization free layer 30. The magnetization direction of the second magnetization fixed layer 60 is preferably fixed in either the + y direction or the −y direction.
 本変形例において、図2のMRAM4用の磁気抵抗効果素子8の磁化自由層140、非磁性層150及び磁化固定層160を、磁気抵抗効果素子9eの読み出し層群の第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同一レイヤーに同一材料で同時に形成することができる。その場合、MRAM4とMRAM5とは、同一のプロセスでの形成が可能であり、プロセス数は増大しない。それにより、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 In this modification, the magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 for the MRAM 4 in FIG. 2 are replaced with the second magnetization free layer 40 of the readout layer group of the magnetoresistive effect element 9e, The second nonmagnetic layer 50 and the second magnetization fixed layer 60 can be simultaneously formed of the same material in the same layer. In that case, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
 同様にすれば、図9のMRAM4用の磁気抵抗効果素子8aについても、図9の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9eと磁気抵抗効果素子8aとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。同様に、図13のMRAM4用の磁気抵抗効果素子8bについても、図13の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9eと磁気抵抗効果素子8aとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。これらの場合でも、同一のプロセスでの形成が可能である。 Similarly, the semiconductor device 1 can be configured with the same combination as in FIG. 9 with respect to the magnetoresistive effect element 8a for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9e and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time using the same material with the same layers. Similarly, also for the magnetoresistive effect element 8b for the MRAM 4 in FIG. 13, the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9e and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time using the same material with the same layers. Even in these cases, formation by the same process is possible.
(第6変形例)
 次に、本発明の実施例に係る各MRAMにおける磁気抵抗効果素子の第6変形例の構成について説明する。第6の変形例では、磁気抵抗効果素子9fを構成する第2導電層80が省略される。磁気抵抗効果素子9dは、高集積・大容量(低電流)向けのMRAM5(書き込み電流が0.5mA以下であることが望ましい)のメモリセルに用いられている。スピン偏極電流書き込み型のスピン注入磁化反転型の磁気抵抗効果素子である。
(Sixth Modification)
Next, the configuration of a sixth modification of the magnetoresistive element in each MRAM according to the embodiment of the present invention will be described. In the sixth modification, the second conductive layer 80 constituting the magnetoresistive effect element 9f is omitted. The magnetoresistive effect element 9d is used in a memory cell of the MRAM 5 (desirably, the write current is 0.5 mA or less) for high integration and large capacity (low current). This is a spin-polarization current writing type spin-injection magnetization reversal type magnetoresistive effect element.
 図19A~図19Cは、本実施例に係る磁気抵抗効果素子の第6変形例の構成を模式的に示す概略図である。詳細には図19Aは、磁気抵抗効果素子9fの構造の一例を示す斜視図である。図19B及び図19Cのそれぞれは、図19Aで示された構造のxy平面図及びxz側面図である。図19A~図19Cに示されるように、第2導電層80は省略され、磁気抵抗効果素子9fは2端子の素子となる。この場合でも、第1磁化自由層30と第2磁化自由層40は磁気的に結合しており、また、第2磁化自由層40の重心G40は、第1磁化自由層30の重心G30からずれている。従って、第1磁化自由層30の磁化方向に応じて、第2磁化自由層40の磁化方向は一意に定まる。 FIGS. 19A to 19C are schematic views schematically showing the configuration of a sixth modification of the magnetoresistive effect element according to this example. Specifically, FIG. 19A is a perspective view showing an example of the structure of the magnetoresistive element 9f. 19B and 19C are respectively an xy plan view and an xz side view of the structure shown in FIG. 19A. As shown in FIGS. 19A to 19C, the second conductive layer 80 is omitted, and the magnetoresistive effect element 9f is a two-terminal element. Even in this case, the first magnetization free layer 30 and the second magnetization free layer 40 are magnetically coupled, and the center G40 of the second magnetization free layer 40 is shifted from the center G30 of the first magnetization free layer 30. ing. Therefore, the magnetization direction of the second magnetization free layer 40 is uniquely determined according to the magnetization direction of the first magnetization free layer 30.
 図20A及び図20Bは、本変形例における書き込み電流Iwrite及び読み出し電流Ireadの経路をそれぞれ示している。本変形例に係る磁気抵抗効果素子9fは2端子の素子であるため、データ書き込み時に書き込み層群に導入される書き込み電流Iwriteは、読み出し層群にも流れる。また、データ読み出し時に読み出し層群に導入される読み出し電流Ireadは、書き込み層群にも流れる。すなわち、書き込み電流Iwriteの経路と読み出し電流Ireadの経路は同一となる。 20A and 20B show paths of the write current Iwrite and the read current Iread in the present modification, respectively. Since the magnetoresistive effect element 9f according to this modification is a two-terminal element, the write current Iwrite introduced into the write layer group at the time of data writing also flows through the read layer group. Further, the read current Iread introduced into the read layer group at the time of data reading also flows through the write layer group. That is, the path of the write current Iwrite and the path of the read current Iread are the same.
 従って、データ読み出し時に、読み出し電流Ireadにより第1磁化自由層30においてスピン注入磁化反転が発生することを防止する必要がある。そのために、読み出し電流Ireadは小さく設定される。また、データ書き込み時に、書き込み電流Iwriteにより第2磁化自由層40においてスピン注入磁化反転が発生することを防止する必要がある。そのためには、読み出し層群(40、50、60)を流れる書き込み電流Iwriteの電流密度を、書き込み層群(10、20、30)を流れる書き込み電流Iwriteの電流密度よりも小さくすることが望ましい。例えば、読み出し層群のxy平面における面積は、書き込み層群のxy平面における面積より大きく設計される。 Therefore, it is necessary to prevent the spin injection magnetization reversal from occurring in the first magnetization free layer 30 due to the read current Iread when reading data. Therefore, the read current Iread is set small. Further, it is necessary to prevent the spin injection magnetization reversal from occurring in the second magnetization free layer 40 due to the write current Iwrite during data writing. For this purpose, it is desirable to make the current density of the write current Iwrite flowing through the read layer group (40, 50, 60) smaller than the current density of the write current Iwrite flowing through the write layer group (10, 20, 30). For example, the area of the read layer group in the xy plane is designed to be larger than the area of the write layer group in the xy plane.
 第6変形例によれば、磁気抵抗効果素子9fが2端子の素子となるため、1つのメモリセルあたり1つのトランジスタが設けられるとよい。第1磁化固定層10か第2磁化固定層60のいずれか一方に、トランジスタが接続されればよい。例えば、図7Aで示された回路構成から、トランジスタM2とビット線BL2を省くことができる。その結果、磁気メモリセルの面積が低減される。第6変形例は、他の変形例と組み合わせ可能である。 According to the sixth modification, since the magnetoresistive effect element 9f is a two-terminal element, it is preferable to provide one transistor per memory cell. A transistor may be connected to either the first magnetization fixed layer 10 or the second magnetization fixed layer 60. For example, the transistor M2 and the bit line BL2 can be omitted from the circuit configuration shown in FIG. 7A. As a result, the area of the magnetic memory cell is reduced. The sixth modification can be combined with other modifications.
 本変形例において、図2のMRAM4用の磁気抵抗効果素子8について、図2の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係ると磁気抵抗効果素子9fと磁気抵抗効果素子8は同一のチップ上に形成される。磁気抵抗効果素子8の磁化自由層140、非磁性層150及び磁化固定層160は、それぞれ磁気抵抗効果素子9fの第2磁化自由層40、第2非磁性層50及び第2磁化固定層60と同一レイヤーに同一材料で同時に形成される。すなわち、MRAM4とMRAM5とは、同一のプロセスでの形成が可能であり、プロセス数は増大しない。それにより、低コスト、且つ短時間で半導体装置1を製造することが可能となる。 In this modification, the semiconductor device 1 can be configured with the same combination as in FIG. 2 with respect to the magnetoresistive effect element 8 for the MRAM 4 in FIG. That is, according to this modification, the magnetoresistive effect element 9f and the magnetoresistive effect element 8 are formed on the same chip. The magnetization free layer 140, the nonmagnetic layer 150, and the magnetization fixed layer 160 of the magnetoresistive effect element 8 are the same as the second magnetization free layer 40, the second nonmagnetic layer 50, and the second magnetization fixed layer 60 of the magnetoresistive effect element 9f, respectively. The same layer and the same material are simultaneously formed. That is, the MRAM 4 and the MRAM 5 can be formed by the same process, and the number of processes does not increase. As a result, the semiconductor device 1 can be manufactured at a low cost and in a short time.
 同様にすれば、図9のMRAM4用の磁気抵抗効果素子8aについても、図9の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9fと磁気抵抗効果素子8aとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。同様に、図13のMRAM4用の磁気抵抗効果素子8bについても、図13の場合と同様の組み合わせで半導体装置1を構成することが出来る。すなわち、本変形例に係る磁気抵抗効果素子9fと磁気抵抗効果素子8bとを各層を同一レイヤーに同一材料で同時に同一のチップ上に形成することができる。これらの場合でも、同一のプロセスでの形成が可能である。 Similarly, the semiconductor device 1 can be configured with the same combination as in FIG. 9 with respect to the magnetoresistive effect element 8a for the MRAM 4 in FIG. That is, the magnetoresistive effect element 9f and the magnetoresistive effect element 8a according to the present modification can be formed on the same chip at the same time with the same material and the same layer. Similarly, also for the magnetoresistive effect element 8b for the MRAM 4 in FIG. 13, the semiconductor device 1 can be configured with the same combination as in FIG. That is, the magnetoresistive effect element 9f and the magnetoresistive effect element 8b according to the present modification can be formed on the same chip at the same time using the same material and the same layers. Even in these cases, formation by the same process is possible.
 これまでに説明された変形例以外にも、様々な変形例が考えられ得る。例えば、書き込み電流経路に、発熱効果を有する材料が挿入されてもよい。この場合、発熱により素子の温度が上昇し、データ書き込み時に熱アシスト記録効果が得られる。また、磁気抵抗効果素子の近傍に配線を配置し、その配線に電流を流すことにより誘起される磁界を、スピン注入磁化反転時のアシスト磁界として用いてもよい。 Other than the modifications described so far, various modifications can be considered. For example, a material having a heat generation effect may be inserted into the write current path. In this case, the temperature of the element rises due to heat generation, and a heat-assisted recording effect can be obtained at the time of data writing. Further, a magnetic field induced by arranging a wiring in the vicinity of the magnetoresistive effect element and passing a current through the wiring may be used as an assist magnetic field at the time of spin injection magnetization reversal.
 なお、以上には本発明の実施例、及びその様々な変形例が記載されているが、本発明は、上述の実施例及び変形例に限定して解釈されてはならない。上述の変形例は、矛盾しない限り、その複数が組み合わせて適用可能であることは、当業者には容易に理解されよう。 In addition, although the Example of this invention and its various modifications are described above, this invention should not be limited to the above-mentioned Example and modification. Those skilled in the art will readily understand that a plurality of the above-described modified examples can be applied in combination as long as there is no contradiction.
 以上、実施の形態を参照して本発明を説明したが、本発明は上記実施の形態に限定されるものではない。本発明の構成や詳細には、本発明のスコープ内で当業者が理解しうる様々な変更をすることができる。 Although the present invention has been described above with reference to the embodiment, the present invention is not limited to the above embodiment. Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.
 本発明の半導体装置は、メモリ混載型の半導体装置として、内部のメモリにおける高速処理と大容量処理とを両立させることができる。 The semiconductor device of the present invention can achieve both high-speed processing and large-capacity processing in the internal memory as a memory-embedded semiconductor device.
 この出願は、2008年3月7日に出願された特許出願番号2008-058494号の日本特許出願に基づいており、その出願による優先権の利益を主張し、その出願の開示は、引用することにより、そっくりそのままここに組み込まれている。 This application is based on Japanese Patent Application No. 2008-058494 filed on Mar. 7, 2008, claiming the benefit of priority from that application, the disclosure of that application should be cited Is incorporated here as it is.

Claims (22)

  1.  第1メモリセルを有する第1磁気ランダムアクセスメモリと、
     前記第1メモリセルと比較して高速で動作する第2メモリセルを有し、前記第1磁気ランダムアクセスメモリと同一チップ内に設けられた第2磁気ランダムアクセスメモリとを具備し、
     前記第1メモリセルは、
     磁化方向が固定された第1磁化固定層と、
     磁化方向が反転可能な第1磁化自由層と、
     前記第1磁化固定層と前記第1磁化自由層とに挟まれた第1非磁性層と、
     磁化方向が固定された第2磁化固定層と、
     磁化方向が反転可能な第2磁化自由層と、
     前記第2磁化固定層と前記第2磁化自由層とに挟まれた第2非磁性層と
     を備え、
     前記第1磁化固定層と前記第1磁化自由層は、強磁性体から構成され、且つ、垂直磁気異方性を有し、
     前記第2磁化固定層と前記第2磁化自由層は、強磁性体から構成され、且つ、面内磁気異方性を有し、
     前記第1磁化自由層と前記第2磁化自由層は、互いに磁気的に結合しており、
     各層に平行な第1平面において、前記第2磁化自由層の重心は、前記第1磁化自由層の重心からずれ、
     前記第2磁化固定層の磁化方向は、前記第1磁化自由層と前記第2磁化自由層との間の重心のずれ方向と略平行あるいは略反平行であり、
     前記第2メモリセルは、
      第3磁化自由層と、
      第3磁化固定層と、
      前記第3磁化自由層と前記第3磁化固定層との間に設けられた第3非磁性層とを備え、
      前記第3磁化自由層及び前記第3磁化固定層は、強磁性体から構成されている
     半導体装置。
    A first magnetic random access memory having first memory cells;
    A second magnetic random access memory having a second memory cell operating at a higher speed than the first memory cell, and provided in the same chip as the first magnetic random access memory;
    The first memory cell includes
    A first magnetization fixed layer having a fixed magnetization direction;
    A first magnetization free layer whose magnetization direction is reversible;
    A first nonmagnetic layer sandwiched between the first magnetization fixed layer and the first magnetization free layer;
    A second magnetization fixed layer having a fixed magnetization direction;
    A second magnetization free layer whose magnetization direction is reversible;
    A second nonmagnetic layer sandwiched between the second magnetization fixed layer and the second magnetization free layer,
    The first magnetization fixed layer and the first magnetization free layer are made of a ferromagnetic material and have perpendicular magnetic anisotropy,
    The second magnetization fixed layer and the second magnetization free layer are made of a ferromagnetic material and have in-plane magnetic anisotropy,
    The first magnetization free layer and the second magnetization free layer are magnetically coupled to each other;
    In the first plane parallel to each layer, the center of gravity of the second magnetization free layer is shifted from the center of gravity of the first magnetization free layer;
    The magnetization direction of the second magnetization fixed layer is substantially parallel or substantially anti-parallel to the direction of displacement of the center of gravity between the first magnetization free layer and the second magnetization free layer,
    The second memory cell includes
    A third magnetization free layer;
    A third magnetization fixed layer;
    A third nonmagnetic layer provided between the third magnetization free layer and the third magnetization fixed layer;
    The third magnetization free layer and the third magnetization fixed layer are made of a ferromagnetic material.
  2.  請求の範囲1に記載の半導体装置であって、
     前記第3磁化自由層及び前記第3磁化固定層は、面内磁気異方性を有し、
     前記第2磁化自由層と前記第3磁化自由層とは、同一のレイヤーに設けられ、
     前記第2磁化固定層と前記第3磁化固定層とは、別の同一のレイヤーに設けられている
     半導体装置。
    A semiconductor device according to claim 1,
    The third magnetization free layer and the third magnetization fixed layer have in-plane magnetic anisotropy,
    The second magnetization free layer and the third magnetization free layer are provided in the same layer,
    The second magnetization fixed layer and the third magnetization fixed layer are provided in different same layers.
  3.  請求の範囲2に記載の半導体装置であって、
     前記第1メモリセルは、前記第1磁化自由層と前記第1磁化固定層との間に書き込み電流が流され、前記第2磁化自由層と前記第2磁化固定層との間に読み出し電流が流される
     半導体装置。
    A semiconductor device according to claim 2,
    In the first memory cell, a write current flows between the first magnetization free layer and the first magnetization fixed layer, and a read current flows between the second magnetization free layer and the second magnetization fixed layer. A semiconductor device that is swept away.
  4.  請求の範囲1乃至3のいずれか一項に記載の半導体装置であって、
     前記第2メモリセルは、前記第3磁化固定層に書き込み電流が流れる
     半導体装置。
    A semiconductor device according to any one of claims 1 to 3,
    In the second memory cell, a write current flows through the third magnetization fixed layer.
  5.  請求の範囲1乃至3のいずれか一項に記載の半導体装置であって、
     前記第2メモリセルは、前記第3磁化自由層の近傍に設けられ、書き込み電流が流れる書き込み配線を更に含む
     半導体装置。
    A semiconductor device according to any one of claims 1 to 3,
    The second memory cell further includes a write wiring provided in the vicinity of the third magnetization free layer and through which a write current flows.
  6.  請求の範囲1乃至3のいずれか一項に記載の半導体装置であって、
     前記第2メモリセルは、前記第3磁化固定層を挟んで前記第2非磁性層と反対側に設けられ、強磁性体から構成された第4磁化自由層を更に含み、前記第3磁化固定層に書き込み電流が流れる
     半導体装置。
    A semiconductor device according to any one of claims 1 to 3,
    The second memory cell further includes a fourth magnetization free layer that is provided on the opposite side of the second nonmagnetic layer with the third magnetization fixed layer interposed therebetween, and is made of a ferromagnetic material. A semiconductor device in which a write current flows in a layer.
  7.  請求の範囲1乃至6のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、前記第1平面において、前記第1磁化固定層の面積は、前記第1磁化自由層の面積より大きい
     半導体装置。
    A semiconductor device according to any one of claims 1 to 6,
    In the first memory cell, the area of the first magnetization fixed layer is larger than the area of the first magnetization free layer in the first plane.
  8.  請求の範囲1乃至7のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、前記第1平面において、前記第2磁化固定層の面積は、前記第2磁化自由層の面積より小さい
     半導体装置。
    A semiconductor device according to any one of claims 1 to 7,
    In the first memory cell, the area of the second magnetization fixed layer is smaller than the area of the second magnetization free layer in the first plane.
  9.  請求の範囲1乃至8のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、前記第1磁化自由層と前記第2磁化自由層の間に挟まれた第1導電層を更に備える
     半導体装置。
    A semiconductor device according to any one of claims 1 to 8,
    The first memory cell further includes a first conductive layer sandwiched between the first magnetization free layer and the second magnetization free layer.
  10.  請求の範囲9に記載の半導体装置であって、
     前記第1メモリセルは、前記第1導電層が磁性体で形成される
     半導体装置。
    A semiconductor device according to claim 9,
    In the first memory cell, the first conductive layer is formed of a magnetic material. Semiconductor device.
  11.  請求の範囲1乃至8のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、前記第2磁化自由層が前記第1磁化自由層の一方の面に接触している
     半導体装置。
    A semiconductor device according to any one of claims 1 to 8,
    In the first memory cell, the second magnetization free layer is in contact with one surface of the first magnetization free layer.
  12.  請求の範囲11に記載の半導体装置であって、
     前記第1メモリセルは、前記第2磁化自由層に電気的に接続された第2導電層を更に備える
     半導体装置。
    A semiconductor device according to claim 11,
    The first memory cell further includes a second conductive layer electrically connected to the second magnetization free layer. Semiconductor device.
  13.  請求の範囲1乃至11のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、前記第1磁化自由層と前記第1磁化固定層との間に書き込み電流が流れ、更に、前記第2磁化自由層と前記第2磁化固定層との間にも流れる
     半導体装置。
    A semiconductor device according to any one of claims 1 to 11,
    In the first memory cell, a write current flows between the first magnetization free layer and the first magnetization fixed layer, and further flows between the second magnetization free layer and the second magnetization fixed layer. Semiconductor device.
  14.  請求の範囲13に記載の半導体装置であって、
     前記第1メモリセルは、前記第2磁化自由層と前記第2磁化固定層との間に流れる前記書き込み電流の電流密度が、前記第1磁化自由層と前記第1磁化固定層との間に流れる前記書き込み電流の電流密度より小さい
     半導体装置。
    A semiconductor device according to claim 13,
    In the first memory cell, a current density of the write current flowing between the second magnetization free layer and the second magnetization fixed layer is between the first magnetization free layer and the first magnetization fixed layer. A semiconductor device smaller than a current density of the flowing write current.
  15.  請求の範囲1乃至11のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、複数の書き込み層群を備え、
     前記複数の書き込み層群の各々が、前記第1磁化固定層、前記第1磁化自由層、及び前記第1非磁性層を有する
     半導体装置。
    A semiconductor device according to any one of claims 1 to 11,
    The first memory cell includes a plurality of write layer groups,
    Each of the plurality of write layer groups includes the first magnetization fixed layer, the first magnetization free layer, and the first nonmagnetic layer.
  16.  請求の範囲15に記載の半導体装置であって、
     前記第1メモリセルは、前記複数の書き込み層群が、第1書き込み層群と第2書き込み層群を含み、
     前記第1平面において、前記第2磁化自由層の重心は、前記第1書き込み層群の前記第1磁化自由層の重心と前記第2書き込み層群の前記第1磁化自由層の重心との間に位置する
     半導体装置。
    A semiconductor device according to claim 15,
    In the first memory cell, the plurality of write layer groups include a first write layer group and a second write layer group,
    In the first plane, the center of gravity of the second magnetization free layer is between the center of gravity of the first magnetization free layer of the first writing layer group and the center of gravity of the first magnetization free layer of the second writing layer group. Located in the semiconductor device.
  17.  請求の範囲16に記載の半導体装置であって、
     前記第1メモリセルは、前記第1平面において、前記第1書き込み層群の前記第1磁化自由層の重心と、前記第2磁化自由層の重心と、前記第2書き込み層群の前記第1磁化自由層の重心が、一直線上に並ぶ
     半導体装置。
    A semiconductor device according to claim 16, comprising:
    The first memory cell includes, in the first plane, a center of gravity of the first magnetization free layer of the first write layer group, a center of gravity of the second magnetization free layer, and the first of the second write layer group. A semiconductor device in which the center of gravity of the magnetization free layer is aligned.
  18.  請求の範囲16又は17に記載の半導体装置であって、
     前記第1メモリセルは、前記第1書き込み層群の前記第1磁化自由層の磁化方向が、前記第2書き込み層群の前記第1磁化自由層の磁化方向と反平行である
     半導体装置。
    A semiconductor device according to claim 16 or 17,
    In the first memory cell, the magnetization direction of the first magnetization free layer of the first write layer group is antiparallel to the magnetization direction of the first magnetization free layer of the second write layer group.
  19.  請求の範囲18に記載の半導体装置であって、
     前記第1メモリセルは、前記第1書き込み層群の前記第1磁化固定層の磁化方向が、前記第2書き込み層群の前記第1磁化固定層の磁化方向と平行である
     半導体装置。
    A semiconductor device according to claim 18,
    In the first memory cell, the magnetization direction of the first magnetization fixed layer of the first write layer group is parallel to the magnetization direction of the first magnetization fixed layer of the second write layer group.
  20.  請求の範囲19に記載の半導体装置であって、
     前記第1メモリセルは、前記第1書き込み層群と前記第2書き込み層群の各々において、前記第1磁化自由層と前記第1磁化固定層との間に書き込み電流が流され、
     前記第1書き込み層群を流れる前記書き込み電流の方向は、前記第2書き込み層群を流れる前記書き込み電流の方向の逆である
     半導体装置。
    A semiconductor device according to claim 19, wherein
    In the first memory cell, a write current is passed between the first magnetization free layer and the first magnetization fixed layer in each of the first write layer group and the second write layer group,
    The direction of the write current flowing through the first write layer group is opposite to the direction of the write current flowing through the second write layer group.
  21.  請求の範囲1乃至20のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、前記第2非磁性層が、Mg-Oを含有する
     半導体装置。
    A semiconductor device according to any one of claims 1 to 20,
    In the first memory cell, the second nonmagnetic layer contains Mg—O. Semiconductor device
  22.  請求の範囲1乃至21のいずれか一項に記載の半導体装置であって、
     前記第1メモリセルは、前記第2磁化自由層と前記第2磁化固定層のうちの少なくとも一つが、Co-Fe-Bを含有する
     半導体装置。
    A semiconductor device according to any one of claims 1 to 21,
    In the first memory cell, at least one of the second magnetization free layer and the second magnetization fixed layer contains Co—Fe—B.
PCT/JP2009/054127 2008-03-07 2009-03-05 Semiconductor device WO2009110530A1 (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011037143A1 (en) * 2009-09-28 2011-03-31 日本電気株式会社 Magnetic memory
JP2011091342A (en) * 2009-10-26 2011-05-06 Nec Corp Magnetoresistive element and magnetic domain wall random access memory
WO2012127722A1 (en) * 2011-03-22 2012-09-27 ルネサスエレクトロニクス株式会社 Magnetic memory
JPWO2011118461A1 (en) * 2010-03-23 2013-07-04 日本電気株式会社 Magnetic memory
JP2013201220A (en) * 2012-03-23 2013-10-03 Toshiba Corp Magnetic memory
JP5985728B1 (en) * 2015-09-15 2016-09-06 株式会社東芝 Magnetic memory
JP2017059594A (en) * 2015-09-14 2017-03-23 株式会社東芝 Magnetic memory

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005116888A (en) * 2003-10-09 2005-04-28 Toshiba Corp Magnetic memory
JP2007258460A (en) * 2006-03-23 2007-10-04 Nec Corp Magnetic memory cell, magnetic random access memory, semiconductor device, and method for manufacturing the same
WO2009054180A1 (en) * 2007-10-25 2009-04-30 Nec Corporation Magnetoresistive effect element and magnetic random access memory

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005116888A (en) * 2003-10-09 2005-04-28 Toshiba Corp Magnetic memory
JP2007258460A (en) * 2006-03-23 2007-10-04 Nec Corp Magnetic memory cell, magnetic random access memory, semiconductor device, and method for manufacturing the same
WO2009054180A1 (en) * 2007-10-25 2009-04-30 Nec Corporation Magnetoresistive effect element and magnetic random access memory

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5472832B2 (en) * 2009-09-28 2014-04-16 日本電気株式会社 Magnetic memory
WO2011037143A1 (en) * 2009-09-28 2011-03-31 日本電気株式会社 Magnetic memory
JPWO2011037143A1 (en) * 2009-09-28 2013-02-21 日本電気株式会社 Magnetic memory
JP2011091342A (en) * 2009-10-26 2011-05-06 Nec Corp Magnetoresistive element and magnetic domain wall random access memory
JPWO2011118461A1 (en) * 2010-03-23 2013-07-04 日本電気株式会社 Magnetic memory
JP5486731B2 (en) * 2011-03-22 2014-05-07 ルネサスエレクトロニクス株式会社 Magnetic memory
WO2012127722A1 (en) * 2011-03-22 2012-09-27 ルネサスエレクトロニクス株式会社 Magnetic memory
US9508923B2 (en) 2011-03-22 2016-11-29 Renesas Electronics Corporation Magnetic memory using spin orbit interaction
US9082497B2 (en) 2011-03-22 2015-07-14 Renesas Electronics Corporation Magnetic memory using spin orbit interaction
JP2013201220A (en) * 2012-03-23 2013-10-03 Toshiba Corp Magnetic memory
JP2017059594A (en) * 2015-09-14 2017-03-23 株式会社東芝 Magnetic memory
US9916882B2 (en) 2015-09-14 2018-03-13 Kabushiki Kaisha Toshiba Magnetic memory
US9985201B2 (en) 2015-09-14 2018-05-29 Kabushiki Kaisha Toshiba Magnetic memory based on spin hall effect
JP5985728B1 (en) * 2015-09-15 2016-09-06 株式会社東芝 Magnetic memory

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