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WO2006039029A3 - Procede pour former une couche dielectrique a haute permittivite complete mince - Google Patents

Procede pour former une couche dielectrique a haute permittivite complete mince Download PDF

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Publication number
WO2006039029A3
WO2006039029A3 PCT/US2005/030841 US2005030841W WO2006039029A3 WO 2006039029 A3 WO2006039029 A3 WO 2006039029A3 US 2005030841 W US2005030841 W US 2005030841W WO 2006039029 A3 WO2006039029 A3 WO 2006039029A3
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WO
WIPO (PCT)
Prior art keywords
layer
substrate
forming
complete high
thick
Prior art date
Application number
PCT/US2005/030841
Other languages
English (en)
Other versions
WO2006039029A2 (fr
Inventor
Cory Wajda
Original Assignee
Tokyo Electron Ltd
Tokyo Electron America Inc
Cory Wajda
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd, Tokyo Electron America Inc, Cory Wajda filed Critical Tokyo Electron Ltd
Priority to JP2007534604A priority Critical patent/JP2008515223A/ja
Publication of WO2006039029A2 publication Critical patent/WO2006039029A2/fr
Publication of WO2006039029A3 publication Critical patent/WO2006039029A3/fr

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    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
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    • H01L21/02181Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
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    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
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    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823857Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

L'invention concerne un procédé pour former une couche diélectrique à haute permittivité (high-k) complète mince (106, 207) pour des applications à semi-conducteurs. Ce procédé consiste à placer un substrat (25, 102, 202, 406) dans une chambre de traitement (10, 402), à déposer une couche 'high-k' complète épaisse (206) sur ce substrat (25, 102, 202, 406) et à amincir la couche 'high-k' déposée (206) pour former une couche 'high-k' complète mince (106, 207) sur ledit substrat (25, 102, 202, 406). En variante, ce substrat (25, 102, 202, 406) peut contenir une couche d'interface (104, 204) entre le substrat (25, 102, 202, 406) et la couche 'high-k' (106, 207). L'amincissement peut être réalisé en soumettant la couche 'high-k' épaisse (206) à un processus de gravure par plasma réactif ou, en variante, à un processus par plasma capable de modifier une partie de la couche 'high-k' épaisse (206) puis en retirant la partie modifiée (206a) de la couche 'high-k' épaisse (206) par voie humide.
PCT/US2005/030841 2004-09-30 2005-08-31 Procede pour former une couche dielectrique a haute permittivite complete mince WO2006039029A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007534604A JP2008515223A (ja) 2004-09-30 2005-08-31 薄い一面の高誘電率誘電体層の形成方法

Applications Claiming Priority (2)

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US10/711,721 2004-09-30
US10/711,721 US20060068603A1 (en) 2004-09-30 2004-09-30 A method for forming a thin complete high-permittivity dielectric layer

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WO2006039029A2 WO2006039029A2 (fr) 2006-04-13
WO2006039029A3 true WO2006039029A3 (fr) 2006-07-27

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JP (1) JP2008515223A (fr)
KR (1) KR20070067079A (fr)
CN (1) CN101032004A (fr)
TW (1) TWI270140B (fr)
WO (1) WO2006039029A2 (fr)

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JP2009512995A (ja) * 2005-10-20 2009-03-26 アンテルユニヴェルシテール・ミクロ−エレクトロニカ・サントリュム・ヴェー・ゼッド・ドゥブルヴェ 高誘電率誘電体層を形成するための方法
US7390708B2 (en) * 2006-10-23 2008-06-24 Interuniversitair Microelektronica Centrum (Imec) Vzw Patterning of doped poly-silicon gates
US8084087B2 (en) * 2007-02-14 2011-12-27 The Board Of Trustees Of The Leland Stanford Junior University Fabrication method of size-controlled, spatially distributed nanostructures by atomic layer deposition
TW200842950A (en) * 2007-02-27 2008-11-01 Sixtron Advanced Materials Inc Method for forming a film on a substrate
US7790628B2 (en) * 2007-08-16 2010-09-07 Tokyo Electron Limited Method of forming high dielectric constant films using a plurality of oxidation sources
US7964515B2 (en) * 2007-12-21 2011-06-21 Tokyo Electron Limited Method of forming high-dielectric constant films for semiconductor devices
WO2009084194A1 (fr) * 2007-12-28 2009-07-09 Tokyo Electron Limited Procédé de gravure pour film métallique et film d'oxyde métallique, et procédé de fabrication de dispositif à semi-conducteur
WO2009120327A1 (fr) * 2008-03-24 2009-10-01 The Board Of Trustees Of The Leland Stanford Junior University Appareil pour dépôt de nanostructures assisté par microscope à force atomique
JP2010074065A (ja) * 2008-09-22 2010-04-02 Canon Anelva Corp 酸化膜除去のための基板洗浄処理方法
CN102064103A (zh) * 2010-12-02 2011-05-18 上海集成电路研发中心有限公司 高k栅介质层的制备方法
US8951829B2 (en) 2011-04-01 2015-02-10 Micron Technology, Inc. Resistive switching in memory cells
JP5801676B2 (ja) * 2011-10-04 2015-10-28 東京エレクトロン株式会社 半導体装置の製造方法
CN103311120A (zh) * 2013-06-03 2013-09-18 中国科学院微电子研究所 一种生长高介电常数电介质叠层的方法
US9425078B2 (en) * 2014-02-26 2016-08-23 Lam Research Corporation Inhibitor plasma mediated atomic layer deposition for seamless feature fill
US9667303B2 (en) * 2015-01-28 2017-05-30 Lam Research Corporation Dual push between a host computer system and an RF generator
KR20240146494A (ko) * 2023-03-29 2024-10-08 성균관대학교산학협력단 플라즈마 화학 기상 증착법 기반 강유전성 결정구조 유도를 통한 강유전체 제조방법

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TWI270140B (en) 2007-01-01
CN101032004A (zh) 2007-09-05
KR20070067079A (ko) 2007-06-27
TW200623264A (en) 2006-07-01
JP2008515223A (ja) 2008-05-08
WO2006039029A2 (fr) 2006-04-13
US20060068603A1 (en) 2006-03-30

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