WO2006007803A1 - Gekühlte integrierte schaltung - Google Patents
Gekühlte integrierte schaltung Download PDFInfo
- Publication number
- WO2006007803A1 WO2006007803A1 PCT/DE2004/001577 DE2004001577W WO2006007803A1 WO 2006007803 A1 WO2006007803 A1 WO 2006007803A1 DE 2004001577 W DE2004001577 W DE 2004001577W WO 2006007803 A1 WO2006007803 A1 WO 2006007803A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- cooling channel
- integrated circuit
- line
- cooling
- substrate layers
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0272—Adaptations for fluid transport, e.g. channels, holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/1423—Monolithic Microwave Integrated Circuit [MMIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/1627—Disposition stacked type assemblies, e.g. stacked multi-cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/064—Fluid cooling, e.g. by integral pipes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09981—Metallised walls
Definitions
- the invention relates to an integrated circuit having a plurality of substrate layers, active and / or passive components within the substrate layers, with high-frequency leads routed to the components through the substrate layers, and with cooling channels for heat dissipation.
- Such a three-dimensionally integrated structure in a multi-layer substrate such as a LTCC low-temperature-sintering multilayer ceramic, simultaneously fulfills the following function:
- RF radio frequency
- the object of the invention is therefore to provide an improved integrated circuit.
- the object is achieved according to the invention with the integrated circuit according to the invention in that the cooling channels are simultaneously formed as a high-frequency line.
- the interior of the multi-layer substrate is more effectively eliminated. uses and creates clearance for other functional blocks or components within and / or on the surface of the multi-layer substrate.
- electrically conductive layer elements Adjacent to the cooling channels or on the walls of the cooling channels preferably electrically conductive layer elements are provided to form a high-frequency line.
- the layer elements can be arranged, for example, to form a microstrip line, a coplanar line or a waveguide.
- the walls of the cooling channel therefore do not need to be completely metallised. Rather, extending in the longitudinal direction of the cooling channels extending conductor elements which adjoin the walls of the cooling channels. Only in the special case of a waveguide, the walls of the cooling channel are completely metallized.
- a coaxial line can be formed by at least one further electrical conductor, which extends in the longitudinal direction in the interior of a cooling channel designed as a hollow conductor.
- a triplate line can be formed with an electrical conductor extending in the longitudinal direction in the interior of the cooling channel will be realized.
- the high-frequency line with a plurality of vias arranged next to each other to form by the substrate layers adjacent to the cooling channels is realized by the substrate layers adjacent to the cooling channels extending via fences.
- FIG. 1 shows a sectional view of an integrated circuit in the form of a multi-chip module with a combined high-frequency and coolant line;
- FIG. 2 shows a cross-sectional view through a substrate with different embodiments of high-frequency lines realized with cooling channels
- Figure 3 Perspective view of an embodiment of ade ⁇ channel with adjacent via fences to form a Hoch ⁇ frequency conductor.
- FIG. 1 shows an integrated circuit 1 in the form of a multi-chip module with a plurality of substrate layers 2a, 2b, 2c, 2d stacked one above the other.
- Active and passive components 3a, 3b, 3c, 3d are mounted on an upper substrate layer 2a or integrated in substrate layers 2c, 2d.
- Bumbs 4a, 4b, 4c may be provided for external contacting.
- vias 5a, 5b can be seen, which extend through the substrates 2b, 2c, 2d and are connected to line structures for forming an integrated passive functional block 3e, such as, for example, a capacitance or an inductance.
- a cooling channel 6 is installed, whose upper and lower walls have electrically conductive layer elements 7 in the form of metallization of the walls.
- Parallel to the lateral walls ofdeka ⁇ nals 6 are electrically conductive layer elements 7 in the form of via fences 7b, which are formed of a plurality of juxtaposed and extending through the substrate 2b Vias.
- a cooling inlet line 8a and a cooling outlet line 8b extend through the substrate 2b, which communicate with the cooling channel 6, respectively.
- the lateral coolant supply creates sufficient space for active and passive components 3 as well as interfaces to other carrier substrates on the upper and lower sides of the integrated circuit 1.
- the available free space within the integrated circuit 1 can be used for passive integration.
- FIG. 2 shows a cross-sectional view through an integrated circuit 1 with a multiplicity of cooling channels 6a to 6i.
- a strip conductor 9 extending in the longitudinal direction of the cooling channel 6a is provided above the cooling channel 6a. Opposite is located on the underside of the cooling channel 6a, a metal surface 7 as an electrically conductive layer element.
- the cooling channel is realized as a microstrip conductor.
- a cooling channel 6b above the cooling channel 6b, there are three strips Ie iter 9 at a distance from one another, which strips likewise extend in the longitudinal direction of the cooling channel 6b.
- the underside of the cooling channel 6b is closed with a metal surface as an electrically conductive layer element 7.
- the cooling channel is realized as a coplanar line with rear ground metallization.
- stripline 9 is only above the cooling channel 6c. Compared to the second embodiment of the cooling channel 6b, no metal surface is provided on the underside of the cooling channel 6c. This realizes a coplanar line.
- a fourth embodiment of the cooling channel 6d is designed as a waveguide in that all four walls of the cooling channel 6d are metallised.
- Thedeka ⁇ nal 6 d is thus completely completed by electrically conductive layer elements 7.
- a fifth embodiment of a cooling channel 6e is formed in a corresponding manner as a waveguide.
- another conductor extends on a substrate web 1 1, which is only required for the mechanical stabilization of the electrical inner conductor 10. This realizes a coaxial line in the cooling channel 6e.
- a sixth embodiment shows a cooling channel 6f with an electrical inner conductor 10, which is also supported above and below substrate webs 11.
- the cooling channel 6f only the upper and lower walls of the cooling channel 6f have electrically conductive surfaces as layer elements 7.
- the side walls of the cooling channel 6f are approximately neutral for high-frequency waves. This realizes a triplate line.
- a seventh embodiment shows a cooling passage 6g according to the fifth embodiment.
- the electrical inner conductor 10 is in this case carried only by a substrate web 1 1 and not by a substrate plane.
- An eighth embodiment shows a cooling channel 6h, in which the electrical inner conductor 10 is supported by a substrate plate which extends between the side walls of the cooling channel 6h. Thus, the space above and below the substrate plate 11 remains free for the conduction ofmé ⁇ media.
- a ninth embodiment shows a cooling channel 6i, the upper side of which is closed off by a metal layer as an electrically conductive layer element 7.
- the underside of the cooling channel 6i are, as in the second embodiment, associated with side by side and in the longitudinal direction of the cooling channel 6i extending electrical conductor 10 associated with which are buried in the substrate 2.
- a metal surface is arranged below the conductor 10 as a second electrically conductive layer element 7.
- cooling channels 6 with combined high-frequency lines can easily be designed by skilled persons with known means, depending on the requirements, in particular with regard to the limiting frequencies.
- Millimeter-wave-capable technologies for frequencies up to 1 10 GHz are known from the prior art.
- the cooling channels 6 are filled or flowed through with a suitable medium.
- the cooling channel / high-frequency line structures can also be used for lower frequencies without the cross-sectional dimensions becoming too large.
- the available coolants used in multichip modules are suitable for use in combined cooling channel / high-frequency line structures due to their low to moderate dielectric losses (loss tangent ⁇ between 0.001 and 0.08) and a dielectric constant between 1.75 and 7 suitable.
- FIG. 3 shows such an embodiment of a cooling channel 6j embedded between an upper and a lower substrate 2e, 2f in analogy to the fourth embodiment with cooling channel 6d.
- an aperture-coupled coplanar line 12 is provided, which sits on top of the cooling channel 6j.
- a plurality of vias 13 are arranged side by side next to the cooling channel 6j, each forming a via fence. Furthermore, corresponding vias 13 are provided on the front side of the cooling channel 6j for terminating the high-frequency line formed by the via fences.
- a cooling channel supply line 8a is performed between two vias 13 or an opening in the ground planes.
- the influence of the coolant supply line 8a and coolant discharge line 8b on the high-frequency properties remains low.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE112004002975T DE112004002975A5 (de) | 2004-07-20 | 2004-07-20 | Gekühlte integrierte Schaltung |
US11/572,216 US20080093731A1 (en) | 2004-07-20 | 2004-07-20 | Cooled Integrated Circuit |
EP04762427A EP1787326A1 (de) | 2004-07-20 | 2004-07-20 | Gekühlte integrierte schaltung |
PCT/DE2004/001577 WO2006007803A1 (de) | 2004-07-20 | 2004-07-20 | Gekühlte integrierte schaltung |
CNA200480043627XA CN101036226A (zh) | 2004-07-20 | 2004-07-20 | 被冷却的集成电路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/DE2004/001577 WO2006007803A1 (de) | 2004-07-20 | 2004-07-20 | Gekühlte integrierte schaltung |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006007803A1 true WO2006007803A1 (de) | 2006-01-26 |
Family
ID=34958299
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2004/001577 WO2006007803A1 (de) | 2004-07-20 | 2004-07-20 | Gekühlte integrierte schaltung |
Country Status (5)
Country | Link |
---|---|
US (1) | US20080093731A1 (de) |
EP (1) | EP1787326A1 (de) |
CN (1) | CN101036226A (de) |
DE (1) | DE112004002975A5 (de) |
WO (1) | WO2006007803A1 (de) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016071324A1 (en) * | 2014-11-03 | 2016-05-12 | At & S Austria Technologie & Systemtechnik Aktiengesellschaft | Hermetically sealed heat pipe structure synthesized with support structure and method for producing it |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101594739A (zh) * | 2008-05-27 | 2009-12-02 | 华为技术有限公司 | 器件埋入式电路板散热装置及加工方法 |
WO2011006101A2 (en) * | 2009-07-10 | 2011-01-13 | Coolsilicon Llc | Devices and methods providing for intra-die cooling structure reservoirs |
FR2987495B1 (fr) * | 2012-02-23 | 2014-02-14 | Thales Sa | Canaux de circulation d'un fluide dans une carte imprimee a structure multicouche |
FR2987545B1 (fr) * | 2012-02-23 | 2015-02-06 | Thales Sa | Circuit imprime de structure multicouche comprenant des lignes de transmission a faibles pertes dielectriques et son procede |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0402052A2 (de) * | 1989-06-05 | 1990-12-12 | Gec-Marconi Limited | Stütze für Signalträger |
EP0801433A1 (de) * | 1996-04-12 | 1997-10-15 | Harris Corporation | Steifenleiter mit Luft als Dielektrikum |
US5724012A (en) * | 1994-02-03 | 1998-03-03 | Hollandse Signaalapparaten B.V. | Transmission-line network |
US5737458A (en) * | 1993-03-29 | 1998-04-07 | Martin Marietta Corporation | Optical light pipe and microwave waveguide interconnects in multichip modules formed using adaptive lithography |
US20020011349A1 (en) * | 2000-05-15 | 2002-01-31 | Hans Kragl | Circuit board and method of manufacturing a circuit board |
JP2004128179A (ja) * | 2002-10-02 | 2004-04-22 | Hitachi Cable Ltd | 配線板及び電子装置、ならびに配線板の製造方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020185726A1 (en) * | 2001-06-06 | 2002-12-12 | North Mark T. | Heat pipe thermal management of high potential electronic chip packages |
-
2004
- 2004-07-20 DE DE112004002975T patent/DE112004002975A5/de not_active Withdrawn
- 2004-07-20 CN CNA200480043627XA patent/CN101036226A/zh active Pending
- 2004-07-20 WO PCT/DE2004/001577 patent/WO2006007803A1/de active Application Filing
- 2004-07-20 US US11/572,216 patent/US20080093731A1/en not_active Abandoned
- 2004-07-20 EP EP04762427A patent/EP1787326A1/de not_active Withdrawn
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0402052A2 (de) * | 1989-06-05 | 1990-12-12 | Gec-Marconi Limited | Stütze für Signalträger |
US5737458A (en) * | 1993-03-29 | 1998-04-07 | Martin Marietta Corporation | Optical light pipe and microwave waveguide interconnects in multichip modules formed using adaptive lithography |
US5724012A (en) * | 1994-02-03 | 1998-03-03 | Hollandse Signaalapparaten B.V. | Transmission-line network |
EP0801433A1 (de) * | 1996-04-12 | 1997-10-15 | Harris Corporation | Steifenleiter mit Luft als Dielektrikum |
US20020011349A1 (en) * | 2000-05-15 | 2002-01-31 | Hans Kragl | Circuit board and method of manufacturing a circuit board |
JP2004128179A (ja) * | 2002-10-02 | 2004-04-22 | Hitachi Cable Ltd | 配線板及び電子装置、ならびに配線板の製造方法 |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 2003, no. 12 5 December 2003 (2003-12-05) * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016071324A1 (en) * | 2014-11-03 | 2016-05-12 | At & S Austria Technologie & Systemtechnik Aktiengesellschaft | Hermetically sealed heat pipe structure synthesized with support structure and method for producing it |
Also Published As
Publication number | Publication date |
---|---|
CN101036226A (zh) | 2007-09-12 |
US20080093731A1 (en) | 2008-04-24 |
EP1787326A1 (de) | 2007-05-23 |
DE112004002975A5 (de) | 2007-07-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE69223871T2 (de) | Konstantimpedanzübergang zwischen Übertragungsstrukturen verschiedener Grössen | |
DE69514130T2 (de) | Verbindung zwischen Schichten mit Leiterstreifen oder Mikrostreifen mittels eines Hohlraum gestützten Schlitzes | |
DE602004001041T2 (de) | Aktive elektronisch gescannte antenne (aesa) mit niedrigem profil für ka-band-radarsysteme | |
DE69622066T2 (de) | Senkrecht verbindende Anordnung aus einer Leitung mit drei Drähten für Mehrebenensubstrate | |
EP2308274B1 (de) | Leiterplatine mit elektronischem bauelement | |
DE69715715T2 (de) | Streifenleiter mit Luft als Dielektrikum | |
DE10350346B4 (de) | Hochfrequenzleitungs-Wellenleiter-Konverter und Hochfrequenzpaket | |
DE69430829T2 (de) | Mehrchipmodul und Herstellungsverfahren dafür | |
DE60318106T2 (de) | Phasengesteuerte Gruppenantenne für im Weltraum stationiertes Radar | |
DE602004008653T2 (de) | Flexible konforme antenne | |
DE102019105487A1 (de) | Mikrowellenantennenvorrichtung und Mikrowellenantennenbaugruppe | |
DE10336171B3 (de) | Multichip-Schaltungsmodul und Verfahren zur Herstellung hierzu | |
DE4027072C2 (de) | Halbleiteranordnung | |
DE102011077206B4 (de) | Leiterplatte und Steuergerät für ein Getriebe eines Fahrzeugs mit der Leiterplatte | |
DE10133660A1 (de) | Hochintegriertes mehrschichtiges Schaltkreismodul mit keramischen Substraten mit eingebetteten passiven Komponenten | |
DE3887649T2 (de) | Schaltbarer Übergang zwischen einer Mikrostreifen- und einer Streifenleitung. | |
DE69734846T2 (de) | Frequenzweiche für Zweiband-Mobilfunkendgeräte | |
DE102006023123A1 (de) | Halbleitermodul mit Komponenten für Höchstfrequenztechnik in Kunststoffgehäuse und Verfahren zur Herstellung desselben | |
DE102014115313B4 (de) | Leiterplatte, Millimeterwellensystem und Verfahren zum Betreiben eines Millimeterwellensystems | |
DE69932899T2 (de) | Übertragungsleitung und Übertragungsleitungsresonator | |
DE102016113946A1 (de) | PCB-basiertes Halbleitergehäuse mit integrierter elektrischer Funktionalität | |
DE112009001891T5 (de) | Hochfrequenzsubstrat und Hochfrequenzmodul | |
DE112019006351T5 (de) | Mehrschichtfilter, umfassend eine durchkontaktierung mit geringer induktivität | |
WO1995011580A1 (de) | Anordnung bestehend aus einer leiterplatte | |
DE112021006420T5 (de) | Dual-polarisiertes magnetoelektrisches Antennenarray |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2004762427 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 11572216 Country of ref document: US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 200480043627.X Country of ref document: CN |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1120040029759 Country of ref document: DE |
|
WWP | Wipo information: published in national office |
Ref document number: 2004762427 Country of ref document: EP |
|
REF | Corresponds to |
Ref document number: 112004002975 Country of ref document: DE Date of ref document: 20070712 Kind code of ref document: P |
|
WWP | Wipo information: published in national office |
Ref document number: 11572216 Country of ref document: US |