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WO2005041286A1 - Method for forming wiring, method for manufacturing thin film transistor and droplet discharging method - Google Patents

Method for forming wiring, method for manufacturing thin film transistor and droplet discharging method Download PDF

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Publication number
WO2005041286A1
WO2005041286A1 PCT/JP2004/016181 JP2004016181W WO2005041286A1 WO 2005041286 A1 WO2005041286 A1 WO 2005041286A1 JP 2004016181 W JP2004016181 W JP 2004016181W WO 2005041286 A1 WO2005041286 A1 WO 2005041286A1
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WO
WIPO (PCT)
Prior art keywords
forming
region
liquid
lyophilic
repellent
Prior art date
Application number
PCT/JP2004/016181
Other languages
French (fr)
Inventor
Shinji Maekawa
Shunpei Yamazaki
Koji Muranaka
Yuko Tachimura
Original Assignee
Semiconductor Energy Laboratory Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co., Ltd. filed Critical Semiconductor Energy Laboratory Co., Ltd.
Priority to KR1020067010373A priority Critical patent/KR101166358B1/en
Priority to US10/575,492 priority patent/US7968461B2/en
Publication of WO2005041286A1 publication Critical patent/WO2005041286A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01—Ink jet
    • B41J2/135—Nozzles
    • B41J2/14—Structure thereof only for on-demand ink jet heads
    • B41J2/14016—Structure of bubble jet print heads
    • B41J2/14088—Structure of heating means
    • B41J2/14112—Resistive element
    • B41J2/14129—Layer structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/1292—Multistep manufacturing methods using liquid deposition, e.g. printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support

Definitions

  • the present invention relates to a method for forming a wiring and a method for manufacturing a thin film transistor or semiconductor device by dropping a composition including a material of an object to be formed. Specifically, the invention relates to a method for forming a wiring and a method for manufacturing a thin film transistor by a droplet discharging method (an ink-jetting method), and further, the droplet discharging method.
  • a droplet discharging method typified by a piezo method or a thermal jet method, or a continuous type droplet discharging method attracts attention.
  • a method of forming a film pattern is proposed by Reference 1: the method makes it possible to improve a method of forming a film pattern by an ink-jetting method, make a film thicker, and make a line thinner. Further, problems such as disconnection or short-circuit are not caused in the case of using a conductive film
  • Reference 1 Japanese Patent Laid Open No. 2003-133691.
  • a substrate is treated in advance so that a contact angle with a droplet is 60 degree, and a droplet is discharged over a whole area for forming a wiring at a larger interval than a diameter of the droplet attached on the substrate, in a first discharging step.
  • a droplet is discharged at a position in the whole area for forming a wiring in a second discharging step, which is different from the position discharged in the first discharging step, at the same interval.
  • a droplet is discharged over the whole area for forming a wiring at a smaller interval than the interval in the first discharging step.
  • plasma exposure in a normal pressure or in vacuum is cited as a surface treatment for controlling a contact angle.
  • Gases used in the plasma treatment can be selected in consideration of a material of a substrate surface on which a conductive wiring is to be formed, and treatment gases such as methane tetrafluoride, penTuorohexane or perfluorodecane can be used, for example, according to Reference 1. It is required that a line width of a wiring is prevented from being wider to be miniaturized when the wiring or the like is formed by a method typified by an ink-jetting method, as described above.
  • an object of the invention is to provide a method for nanowing (miniaturizing) a line width according to a method different from the method described in Reference 1.
  • another object of the invention is to provide a method for forming elements other than a wiring, e.g. a semiconductor film, an insulating film, a mask, and the like by a method typified by an ink-jetting method, and provide a method for nanowing (miniaturizing) a line width thereof.
  • a region to be liquid-repellent is formed on a surface to be provided with a pattern thereon. Also, in accordance another feature of the invention, a region to be lyophilic is formed on a selected region of a surface and then a droplet of a composition is applied to the selected region for forming a pattern such as a wiring.
  • the composition may include a conductive material dissolved or dispersed in a solution.
  • a region to be liquid-repellent liquid-repellent region
  • a region to be lyophilic lyophilic region
  • a pattern for a wiring or the like is formed in the lyophilic region by a method for dropping (dropping method) a composition (including a composition dissolved or dispersed with a conductor in a solution) mixed with a conductive material for a wiring or the like.
  • a piezo method can be employed as an ink-jetting method.
  • a piezo method is also used in inkjet printers since it is superior in a droplet controllability and has higher degree of freedom in selecting an ink.
  • MLP Multi Layer Piezo
  • MLChip Multi Layer Ceramic Hyper Integrated Piezo Segments
  • an ink-jetting method using a so-called thermal method may be employed depending on a material of a solution, which pushes out the solution by generating bubbles by heating a heat-generator.
  • a liquid-repellent treatment is performed on a surface for forming an element, a lyophilic treatment is performed selectively on the surface that is exposed to the liquid-repellent treatment, and then, a wiring or the like is formed by a dropping method on the surface that is selectively exposed to the lyophilic treatment, according to the invention.
  • a liquid-repellent property is a state that is low in wettability to water, alcohol or oil and other liquids.
  • a lyophilic property is a property of a region that is comparatively less liquid-repellent than a liquid-repellent region.
  • a wiring or the like can be formed in the region, thereby nanowing (miniaturizing) a line width accompanying with miniaturization of the region.
  • the plasma treatment is performed under conditions as follows: air, oxygen or nitrogen is used as a treatment gas, the pressure is several tens of Ton to 1000 Ton (133000 Pa), preferably, 100(13300 Pa) to lOOOTon (133000 Pa), further preferably, 700 Ton (93100 Pa) to 800 Ton (106400 Pa).
  • a dielectric is provided between an electrode used for a plasma treatment and an object (an object to be treated) for the plasma treatment.
  • the dielectric is exposed to plasma, and contributes to surface modification of a surface for forming an element.
  • an electrode provided with a dielectric may be prepared and plasma may be generated so that the dielectric is exposed to plasma.
  • a whole surface of the electrode is not necessarily covered with the dielectric.
  • Teflon a registered trademark
  • a treatment gas is air, oxygen or nitrogen.
  • a plasma treatment using oxygen as a treatment gas can be employed for removing a mask for patterning a semiconductor film or the like, which is preferable.
  • concrete pulse voltage is resonated to be applied, like each damped oscillation wave, as a damped oscillation waveform periodic wave in which the damped oscillation wave is generated repeatedly and intermittently.
  • a pair of plus pulse and minus pulse is supplied to a primary side of a high-voltage transformer with repetition frequency, and the damped oscillation waveform periodic wave which is resonated as each damped oscillation wave is outputted from a secondary side of the high-voltage transformer to be applied to a pair of electrodes.
  • the voltage rise time of each resonated damped oscillation wave is preferably 5 ⁇ s or less at the time.
  • the repetition period of the damped oscillation wave is preferably 10 to 100kHz.
  • the pulse is preferably 100 to 10000 pps (10000 times per second).
  • a film containing Teflon or a silane coupling agent is formed on a surface for forming an element.
  • a film containing Teflon (Teflon film) can be formed by a sputtering method or a CVD method.
  • a film containing a silane coupling agent can be formed by a spin-coating method.
  • a film containing fluorine such as Teflon or a silane coupling agent is preferably formed to be a mono molecular layer level, i.g. 5 nm or less in thickness. This is because the film containing fluorine is unnecessary in forming a thin film transistor and it is to be easily removed.
  • the film containing fluorine can be removed by a heat treatment or a patterning treatment.
  • a heat treatment or a patterning treatment surface modification of a surface for forming a conductive film is made.
  • a lyophilic region is formed selectively.
  • Light irradiation may be performed to form the lyophilic region.
  • the lyophilic region is formed by selective inadiation of laser light.
  • the laser light preferably has a wavelength that can be absorbed in a surface where the lyophilic region is to be formed.
  • laser light having an ultraviolet region wavelength that is absorbed in the glass substrate where a lyophilic region is formed is preferably used.
  • laser light oscillated by a gas laser oscillator, a solid laser oscillator, a metal laser oscillator or a semiconductor laser oscillator can be used.
  • an Ar laser, a Kr laser, an excimer laser (XeCl, XeF, KrF), a CO 2 laser, a YAG laser, a Y 2 O 3 laser, a YVO 4 laser, a YLE laser, a YAlO 3 laser, a glass laser, a ruby laser, a sapphire laser and the like can be used.
  • a unit for adjusting a beam shape or a beam course of laser light emitted from a laser oscillator can be provided between a laser oscillator and an object to be inadiated, that is, a surface for forming an element.
  • a concave lens, a convex lens, a micro lens anay, a cylindrical lens anay or the like can be used as the unit for adjusting a beam shape of laser light emitted from a laser oscillator.
  • a minor, a half minor, other reflectors can be used as the unit for adjusting a beam course of laser light.
  • a minute lyophilic region can be formed by selective inadiation of laser light by using an optical pickup element or a fiber.
  • laser light is not necessarily specialized in coherent light produced by a laser oscillator.
  • a lyophilic region can be formed in the same manner as the laser inadiation by light emitted from a UV lamp, a halogen lamp, a flash lamp or the like.
  • a blow treatment for blowing an ozone gas onto a surface for forming an element may be performed. Corona discharge or glow discharge may be performed on a surface for forming an element .
  • a wiring is formed by dropping a composition including a wiring material onto a lyophilic region by a dropping method. Consequently, a line width becomes narrow and miniaturization can be achieved. Since a composition including a wiring material has high wettability to a lyophilic region, the composition moves to the lyophilic region even when it is dropped on a liquid-repellent region that is out of the lyophilic region to some extent. Thus, a wiring can be miniaturized and more straight.
  • a wiring can be formed in a lyophilic region, which can prevent a liquid from accumulating (a pool of liquid) after dropping a composition. Therefore, the wiring can be formed with an even width.
  • a composition including a composition dissolved or dispersed with a conductor in a solvent
  • a conductor material for forming a wiring
  • a photolithography step such as light-exposure or development of a mask for patterning the wiring
  • an etching step for patterning the wiring can be omitted.
  • Such a step of discharging a composition is preferably performed under low pressure.
  • the solvent of the composition is evaporated until the composition lands on an object to be treated since it is discharged, and thus, steps of drying and baking the composition can be both omitted. It is preferable to perform the step under low pressure, since an oxide film or the like is not formed on the surface of the conductive material.
  • the step of dropping a composition may be performed in a nitrogen atmosphere or an organic gas atmosphere. At this time, the composition is discharged to be a dot shape (droplet) or a pillar shape by a series of dots; however, they are collectively refened to as a dot (droplet). Discharging a dot (droplet) means that a dot-like droplet or a pillar-like droplet is discharged.
  • a pillar-like (dot) droplet is discharged in some cases without being recognized as a dot.
  • Gold (Au), silver (Ag), copper (Cu), platinum (Pt), palladium (Pd), tungsten (W), nickel (Ni), tantalum (Ta), bismuth (Bi), lead (Pb), indium (In), tin (Sn), zinc (Zn), titanium (Ti), aluminum (Al), an alloy thereof, a dispersive nanoparticle thereof, or a silver halide particle can be used as the conductive material.
  • silver or copper which is low resistant is preferably used.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ITSO in which silicon oxide (SiO 2 ) of 2 % to 20 % is mixed into indium oxide
  • organic indium, organotin, titanium nitride (TiN), or the like can be also used as a transparent conductive material.
  • a lyophilic treatment and dropping a dot can be performed in the same treatment chamber by using a droplet discharging apparatus (an ink-jetting apparatus) in which a droplet discharging unit for discharging a dot and a unit for light inadiation (light inadiation unit) are provided integrally. Consequently, manufacturing time can be shortened. Further, a unit for a liquid-repellent treatment may be provided in the same treatment chamber. In addition, a multi-chamber apparatus in which a treatment chamber for a liquid-repellent treatment and a treatment chamber provided with a droplet discharging unit and a light inadiation unit are provided, may be formed.
  • a multi-chamber apparatus in which a treatment chamber for a liquid-repellent treatment, a treatment chamber for a lyophilic treatment, and a treatment chamber for discharging a dot are provided, may be used.
  • One feature of the invention is that a minute wiring is formed by a dropping method typified by an ink-jetting method.
  • a structure of a thin film transistor for forming a wiring, or the like is not limited.
  • a thin film transistor may have either a crystalline semiconductor film or an amorphous semiconductor film and may be either a bottom gate type in which a gate electrode is formed under a semiconductor film or a top gate type in which a gate electrode is formed over a semiconductor film.
  • a gate electrode, a source electrode, a drain electrode and each wiring connected to the electrodes of a thin film transistor are formed by a dropping method typified by an ink-jetting method, a liquid-repellent treatment and a selective lyophilic treatment are performed and then, a dot is dropped onto the region that are exposed to the treatments, thereby achieving miniaturization.
  • a liquid-repellent treatment and a selective lyophilic treatment may be performed on a surface for forming a mask or the like, for example.
  • a surface for forming an element by a dropping method typified by an ink-jetting method is liquid-repellent and a lyophilic region is selectively formed therein, thereby miniaturizing the element by a dropping method typified by an ink-jetting method.
  • elements formed by a dropping method typified by an ink-jetting method electrodes such as a gate electrode, a source electrode a drain electrode, and a pixel electrode, wirings such as a source wiring, and a drain wiring, a semiconductor film, a mask for patterning a semiconductor film are given.
  • a liquid-repellent treatment and a selective lyophilic treatment are performed in the case of employing a dropping method typified by an ink-jetting method at least in one step among manufacturing steps of forming a thin film transistor. Consequently, miniaturization can be achieved.
  • a liquid-repellent region can be formed by a plasma treatment using a treatment gas of air, oxygen, or nitrogen without materials dependence, in this manner. Thereafter, a lyophilic region is formed selectively, thereby miniaturizing a wiring or the like formed by a dropping method typified by an ink-jetting method. Consequently, a liquid-repellent treatment and a selective lyophilic treatment can be performed on every material.
  • One feature of the present invention is that a liquid-repellent treatment and a selective lyophilic treatment are performed on a surface for forming an element in one step of forming a pattern of a mask, a wiring or the like by a dropping method typified by an ink-jetting method.
  • a wiring is not necessarily formed by a dropping method typified by an ink-jetting method after a liquid-repellent treatment and a selective lyophilic treatment, and a treatment of the invention may be performed when a minute pattern is required to be formed by a dropping method typified by an ink-jetting method.
  • a large number of panels can be formed from a mother glass, and thus, it is expected that the cost of a panel be lowered.
  • a photo mask becomes unnecessary, and reduction of costs such as a facility investment cost can be achieved. Further, manufacturing time can be shortened since a photolithography step becomes unnecessary. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced by a dropping method typified by an ink-jetting method. It is preferable that a dropping method typified by an ink-jetting method is applied to a large-size substrate, in this way.
  • FIGS. IA to IF are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 2A to 2C are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 3 A to 3F are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 4A to 4F are each a cross-sectional of a thin film transistor according to one aspect of the invention
  • FIGS. 5 A to 5F are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. IA to IF are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 2A to 2C are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 3 A to 3F are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 6A to 6D are each a cross-sectional view of a thin film transistor according to one aspect of the present invention
  • FIGS. 7A to 7C are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIG. 8 is a cross-sectional view showing a liquid crystal display device according to one aspect of the invention
  • FIGS. 9A and 9B are an equivalent circuit diagram and a top view each showing a pixel of a light emitting device, respectively, according to one aspect of the invention
  • FIG. 10 is a cross-sectional view of a light-emitting device, according to one aspect of the invention
  • FIG. 11 is a top view of a display device according to one aspect of the present invention
  • FIGS. 12A and 12B are each a cross-sectional view of a display device according to one aspect of the invention
  • FIGS. 13A to 13C show electronic devices according to one aspect of the invention
  • FIGS. 14A to 14D are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 15 A and 15B each show a plasma unit according to one aspect of the invention
  • FIG. 16 shows a droplet discharging apparatus according to one aspect of the invention
  • FIG. 17 shows a droplet discharging apparatus according to one aspect of the invention
  • FIGS. 18A to 18E are each a cross-sectional view of a thin film transistor according to one aspect of the invention
  • FIGS. 19A and 19B are each a top view of a display device according to one aspect of the invention.
  • FIG. 20 is a cross-sectional view of a thin film transistor according to one aspect of the invention.
  • FIGS. 21A and 21B are each a cross-sectional view of a thin film transistor according to one aspect of the invention.
  • a TFT has three terminals, a gate, a source and a drain, but it is difficult to precisely distinguish a source terminal (source electrode) from a drain terminal (drain electrode) in a TFT structure. Therefore, one of a source electrode and a drain electrode is refened to as a first electrode and the other is refened to as a second electrode, in describing a connection between elements.
  • Embodiment Mode 1 An example of a method for manufacturing a thin film transistor is described in Embodiment Mode 1.
  • a substrate 100 having an insulating surface is prepared.
  • a glass substrate such as a barium borosilicate glass or an alumino borosilicate glass, a quartz substrate, a stainless substrate or the like can be used for the substrate 100.
  • a substrate made of plastic typified by polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), polyeter sulfone (PES) and a substrate made of synthetic resin having flexibility such as acryl tend to have worse heat-resistance than other types of substrates.
  • a substrate made of flexible synthetic resin is easy to use when a thin film transistor including an amorphous semiconductor film, for which a heat treatment for crystallization of a semiconductor film is not required, is formed.
  • a base film is formed on the substrate 100 as necessary. The base film is formed in order to prevent an alkaline metal such as Na or an alkaline earth metal contained in the substrate 100 from spreading in a semiconductor film and exerting an adverse influence on semiconductor element characteristics.
  • the base film can be therefore formed by using an insulating film such as silicon oxide, silicon nitride, silicon oxynitride, titanium oxide, or titanium nitride, which is capable of suppressing the spread of an alkaline metal or an alkaline earth metal into the semiconductor film.
  • the base film can be formed by using a conductive film such as titanium.
  • the conductive film is oxidized by a heat treatment or the like in a manufacturing step in some cases.
  • a material of the base film may employ the one having high adhesiveness with a gate electrode material.
  • a base film made of titanium oxide (TiO x ) is preferably formed when Ag is used for the gate electrode.
  • the base film 101 may have a single layer structure or a laminated structure.
  • a base film is not necessarily provided, as long as it is possible to prevent impurities from diffusing into a semiconductor film.
  • a base film is not needed since the gate insulating film can have a function of preventing impurities from diffusing into the semiconductor film.
  • a base film is preferably provided depending on a material of the substrate.
  • a base film in order to prevent impurity diffusion in the case of using a substrate that contains a certain amount of an alkaline metal or an alkaline earth metal, such as a glass substrate, a stainless substrate or a plastic substrate.
  • a base film is not necessarily provided when using a quartz substrate or the like, for which impurity diffusion does not cause a problem.
  • a plasma treatment is performed on a surface for forming a gate electrode.
  • a plasma treatment is performed on the substrate. The plasma treatment is desirably performed without being in contact with a surface for forming a gate electrode.
  • the plasma treatment is performed by using air, oxygen, or nitrogen as a treatment gas under the pressure of several tens of Ton to 800 Ton (106400 Pa), preferably, 700 Ton (93100 Pa) to 800 Ton (atmospheric pressure or pressure in the neighborhood of atmospheric pressure).
  • an RF source or an AC source can be used as a power supply of the plasma treatment.
  • plasma is generated by varying power by applying voltage with an AC source under conditions of alternate voltage of 100 V, frequency of 13.56 MHz and the like. Pulse is applied with an interval of voltage width of 2 to 4 ⁇ sec to discharge stable plasma.
  • surface modification is made so as to be liquid-repellent, that is, low in wettability, to liquid such as alcohol or oil.
  • a liquid-repellent region is formed by a plasma treatment.
  • a lyophilic region is formed in the liquid-repellent region selectively.
  • a region in which a gate electrode is to be formed is selectively inadiated with laser light, thereby making the region in which the gate electrode is to be formed lyophilic.
  • a conductive film serving as a gate electrode 103 is formed in the lyophilic region by dropping a dot mixed with a conductor in a solvent by an ink-jetting method, as shown in FIG. lC.
  • a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped.
  • the gate electrode formed by an ink-jetting method can be miniaturized by dropping a dot in the lyophilic region that is selectively formed. After that, when the solvent of the dot is required to remove, a heat treatment for baking or drying is conducted. Specifically, a heat treatment is conducted preferably in an atmosphere containing oxygen at a predetermined temperature, e.g. 200 °C to 300 °C. At the time, heating temperature is set in order not to produce unevenness on a surface of the gate electrode.
  • a predetermined temperature e.g. 200 °C to 300 °C.
  • heating temperature is set in order not to produce unevenness on a surface of the gate electrode.
  • silver (Ag) that does riot include an organic material can be obtained, since an organic material such as thermosetting resin of an adhesive agent, etc.
  • the gate electrode can be made of an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material mainly containing the element, in addition to silver (Ag).
  • the conductive film can be formed by sputtering or plasma CVD instead of an ink-jetting method.
  • a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus or an AgPdCu alloy can be used as the conductive film formed by sputtering or plasma CVD.
  • an insulating film which serves as a gate insulating film 104 is formed to cover the gate electrode.
  • the insulating film can have a laminated structure or a single layer structure.
  • An insulator such as silicon oxide, silicon nitride or silicon oxynitride can be formed as the insulating film by plasma CVD. Note that a dot including a material of an insulating film may be discharged by an ink-jetting method to form the gate insulating film.
  • the gate electrode is made of silver (Ag)
  • a semiconductor film 105 is formed over the gate insulating film.
  • the semiconductor film can be formed by a plasma CVD method, a sputtering method, an ink-jetting method or the like.
  • the semiconductor film is 25 to 200 nm thick (preferably, 30 to 60 nm).
  • Silicon germanium as well as silicon can be used for the material of the semiconductor film. In the case of using silicon germanium, the concentration of germanium is preferably about 0.01 to 4.5 atomic %.
  • the semiconductor film may be an amorphous semiconductor, a semi-amorphous semiconductor in which crystal grains are dispersed in an amorphous semiconductor or a micro crystal semiconductor in which crystal grains of 0.5 nm to 20 nm can be seen in an amorphous semiconductor.
  • a state of a micro crystal in which crystal grains of 0.5 nm to 20 nm can be seen is refened to as a micro crystal ( ⁇ c).
  • Semi-amorphous silicon using silicon also refened to as SAS
  • SAS as a material of a semi-amorphous semiconductor can be obtained by grow discharge decomposition of a suicide gas.
  • SiH 4 is cited, besides, Si 2 H 6 , SiH 2 Cl 2 , SiHCl 3 , SiC , SiF 4 and the like can be used.
  • SAS can be formed easily by a suicide gas diluted with hydrogen, or hydrogen and one or more rare gas elements selected from helium, argon, krypton, and neon. The suicide gas is preferably diluted so that the dilution rate is in the range of 10 times to 1000 times. SAS can be also formed with Si 2 H 6 and GeF 4 by a method of diluting them with a helium gas.
  • the reactive formation of a film by grow discharge decomposition is preferably conducted under low pressure, and the pressure may be about 0.1 Pa to 133 Pa.
  • the power for grow discharge may be 1 MHz to 120 MHz, preferably, a high frequency power of 13 MHz to 60 MHz.
  • the substrate heating temperature is preferably 300 °C or less, and more preferably, substrate heating temperature of 100 °C to 250 °C is recommended.
  • an amorphous semiconductor film also, referred to as an amorphous silicon film or amorphous silicon
  • a semiconductor film having one conductivity type is formed.
  • the semiconductor film having one conductivity type can be formed by using a plasma CVD method, a sputtering method, an ink-jetting method or the like.
  • a semiconductor film having N type conductivity 106 is formed by plasma CVD.
  • the semiconductor film 105, the semiconductor film having N type conductivity 106, and a gate insulating film are preferably formed sequentially. The sequential formation is possible by varying a material gas supply without being exposed to the atmosphere. As shown in FIG. IE, the semiconductor film 105 and the semiconductor film having N type conductivity 106 are patterned into a desired shape.
  • a mask may be formed at a desired portion and the films may be etched by using the mask.
  • the mask is preferably formed by an ink-jetting method, since efficiency in the use of a material can be improved and a cost and an amount of waste liquid can be reduced.
  • the mask may be formed by a photolithography method.
  • a photolithography step can be simplified. In other words, a step of forming a photomask, a light-exposure step and the like are not required, and therefore, a facility investment cost can be reduced and manufacturing time can be shortened.
  • a plasma treatment may be performed on a surface for forming the mask to form a liquid-repellent region, and then, the mask may be formed in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized.
  • an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride
  • a photosensitive or non-photosensitive organic material such as polyimide, acryl, polyamide, polyimidamide, polyvinyl alcohol, benzocyclobutene or resist
  • a photosensitive or non-photosensitive organic material such as polyimide, acryl, polyamide, polyimidamide, polyvinyl alcohol, benzocyclobutene or resist
  • polyimide when a mask is formed from polyimide by an ink-jetting method, polyimide may be discharged at a desired portion by an ink-jetting method and then may be heat-treated at 150 °C to 300 °C to be baked. Thereafter, the semiconductor film 105 and the semiconductor film having N type conductivity 106 are etched by using the mask. A plasma treatment is performed to remove the mask after etching. Note that the mask formed by an ink-jetting method may serve as an insulting film without being removed. A plasma treatment may be conducted on a surface for forming a source electrode and a drain electrode.
  • a plasma treatment is performed on the semiconductor film having N type conductivity, which is a surface for forming a source electrode and a drain electrode, and the gate insulating film.
  • the plasma treatment may be performed without being in contact with the surface for forming the source electrode and the drain electrode.
  • surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil.
  • a liquid-repellent region is formed by the plasma treatment.
  • the source and drain wiring can be miniaturized.
  • a conductive film functioning as a source electrode and a drain electrode 108 is formed.
  • the conductive film may have a single layer structure or a laminated structure.
  • a film made of an element selected from gold, silver, copper, aluminum, titanium, molybdenum, tungsten or silicon or an alloy film using the element can be used.
  • the conductive film can be formed by an ink-jetting method, a CVD method or a sputtering method.
  • the conductive film is formed by using a dot including silver (Ag) by an ink-jetting method. Specifically, it is performed similarly to the case of forming the gate electrode shown in FIG. lC.
  • a lyophilic region may be selectively formed in the liquid-repellent region in the case of miniaturizing the source electrode and the drain electrode as shown in FIGS. 2A to 2C.
  • a plasma treatment is performed on a semiconductor film having N type conductivity that is a surface for forming a source electrode and a drain electrode, and a gate insulating film as shown in FIG. 2A
  • a lyophilic region is formed by selective inadiation of laser light as shown in FIG. 2B. After that, as shown in FIG.
  • a source and drain electrode 108 is formed by dropping a dot onto the lyophilic region. Consequently, a line width of the source and drain electrode formed by an ink-jetting method can be more miniaturized.
  • a liquid-repellent treatment by a plasma treatment or the like is performed, or further, a selective lyophilic treatment can be performed in a step of forming an electrode, a wiring or the like that is required to be miniaturized. Consequently, the electrode, the wiring or the like can be miniaturized.
  • a heat treatment for baking or drying is performed, when the solvent of the dot is required to remove.
  • the semiconductor film having N type conductivity 106 is etched by using the source and drain electrode as a mask. This is because the semiconductor film having N type conductivity prevents the source electrode and the drain electrode from being short-circuited.
  • the semiconductor film 105 can be also etched to some extent in some cases.
  • a thin film transistor in which up to the source and drain electrode has been provided is formed.
  • the thin film transistor in this embodiment mode is a so-called bottom gate type thin film transistor, in which a gate electrode is formed under a semiconductor film. More in detail, it is a so-called channel etch type, in which a semiconductor film is etched to some extent.
  • a substrate where such plural thin film transistors are formed is refened to as a TFT substrate.
  • a liquid-repellent treatment and a selective lyophilic treatment are performed before at least one step of forming a conductive film by an ink-jetting method.
  • the liquid-repellent treatment and the selective lyophilic treatment are performed before forming a gate electrode, a source electrode and a drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment plasma treatment may be performed before at least one ink-jetting step.
  • the liquid-repellent treatment and the selective lyophilic treatment plasma treatment may be performed before an ink-jetting step which is not shown in this embodiment mode.
  • a method of miniaturizing a wiring or the like by performing a liquid-repellent treatment such as a plasma treatment may be combined.
  • a step of forming a wiring or the like by an ink-jetting method after performing a liquid-repellent treatment and a selective a lyophilic treatment and a step of forming a wiring or the like by an ink-jetting method after performing only a liquid-repellent treatment may be combined.
  • a thin film transistor including gate, source and drain electrodes that are miniaturized by a liquid-repellent treatment and a selective lyophilic treatment before an ink-jetting step can be obtained.
  • a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent.
  • a position of a wiring to be formed can be controlled with accuracy.
  • Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method.
  • steps in the case of forming a mask by an ink-jetting method are more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • Embodiment Mode 2 A method for manufacturing a thin film transistor which has a structure different from that in Embodiment Mode 1 is described in Embodiment Mode 2.
  • the structure different from that in Embodiment Mode 1 is that a protective film is formed over a semiconductor film. Therefore, other manufacturing methods may be refened to Embodiment Mode 1 and detailed description thereof is omitted.
  • a plasma treatment is performed on a substrate 100 having an insulating surface.
  • a base film may be formed on the substrate 100 as necessary.
  • surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquids such as water, alcohol and oil.
  • a liquid-repellent region is formed by the plasma treatment. Thereafter, a lyophilic region is selectively formed in the liquid-repellent region, as shown FIG. 3B.
  • a region where a gate electrode is to be formed is selectively inadiated with laser light, thereby making the region lyophilic.
  • a gate electrode 103 is formed on the base film, a gate insulating film 104 is formed to cover the gate electrode, and a semiconductor film 105 is formed on the gate insulating film.
  • a heat treatment for baking or drying is performed, when the solvent of a dot is required to remove.
  • a protective film 110 is formed on the semiconductor film.
  • An insulating film such as silicon oxide, silicon nitride, or silicon oxynitride is formed as the protective film by an ink-jetting method, a plasma CVD method, a sputtering method or the like.
  • the semiconductor film, the protective film, and the gate insulating film may be formed sequentially. In the same chamber, they can be sequentially formed by changing supply of a material gas without being exposed to the atmosphere. In addition, efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when the protective film is formed by an ink-jetting method.
  • a photolithography step can be simplified when the protective film is formed by an ink-jetting method. Accordingly, a photo mask becomes unnecessary, and reduction of costs such as a facility investment cost can be achieved. Further, manufacturing time can be shortened, since a photolithography step becomes unnecessary.
  • a plasma treatment may be performed on a surface for forming the protective film to form a liquid-repellent region, and the protective film may be formed in the liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region to form the protective film in the lyophilic region. Accordingly, the protective film formed by an ink-jetting method can be miniaturized.
  • a protective film 110 is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode.
  • the patterning is conducted by using a mask.
  • the protective film can be etched in a self-aligned manner by being exposed to light using the gate electrode as a mask from a backside of the substrate.
  • the mask may be formed by a photolithography method or an ink-jetting method.
  • a plasma treatment may be performed on a surface for forming the mask to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region.
  • the mask formed by an ink-jetting method can be miniaturized.
  • a semiconductor film having one conductivity type is formed.
  • the semiconductor film having N type conductivity 106 is formed by a plasma CVD method.
  • the semiconductor film having N type conductivity and the semiconductor film are patterned into a desired shape.
  • a mask may be formed at a desired portion and etching may be performed by using the mask.
  • the mask is preferably formed by an ink-jetting method, since efficiency in the use of materials can be improved and a cost and an amount of waste liquid can be reduced. However, it may be formed by a photolithography step.
  • steps in the case of forming a mask by an ink-jetting method is more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • polyimide, polyvinyl alcohol or the like is dropped as a mask by an ink-jetting method.
  • a plasma treatment may be performed on a surface for forming a mask to conduct a liquid-repellent treatment. Further, a lyophilic region may be formed selectively in the liquid-repellent region.
  • a plasma treatment is conducted to remove the mask after etching.
  • the mask formed by an ink-jetting method may serve as an insulating film without being removed.
  • a plasma treatment is performed on a surface for forming a source electrode and a drain electrode as in FIG. IE.
  • a plasma treatment is performed on a semiconductor film having N type conductivity, which is the surface for forming the source electrode and the drain electrode, and a gate insulating film.
  • the plasma treatment may be performed without being in contact with the surface for forming the source electrode and the drain electrode.
  • surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil.
  • a liquid-repellent treatment is performed by a plasma treatment.
  • a lyophilic treatment is performed selectively on the liquid-repellent region.
  • a conductive film functioning as a source electrode and a drain electrode 108 is formed.
  • the conductive film is formed by using a dot including silver (Ag) by an ink-jetting method.
  • the source electrode and the drain electrode formed by an ink-jetting method can be miniaturized.
  • a heat treatment for baking or drying may be performed, when the solvent of the dot is required to remove.
  • a thin film transistor in which up to the source electrode and the drain electrode have been provided is formed.
  • the thin film transistor in this embodiment mode is a so-called bottom gate type thin film transistor, in which a gate electrode is formed under a semiconductor film. More in detail, it is a so-called channel protective type, in which a semiconductor film is not etched. A substrate where such plural thin film transistors are formed is refened to as a TFT substrate.
  • a liquid-repellent treatment and a selective lyophilic treatment are performed before forming a conductive film by an ink-jetting method.
  • the liquid-repellent treatment and the selective lyophilic treatment plasma treatment are performed before forming a gate electrode, and a source and drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step.
  • a liquid-repellent treatment and a selective lyophilic treatment plasma treatment may be performed before an ink-jetting step that is not shown in this embodiment mode.
  • a thin film transistor having miniaturized gate, source and drain electrodes can be obtained by a liquid-repellent treatment and a selective lyophilic treatment before an ink-jetting step.
  • a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent.
  • a position of a wiring to be formed can be controlled with accuracy.
  • Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method.
  • steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • Embodiment Mode 3 A method for manufacturing a thin film transistor, which has a structure different from those in Embodiment Modes 1 and 2, is described in Embodiment Mode 3.
  • the thin film transistor, in which a gate electrode is provided over a semiconductor film, is a so-called top gate type thin film transistor. Therefore, other manufacturing methods may be refened to Embodiment Modes 1 and 2 and detailed description thereof is omitted.
  • a base film 101 is formed on a substrate 100 having an insulating surface. After that, a conductive film to be a source and drain electrode 108 and a semiconductor film having one conductivity are formed sequentially.
  • a semiconductor film having N type conductivity 106 is used for the semiconductor film having one conductivity.
  • the conductive film to be a source and drain electrode and the semiconductor film having N type conductivity are formed, and then, are patterned into a desired shape by using a mask.
  • the mask can be formed by an ink-jetting method or a photolithography method. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a mask is formed by an ink-jetting method.
  • steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • a plasma treatment may be performed on a surface for forming the mask to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Accordingly, the mask formed by an ink-jetting method can be miniaturized.
  • the mask is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode. Thereafter, the mask is baked by heating as necessary and patterned by dry etching. A plasma treatment is conducted to remove the mask after patterning.
  • the mask formed by an ink-jetting method may serve as an insulating film without being removed. As shown in FIG.
  • a semiconductor film 105 is formed to cover the semiconductor film having N type conductivity.
  • a mask 112 is formed on the semiconductor film 105.
  • the mask 112 can be formed by an ink-jetting method or a photolithography method.
  • the mask is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode.
  • the mask formed by an ink-jetting method is baked by heating as necessary.
  • a plasma treatment may be performed on the semiconductor film 105 to form a liquid-repellent region at the time. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized.
  • the semiconductor film 105 is patterned into a desired shape by using the mask.
  • the semiconductor film having N type conductivity can be also patterned.
  • a plasma treatment is performed to remove the mask 112 after patterning.
  • the mask formed by an ink-jetting method may serve as an insulating film without being removed.
  • the insulating film which functions as a gate insulating film 104 is formed to cover the semiconductor film 105.
  • the gate insulating film may be formed at least between the semiconductor film and a gate electrode to be formed later.
  • a plasma treatment is performed on the gate insulating film 104.
  • surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil.
  • a liquid-repellent treatment is performed by a plasma treatment. As shown in FIG.
  • a lyophilic treatment is conducted by inadiating selectively on the liquid-repellent region with laser light.
  • the region to be provided with the gate electrode is made selectively lyophilic.
  • a conductive film functioning as a gate electrode 103 is formed on the semiconductor film with a gate insulating film therebetween.
  • a dot in which a conductive material of Ag is dispersed in a solvent of tetradecane is dropped.
  • the gate electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove.
  • a thin film transistor in which up to a gate electrode has been formed and which serves as a semiconductor element is completed.
  • a substrate where such plural thin film transistors are formed is refened to as a TFT substrate.
  • a protective film 113 is formed to at least cover the gate electrode.
  • the protective film can have a laminated structure or a single layer structure.
  • An insulator such as silicon oxide, silicon nitride or silicon oxynitride can be formed as the protective film by plasma CVD. Note that a dot including a material of an insulating film may be discharged by an ink-jetting method to form the protective film.
  • the gate electrode is made of silver (Ag)
  • a silicon nitride film is used for the protective film covering the gate electrode. This is because there is a risk that a surface of the gate electrode becomes uneven, since silver oxide is formed by a reaction with silver (Ag) when a protective film containing oxygen is used.
  • the thin film transistor in this embodiment mode in which a gate electrode is provided over a semiconductor film, is a so-called a top gate type thin film transistor.
  • a liquid-repellent treatment and a selective lyophilic treatment are conducted before forming a conductive film by an ink-jetting method.
  • the liquid-repellent treatment and the selective lyophilic treatment are performed before forming the gate electrode by an ink-jetting method.
  • the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step.
  • the liquid-repellent treatment and the selective lyophilic treatment may be conducted before an ink-jetting step that is not described in this embodiment mode.
  • a thin film transistor having a miniaturized gate electrode can be obtained by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step.
  • a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent.
  • a position of a wiring to be formed can be controlled with accuracy.
  • Efficiency in the used of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method.
  • steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost be achieved, and manufacturing time can be shortened.
  • Embodiment Mode 4 A method for manufacturing a thin film transistor, which has a structure different from that of Embodiment Mode 3, is described in Embodiment Mode 4.
  • the structure is different from that of Embodiment Mode 3 in that a source and drain electrode is formed by an ink-jetting method.
  • other manufacturing methods may be refened to Embodiment Mode 3 and detailed description thereof is omitted.
  • a base film 101 is formed on a substrate 100 having an insulating surface.
  • a plasma treatment is performed on the base film 101.
  • surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil.
  • a liquid-repellent region is formed by the plasma treatment.
  • a lyophilic treatment is conducted by inadiating selectively the liquid-repellent region with laser light.
  • the region to be provided with the source and drain electrode is selectively inadiated with
  • a source and drain electrode is formed by an ink-jetting
  • a dot in which a conductive material of Ag is dispersed in a solvent of tetradecane is dropped.
  • the source and drain electrode formed by an ink-jetting method can be miniaturized.
  • a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove.
  • a semiconductor film having one conductivity type is formed to cover the source and drain electrode.
  • a semiconductor film having N type conductivity 106 is used as the semiconductor film having one conductivity type in this embodiment mode.
  • the semiconductor film having N type conductivity covering the source and drain electrode is etched for preventing a short-circuit.
  • the semiconductor film having N type conductivity between the source electrode and the drain electrode is etched by a dry-etching method by using a mask. As shown in FIG. 5E, a semiconductor film 105 is formed to cover the semiconductor film having N type conductivity. Then, the semiconductor film 105 is
  • the semiconductor film having N type conductivity may be also patterned in some cases.
  • the semiconductor film 105 and the semiconductor film having N type conductivity 106 have the same etching rate to one gas, they are patterned simultaneously.
  • the mask can be formed by an ink-jetting method or a photolithography method.
  • the mask is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode.
  • the mask may be baked by heating as necessary and patterned by dry etching.
  • a plasma treatment may be performed ori the semiconductor film 105 to form a liquid-repellent region at the time.
  • a lyophilic region may be formed selectively in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized.
  • a plasma treatment is performed to remove the mask after patterning.
  • the mask formed by an ink-jetting method may serve as an insulating film without being removed. Thereafter, an insulating film functioning as a gate insulating film 104 is formed to cover the semiconductor film.
  • a plasma treatment is performed on the gate insulating film 104.
  • surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil.
  • a liquid-repellent treatment is performed by the plasma treatment.
  • a lyophilic treatment is performed selectively on the liquid-repellent region by laser inadiation.
  • a conductive film functioning as a gate electrode 103 is formed on a semiconductor film with a gate insulating film therebetween.
  • a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped.
  • the gate electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove.
  • a thin film transistor in which up to a gate electrode has been formed and which serve as a semiconductor element is completed.
  • a substrate where such plural thin film transistors are formed is refened to as a TFT substrate.
  • a protective film 113 is preferably formed to cover at least the gate electrode.
  • the protective film can have a laminated structure or a single layer structure.
  • an insulator such as silicon oxide, silicon nitride or silicon oxynitride can be formed by a plasma CVD method.
  • a protective film may be formed by discharging a dot including a material of an insulating film by an ink-jetting method.
  • a silicon nitride film is preferably used for the protective film covering the gate electrode, when silver (Ag) is used for the gate electrode. This is because there is a risk that a surface of the gate electrode becomes uneven since silver oxide is formed due to a reaction with silver (Ag), when a protective film containing oxygen is used.
  • the thin film transistor in this embodiment mode in which a gate electrode is provided over a semiconductor film, is a so-called a top gate type thin film transistor.
  • a liquid-repellent treatment and a selective lyophilic treatment are conducted before forming a conductive film by an ink-jetting method.
  • the liquid-repellent treatment and the selective lyophilic treatment are performed before forming a gate electrode, and a source electrode and a drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step.
  • a liquid-repellent treatment and a selective lyophilic treatment may be performed before an ink-jetting step that is not shown in this embodiment mode.
  • a thin film transistor having miniaturized source, drain and gate electrodes can be obtained by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step. Further, a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent. Thus, a position of a wiring to be formed can be controlled with accuracy. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method are more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • Embodiment Mode 5 An example of forming a thin film transistor using a crystalline semiconductor film is described in Embodiment Mode 5.
  • a base film 101 is formed on a substrate 100 having an insulating surface.
  • the base film 101 may have a laminated structure.
  • the base film 101 has a laminated structure in which a first base film 101a and a second base film 101b are laminated in order.
  • a silicon oxynitride film is formed as the first base film 101a by a plasma CVD method with SiH 4 , N 2 O, NH 3 , or N as a material gas, at a pressure of 0.3 Ton (39.9 Pa), an RF power of 50 W, an RF frequency of 60 MHz, a substrate temperature of 400°C to be from 10 nm to 200 nm (preferably, from 50 nm to 200 nm) in thickness.
  • a silicon oxynitride film is formed as the second base film 101b by a plasma CVD method with SiH 4 or N 2 O as a material gas, at a pressure of 0.3 Ton (39.9 Pa), an RF power of 150 W, an RF frequency of 60 MHz, a substrate temperature of 400° C to be from 50 nm to 200 nm (preferably, from 150 nm to 200 nm) in thickness.
  • An amorphous semiconductor film is formed on the base film 101.
  • the amorphous semiconductor film is 25 to 100 nm thick (preferably, 30 to 60 nm). Silicon germanium as well as silicon can be used for the material of the amorphous semiconductor film.
  • the concentration of germanium is preferably about 0.01 to 4.5 atomic %.
  • the semiconductor film mainly containing silicon of 66 nm (also, refened to as an amorphous silicon film or amorphous silicon) is used in this embodiment mode.
  • the amorphous semiconductor film is crystallized to form a crystalline semiconductor film.
  • a method of adding a metal element promoting crystallization of an amorphous semiconductor film and heating it can be employed as the crystallization method.
  • One or more elements selected from Ni, Fe, Co, Pd, Pt, Cu, Au, Ag, In and Sn can be used as the metal element. It is preferable to use the metal element, since low temperature crystallization is possible.
  • the amorphous semiconductor film may be inadiated with laser light.
  • Continuous wave laser (CW laser) or a pulsed laser (pulse oscillation type) can be used.
  • One laser or more lasers selected from an Ar laser, a Kr laser, an excimer laser, a YAG laser, a Y 2 O 3 laser, a YVO 4 laser, a YLF laser, a YAlO 3 laser, a glass laser, a ruby laser, an alexandrite laser, a Ti: sapphire laser, a copper vapor laser, and a gold vapor laser can be used as the laser.
  • a Ni solution including a water solution or an acetic acid medium
  • an application method such as spin-coating or dipping or an ink-jetting method.
  • a Ni ion may be injected into an amorphous semiconductor film by an ion implantation method, a heat treatment may be performed in an atmosphere of steam containing Ni, or sputtering may be conducted with Ar plasma using a Ni material as a target.
  • a water solution including Ni acetate of 10 ppm is applied by a spin coating method. After that, the amorphous semiconductor film may be heat-treated for 2 to 20 hours at temperatures from 500 to 550 °C and crystallized to form a crystalline semiconductor film. At this time, it is preferable that a heating temperature is changed gradually.
  • Dehydrogenation which can reduce film unevenness in crystallization, can be conducted, since hydrogen and the like come out of the amorphous semiconductor film by the initial heat treatment at low temperature.
  • a magnetic field may be applied to crystallize with its magnetic energy, or a high power microwave may be used.
  • a heat treatment is performed for one hour at 500°C, a heat treatment is performed for four hours at 550°C in a vertical furnace.
  • An island like semiconductor film 502 is formed by patterning the crystalline semiconductor film.
  • An insulating film serving as a gate insulating film 104 is formed to cover the island like semiconductor film 502. The insulating film described above can be used for the gate insulating film. TiO is used for the gate insulating film in this embodiment mode.
  • a plasma treatment is performed on a surface for forming the gate electrode.
  • a plasma treatment is performed on the gate insulating film that is the surface for forming the gate electrode.
  • the plasma treatment may be performed without being in contact with the surface for forming the gate electrode.
  • a surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil.
  • a liquid-repellent region is formed by the plasma treatment.
  • a lyophilic region is selectively formed in the liquid-repellent region.
  • a region where the gate electrode is formed is selectively inadiated with laser light, thereby making the region lyophilic.
  • a conductive film functioning as the gate electrode 103 is formed in the liquid-repellent region by dropping a dot mixed with a conductive material in a solvent by an ink-jetting method.
  • a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped.
  • the gate electrode formed by an ink-jetting method can be miniaturized by dropping a dot in the selectively formed lyophilic region. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove.
  • the heat treatment may be at a predetermined temperature, e.g. 200°C to 300°C, preferably, it may be conducted in an atmosphere containing oxygen. At the time, a heating temperature is set so that unevenness on the gate electrode surface is not generated.
  • a dot including silver (Ag) is employed like this embodiment mode, a heat treatment is conducted in an atmosphere containing oxygen and nitrogen, thereby decomposing an organic material such as thermosetting resin of an adhesive agent or the like included in the solvent to obtain silver (Ag) that does not include the organic material.
  • the gate electrode can be made of an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material mainly containing the element, in addition to silver (Ag).
  • the conductive film can be formed by a sputtering method or a plasma CVD method instead of an ink-jetting method.
  • a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus or an AgPdCu alloy can be used as the conductive film formed by sputtering or plasma CVD. After that, an impurity element is added in a self aligned manner by using the gate electrode 103.
  • phosphorus (P) is added into a semiconductor film that is to be an N-channel thin film transistor and boron (B) is added into a semiconductor film that is to be a P-channel thin film transistor.
  • boron (B) is added into a semiconductor film that is to be a P-channel thin film transistor.
  • the thin film transistor in this embodiment mode is a crystalline thin film transistor having a crystalline semiconductor film and is a top gate thin film transistor, in which a gate electrode is formed over a semiconductor film.
  • a substrate where such plural thin film transistors are formed is refened to as a TFT substrate.
  • an insulating film 507 containing nitrogen is formed to cover the gate electrode 103.
  • the insulating film 507 can be formed by an ink-jetting method, too. After that, dangling bonds of a semiconductor film can be reduced, by heating after forming the insulating film 507.
  • a liquid-repellent treatment and a selective lyophilic treatment are conducted before forming a conductive film by an ink-jetting method.
  • the liquid-repellent treatment and the selective lyophilic treatment are performed before forming a gate electrode, and a source and drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step.
  • a liquid-repellent treatment and a selective lyophilic treatment may be performed before an ink-jetting step that is not shown in this embodiment mode.
  • a thin film transistor having miniaturized source, drain and gate electrodes can be obtained by a liquid-repellent treatment and a selective lyophilic treatment before an ink-jetting step.
  • a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent.
  • a position of a wiring to be formed can be controlled with accuracy.
  • Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method.
  • steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • Embodiment Mode 6 An apparatus for a plasma treatment is described in Embodiment Mode 6. As shown in FIG. 15A, an electrode 403, a dielectric 404 that is formed to cover a surface of the electrode, a power supply 402 connected to the electrode, a substrate 406 having a surface (an object surface) to be exposed to a plasma treatment, a stage 407 for fixing a substrate are provided in a treatment chamber 401. Teflon (a registered trademark) is employed as the dielectric in this embodiment mode.
  • the electrode 403 and the power supply 402 collectively correspond to a plasma unit. In this embodiment mode, the electrode 403 is used to generate plasma, but a known method may be employed. For example, plasma can be generated by microwave or electromagnetic induction.
  • the dielectric is formed to cover the surface of the electrode, but the dielectric may be disposed at least so as to be exposed to plasma generated between an object to be treated and the electrode.
  • the dielectric may be provided between the object and the electrode.
  • a substrate having a surface to be treated by a plasma treatment is ananged on the stage and pulse voltage is applied from the power supply. Then, plasma is generated between the electrode and the substrate.
  • the density of the plasma is 1 x 10 10 to 1 x 10 1 m "3 .
  • the pressure in the treatment chamber is several tens of Ton to 800 Ton (106400 Pa), preferably, 700 Ton (93100 Pa) to 800 Ton (atmospheric pressure or pressure in the neighborhood of atmospheric pressure) and pulse voltage is used to discharge.
  • Pulse voltage is applied to generate stable plasma in atmospheric pressure or pressure in the neighborhood of atmospheric pressure in this embodiment mode. Air, oxygen or nitrogen is used as a treatment gas in this plasma treatment.
  • voltage to be applied is resonated, like each damped oscillation wave, as a damped oscillation waveform periodic wave in which the damped oscillation wave is generated repeatedly and intermittently.
  • a pair of plus pulse and minus pulse is supplied to a primary side of a high-voltage transformer with repetition frequency, and the damped oscillation waveform periodic wave which is resonated as each damped oscillation wave is outputted from a secondary side of the high-voltage transformer to be applied to a pair of electrodes.
  • the voltage rise time of each resonated damped oscillation wave is preferably 5 ⁇ s or less at the time.
  • the repetition period of the damped oscillation wave is preferably 10 to lOOkHz.
  • the pulse is preferably 100 to 10000 pps (10000 times per second).
  • a surface for forming a conductive film is modified. Specifically, when Teflon is attached to the surface of the electrode, a CF 2 bond is formed on the surface for forming a. conductive film. A specific state of the CF 2 bond before and after the plasma treatment will be shown in Embodiment. As a result, the treated surface shows a liquid-repellent property. After that, when a wiring or the like is formed thereon, a line width becomes nanow, thereby achieving miniaturization of the wiring.
  • a treatment chamber having a plasma unit for a plasma treatment and a treatment chamber for an ink-jetting step may be arranged adjacently, thereby making up a so-called multi chamber, which is capable of transporting a substrate (an object to be treated) having a surface to be treated without being exposed to the atmosphere.
  • a multi chamber is preferable since a substrate having a surface to be treated can be transfened without being exposed to the atmosphere in the case of conducting a plasma treatment and an ink-jetting step in vacuum. Moreover, it is not necessarily required to perform a plasma treatment in the treatment chamber since the plasma treatment can be conducted under atmospheric pressure or pressure in the neighborhood of atmospheric pressure, as shown in FIG. 15B.
  • An uniaxial robot 410 for an X-axis and an uniaxial robot 411 for a Y-axis are provided in FIG. 15B, and a stage 407 is provided over one of the robots.
  • the electrode 406 having a surface to be treated is provided on the stage.
  • the electrode 403 is cylindrical and a dielectric 404 covers the circumference of the electrode. Teflon (a registered trademark) is employed as the dielectric in this embodiment mode.
  • Teflon a registered trademark
  • Other plasma conditions are described above, and thus, description thereof is omitted.
  • the electrode and the substrate are relatively moved.
  • the electrode and the substrate may be moved relatively.
  • the electrode and the substrate may be moved relatively, while rotating the substrate.
  • a position control may be conducted with a CCD camera or the like by an alignment marker or the like as a mark.
  • the plasma treatment can be easily conducted without vacuuming since the plasma treatment can be conducted in the atmosphere. Consequently, manufacturing time of a thin film transistor can be drastically shortened. Of course, the plasma treatment can be performed in vacuum.
  • Embodiment Mode 7 An ink-jetting apparatus (a droplet discharging apparatus) having a light-inadiation unit is described in Embodiment Mode 7.
  • a droplet discharging unit 701 a droplet discharging unit 701, a light inadiation unit, a stage (a transport stage) 708 for ananging an object to be treated 702, and a CCD camera 712 are provided in a treatment chamber 706.
  • a central processing unit 715 for controlling a laser oscillator 707, the CCD camera 712, the droplet discharging unit 701, and the stage 708 is provided.
  • the laser oscillator 707 and a fiber 709 are provided as the light irradiation unit, and a terminal 710 is provided for the end of the fiber.
  • the terminal includes an optical system, e.g., a lens 711 for converging laser light.
  • an ultraviolet lamp, a halogen lamp, and a black light can be employed.
  • Light emitted from the laser oscillator passes through the fiber, is converged to be a desired size with the optical lens provided for the terminal, and is emitted on an object to be treated.
  • An optical system comprising a shutter, a reflector such as a minor or a half minor, a cylindrical lens or a convex lens, or the like may be installed between the laser oscillator and the object to be treated so as to adjust a shape or a course of laser light emitted from the laser oscillator.
  • Such an optical system may be provided in the terminal 710.
  • Light can enter obliquely from above the object to be treated by adjusting the optical system in the light inadiation unit.
  • the object to be treated is light-transmitting, light can be emitted from below the object to be treated.
  • a nozzle driving power source and a nozzle heater for discharging a droplet are incorporated in the droplet discharging apparatus, and a moving unit for moving the droplet discharging unit is provided.
  • a light inadiation unit having flexibility like the fiber it can be moved together with being fixed on the droplet discharging apparatus.
  • a substrate that is the object to be treated 702 is set in the stage 708 having a moving unit in an X-Y axis direction.
  • the substrate, the droplet discharging unit and the light inadiation unit are relatively moved to perform a treatment on a whole substrate.
  • the substrate can be moved to an arbitrary point in the X - Y plane by the stage.
  • a lyophilic treatment is performed on the substrate by the light inadiation unit.
  • a droplet discharging treatment of dropping a dot onto a lyophilic region is conducted by the droplet discharging unit.
  • the lyophilic treatment or the droplet discharging treatment is achieved by relatively moving the droplet discharging unit 701 and the substrate, and a predetermined timing of light inadiation or droplet discharging, thereby drawing a desired pattern on the substrate.
  • the lyophilic treatment or the droplet discharging treatment can be started when the substrate reaches a predetermined position by the stage, where the droplet discharging unit 701 stands by.
  • the substrate on the transport stage is stopped and only the droplet discharging unit 701 with high controllability is scanned when a droplet is discharged.
  • the light inadiation unit and the droplet discharging unit, and the substrate are moved simultaneously in order to prevent dots from being solidified at the start point and the end point of a wiring.
  • the atmosphere of the treatment chamber can be controlled in the droplet discharging apparatus.
  • a pressure reduction apparatus such as a cryostat pump can be provided for an exhaust port of the treatment chamber to vacuum evacuate.
  • a predetermined gas such as nitrogen, argon, or oxygen may be supplied thereinto, and the treatment chamber may be controlled to be an oxidative atmosphere, a reduction atmosphere or the like.
  • the laser oscillator or the like can be arranged outside the treatment chamber and light irradiation through a window or the like can be performed.
  • a heater for heating the objected to be treated may be provided in the droplet discharging apparatus like this.
  • a measuring unit of various physical properties such as temperature or pressure may be provided as necessary. The units described above can be collectively controlled by the central processing unit.
  • FIG. 17 shows an apparatus using an optical pickup element as a light inadiation unit. It becomes simple and easy to relatively move an object to be treated, and the light inadiation unit and the droplet discharging unit by using a light source built-in type light inadiation unit such as an optical pickup element. Consequently, it is possible to enhance position control of light inadiation or control of discharging a droplet.
  • the treatment chamber 706 can control an atmosphere in the droplet discharging apparatus like this.
  • a pressure reduction apparatus 721 such as a cryostat pump can be provided for an exhaust port 705 of the treatment chamber to vacuum evacuate.
  • a substrate that is an object to be treated is transported into the treatment chamber from a transport port 703, and fixed on a stage.
  • a predetermined gas such as nitrogen, argon, or oxygen may be supplied thereinto from a
  • gas introduction port provided in the treatment chamber, and the treatment chamber may be controlled to be an oxidative atmosphere or a reduction atmosphere.
  • a heater for heating the objected to be treated may be provided in the droplet discharging apparatus like this.
  • Other structures are identical to those of FIG. 16, and thus, description in detail thereof is omitted.
  • a droplet is discharged by a so-called piezo system using a piezoelectric element; however, a system in which a solution is pushed out by using bubbles generated by heating a heat-generator, a so-called thermal ink-jetting system, may be used depending on a solution material. In this case, a piezoelectric element is replaced with a heat-generator.
  • wettability of a solution with a solution chamber flow path, an extra solution chamber, a fluid resistive portion, a chamber for pressurizing, and an outlet for a solution (nozzle, head) is important for discharging a droplet. Therefore, a carbon film, a resin film or the like for adjusting the wettability with a material is formed in each flow path.
  • the structure of the apparatus makes it possible to perform a lyophilic treatment by light inadiation, discharge continuously a dot in a lyophilic region in the same treatment chamber, and form a minute wiring pattern on a substrate efficiently and
  • Embodiment mode 8 An example of forming a film containing Teflon (Teflon film), instead of a plasma treatment, is described in Embodiment Mode 8. Other manufacturing methods are refened to Embodiment Mode 1. As shown in FIG. 14A, a base film 101 is formed on a substrate 100 having an insulating surface. After that, a Teflon film 128 is formed. The Teflon film may be formed to be a mono molecular layer level, i.g.
  • the Teflon film can be formed by sputtering, CVD or the like. Thereafter, the Teflon film is selectively inadiated with laser light to form a lyophilic region. As shown in FIG. 14B, a conductive film functioning as a gate electrode 103 is formed in the lyophilic region of the Teflon film.
  • the gate electrode can be formed by dropping a dot including a conductive material in a solution by an ink-jetting method. In this embodiment mode, a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped.
  • the gate electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. The formed Teflon film of a thickness at a mono molecular layer level is removed by the heat treatment. As shown in FIG. 14C, a gate insulating film 104, a semiconductor film 105, and a semiconductor film having N type conductivity 106 are formed sequentially and patterned into a desired shape. After that, a conductive film serving as a source and drain electrode 108 is formed. The Teflon film may be formed before forming the source and drain electrode.
  • a lyophilic region may be formed selectively in the Teflon film. Consequently, the source and drain electrode formed by an ink-jetting method can be miniaturized.
  • a channel etch type thin film transistor shown in Embodiment Mode 1 is described in this embodiment mode, but a structure of a thin film transistor is not limited thereto.
  • a Teflon film may be formed to have a liquid-repellent property and a lyophilic region may be formed selectively therein, in any one of the methods for manufacturing a thin film transistor described in the embodiment modes described above. As described above, a thin film transistor in which up to a source electrode and a drain electrode have been formed is completed.
  • a substrate where such plural thin film transistors are formed is referred to as a TFT substrate.
  • a Teflon film is formed and a lyophilic region is selectively formed before forming a conductive film by an ink-jetting method.
  • a Teflon film is formed and a lyophilic region is selectively formed before forming a gate electrode by an ink-jetting method in this embodiment mode, but the Teflon film may be formed and the lyophilic region may be selectively formed before at least one ink-jetting step.
  • a Teflon film may be formed and a lyophilic region may be selectively formed before an ink-jetting step which is not shown in this embodiment mode.
  • a plasma treatment described above may be performed and further a lyophilic region may be formed in addition to the steps of forming the Teflon film and a selective lyophilic region, before employing an ink-jetting method.
  • a thin film transistor having miniaturized gate, source and drain electrodes can be obtained by the steps of forming a Teflon film and a selective lyophilic region before an ink-jetting step. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method.
  • steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • Embodiment mode 9 A case of forming a film containing a silane coupling agent instead of a Teflon film is described in Embodiment Mode 9.
  • a silane coupling agent is applied by an application method such as a spin-coating method. After that, the silane coupling agent is dried. In this embodiment mode, it is dried naturally. Washing is performed so as to remove an unnecessary silane coupling agent. In this embodiment mode, it is washed with water.
  • the silane coupling agent can be formed so as to have a film thickness of a mono molecular layer. After that, the silane coupling agent is baked. In this embodiment mode, a heat treatment is performed at 100 °C for ten minutes. In this way, the silane coupling agent can be formed, and thus, a surface for forming an element can be liquid-repellent. Note that the silane coupling agent can be removed.
  • the silane coupling agent can be removed by a heat treatment in some cases. After that, a lyophilic region is formed selectively. A dot is dropped in the lyophilic region. Consequently, a wiring or the like formed by an ink-jetting method can be miniaturized. Other manufacturing methods are similar to those of the embodiment mode described above, and thus detailed description thereof is omitted.
  • a thin film transistor including miniaturized gate, source and drain electrodes can be obtained by forming a silane coupling agent before an ink-jetting step and selectively forming a lyophilic region.
  • Embodiment Mode 10 An interlayer insulating film provided to cover a thin film transistor and a wiring that is formed in an opening portion formed in the interlayer insulating film are described in Embodiment Mode 10.
  • a thin film transistor (also refened to as a TFT) 120 having a protective film 113 is formed over a substrate 100 having an insulating surface, according to the embodiment modes described above.
  • This embodiment mode describes a TFT as shown in Embodiment Mode 1, but any TFT described in the embodiment modes described above may be used.
  • An interlayer insulating film 121 is formed to cover the TFT 120.
  • an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride
  • a photosensitive or non-photosensitive organic material polyimide, acryl, polyamide, polyimidamide, benzocyclobutene, or resist
  • siloxane or polysilazane and a laminated structure thereof
  • Siloxane is formed by using a polymeric material as a starting material, which has a skeleton formed by the bond of silicon (Si) and oxygen (O), and which includes at least hydrogen as a substituent, or further at least one of fluoride, alkyl group, and aromatic hydrocarbon as the substituent.
  • Polysilazane is formed by using a liquid material including a polymeric material haying a bond of silicon (Si) and nitrogen (Ni) as a start material.
  • a liquid material including a polymeric material haying a bond of silicon (Si) and nitrogen (Ni)
  • an organic material either positive type photosensitive organic resin or negative photosensitive organic resin may be used.
  • CMP or the like may be performed on an interlayer insulating film.
  • an opening portion 122 having a desired shape is formed at a desired position of the interlayer insulating film 121. A case of forming the opening portion with a tapered shape in a side face thereof in the interlayer insulating film over the source electrode and the drain electrode is described in this embodiment mode.
  • a mask is formed on the interlayer insulating film 121 and the opening portion is formed by etching by using the mask.
  • the mask can be formed by an ink-jetting method or a photolithography method.
  • steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Therefore, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
  • a plasma treatment may be performed on the interlayer insulating film 121 to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized.
  • a dot including etchant may be dropped to form an opening portion in the interlayer insulating film by an ink-jetting method, as shown in FIG. 20 A.
  • an opening portion is formed by an ink-jetting method, efficiency in the use of etchant is improved, reduction of a cost, and reduction of waste liquid are possible.
  • a photolithography step can be simplified when the opening portion is formed by an ink-jetting method.
  • a material of an interlayer insulating film and a material of a wiring may be dropped by an ink-jetting method to form the wiring 123.
  • surfaces of the interlayer insulating film or the wiring may be polished by CMP or the like to improve the planarity as shown in FIG. 21B.
  • a plasma treatment is performed on the interlayer insulating film 121 in which the opening portion is formed.
  • surface modification of the interlayer insulating film and within the opening portion is made so as to be liquid-repellent, that is, low in wettability, to liquid such as water, oil or alcohol.
  • a liquid-repellent treatment is performed by the plasma treatment.
  • a lyophilic region is formed in the liquid-repellent region by inadiating the opening portion selectively with laser light.
  • a wiring 123 is formed in the opening portion.
  • the wiring 123 can be formed by a sputtering method or an ink-jetting method.
  • a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped to form the wiring.
  • the inside of the opening portion of the interlayer insulating film (including a side face of the opening portion) is lyophilic.
  • the surface of the interlayer insulating film excluding the opening portion is liquid-repellent. Therefore, a dot including a material of the wiring can easily enters the inside of the opening portion.
  • the wiring formed by an ink-jetting method can be miniaturized. It is preferable for the case of forming a wiring by an ink-jetting method to control a liquid-repellent property and a lyophilic property in this manner.
  • a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove.
  • a liquid-repellent treatment and a selective lyophilic treatment are performed before forming the wiring on the interlayer insulating film by an ink-jetting method.
  • the liquid-repellent treatment and the selective lyophilic treatment are performed before or after forming the opening portion, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before and after forming the opening portion.
  • the wiring formed in the opening portion and other wirings are formed by an ink-jetting method
  • the wirings can be miniaturized by performing a liquid-repellent treatment and a selective lyophilic treatment on the interlayer insulating film.
  • a thin film transistor having a miniaturized wiring formed on the interlayer insulating film can be obtained by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step.
  • Embodiment Mode 11 A method of forming a pixel electrode is shown in Embodiment Mode 11. As shown in FIG. 7A, a thin film transistor 120 having a protective film 113 is formed on a substrate 100 having an insulating surface. This embodiment mode describes a TFT as shown in Embodiment Mode 1, but any TFT described in Embodiment Modes above may be used. A case of forming a pixel electrode 125 to be connected to a source electrode and a drain electrode in a lower portion of the electrodes is described. After forming a gate insulating film, a semiconductor film and a semiconductor film having N type conductivity are patterned to form the pixel electrode in the area for forming the source electrode or the drain electrode.
  • the pixel electrode can be formed by a sputtering method or an ink-jetting method.
  • the pixel electrode is made of a light-transmitting material or a non-light transmitting material.
  • a light-transmitting material for example, an ITO and the like can be used in the case of a light-transmitting material, whereas a metal film can be used in the case of a non-light transmitting material.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ITO-SiOx in which silicon oxide (SiO ) of 2 % to 20 % is mixed into indium oxide
  • ITSO ink-jetting method
  • TiN titanium nitride
  • a plasma treatment may be performed on the gate insulating film which is a surface for forming the pixel electrode to form a liquid-repellent region.
  • a lyophilic region may be formed selectively in the liquid-repellent region by laser inadiation.
  • a dot dispersed with a conductor of ITO is dropped by an ink-jetting method to form a pixel electrode.
  • the pixel electrode formed by an ink-jetting method can be miniaturized.
  • a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove.
  • FIG. 7B shows an example of forming a pixel electrode over a source electrode or a drain electrode, which is different from that of FIG. 7A.
  • the pixel electrode can be formed by a sputtering method or an ink-jetting method, as described above. Specifically, when the pixel electrode is formed by an ink-jetting method, a plasma treatment may be performed on the source electrode, the drain electrode and the gate insulating film that are each a surface forming the pixel electrode to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region by laser inadiation. In FIG. 7B, a dot dispersed with a conductor of ITO is dropped to form the pixel electrode by an ink-jetting method.
  • the pixel electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove.
  • an interlayer insulating film 121 is formed and planarized, and then, a wiring 123 is formed and connected to a pixel electrode, which is different from in FIGS. 7A and 7B.
  • the pixel electrode can be formed by a sputtering method or an ink-jetting method, as mentioned above.
  • an ITSO is employed as the pixel electrode.
  • the ITSO can be formed by dropping a dot dispersed with a conductor of ITO and silicon by an ink-jetting method. Alternatively, it can be formed by a sputtering method using an ITO containing silicon as a target.
  • siloxane may be employed for the interlayer insulating film 121.
  • an insulating film containing nitrogen 126 e.g. silicon nitride or silicon oxynitride may be formed on the interlayer insulating film of siloxane.
  • nitrogen 126 e.g. silicon nitride or silicon oxynitride
  • the insulating film containing nitrogen 126 can be eliminated. In such a structure, a liquid element may be formed.
  • the pixel electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. In this way, when the pixel electrode is formed by an ink-jetting method, a liquid-repellent treatment and a selective lyophilic treatment are preferably performed on a surface for forming the pixel electrode. As described above, by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step, a thin film transistor having a miniaturized pixel electrode can be obtained. A TFT substrate in which up to a pixel electrode has been formed is refened to as a module TFT substrate.
  • FIG. 8 is a cross-sectional view of a liquid crystal display device having a thin film transistor 120 and a pixel electrode 125 formed over a TFT substrate as described in the embodiment modes.
  • a light-transmitting conductive film such as ITO or ITSO
  • a transmissive liquid crystal display device can be obtained.
  • a non light-transmitting film that is, a high-reflective film (e.g., aluminum)
  • a reflective liquid crystal display device can be obtained.
  • a module TFT substrate used for a liquid crystal display device like this embodiment mode is refened to as a liquid crystal module TFT substrate.
  • An orientation film 131 is formed to cover the thin film transistor 120, a protective film 113, and the pixel electrode 125.
  • a color filter 134, an opposite electrode 133, and the orientation film 131 are formed sequentially over an opposite substrate 135.
  • the color filter, the opposite electrode or the orientation film can be formed by an ink-jetting method.
  • a black matrix may be also formed by an ink-jetting method.
  • a treatment chamber that is to be in a vacuum state is required.
  • a liquid crystal may be dropped and an ink-jetting method may be employed for the dropping method of a liquid crystal.
  • a liquid crystal is preferably dropped. This is because a larger treatment chamber is required, a substrate weighs more and a treatment is more difficult as a substrate becomes larger, in the case of a liquid crystal injection method.
  • a sealing material is formed in the periphery of one substrate. The reason why one substrate is described is that the sealing material may be formed in either the substrate 100 or the opposite substrate 135.
  • the sealing material is formed in the closed area where the end point is accorded with the initial point of the sealing material.
  • one drop or more drops of liquid crystals is/are dropped.
  • plural drops of liquid crystals are dropped in plural portions.
  • the substrate is attached to the other substrate in vacuum. This is because it is possible to remove unnecessary air and to prevent a sealing material from being broken and expanded due to air, by making the vacuum state.
  • two or more points in the region where the sealing material is formed are solidified and bonded for temporary attachment. Two or more points in the region where the sealing material is formed may be inadiated with ultraviolet rays, when ultraviolet curable resin is used for the sealing material.
  • a light-shielding material is preferably ananged so that a thin film transistor or a liquid crystal may ⁇ not be inadiated with ultraviolet rays.
  • a pillar like or spherical spacer may be used as well as the sealing material so as to keep the gap between the substrates.
  • an external terminal may be connected to a signal line driver circuit or a scanning line driver circuit by bonding an FPC (Flexible Printed Circuit) using anisotropic conductive film. Further, the signal line driver circuit or the scanning line driver circuit may be formed as an external circuit.
  • FPC Flexible Printed Circuit
  • a liquid crystal display device in which a thin film transistor having a miniaturized wiring is provided and to which an external terminal is connected, can be formed.
  • a very thin liquid crystal display device can be formed, since the thin film transistor does not include an interlayer insulating film.
  • An interlayer insulating film may be formed to increase planarity, as shown in the above embodiment modes, in this embodiment mode. When the planarity is increased, an orientation film can be formed uniformly and voltage can be applied to a liquid crystal layer uniformly, which is preferable.
  • an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride
  • a photosensitive or non-photosensitive organic material such as polyimide, acryl, polyamide, polyimidamide, benzocyclobutene or resist
  • siloxane polysilazane and a laminated structure thereof
  • organic material positive type photosensitive organic resin or negative photosensitive organic resin can be used.
  • FIG. 10 is a cross-sectional view of a light emitting device having a thin film transistor 120 and a pixel electrode 125 formed in the TFT substrate shown in the foregoing embodiment modes.
  • the thin film transistor 120 having the pixel electrode 125 is formed as shown in the above embodiment modes.
  • the pixel electrode 125 functions as a first electrode of a light-emitting element.
  • an insulating film 143 functioning as a bank or a banier is formed over the first electrode.
  • an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride
  • a photosensitive or non-photosensitive organic material such as polyimide, acryl, polyamide, polyimidamide, benzocyclobutene or resist
  • siloxane polysilazane and a laminated structure thereof
  • organic material positive photosensitive organic resin or negative photosensitive organic resin can be used.
  • the photosensitive organic resin is etched by light-exposure to form an opemng portion with a curvature in the upper edge portion. This can prevent an electroluminescent layer to be formed later or the like from being disconnected.
  • the TFT substrate in this state is refened to as a light emitting module TFT substrate.
  • An electroluminescent layer 141 is formed in the opening portion of the insulating film 143 formed over the first electrode.
  • a liquid-repellent treatment may be performed by a plasma treatment before forming the electroluminescent layer.
  • a lyophilic region may be formed selectively by laser inadiation in the opening portion of the insulating film in the liquid-repellent region.
  • a plasma treatment is performed on the opening portion of the insulating film 143 and the electroluminescent layer having a high molecular weight (polymeric) material is formed by an ink-jetting method.
  • a second electrode 142 of the light-emitting element is formed to cover the electroluminescent layer 141 and the insulating film 143.
  • a singlet excited state and a triplet excited state are possible as a kind of the molecular exciton formed by an electroluminescent layer.
  • a ground state is generally a singlet excited state, and light emission from a singlet excited state is refened to as fluorescence.
  • Light emission from a triplet excited , state is refened to as phosphorescence.
  • Light-emission from an electroluminescent layer includes light emission by the both excited states.
  • the electroluminescent layer 141 is formed by laminating in order HIL (hole injecting layer), HTL (hole transporting layer), EML (light emitting layer), ETL (electron transporting layer), EIL (electron injecting layer) sequentially from the first electrode side conesponding to the pixel electrode 125.
  • HIL hole injecting layer
  • HTL hole transporting layer
  • EML light emitting layer
  • ETL electron transporting layer
  • EIL electroluminescent layer
  • the electroluminescent layer can employ a single layer structure or a combined structure other than a laminated structure.
  • Materials for light emission of red (R) green (G) and blue (B) are each selectively formed by a vapor deposition method using a vapor-deposition mask, or the like for the electroluminescent layer 141.
  • the materials for light emission of red (R) green (G) and blue (B) can be formed also by an ink-jetting method, and this case is preferable since it is possible to individually apply each RGB without using a mask.
  • CuPc or PEDOT for HIL, ⁇ -NPD for HTL, BCP or Alq 3 for ETL and BCP: Li or CaF 2 for EIL are used respectively.
  • Alq 3 doped with a dopant conesponding to each light emission of RGB (DCM or the like for R, DMQD or the like for (G) may be used for EML, for example.
  • the electroluminescent layer is not limited to the above material.
  • Ah organic material including a low molecular weight material or a high
  • the electroluminescent layer of each RGB high-definition display can be performed by using a color filter. This is because broad peak can be conected to be sharp in light emitting spectrum of each RGB by the color filter.
  • a color filter or a color conversion layer may be formed on a second substrate (sealing substrate), for example, and attached to a substrate.
  • a material for monochrome light emission, a color filter, and a color conversion layer can be each formed by an ink-jetting method.
  • a display of monochrome light emission may be performed.
  • an area color type display device may be formed by using monochrome light emission.
  • a passive matrix display portion is suitable for the area color type, which can mainly display characters and symbols.
  • the first electrode and the second electrode can be an anode or a cathode depending on a pixel structure. It is preferable that the first electrode is a cathode and the second electrode is an anode in this embodiment mode, since the polarity of a driving TFT is an N channel type. On the contrary, it is preferable that the first electrode is an anode and the second electrode is a cathode when the polarity of the driving TFT is a P channel type.
  • electrode materials used for the anode and the cathode are described.
  • ITO indium tin oxide
  • IZO indium zinc oxide
  • ITSO in which silicon oxide (SiO ) of from 2 % to 20 % is mixed into indium oxide
  • a nitride of a metal material such as titanium nitride
  • a metal, an alloy, a conductive compound, a mixture thereof, or the like having a low work function (work function: 3.8 eV or less) as an electrode material used for the cathode.
  • An element belonging to Group 1 or 2 in the periodic table that is, an alkaline metal such as lithium or cesium, an alkaline earth metal such as magnesium, calcium, or strontium, an alloy (Mg:Ag or Al:Li) or a compound (LiF, CsF, or CaF 2 ) including them, or a transition metal including a rare-earth metal can be cited as a specific material.
  • the second electrode can be formed by extremely thinly forming such a metal or an alloy including such a metal and by laminating ITO, IZO, ITSO, or another metal (including an alloy) thereover, when the second electrode is required to be light transmitting in this embodiment mode.
  • the first electrode and the second electrode can be formed by a vapor deposition method, a sputtering method, an ink-jet method, or the like.
  • the electroluminescent layer may be damaged from the sputtering.
  • An EIL (electron injecting layer), an ETL (electron transporting layer), an EML (light emitting layer), an HTL (hole transporting layer), an HIL (hole injecting layer), and the second electrode may be laminated in this order from a side of the first electrode.
  • the first electrode functions as a cathode and the second electrode functions as an anode. Since the polarity of the driving TFT is an N channel type in this embodiment mode, it is preferable to employ a structure of the first electrode that is a cathode, EIL (electron injecting layer), ETL (electron transporting layer), EML (light emitting layer), HTL (hole transporting layer), HIL (hole injecting layer), and the second electrode that is an anode in consideration of a moving direction of an electron. Thereafter, a passivation film containing nitrogen, a DLC (Diamond like carbon), or the like may be formed by a sputtering method or a CVD method. Accordingly, penetration of moisture and oxygen can be prevented.
  • a sealing substrate is attached.
  • a space formed by the sealing substrate may be encapsulated with nitrogen or may be provided with a desiccant agent.
  • light transmitting and highly water-absorbing resin may be filled therein.
  • the sealing structure is described in detail in an embodiment mode hereafter.
  • a light emitting module is completed in this manner. In the light emitting module, when the first electrode and the second electrode are formed to be light-transmitting, light is emitted from the electroluminescent layer in the directions shown by both anows 145 and 146, with a brightness conesponding to a video signal inputted from a single line.
  • the first electrode When the first electrode is light-transmitting and the second electrode is not light-transmitting, light is emitted only in the direction of the anow 146.
  • the first electrode When the first electrode is not light-transmitting and the second electrode is light-transmitting, light is emitted only in the direction of the anow 145.
  • light can be efficiently utilized by using a highly reflective conductive film as the non-light-transmitting electrode provided on a side which is not a light emitting direction.
  • a non-light-transmitting conductive film may be formed to be thin enough to transmit light and a light-transmitting conductive film may be laminated thereover, so as to obtain a conductive film having a light-transmitting property.
  • an external terminal may be connected to a signal line driver circuit or a scanning line driver circuit by bonding an FPC (flexible printed circuit) using anisotropic conductive film.
  • the signal line driver circuit or the scanning line driver circuit may be formed as an external circuit.
  • a light-emitting display device in which a thin film transistor having a miniaturized wiring is provided and to which an external terminal is connected, can be formed.
  • a very thin light-emitting display device can be formed, since the thin film transistor does not include an interlayer insulating film.
  • An interlayer insulating film may be formed to increase planarity, as shown in the above embodiment modes, in this embodiment mode.
  • an inorganic material such as silicon oxide, silicon nitride, silicon oxynitride
  • a photosensitive or non-photosensitive organic material such as polyimide, acryl, polyamide, polyimidamide, benzocyclobutene or resist
  • siloxane polysilazane and a laminated structure thereof
  • organic material positive type photosensitive organic resin or negative photosensitive organic resin can be used.
  • FIG. 9A illustrates an equivalent circuit diagram of a pixel portion of a light emitting device.
  • One pixel includes a TFT for switching (switching TFT) 800, a TFT for driving (driving TFT) 801, and a TFT for controlling cunent (cunent controlling TFT) 802.
  • Theses TFTs are N channel types.
  • One electrode and a gate electrode of the switching TFT 800 are connected to a signal line 803 and a scanning line 805, respectively.
  • One electrode of the cunent controlling TFT 802 is connected to a first power supply line 804, and a gate electrode thereof is connected to the other electrode of the switching TFT.
  • a capacitor element 808 may be provided to hold gate-source voltage of the cunent controlling TFT.
  • the cunent controlling TFT when electric potential of the first power supply line is low and that of a light emitting element is high, the cunent controlling TFT is an N channel type. Therefore, the source electrode and the first power supply line are connected. Therefore, the capacitor element can be provided between the gate electrode and a source electrode of the cunent controlling TFT, that is, the first power supply line.
  • the capacitor element 808 is not necessarily provided.
  • One electrode of the driving TFT 801 is connected to the other electrode of the cunent controlling TFT, and the gate electrode thereof is connected to a second power supply line 806.
  • the second power supply line 806 has a fixed electric potential. Therefore, a gate electric potential of the driving TFT can be fixed, and the driving TFT can be operated, so that gate-source voltage Vgs is not changed by parasitic capacitance or wiring capacitance. Then, a light emitting element 807 is connected to the other electrode of the driving TFT. In this embodiment mode, when an electric potential of the first power supply line is low and that of the light emitting element is high, a cathode of the light emitting element is connected to a drain electrode of the driving TFT. Therefore, it is preferable to sequentially laminate a cathode, an electroluminescent layer and an anode.
  • the gate potential of the driving TFT is fixed. Therefore, constant gate-source voltage Vgs which does not depend on the parasitic capacitance or the wiring capacitance can be applied to the light emitting element. In other words, cunent by the constant gate-source voltage Vgs can be supplied. Since the light emitting element is a cunent driving type element, it is preferable to employ analog driving when characteristic variation of the TFT in the pixel, specifically, Vth variation is small. As in this embodiment mode, a TFT having an amorphous semiconductor film has small characteristics variation; therefore, analog driving can be employed.
  • FIG. 9B shows an example of a top view of a pixel portion having the above equivalent circuit.
  • a gate electrode, a scanning line, and a second power supply line of each TFT are formed from the same conductive film over a base film by an ink-jetting method or a sputtering method.
  • a plasma treatment may be performed on the base film that is a surface for forming the gate electrode or the like to form a liquid-repellent region.
  • a lyophilic region may be formed selectively in the liquid-repellent region to form a gate electrode, a scanning line and a second power supply line therein. Consequently, the gate electrode, the scanning line and the second power supply line that are formed by an ink-jetting method can be miniaturized.
  • a gate insulating film is formed after that.
  • a first electrode 810 of the light emitting element 807 is formed on the gate insulating film.
  • the first electrode 810 can be formed by an ink-jetting method, a sputtering method or the like.
  • the first electrode is formed by an ink-jetting method
  • a plasma treatment is conducted on the gate insulating film that is a surface for forming the first electrode to form a liquid-repellent region.
  • a lyophilic region may be formed selectively in the liquid-repellent region to form the first electrode therein. Consequently, the first electrode formed by an ink-jetting method can be miniaturized.
  • a semiconductor film is formed. The semiconductor film is formed over the entire surface by plasma CVD and pattered into a desired shape using a mask in this embodiment mode.
  • a semiconductor film having N type conductivity may be formed on the semiconductor film, namely the semiconductor film and the semiconductor film having N type conductivity can be continuously formed.
  • the conductive film formed by sputtering or CVD is patterned to form a source wiring, a drain wiring, a signal line and a first power supply line.
  • a mask used in patterning can be formed by an ink-jetting method or a photolithography method.
  • the source wiring, the drain wiring, the signal line and the first power supply line can be formed by an ink-jetting method.
  • a plasma treatment is conducted on a surface for forming each the source wiring, the drain wiring, the signal line and the first power supply line to form a liquid-repellent region.
  • a lyophilic region may be formed selectively in the liquid-repellent region to form the source wiring, the drain wiring, the signal line and the first power supply line therein. Consequently, the source wiring, the drain wiring, the signal line and the first power supply line formed by an ink-jetting method can be miniaturized.
  • the capacitor element 808 is formed from the gate wiring and the source and drain wiring which are formed with the gate insulating film therebetween.
  • a channel width (W) of the driving TFT may be designed to be large, since the driving TFT includes an amorphous semiconductor film. In this way, a pixel portion of the light-emitting device can be formed.
  • the active matrix light-emitting device like this is effective since a TFT is provided for every pixel and thus it can be driven with low voltage, when a pixel density is increased.
  • this embodiment mode shows an active matrix light-emitting device in which each TFT is formed in one pixel, a passive matrix light emitting device in which a TFT is formed in every column can be also formed. In the passive matrix light emitting device, a high aperture ratio can be obtained since a TFT is not provided for every pixel. In a light emitting device in which light is emitted toward opposite sides of an electroluminescent layer, light transmittance can be increased by employing a passive matrix light emitting device.
  • FIG. 11 shows an appearance of a display device on which a control circuit 601a and a power supply circuit 602 are mounted.
  • a pixel portion 603 in which a light emitting element or a liquid crystal element is provided for every pixel is formed on a substrate 600.
  • a thin film transistor in the pixel portion 603 can be formed to have a wiring or the like that is miniaturized as in the foregoing embodiment modes.
  • a scanning line driver circuit 604a for selecting a pixel of the pixel portion 603 and a signal line driver circuit 605a for supplying a video signal to the selected pixel are mounted by an IC chip. Widths of long and short sides of an IC to be mounted or the number thereof is not limited to those described in this embodiment mode.
  • the scanning line driver circuit or the signal line driver circuit may be integrally formed with the pixel portion.
  • the control circuit 601a, the power supply circuit 602, an image signal processing circuit 609a, a video RAM 610a, and an audio circuit 611a are provided for a printed wiring board 607.
  • a power supply voltage outputted from the power supply circuit 602, or various signals from the control circuit 601a, the image signal processing circuit 609a, the video RAM 610a, and the audio circuit 611a are supplied into the scanning line driver circuit 604a and the signal line driver circuit 605a through an FPC 606, and further are supplied to the pixel portion 603.
  • the power supply voltage of the printed wiring board 607 and various signals are supplied through an interface (I/F) portion 608 in which plural input terminals are ananged.
  • a signal is inputted into the image signal processing circuit 609a from the interface (I/F) portion 608.
  • a signal is sent and received between the image signal processing circuit 609a and the video RAM 610a.
  • the printed wiring board 607 is mounted by using the FPC 606 in this embodiment mode; however, the present invention is not necessarily limited to this structure.
  • the control circuit 601a and the power supply circuit 602 may be mounted directly on the substrate by a COG (Chip On Glass) method.
  • a mounting method of an IC chip such as the signal line driver circuit and the scanning line driver circuit is not limited to this embodiment mode, and an IC chip formed on the substrate may be connected to a wiring in the pixel portion by a wire bonding method.
  • noise may be caused in the power supply voltage or signals, or the rise of the signal may become slow due to capacitance formed between leading wirings, resistance of the wiring itself, and the like.
  • various kinds of elements such as a capacitor and a buffer may be provided on the printed wiring board 607, thereby preventing noise from being caused in the power supply voltage or signals, or preventing the rise of the signal from being slow.
  • a display device provided with a thin film transistor having a miniaturized wiring or the like can be manufactured.
  • a mode of a display device different from that in FIG. 11 is shown in FIGS. 19A and 19B.
  • a module is formed from a thin film transistor having a crystalline semiconductor film as shown in Embodiment Mode 5.
  • an element formed in a driver circuit portion or a peripheral circuitry portion can be integrally formed on a substrate. As shown in FIG.
  • a pixel portion 603, a scanning line driver circuit 604b, a signal line driver circuit 605b, a control circuit 601b, an audio circuit 611b, an image signal processing circuit 609b, and a video RAM 610b are provided on a substrate 600. Accordingly, the number of elements formed on a printed wiring board can be reduced.
  • a block diagram of each circuit formed on the substrate 600 is shown in FIG. 19B. A circuit in which a liquid crystal element is formed in the pixel portion 603 is described.
  • the pixel portion 603 is provided on a panel and a gray-scale power supply 617 for displaying with gray-scale is also formed on the panel.
  • the control circuit 601b includes a CPU 616, a CPU interface (I/F) 623, a WRAM 624 serving as a stack/variable SRAM used by the CPU, a PROM 615 serving as a mask ROM storing a program and image data, and a memory controller 625.
  • the memory controller 625 has a function for making a signal for controlling the audio circuit by decoding an interface of address/data pass of PROM and WRAM, and a part of an address signal for WRAM.
  • the audio circuit 611b includes an audio ROM 619 functioning as a mask
  • the image signal processing circuit 609b includes a CRAM 622 serving as a SRAM storing color information of image data.
  • An SRAM 626 storing coordinate information of an image or image information for an image of one line is also provided. Power from the power supply circuit 602 formed on the printed wiring board
  • a thin film transistor is manufactured by using a crystalline semiconductor film like this, it can be integrally formed on a glass substrate, and thus, downsizing and reducing in weight of a display device can be achieved. Productivity of a display device can be increased, since the number of connecting points with FPC can be reduced. As described above, a display device provided with a thin film transistor having a miniaturized wiring or the like can be manufactured.
  • FIG. 12A is a cross-sectional view of a sealed light-emitting device, and a cross-sectional view taken along D-D 'of FIG. 11.
  • a driving TFT 914 having an N-channel is provided over a substrate 911 (refened to as a first substrate for convenience) with a base film 912 therebetween.
  • the driving TFT can be formed to have a wiring or the like miniaturized in the foregoing embodiment modes.
  • An anode 915 is connected to a wiring to serve as a source electrode or a drain electrode of the driving TFT.
  • An electroluminescent layer 916 and a cathode 917 are formed in order over the anode.
  • a protective film 918 is further provided to cover the cathode.
  • the protective film is formed to have an insulating film that mainly contains silicon nitride or silicon oxynitride and that is obtained by a sputtering method (DC method or RF method), a DLC film containing hydrogen, or a carbon nitride film.
  • the protective film can have a single layer structure or a laminated structure of the above films.
  • a film having high hardness is used to prevent entrance of water or oxygen as the protective film
  • a film for relaxing stress e.g., a carbon nitride film
  • a film having high hardness is formed thereover.
  • Deterioration (degradation) of an electroluminescent layer by water, oxygen or the like can be prevented by the protective film.
  • the cathode and the protective film are provided to exist also in the first connection region 920.
  • the cathode is connected to a connection wiring 919.
  • the first substrate 911 is attached to an opposite substrate 922 (refened to as a second substrate for convenience) by a sealing material 921.
  • the opposite substrate may be provided with a desiccant agent 925.
  • a desiccant agent By the desiccant agent, entrance of water or oxygen can be prevented.
  • a color filter may be provided for the opposite substrate.
  • a broad peak can be conected to be sharp in light emitting spectrum of each RGB by the color filter.
  • the sealing material is made of thermosetting resin or ultraviolet curable resin.
  • the first substrate and the second substrate are adhered and fixed by heating the sealing material while pressuring or by ultraviolet inadiation.
  • epoxy based resin can be employed as the sealing material.
  • the sealing material is mixed with a spacer. The space (that is, a gap) between the first substrate and the second substrate is maintained by the spacer of the sealing material.
  • the spacer may be spherical or column-like, and a cylindrical spacer is used in this embodiment mode, and thus, the gap is equivalent to a diameter of the circle.
  • a connection wiring 919 is connected to a signal line driver circuit formed from an IC chip 927 by an anisotropic conductive film 924.
  • the IC chip is provided on the FPC 906.
  • the anisotropic conductive film is adhered by heating or pressuring, it is conducted carefully so that a crack is not generated due to a flexibility of a film substrate or softening by heating.
  • a substrate having high hardness may be ananged as an auxiliary in the adhering region.
  • a clock signal, or a video signal is received from the thusly connected IC chip.
  • FIG. 12B shows a mode of sealing without using a second substrate, which is different from that of FIG. 12A. Other structures are similar, and thus description thereof is omitted.
  • FIG. 12B shows a mode of sealing without using a second substrate, which is different from that of FIG. 12A. Other structures are similar, and thus description thereof is omitted.
  • a second protective film 930 is provided to cover a protective film 918.
  • An organic material such as epoxy resin, urethane resin or silicone resin can be used as the second protective film.
  • the second protective film may be formed by dropping a polymeric (high-molecular-weight) material by an ink-jetting method. Epoxy resin is discharged by a dispenser and dried in this embodiment mode. When deterioration of an electroluminescent layer due to water, oxygen or the like does not matter, the protective film 918 may not be necessarily provided.
  • a second substrate may be provided over the second protective film for sealing. When the light emitting device is sealed without using the second substrate, it is possible to reduce more in weight, size and thickness of a display device.
  • a polarizing plate or a circular polarizing plate may be provided to increase contrast in this embodiment mode. For example, a polarizing plate or a circular polarizing plate can be provided for one surface or both surfaces of a display screen.
  • Examples of electronic devices using a display device described in the above embodiment modes can be given as follows: a video camera; a digital camera; a goggle type display (head mounted display); a navigation system; an audio reproducing device (such as a car audio or an audio component); a laptop personal computer; a game machine; a personal digital assistance (such as a mobile computer, a cellular phone, a portable game machine or an electronic book); an image reproducing device including a recording medium (specifically, a device capable of reproducing a recording medium such as a Digital Versatile Disc (DVD) and having a display that can display the image); and the like.
  • a video camera a digital camera
  • a goggle type display head mounted display
  • a navigation system such as a car audio or an audio component
  • an audio reproducing device such as a car audio or an audio component
  • a laptop personal computer such as a laptop personal computer
  • game machine such as a mobile computer, a cellular phone, a portable game machine or an electronic book
  • FIG. 13A shows a large-size display device, which includes a chassis 2001, a supporting section 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like.
  • the display portion 2003 is provided with a module including a pixel portion and a driver circuit portion.
  • the pixel portion has a light emitting element or a liquid crystal element and a TFT formed by an ink-jetting method described in the above embodiment modes.
  • the display device includes all display devices for displaying information such as a display device for a personal computer, a display device for TV broadcasting reception, and a display device for advertisement.
  • FIG. 13B shows a cellular phone that is one of mobile terminals, which includes a main body 2101, a chassis 2102, a display portion 2103, an audio input portion 2104, an audio output portion 2105, operation keys 2106, antenna 2107, and the like.
  • the display portion 2103 is provided with a module including a pixel portion and a driver circuit portion.
  • the pixel portion has a light emitting element or a liquid crystal element and a TFT formed by an ink-jetting method described in the above embodiment modes.
  • FIG. 13C shows a sheet-like cellular phone, which includes a main body 2301, a display portion 2303, an audio input portion 2304, an audio output portion 2305, a switch 2306, an external connection port 2307, and the like.
  • a separately prepared earphone 2308 can be connected to the cellular phone through the external connection port 2307.
  • a touch panel display screen with a sensor is used for the display portion 2303.
  • a series of operation can be performed by touching the touch panel operation key 2309 displayed on the display portion 2303.
  • the display portion 2303 is provided with a module having a pixel portion and a driver circuit portion.
  • the pixel portion has a light emitting element or a liquid crystal element and a TFT formed by an ink-jetting method described in the above embodiment modes.
  • costs of the sheet-like cellular phone can be reduced by forming the display portion 2303 by a method of forming plural panels from one substrate (gang printing).
  • gang printing a method of forming plural panels from one substrate (gang printing).
  • an applicable range of the present invention is so wide that it can be applied to electronic devices of various fields.
  • the electronic devices of this embodiment mode can employ any structure described in the above embodiment modes.
  • An inert gas can be employed as a treatment gas of a plasma treatment in the present invention.
  • a rare gas such as helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) can be used as the inert gas.
  • Other conditions such as pressure are similar to those described in the foregoing embodiment modes.

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Abstract

It is required that a line width of a wiring is prevented from being wider to be miniaturized when the wiring or the like is formed by a dropping method typified by an ink-jetting method. Therefore, the invention provides a method for narrowing (miniaturizing) the line width according to a method different from a conventional method. A region to be liquid-repellent is formed and further, a region to be lyophilic is formed selectively in the region to be liquid-repellent in a surface for forming a pattern, before forming a desired pattern. After that, a pattern for a wiring or the like is formed in the lyophilic region by a dropping method typified by an ink-jetting method for dropping a composition including a conductive material for the wiring or the like.

Description

DESCRIPTION
METHOD FOR FORMING WIRING, METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND DROPLET DISCHARGING METHOD
TECHNICAL FIELD The present invention relates to a method for forming a wiring and a method for manufacturing a thin film transistor or semiconductor device by dropping a composition including a material of an object to be formed. Specifically, the invention relates to a method for forming a wiring and a method for manufacturing a thin film transistor by a droplet discharging method (an ink-jetting method), and further, the droplet discharging method. BACKGROUND ART A droplet discharging method typified by a piezo method or a thermal jet method, or a continuous type droplet discharging method attracts attention. These droplet discharging methods have been used for printing words and drawing images, but they start to be applied to a semiconductor area for forming a minute pattern or the like these days. A method of forming a film pattern is proposed by Reference 1: the method makes it possible to improve a method of forming a film pattern by an ink-jetting method, make a film thicker, and make a line thinner. Further, problems such as disconnection or short-circuit are not caused in the case of using a conductive film
(Reference 1: Japanese Patent Laid Open No. 2003-133691). According to Reference 1, a substrate is treated in advance so that a contact angle with a droplet is 60 degree, and a droplet is discharged over a whole area for forming a wiring at a larger interval than a diameter of the droplet attached on the substrate, in a first discharging step. A droplet is discharged at a position in the whole area for forming a wiring in a second discharging step, which is different from the position discharged in the first discharging step, at the same interval. In a third discharging step, a droplet is discharged over the whole area for forming a wiring at a smaller interval than the interval in the first discharging step. Further, plasma exposure in a normal pressure or in vacuum is cited as a surface treatment for controlling a contact angle. Gases used in the plasma treatment can be selected in consideration of a material of a substrate surface on which a conductive wiring is to be formed, and treatment gases such as methane tetrafluoride, penTuorohexane or perfluorodecane can be used, for example, according to Reference 1. It is required that a line width of a wiring is prevented from being wider to be miniaturized when the wiring or the like is formed by a method typified by an ink-jetting method, as described above. Therefore, an object of the invention is to provide a method for nanowing (miniaturizing) a line width according to a method different from the method described in Reference 1. Moreover, another object of the invention is to provide a method for forming elements other than a wiring, e.g. a semiconductor film, an insulating film, a mask, and the like by a method typified by an ink-jetting method, and provide a method for nanowing (miniaturizing) a line width thereof.
DISCLOSURE OF INVENTION In view of the above objects, in accordance with one feature of the invention, a region to be liquid-repellent is formed on a surface to be provided with a pattern thereon. Also, in accordance another feature of the invention, a region to be lyophilic is formed on a selected region of a surface and then a droplet of a composition is applied to the selected region for forming a pattern such as a wiring. The composition may include a conductive material dissolved or dispersed in a solution.Further, in accordance with another feature of the invention, a region to be liquid-repellent (liquid-repellent region) is formed and further, a region to be lyophilic (lyophilic region) is formed selectively in the liquid-repellent region in a surface for forming a pattern, before forming a desired pattern, according to the present invention. After that, a pattern for a wiring or the like is formed in the lyophilic region by a method for dropping (dropping method) a composition (including a composition dissolved or dispersed with a conductor in a solution) mixed with a conductive material for a wiring or the like. There is a droplet discharging (ejecting) method (an ink-jetting method) as the method for dropping a composition mixed with a conductive material. A piezo method can be employed as an ink-jetting method. A piezo method is also used in inkjet printers since it is superior in a droplet controllability and has higher degree of freedom in selecting an ink. There are given a MLP (Multi Layer Piezo) type and an MLChip (Multi Layer Ceramic Hyper Integrated Piezo Segments) type as the piezo method. In addition, an ink-jetting method using a so-called thermal method may be employed depending on a material of a solution, which pushes out the solution by generating bubbles by heating a heat-generator. In other words, a liquid-repellent treatment is performed on a surface for forming an element, a lyophilic treatment is performed selectively on the surface that is exposed to the liquid-repellent treatment, and then, a wiring or the like is formed by a dropping method on the surface that is selectively exposed to the lyophilic treatment, according to the invention. Note that a liquid-repellent property is a state that is low in wettability to water, alcohol or oil and other liquids. On the contrary, a lyophilic property is a property of a region that is comparatively less liquid-repellent than a liquid-repellent region. When a region that is comparatively low in a liquid-repellent property is formed, a wiring or the like can be formed in the region, thereby nanowing (miniaturizing) a line width accompanying with miniaturization of the region. There is a method of performing a plasma treatment on a surface for forming an element as a method of a liquid-repellent treatment. The plasma treatment is performed under conditions as follows: air, oxygen or nitrogen is used as a treatment gas, the pressure is several tens of Ton to 1000 Ton (133000 Pa), preferably, 100(13300 Pa) to lOOOTon (133000 Pa), further preferably, 700 Ton (93100 Pa) to 800 Ton (106400 Pa). Namely, pulse voltage is applied in a state of atmospheric pressure or pressure in the neighborhood of atmospheric pressure. At the time, plasma density is 1 x 1010 to 1 x 1014 m"3 to be in a condition of so-called corona discharge or glow discharge. According to the invention, a dielectric is provided between an electrode used for a plasma treatment and an object (an object to be treated) for the plasma treatment. In other words, the dielectric is exposed to plasma, and contributes to surface modification of a surface for forming an element. For example, an electrode provided with a dielectric may be prepared and plasma may be generated so that the dielectric is exposed to plasma. Thus, a whole surface of the electrode is not necessarily covered with the dielectric. As the dielectric, Teflon (a registered trademark) can be employed. When Teflon is employed, a CF2 bond is formed on a surface for forming an element and surface modification is done. Thus, a liquid-repellent property is shown. When a fluorine-based gas is employed as a treatment gas like Reference 1, it is difficult to perform surface modification on a surface of a semiconductor film. This is because a semiconductor film having silicon is removed by the fluorine-based gas. When a fluorine-based gas is employed, it is also difficult to perform surface modification on a surface of an organic material such as acrylic. This is because the surface of an organic material is damaged or removed by a fluorine-based gas. On the contrary, a plasma treatment is performed using air, oxygen or nitrogen, according to the invention. Therefore, it is possible to perform surface modification on a semiconductor film or an organic material, regardless of materials of a surface for forming an element, which is preferable. Cost is low and an exhaust gas treatment is simple since a treatment gas is air, oxygen or nitrogen. In particular, a plasma treatment using oxygen as a treatment gas can be employed for removing a mask for patterning a semiconductor film or the like, which is preferable. In the invention, concrete pulse voltage is resonated to be applied, like each damped oscillation wave, as a damped oscillation waveform periodic wave in which the damped oscillation wave is generated repeatedly and intermittently. For example, a pair of plus pulse and minus pulse is supplied to a primary side of a high-voltage transformer with repetition frequency, and the damped oscillation waveform periodic wave which is resonated as each damped oscillation wave is outputted from a secondary side of the high-voltage transformer to be applied to a pair of electrodes. The voltage rise time of each resonated damped oscillation wave is preferably 5 μs or less at the time. The repetition period of the damped oscillation wave is preferably 10 to 100kHz. The pulse is preferably 100 to 10000 pps (10000 times per second). There is a method for forming a film containing fluorine on a surface for forming an element as another method for a liquid-repellent property. For example, a film containing Teflon or a silane coupling agent is formed on a surface for forming an element. A film containing Teflon (Teflon film) can be formed by a sputtering method or a CVD method. A film containing a silane coupling agent can be formed by a spin-coating method. A film containing fluorine such as Teflon or a silane coupling agent is preferably formed to be a mono molecular layer level, i.g. 5 nm or less in thickness. This is because the film containing fluorine is unnecessary in forming a thin film transistor and it is to be easily removed. For example, the film containing fluorine can be removed by a heat treatment or a patterning treatment. As a result of the liquid-repellent treatment, surface modification of a surface for forming a conductive film is made. After that, a lyophilic region is formed selectively. Light irradiation may be performed to form the lyophilic region. For instance, the lyophilic region is formed by selective inadiation of laser light. The laser light preferably has a wavelength that can be absorbed in a surface where the lyophilic region is to be formed. Specifically, when a wiring or the like is formed on a glass substrate by a dropping method typified by an ink-jetting method, laser light having an ultraviolet region wavelength that is absorbed in the glass substrate where a lyophilic region is formed, is preferably used. As the laser light, laser light oscillated by a gas laser oscillator, a solid laser oscillator, a metal laser oscillator or a semiconductor laser oscillator can be used. Specifically, an Ar laser, a Kr laser, an excimer laser (XeCl, XeF, KrF), a CO2 laser, a YAG laser, a Y2O3 laser, a YVO4 laser, a YLE laser, a YAlO3 laser, a glass laser, a ruby laser, a sapphire laser and the like can be used. A unit for adjusting a beam shape or a beam course of laser light emitted from a laser oscillator can be provided between a laser oscillator and an object to be inadiated, that is, a surface for forming an element. For example, a concave lens, a convex lens, a micro lens anay, a cylindrical lens anay or the like can be used as the unit for adjusting a beam shape of laser light emitted from a laser oscillator. A minor, a half minor, other reflectors can be used as the unit for adjusting a beam course of laser light. A minute lyophilic region can be formed by selective inadiation of laser light by using an optical pickup element or a fiber. In addition, laser light is not necessarily specialized in coherent light produced by a laser oscillator. A lyophilic region can be formed in the same manner as the laser inadiation by light emitted from a UV lamp, a halogen lamp, a flash lamp or the like. A blow treatment for blowing an ozone gas onto a surface for forming an element may be performed. Corona discharge or glow discharge may be performed on a surface for forming an element . After that, a wiring is formed by dropping a composition including a wiring material onto a lyophilic region by a dropping method. Consequently, a line width becomes narrow and miniaturization can be achieved. Since a composition including a wiring material has high wettability to a lyophilic region, the composition moves to the lyophilic region even when it is dropped on a liquid-repellent region that is out of the lyophilic region to some extent. Thus, a wiring can be miniaturized and more straight.
A wiring can be formed in a lyophilic region, which can prevent a liquid from accumulating (a pool of liquid) after dropping a composition. Therefore, the wiring can be formed with an even width. According to the invention, a composition (including a composition dissolved or dispersed with a conductor in a solvent) mixed with a conductor (material for forming a wiring) in a solvent is discharged (jetting) to form a wiring. Specifically, when a wiring is formed by an ink-jetting method, a photolithography step such as light-exposure or development of a mask for patterning the wiring, and an etching step for patterning the wiring can be omitted. Such a step of discharging a composition is preferably performed under low pressure. The solvent of the composition is evaporated until the composition lands on an object to be treated since it is discharged, and thus, steps of drying and baking the composition can be both omitted. It is preferable to perform the step under low pressure, since an oxide film or the like is not formed on the surface of the conductive material. The step of dropping a composition may be performed in a nitrogen atmosphere or an organic gas atmosphere. At this time, the composition is discharged to be a dot shape (droplet) or a pillar shape by a series of dots; however, they are collectively refened to as a dot (droplet). Discharging a dot (droplet) means that a dot-like droplet or a pillar-like droplet is discharged. In other words, since a plurality of dots are discharged continuously, a pillar-like (dot) droplet is discharged in some cases without being recognized as a dot. Gold (Au), silver (Ag), copper (Cu), platinum (Pt), palladium (Pd), tungsten (W), nickel (Ni), tantalum (Ta), bismuth (Bi), lead (Pb), indium (In), tin (Sn), zinc (Zn), titanium (Ti), aluminum (Al), an alloy thereof, a dispersive nanoparticle thereof, or a silver halide particle can be used as the conductive material. Specifically, silver or copper which is low resistant is preferably used. However, in the case of using copper, it is necessary that an insulating film containing nitrogen is formed as a banier film so as to prevent copper from diffusing into a semiconductor film or the like. In addition, ITO (indium tin oxide), IZO (indium zinc oxide) in which zinc oxide (ZnO) of 2 % to 20 % is mixed into indium oxide, ITSO in which silicon oxide (SiO2) of 2 % to 20 % is mixed into indium oxide, organic indium, organotin, titanium nitride (TiN), or the like can be also used as a transparent conductive material. A lyophilic treatment and dropping a dot can be performed in the same treatment chamber by using a droplet discharging apparatus (an ink-jetting apparatus) in which a droplet discharging unit for discharging a dot and a unit for light inadiation (light inadiation unit) are provided integrally. Consequently, manufacturing time can be shortened. Further, a unit for a liquid-repellent treatment may be provided in the same treatment chamber. In addition, a multi-chamber apparatus in which a treatment chamber for a liquid-repellent treatment and a treatment chamber provided with a droplet discharging unit and a light inadiation unit are provided, may be formed. A multi-chamber apparatus in which a treatment chamber for a liquid-repellent treatment, a treatment chamber for a lyophilic treatment, and a treatment chamber for discharging a dot are provided, may be used. One feature of the invention is that a minute wiring is formed by a dropping method typified by an ink-jetting method. A structure of a thin film transistor for forming a wiring, or the like is not limited. In other words, a thin film transistor may have either a crystalline semiconductor film or an amorphous semiconductor film and may be either a bottom gate type in which a gate electrode is formed under a semiconductor film or a top gate type in which a gate electrode is formed over a semiconductor film. When a gate electrode, a source electrode, a drain electrode and each wiring connected to the electrodes of a thin film transistor are formed by a dropping method typified by an ink-jetting method, a liquid-repellent treatment and a selective lyophilic treatment are performed and then, a dot is dropped onto the region that are exposed to the treatments, thereby achieving miniaturization. A method for forming a wiring using a dot having a conductor is described above, but according to the invention, a liquid-repellent treatment and a selective lyophilic treatment may be performed on a surface for forming a mask or the like, for example. According to the invention, at least, a surface for forming an element by a dropping method typified by an ink-jetting method is liquid-repellent and a lyophilic region is selectively formed therein, thereby miniaturizing the element by a dropping method typified by an ink-jetting method. As the elements formed by a dropping method typified by an ink-jetting method, electrodes such as a gate electrode, a source electrode a drain electrode, and a pixel electrode, wirings such as a source wiring, and a drain wiring, a semiconductor film, a mask for patterning a semiconductor film are given. In other words, a liquid-repellent treatment and a selective lyophilic treatment are performed in the case of employing a dropping method typified by an ink-jetting method at least in one step among manufacturing steps of forming a thin film transistor. Consequently, miniaturization can be achieved. According to the invention, a liquid-repellent region can be formed by a plasma treatment using a treatment gas of air, oxygen, or nitrogen without materials dependence, in this manner. Thereafter, a lyophilic region is formed selectively, thereby miniaturizing a wiring or the like formed by a dropping method typified by an ink-jetting method. Consequently, a liquid-repellent treatment and a selective lyophilic treatment can be performed on every material. Thus, even wirings formed on a substrate or an insulating film can be miniaturized. In addition, miniaturization of a mask or the like to be formed on an organic material can be achieved, since material dependencies are not required to be considered. One feature of the present invention is that a liquid-repellent treatment and a selective lyophilic treatment are performed on a surface for forming an element in one step of forming a pattern of a mask, a wiring or the like by a dropping method typified by an ink-jetting method. In other words, an advantageous effect of miniaturizing a wiring, a mask, or the like formed by a dropping method typified by an ink-jetting method after performing the liquid-repellent treatment and the selective lyophilic treatment in the step described above, can be obtained according to the invention. Therefore, in a step of manufacturing a thin film transistor according to the invention, a wiring is not necessarily formed by a dropping method typified by an ink-jetting method after a liquid-repellent treatment and a selective lyophilic treatment, and a treatment of the invention may be performed when a minute pattern is required to be formed by a dropping method typified by an ink-jetting method. Production-lines of glass substrates from the fifth generation on, of which mother glass substrate is one meter or more in one side, e.g. equal to or more than 1000 mm x 1300 mm, 1000 mm x 1500 mm, 1800 mm x 2200 mm, has been considered. At this time, a large number of panels can be formed from a mother glass, and thus, it is expected that the cost of a panel be lowered. It is possible to build a production line which can maintain profitability by employing a dropping method typified by an ink-jetting method. This is because a photo process can be simplified by forming a wiring or the like by a dropping method typified by an ink-jetting method. Consequently, a photo mask becomes unnecessary, and reduction of costs such as a facility investment cost can be achieved. Further, manufacturing time can be shortened since a photolithography step becomes unnecessary. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced by a dropping method typified by an ink-jetting method. It is preferable that a dropping method typified by an ink-jetting method is applied to a large-size substrate, in this way.
BRIEF DESCRIPTION OF DRAWINGS In the accompanying drawings: FIGS. IA to IF are each a cross-sectional view of a thin film transistor according to one aspect of the invention; FIGS. 2A to 2C are each a cross-sectional view of a thin film transistor according to one aspect of the invention; FIGS. 3 A to 3F are each a cross-sectional view of a thin film transistor according to one aspect of the invention; FIGS. 4A to 4F are each a cross-sectional of a thin film transistor according to one aspect of the invention; FIGS. 5 A to 5F are each a cross-sectional view of a thin film transistor according to one aspect of the invention; FIGS. 6A to 6D are each a cross-sectional view of a thin film transistor according to one aspect of the present invention; FIGS. 7A to 7C are each a cross-sectional view of a thin film transistor according to one aspect of the invention; FIG. 8 is a cross-sectional view showing a liquid crystal display device according to one aspect of the invention; FIGS. 9A and 9B are an equivalent circuit diagram and a top view each showing a pixel of a light emitting device, respectively, according to one aspect of the invention; FIG. 10 is a cross-sectional view of a light-emitting device, according to one aspect of the invention; FIG. 11 is a top view of a display device according to one aspect of the present invention; FIG. 12A and 12B are each a cross-sectional view of a display device according to one aspect of the invention; FIGS. 13A to 13C show electronic devices according to one aspect of the invention; FIGS. 14A to 14D are each a cross-sectional view of a thin film transistor according to one aspect of the invention; FIGS. 15 A and 15B each show a plasma unit according to one aspect of the invention; FIG. 16 shows a droplet discharging apparatus according to one aspect of the invention; FIG. 17 shows a droplet discharging apparatus according to one aspect of the invention; FIGS. 18A to 18E are each a cross-sectional view of a thin film transistor according to one aspect of the invention;
FIGS. 19A and 19B are each a top view of a display device according to one aspect of the invention; FIG. 20 is a cross-sectional view of a thin film transistor according to one aspect of the invention; and FIGS. 21A and 21B are each a cross-sectional view of a thin film transistor according to one aspect of the invention.
BESTMODEFOR CARRYING OUTTHE INVENTION Embodiment modes of the present invention are hereinafter described with reference to accompanying drawings. The invention can be implemented with various modes. It is to be understood that various changes and modifications will be apparent to those skilled in the art, unless such changes and modifications depart from the scope of the invention hereinafter defined. Therefore, the present invention is not limited to Embodiment modes. Note that the same reference numerals are each given to the same portion or a portion having a similar function throughout all figures for explaining embodiment modes, and description thereof is not repeated to be omitted. An ink-jetting method is used as a dropping method in Embodiment Modes hereinafter. Note that a plasma treatment is used for a liquid-repellent treatment, and laser inadiation is employed for a lyophilic treatment, unless otherwise noted. A TFT has three terminals, a gate, a source and a drain, but it is difficult to precisely distinguish a source terminal (source electrode) from a drain terminal (drain electrode) in a TFT structure. Therefore, one of a source electrode and a drain electrode is refened to as a first electrode and the other is refened to as a second electrode, in describing a connection between elements.
[Embodiment Mode 1] An example of a method for manufacturing a thin film transistor is described in Embodiment Mode 1. As shown in FIG. IA, a substrate 100 having an insulating surface is prepared. For example, a glass substrate such as a barium borosilicate glass or an alumino borosilicate glass, a quartz substrate, a stainless substrate or the like can be used for the substrate 100. In addition, a substrate made of plastic typified by polyethylene-terephthalate (PET), polyethylene naphthalate (PEN), polyeter sulfone (PES) and a substrate made of synthetic resin having flexibility such as acryl tend to have worse heat-resistance than other types of substrates. However, such substrates can be used as long as they can resist a treatment temperature in a manufacturing step. Specifically, a substrate made of flexible synthetic resin is easy to use when a thin film transistor including an amorphous semiconductor film, for which a heat treatment for crystallization of a semiconductor film is not required, is formed. A base film is formed on the substrate 100 as necessary. The base film is formed in order to prevent an alkaline metal such as Na or an alkaline earth metal contained in the substrate 100 from spreading in a semiconductor film and exerting an adverse influence on semiconductor element characteristics. The base film can be therefore formed by using an insulating film such as silicon oxide, silicon nitride, silicon oxynitride, titanium oxide, or titanium nitride, which is capable of suppressing the spread of an alkaline metal or an alkaline earth metal into the semiconductor film. In addition, the base film can be formed by using a conductive film such as titanium. At this time, the conductive film is oxidized by a heat treatment or the like in a manufacturing step in some cases. Specifically, a material of the base film may employ the one having high adhesiveness with a gate electrode material. For example, a base film made of titanium oxide (TiOx) is preferably formed when Ag is used for the gate electrode. Note that the base film 101 may have a single layer structure or a laminated structure. A base film is not necessarily provided, as long as it is possible to prevent impurities from diffusing into a semiconductor film. As in this embodiment mode, when a semiconductor film is formed over a gate electrode with a gate insulating film therebetween, a base film is not needed since the gate insulating film can have a function of preventing impurities from diffusing into the semiconductor film. In some cases, a base film is preferably provided depending on a material of the substrate. It is effective to provide a base film in order to prevent impurity diffusion in the case of using a substrate that contains a certain amount of an alkaline metal or an alkaline earth metal, such as a glass substrate, a stainless substrate or a plastic substrate. However, a base film is not necessarily provided when using a quartz substrate or the like, for which impurity diffusion does not cause a problem. After that, a plasma treatment is performed on a surface for forming a gate electrode. In this embodiment mode, since the surface for forming a gate electrode is a substrate, a plasma treatment is performed on the substrate. The plasma treatment is desirably performed without being in contact with a surface for forming a gate electrode. The plasma treatment is performed by using air, oxygen, or nitrogen as a treatment gas under the pressure of several tens of Ton to 800 Ton (106400 Pa), preferably, 700 Ton (93100 Pa) to 800 Ton (atmospheric pressure or pressure in the neighborhood of atmospheric pressure). In addition, an RF source or an AC source can be used as a power supply of the plasma treatment.. For example, plasma is generated by varying power by applying voltage with an AC source under conditions of alternate voltage of 100 V, frequency of 13.56 MHz and the like. Pulse is applied with an interval of voltage width of 2 to 4 μsec to discharge stable plasma. As a result of performing this plasma treatment, surface modification is made so as to be liquid-repellent, that is, low in wettability, to liquid such as alcohol or oil. In other words, a liquid-repellent region is formed by a plasma treatment. As shown in FIG. IB, a lyophilic region is formed in the liquid-repellent region selectively. In this embodiment mode, a region in which a gate electrode is to be formed is selectively inadiated with laser light, thereby making the region in which the gate electrode is to be formed lyophilic. A conductive film serving as a gate electrode 103 is formed in the lyophilic region by dropping a dot mixed with a conductor in a solvent by an ink-jetting method, as shown in FIG. lC. In this embodiment mode, a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped. The gate electrode formed by an ink-jetting method can be miniaturized by dropping a dot in the lyophilic region that is selectively formed. After that, when the solvent of the dot is required to remove, a heat treatment for baking or drying is conducted. Specifically, a heat treatment is conducted preferably in an atmosphere containing oxygen at a predetermined temperature, e.g. 200 °C to 300 °C. At the time, heating temperature is set in order not to produce unevenness on a surface of the gate electrode. Like this embodiment mode, in the case of using a dot having silver (Ag), silver (Ag) that does riot include an organic material can be obtained, since an organic material such as thermosetting resin of an adhesive agent, etc. included in a solvent, or the like is decomposed, when a heat treatment is performed in an atmosphere containing oxygen or nitrogen. Consequently, planarity of a gate electrode surface can be increased and specific resistance value can be lowered. The gate electrode can be made of an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material mainly containing the element, in addition to silver (Ag). The conductive film can be formed by sputtering or plasma CVD instead of an ink-jetting method. A semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus or an AgPdCu alloy can be used as the conductive film formed by sputtering or plasma CVD. As shown in FIG. I'D, an insulating film which serves as a gate insulating film 104 is formed to cover the gate electrode. The insulating film can have a laminated structure or a single layer structure. An insulator such as silicon oxide, silicon nitride or silicon oxynitride can be formed as the insulating film by plasma CVD. Note that a dot including a material of an insulating film may be discharged by an ink-jetting method to form the gate insulating film. Like this embodiment mode, when the gate electrode is made of silver (Ag), it is preferable that a silicon nitride film is used for the insulating film covering the gate electrode. This is because there is a risk that a surface of the gate electrode becomes uneven, since silver oxide is formed by a reaction with silver (Ag), in the case of using an insulating film including oxygen. A semiconductor film 105 is formed over the gate insulating film. The semiconductor film can be formed by a plasma CVD method, a sputtering method, an ink-jetting method or the like. The semiconductor film is 25 to 200 nm thick (preferably, 30 to 60 nm). Silicon germanium as well as silicon can be used for the material of the semiconductor film. In the case of using silicon germanium, the concentration of germanium is preferably about 0.01 to 4.5 atomic %. In addition, the semiconductor film may be an amorphous semiconductor, a semi-amorphous semiconductor in which crystal grains are dispersed in an amorphous semiconductor or a micro crystal semiconductor in which crystal grains of 0.5 nm to 20 nm can be seen in an amorphous semiconductor. Note that a state of a micro crystal in which crystal grains of 0.5 nm to 20 nm can be seen is refened to as a micro crystal (μc). Semi-amorphous silicon using silicon (also refened to as SAS) as a material of a semi-amorphous semiconductor can be obtained by grow discharge decomposition of a suicide gas. As a typical suicide gas, SiH4 is cited, besides, Si2H6, SiH2Cl2, SiHCl3, SiC , SiF4 and the like can be used. SAS can be formed easily by a suicide gas diluted with hydrogen, or hydrogen and one or more rare gas elements selected from helium, argon, krypton, and neon. The suicide gas is preferably diluted so that the dilution rate is in the range of 10 times to 1000 times. SAS can be also formed with Si2H6 and GeF4 by a method of diluting them with a helium gas. The reactive formation of a film by grow discharge decomposition is preferably conducted under low pressure, and the pressure may be about 0.1 Pa to 133 Pa. The power for grow discharge may be 1 MHz to 120 MHz, preferably, a high frequency power of 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 °C or less, and more preferably, substrate heating temperature of 100 °C to 250 °C is recommended. In this embodiment mode, an amorphous semiconductor film (also, referred to as an amorphous silicon film or amorphous silicon) containing silicon as the main component is formed by using plasma CVD. A semiconductor film having one conductivity type is formed. The semiconductor film having one conductivity type can be formed by using a plasma CVD method, a sputtering method, an ink-jetting method or the like. When the semiconductor film having one conductivity type is formed, contact resistance of a semiconductor film and an electrode becomes low, which is preferable. The semiconductor film having one conductivity, type may be formed as necessary. In this embodiment mode, a semiconductor film having N type conductivity 106 is formed by plasma CVD. When the semiconductor film and the semiconductor film having N type conductivity are formed by using plasma CVD, the semiconductor film 105, the semiconductor film having N type conductivity 106, and a gate insulating film are preferably formed sequentially. The sequential formation is possible by varying a material gas supply without being exposed to the atmosphere. As shown in FIG. IE, the semiconductor film 105 and the semiconductor film having N type conductivity 106 are patterned into a desired shape. Although not shown, a mask may be formed at a desired portion and the films may be etched by using the mask. The mask is preferably formed by an ink-jetting method, since efficiency in the use of a material can be improved and a cost and an amount of waste liquid can be reduced. Alternatively, the mask may be formed by a photolithography method. When the mask is formed by an ink-jetting method, further, a photolithography step can be simplified. In other words, a step of forming a photomask, a light-exposure step and the like are not required, and therefore, a facility investment cost can be reduced and manufacturing time can be shortened. When a mask is formed by an ink-jetting method, a plasma treatment may be performed on a surface for forming the mask to form a liquid-repellent region, and then, the mask may be formed in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized. As the mask material, an inorganic material (such as silicon oxide, silicon nitride, silicon oxynitride), a photosensitive or non-photosensitive organic material (such as polyimide, acryl, polyamide, polyimidamide, polyvinyl alcohol, benzocyclobutene or resist) can be used. For example, when a mask is formed from polyimide by an ink-jetting method, polyimide may be discharged at a desired portion by an ink-jetting method and then may be heat-treated at 150 °C to 300 °C to be baked. Thereafter, the semiconductor film 105 and the semiconductor film having N type conductivity 106 are etched by using the mask. A plasma treatment is performed to remove the mask after etching. Note that the mask formed by an ink-jetting method may serve as an insulting film without being removed. A plasma treatment may be conducted on a surface for forming a source electrode and a drain electrode. In this embodiment mode, it is preferable that a plasma treatment is performed on the semiconductor film having N type conductivity, which is a surface for forming a source electrode and a drain electrode, and the gate insulating film. The plasma treatment may be performed without being in contact with the surface for forming the source electrode and the drain electrode. As a result of performing this plasma treatment, surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil. In other words, a liquid-repellent region is formed by the plasma treatment. As a result, the source and drain wiring can be miniaturized. As shown in FIG. IF, a conductive film functioning as a source electrode and a drain electrode 108 is formed. The conductive film may have a single layer structure or a laminated structure. As the conductive film, a film made of an element selected from gold, silver, copper, aluminum, titanium, molybdenum, tungsten or silicon or an alloy film using the element, can be used. Further, the conductive film can be formed by an ink-jetting method, a CVD method or a sputtering method. In this embodiment mode, the conductive film is formed by using a dot including silver (Ag) by an ink-jetting method. Specifically, it is performed similarly to the case of forming the gate electrode shown in FIG. lC. Since a dot is dropped in the region treated by a plasma treatment, the source electrode and the drain electrode formed by an ink-jetting method can be miniaturized. In addition, a lyophilic region may be selectively formed in the liquid-repellent region in the case of miniaturizing the source electrode and the drain electrode as shown in FIGS. 2A to 2C. For example, after a plasma treatment is performed on a semiconductor film having N type conductivity that is a surface for forming a source electrode and a drain electrode, and a gate insulating film as shown in FIG. 2A, a lyophilic region is formed by selective inadiation of laser light as shown in FIG. 2B. After that, as shown in FIG. 2C, a source and drain electrode 108 is formed by dropping a dot onto the lyophilic region. Consequently, a line width of the source and drain electrode formed by an ink-jetting method can be more miniaturized. As described above, a liquid-repellent treatment by a plasma treatment or the like is performed, or further, a selective lyophilic treatment can be performed in a step of forming an electrode, a wiring or the like that is required to be miniaturized. Consequently, the electrode, the wiring or the like can be miniaturized. After dropping a dot for the source and drain electrode, a heat treatment for baking or drying is performed, when the solvent of the dot is required to remove. After that, the semiconductor film having N type conductivity 106 is etched by using the source and drain electrode as a mask. This is because the semiconductor film having N type conductivity prevents the source electrode and the drain electrode from being short-circuited. At the time, the semiconductor film 105 can be also etched to some extent in some cases. As described above, a thin film transistor in which up to the source and drain electrode has been provided is formed. The thin film transistor in this embodiment mode is a so-called bottom gate type thin film transistor, in which a gate electrode is formed under a semiconductor film. More in detail, it is a so-called channel etch type, in which a semiconductor film is etched to some extent. A substrate where such plural thin film transistors are formed is refened to as a TFT substrate. As the thin film transistor shown in this embodiment mode, a liquid-repellent treatment and a selective lyophilic treatment are performed before at least one step of forming a conductive film by an ink-jetting method. The liquid-repellent treatment and the selective lyophilic treatment are performed before forming a gate electrode, a source electrode and a drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment plasma treatment may be performed before at least one ink-jetting step. Thus, the liquid-repellent treatment and the selective lyophilic treatment plasma treatment may be performed before an ink-jetting step which is not shown in this embodiment mode. According to the invention, a method of miniaturizing a wiring or the like by performing a liquid-repellent treatment such as a plasma treatment may be combined. In other words, a step of forming a wiring or the like by an ink-jetting method after performing a liquid-repellent treatment and a selective a lyophilic treatment, and a step of forming a wiring or the like by an ink-jetting method after performing only a liquid-repellent treatment may be combined. As described above, a thin film transistor including gate, source and drain electrodes that are miniaturized by a liquid-repellent treatment and a selective lyophilic treatment before an ink-jetting step, can be obtained. Further, a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent.
Thus, a position of a wiring to be formed can be controlled with accuracy. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method are more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
[Embodiment Mode 2] A method for manufacturing a thin film transistor which has a structure different from that in Embodiment Mode 1 is described in Embodiment Mode 2. The structure different from that in Embodiment Mode 1 is that a protective film is formed over a semiconductor film. Therefore, other manufacturing methods may be refened to Embodiment Mode 1 and detailed description thereof is omitted. As shown in FIG. 3A, a plasma treatment is performed on a substrate 100 having an insulating surface. A base film may be formed on the substrate 100 as necessary. As the result of the plasma treatment, surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquids such as water, alcohol and oil. Namely, a liquid-repellent region is formed by the plasma treatment. Thereafter, a lyophilic region is selectively formed in the liquid-repellent region, as shown FIG. 3B. In this embodiment mode, a region where a gate electrode is to be formed is selectively inadiated with laser light, thereby making the region lyophilic. As shown in FIG. 3C, a gate electrode 103 is formed on the base film, a gate insulating film 104 is formed to cover the gate electrode, and a semiconductor film 105 is formed on the gate insulating film. As a result of performing the liquid-repellent treatment and the selective lyophilic treatment, the gate electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is performed, when the solvent of a dot is required to remove. Then, a protective film 110 is formed on the semiconductor film. An insulating film such as silicon oxide, silicon nitride, or silicon oxynitride is formed as the protective film by an ink-jetting method, a plasma CVD method, a sputtering method or the like. In addition, the semiconductor film, the protective film, and the gate insulating film may be formed sequentially. In the same chamber, they can be sequentially formed by changing supply of a material gas without being exposed to the atmosphere. In addition, efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when the protective film is formed by an ink-jetting method. And a photolithography step can be simplified when the protective film is formed by an ink-jetting method. Accordingly, a photo mask becomes unnecessary, and reduction of costs such as a facility investment cost can be achieved. Further, manufacturing time can be shortened, since a photolithography step becomes unnecessary. At the time, a plasma treatment may be performed on a surface for forming the protective film to form a liquid-repellent region, and the protective film may be formed in the liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region to form the protective film in the lyophilic region. Accordingly, the protective film formed by an ink-jetting method can be miniaturized. A protective film 110 is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode. When the protective film is required to be patterned into a desired shape, the patterning is conducted by using a mask. At the time, the protective film can be etched in a self-aligned manner by being exposed to light using the gate electrode as a mask from a backside of the substrate. Of course, the mask may be formed by a photolithography method or an ink-jetting method. When the mask is formed by an ink-jetting method, a plasma treatment may be performed on a surface for forming the mask to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Accordingly, the mask formed by an ink-jetting method can be miniaturized. As shown in FIG. 3D, a semiconductor film having one conductivity type is formed. In this embodiment mode, the semiconductor film having N type conductivity 106 is formed by a plasma CVD method. As shown in FIG. 3E, the semiconductor film having N type conductivity and the semiconductor film are patterned into a desired shape. In this case, although not shown, a mask may be formed at a desired portion and etching may be performed by using the mask. The mask is preferably formed by an ink-jetting method, since efficiency in the use of materials can be improved and a cost and an amount of waste liquid can be reduced. However, it may be formed by a photolithography step. In particular, steps in the case of forming a mask by an ink-jetting method is more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened. In this embodiment mode, polyimide, polyvinyl alcohol or the like is dropped as a mask by an ink-jetting method. At the time, a plasma treatment may be performed on a surface for forming a mask to conduct a liquid-repellent treatment. Further, a lyophilic region may be formed selectively in the liquid-repellent region. As a result, the mask formed by an ink-jetting method can be miniaturized. A plasma treatment is conducted to remove the mask after etching. The mask formed by an ink-jetting method may serve as an insulating film without being removed. A plasma treatment is performed on a surface for forming a source electrode and a drain electrode as in FIG. IE. In this embodiment mode, a plasma treatment is performed on a semiconductor film having N type conductivity, which is the surface for forming the source electrode and the drain electrode, and a gate insulating film. The plasma treatment may be performed without being in contact with the surface for forming the source electrode and the drain electrode. As a result of this plasma treatment, surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil. In other words, a liquid-repellent treatment is performed by a plasma treatment. Thereafter, a lyophilic treatment is performed selectively on the liquid-repellent region. As shown in FIG. 3F, a conductive film functioning as a source electrode and a drain electrode 108 is formed. In this embodiment mode, the conductive film is formed by using a dot including silver (Ag) by an ink-jetting method. As the result of the liquid-repellent treatment and the selective lyophilic treatment, the source electrode and the drain electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying may be performed, when the solvent of the dot is required to remove. As described above, a thin film transistor in which up to the source electrode and the drain electrode have been provided is formed. The thin film transistor in this embodiment mode is a so-called bottom gate type thin film transistor, in which a gate electrode is formed under a semiconductor film. More in detail, it is a so-called channel protective type, in which a semiconductor film is not etched. A substrate where such plural thin film transistors are formed is refened to as a TFT substrate. As for the thusly obtained thin film transistor, a liquid-repellent treatment and a selective lyophilic treatment are performed before forming a conductive film by an ink-jetting method. The liquid-repellent treatment and the selective lyophilic treatment plasma treatment are performed before forming a gate electrode, and a source and drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step. Thus, a liquid-repellent treatment and a selective lyophilic treatment plasma treatment may be performed before an ink-jetting step that is not shown in this embodiment mode. As described above, a thin film transistor having miniaturized gate, source and drain electrodes can be obtained by a liquid-repellent treatment and a selective lyophilic treatment before an ink-jetting step. Further, a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent. Thus, a position of a wiring to be formed can be controlled with accuracy. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
[Embodiment Mode 3] A method for manufacturing a thin film transistor, which has a structure different from those in Embodiment Modes 1 and 2, is described in Embodiment Mode 3. The thin film transistor, in which a gate electrode is provided over a semiconductor film, is a so-called top gate type thin film transistor. Therefore, other manufacturing methods may be refened to Embodiment Modes 1 and 2 and detailed description thereof is omitted. As shown in FIG. 4A, a base film 101 is formed on a substrate 100 having an insulating surface. After that, a conductive film to be a source and drain electrode 108 and a semiconductor film having one conductivity are formed sequentially. In this embodiment mode, a semiconductor film having N type conductivity 106 is used for the semiconductor film having one conductivity. The conductive film to be a source and drain electrode and the semiconductor film having N type conductivity are formed, and then, are patterned into a desired shape by using a mask. Although not shown, the mask can be formed by an ink-jetting method or a photolithography method. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a mask is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened. When a mask is formed by an ink-jetting method, a plasma treatment may be performed on a surface for forming the mask to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Accordingly, the mask formed by an ink-jetting method can be miniaturized. The mask is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode. Thereafter, the mask is baked by heating as necessary and patterned by dry etching. A plasma treatment is conducted to remove the mask after patterning. The mask formed by an ink-jetting method may serve as an insulating film without being removed. As shown in FIG. 4B, a semiconductor film 105 is formed to cover the semiconductor film having N type conductivity. A mask 112 is formed on the semiconductor film 105. The mask 112 can be formed by an ink-jetting method or a photolithography method. The mask is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode. The mask formed by an ink-jetting method is baked by heating as necessary. Note that a plasma treatment may be performed on the semiconductor film 105 to form a liquid-repellent region at the time. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized. After that, the semiconductor film 105 is patterned into a desired shape by using the mask. At the same time, the semiconductor film having N type conductivity can be also patterned. In other words, when the semiconductor film 105 and the semiconductor film having N type conductivity 106 have the same etching rate to one gas, they are patterned simultaneously. A plasma treatment is performed to remove the mask 112 after patterning.
Note that the mask formed by an ink-jetting method may serve as an insulating film without being removed. As shown in FIG. 4C, the insulating film which functions as a gate insulating film 104 is formed to cover the semiconductor film 105. The gate insulating film may be formed at least between the semiconductor film and a gate electrode to be formed later. Then, a plasma treatment is performed on the gate insulating film 104. As a result of this plasma treatment, surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil. In other words, a liquid-repellent treatment is performed by a plasma treatment. As shown in FIG. 4D, a lyophilic treatment is conducted by inadiating selectively on the liquid-repellent region with laser light. In this embodiment mode, the region to be provided with the gate electrode is made selectively lyophilic. As shown in FIG. 4E, a conductive film functioning as a gate electrode 103 is formed on the semiconductor film with a gate insulating film therebetween. In this embodiment mode, a dot in which a conductive material of Ag is dispersed in a solvent of tetradecane is dropped. As a result of performing the liquid-repellent treatment and the selective lyophilic treatment, the gate electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. Thus, a thin film transistor in which up to a gate electrode has been formed and which serves as a semiconductor element is completed. A substrate where such plural thin film transistors are formed is refened to as a TFT substrate. As shown in FIG. 4F, a protective film 113 is formed to at least cover the gate electrode. The protective film can have a laminated structure or a single layer structure. An insulator such as silicon oxide, silicon nitride or silicon oxynitride can be formed as the protective film by plasma CVD. Note that a dot including a material of an insulating film may be discharged by an ink-jetting method to form the protective film. Like this eriibodiment mode, when the gate electrode is made of silver (Ag), it is preferable that a silicon nitride film is used for the protective film covering the gate electrode. This is because there is a risk that a surface of the gate electrode becomes uneven, since silver oxide is formed by a reaction with silver (Ag) when a protective film containing oxygen is used. The thin film transistor in this embodiment mode, in which a gate electrode is provided over a semiconductor film, is a so-called a top gate type thin film transistor. As for a thin film transistor formed as in this embodiment, a liquid-repellent treatment and a selective lyophilic treatment are conducted before forming a conductive film by an ink-jetting method. In this embodiment mode, the liquid-repellent treatment and the selective lyophilic treatment are performed before forming the gate electrode by an ink-jetting method. However, the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step. Thus, the liquid-repellent treatment and the selective lyophilic treatment may be conducted before an ink-jetting step that is not described in this embodiment mode. As described above, a thin film transistor having a miniaturized gate electrode can be obtained by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step. Further, a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent. Thus, a position of a wiring to be formed can be controlled with accuracy. Efficiency in the used of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost be achieved, and manufacturing time can be shortened.
[Embodiment Mode 4] A method for manufacturing a thin film transistor, which has a structure different from that of Embodiment Mode 3, is described in Embodiment Mode 4. The structure is different from that of Embodiment Mode 3 in that a source and drain electrode is formed by an ink-jetting method. Thus, other manufacturing methods may be refened to Embodiment Mode 3 and detailed description thereof is omitted. As shown in FIG. 5A, a base film 101 is formed on a substrate 100 having an insulating surface. A plasma treatment is performed on the base film 101. As a result of this plasma treatment, surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil. In other words, a liquid-repellent region is formed by the plasma treatment. As shown in FIG. 5B, a lyophilic treatment is conducted by inadiating selectively the liquid-repellent region with laser light. In this embodiment mode, the region to be provided with the source and drain electrode is selectively inadiated with
laser light to be lyophilic. As shown in FIG. 5C, a source and drain electrode is formed by an ink-jetting
method. In this embodiment mode, a dot in which a conductive material of Ag is dispersed in a solvent of tetradecane is dropped. As a result of the liquid-repellent treatment and the selective lyophilic treatment, the source and drain electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. As shown in FIG. 5D, a semiconductor film having one conductivity type is formed to cover the source and drain electrode. A semiconductor film having N type conductivity 106 is used as the semiconductor film having one conductivity type in this embodiment mode. The semiconductor film having N type conductivity covering the source and drain electrode is etched for preventing a short-circuit. For example, the semiconductor film having N type conductivity between the source electrode and the drain electrode is etched by a dry-etching method by using a mask. As shown in FIG. 5E, a semiconductor film 105 is formed to cover the semiconductor film having N type conductivity. Then, the semiconductor film 105 is
patterned by using a mask. At the same time, the semiconductor film having N type conductivity may be also patterned in some cases. In other words, when the semiconductor film 105 and the semiconductor film having N type conductivity 106 have the same etching rate to one gas, they are patterned simultaneously. The mask can be formed by an ink-jetting method or a photolithography method. Although not
shown, the mask is formed by dropping polyimide, polyvinyl alcohol or the like by an ink-jetting method in this embodiment mode. The mask may be baked by heating as necessary and patterned by dry etching. Note that a plasma treatment may be performed ori the semiconductor film 105 to form a liquid-repellent region at the time. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized. A plasma treatment is performed to remove the mask after patterning. Note that the mask formed by an ink-jetting method may serve as an insulating film without being removed. Thereafter, an insulating film functioning as a gate insulating film 104 is formed to cover the semiconductor film. A plasma treatment is performed on the gate insulating film 104. As a result of this plasma treatment, surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil. In other words, a liquid-repellent treatment is performed by the plasma treatment. Thereafter, a lyophilic treatment is performed selectively on the liquid-repellent region by laser inadiation. As shown in FIG. 5F, a conductive film functioning as a gate electrode 103 is formed on a semiconductor film with a gate insulating film therebetween. In this embodiment mode, a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped. As the result of the liquid-repellent treatment and the selective lyophilic treatment, the gate electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. Thus, a thin film transistor in which up to a gate electrode has been formed and which serve as a semiconductor element is completed. A substrate where such plural thin film transistors are formed is refened to as a TFT substrate. Then, a protective film 113 is preferably formed to cover at least the gate electrode. The protective film can have a laminated structure or a single layer structure. As the protective film, an insulator such as silicon oxide, silicon nitride or silicon oxynitride can be formed by a plasma CVD method. Note that a protective film may be formed by discharging a dot including a material of an insulating film by an ink-jetting method. Like this embodiment mode, a silicon nitride film is preferably used for the protective film covering the gate electrode, when silver (Ag) is used for the gate electrode. This is because there is a risk that a surface of the gate electrode becomes uneven since silver oxide is formed due to a reaction with silver (Ag), when a protective film containing oxygen is used. The thin film transistor in this embodiment mode, in which a gate electrode is provided over a semiconductor film, is a so-called a top gate type thin film transistor. As for the thusly obtained thin film transistor, a liquid-repellent treatment and a selective lyophilic treatment are conducted before forming a conductive film by an ink-jetting method. The liquid-repellent treatment and the selective lyophilic treatment are performed before forming a gate electrode, and a source electrode and a drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step. Thus, a liquid-repellent treatment and a selective lyophilic treatment may be performed before an ink-jetting step that is not shown in this embodiment mode. As described above, a thin film transistor having miniaturized source, drain and gate electrodes can be obtained by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step. Further, a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent. Thus, a position of a wiring to be formed can be controlled with accuracy. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method are more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
[Embodiment Mode 5] An example of forming a thin film transistor using a crystalline semiconductor film is described in Embodiment Mode 5. As shown in FIG. 18A, a base film 101 is formed on a substrate 100 having an insulating surface. The base film 101 may have a laminated structure. In this embodiment mode, the base film 101 has a laminated structure in which a first base film 101a and a second base film 101b are laminated in order. A silicon oxynitride film is formed as the first base film 101a by a plasma CVD method with SiH4, N2O, NH3, or N as a material gas, at a pressure of 0.3 Ton (39.9 Pa), an RF power of 50 W, an RF frequency of 60 MHz, a substrate temperature of 400°C to be from 10 nm to 200 nm (preferably, from 50 nm to 200 nm) in thickness. A silicon oxynitride film is formed as the second base film 101b by a plasma CVD method with SiH4 or N2O as a material gas, at a pressure of 0.3 Ton (39.9 Pa), an RF power of 150 W, an RF frequency of 60 MHz, a substrate temperature of 400° C to be from 50 nm to 200 nm (preferably, from 150 nm to 200 nm) in thickness. An amorphous semiconductor film is formed on the base film 101. The amorphous semiconductor film is 25 to 100 nm thick (preferably, 30 to 60 nm). Silicon germanium as well as silicon can be used for the material of the amorphous semiconductor film. In the case of using silicon germanium, the concentration of germanium is preferably about 0.01 to 4.5 atomic %. In addition, the semiconductor film mainly containing silicon of 66 nm (also, refened to as an amorphous silicon film or amorphous silicon) is used in this embodiment mode. The amorphous semiconductor film is crystallized to form a crystalline semiconductor film. A method of adding a metal element promoting crystallization of an amorphous semiconductor film and heating it can be employed as the crystallization method. One or more elements selected from Ni, Fe, Co, Pd, Pt, Cu, Au, Ag, In and Sn can be used as the metal element. It is preferable to use the metal element, since low temperature crystallization is possible. However, a step of removing the metal element, a so-called gettering step, is required. The amorphous semiconductor film may be inadiated with laser light. Continuous wave laser (CW laser) or a pulsed laser (pulse oscillation type) can be used. One laser or more lasers selected from an Ar laser, a Kr laser, an excimer laser, a YAG laser, a Y2O3 laser, a YVO4 laser, a YLF laser, a YAlO3 laser, a glass laser, a ruby laser, an alexandrite laser, a Ti: sapphire laser, a copper vapor laser, and a gold vapor laser can be used as the laser. For example, a Ni solution (including a water solution or an acetic acid medium) is applied over the amorphous semiconductor film by an application method such as spin-coating or dipping or an ink-jetting method. At the time, it is preferable to form an oxide film to be 1 to 5 nm thick by UV light inadiation in an oxygen atmosphere, a thermal oxidation method, a treatment using ozone water including hydroxyl radical or hydrogen peroxide or the like, in order that wettability is improved in the surface of the amorphous semiconductor film to make the solution applied over the entire surface of the amorphous semiconductor film. In addition, a Ni ion may be injected into an amorphous semiconductor film by an ion implantation method, a heat treatment may be performed in an atmosphere of steam containing Ni, or sputtering may be conducted with Ar plasma using a Ni material as a target. In this embodiment mode, a water solution including Ni acetate of 10 ppm is applied by a spin coating method. After that, the amorphous semiconductor film may be heat-treated for 2 to 20 hours at temperatures from 500 to 550 °C and crystallized to form a crystalline semiconductor film. At this time, it is preferable that a heating temperature is changed gradually. Dehydrogenation, which can reduce film unevenness in crystallization, can be conducted, since hydrogen and the like come out of the amorphous semiconductor film by the initial heat treatment at low temperature. A magnetic field may be applied to crystallize with its magnetic energy, or a high power microwave may be used. In this embodiment mode, after a heat treatment is performed for one hour at 500°C, a heat treatment is performed for four hours at 550°C in a vertical furnace. An island like semiconductor film 502 is formed by patterning the crystalline semiconductor film. An insulating film serving as a gate insulating film 104 is formed to cover the island like semiconductor film 502. The insulating film described above can be used for the gate insulating film. TiO is used for the gate insulating film in this embodiment mode. As shown in FIG. 18B, a plasma treatment is performed on a surface for forming the gate electrode. In this embodiment mode, a plasma treatment is performed on the gate insulating film that is the surface for forming the gate electrode. The plasma treatment may be performed without being in contact with the surface for forming the gate electrode. As a result of this plasma treatment, a surface modification is made so that the surface becomes liquid-repellent, that is, low in wettability, to liquid such as water, alcohol or oil. In other words, a liquid-repellent region is formed by the plasma treatment. As shown in FIG. 18C, a lyophilic region is selectively formed in the liquid-repellent region. In this embodiment mode, a region where the gate electrode is formed is selectively inadiated with laser light, thereby making the region lyophilic. As shown in FIG. 18D, a conductive film functioning as the gate electrode 103 is formed in the liquid-repellent region by dropping a dot mixed with a conductive material in a solvent by an ink-jetting method. In this embodiment mode, a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped. The gate electrode formed by an ink-jetting method can be miniaturized by dropping a dot in the selectively formed lyophilic region. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. Specifically, the heat treatment may be at a predetermined temperature, e.g. 200°C to 300°C, preferably, it may be conducted in an atmosphere containing oxygen. At the time, a heating temperature is set so that unevenness on the gate electrode surface is not generated. When a dot including silver (Ag) is employed like this embodiment mode, a heat treatment is conducted in an atmosphere containing oxygen and nitrogen, thereby decomposing an organic material such as thermosetting resin of an adhesive agent or the like included in the solvent to obtain silver (Ag) that does not include the organic material. Consequently, planarity of the gate electrode surface is increased and specific resistance value can be reduced The gate electrode can be made of an element selected from tantalum, tungsten, titanium, molybdenum, aluminum, and copper, or an alloy material or a compound material mainly containing the element, in addition to silver (Ag). The conductive film can be formed by a sputtering method or a plasma CVD method instead of an ink-jetting method. A semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus or an AgPdCu alloy can be used as the conductive film formed by sputtering or plasma CVD. After that, an impurity element is added in a self aligned manner by using the gate electrode 103. For example, phosphorus (P) is added into a semiconductor film that is to be an N-channel thin film transistor and boron (B) is added into a semiconductor film that is to be a P-channel thin film transistor. As described above, a thin film transistor in which up to an impurity region has been formed, is completed. The thin film transistor in this embodiment mode is a crystalline thin film transistor having a crystalline semiconductor film and is a top gate thin film transistor, in which a gate electrode is formed over a semiconductor film. A substrate where such plural thin film transistors are formed is refened to as a TFT substrate. After that, as shown in FIG. 18E, an insulating film 507 containing nitrogen is formed to cover the gate electrode 103. In this embodiment mode, the insulating film 507 can be formed by an ink-jetting method, too. After that, dangling bonds of a semiconductor film can be reduced, by heating after forming the insulating film 507. As for the thusly obtained thin film transistor, a liquid-repellent treatment and a selective lyophilic treatment are conducted before forming a conductive film by an ink-jetting method. The liquid-repellent treatment and the selective lyophilic treatment are performed before forming a gate electrode, and a source and drain electrode by an ink-jetting method, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before at least one ink-jetting step. Thus, a liquid-repellent treatment and a selective lyophilic treatment may be performed before an ink-jetting step that is not shown in this embodiment mode. As described above, a thin film transistor having miniaturized source, drain and gate electrodes can be obtained by a liquid-repellent treatment and a selective lyophilic treatment before an ink-jetting step. Further, a wiring can be formed in a lyophilic region even when a dot is discharged out of alignment to some extent. Thus, a position of a wiring to be formed can be controlled with accuracy. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
[Embodiment Mode 6] An apparatus for a plasma treatment is described in Embodiment Mode 6. As shown in FIG. 15A, an electrode 403, a dielectric 404 that is formed to cover a surface of the electrode, a power supply 402 connected to the electrode, a substrate 406 having a surface (an object surface) to be exposed to a plasma treatment, a stage 407 for fixing a substrate are provided in a treatment chamber 401. Teflon (a registered trademark) is employed as the dielectric in this embodiment mode. The electrode 403 and the power supply 402 collectively correspond to a plasma unit. In this embodiment mode, the electrode 403 is used to generate plasma, but a known method may be employed. For example, plasma can be generated by microwave or electromagnetic induction. In this embodiment mode, the dielectric is formed to cover the surface of the electrode, but the dielectric may be disposed at least so as to be exposed to plasma generated between an object to be treated and the electrode. For example, the dielectric may be provided between the object and the electrode. A substrate having a surface to be treated by a plasma treatment is ananged on the stage and pulse voltage is applied from the power supply. Then, plasma is generated between the electrode and the substrate. The density of the plasma is 1 x 1010 to 1 x 101 m "3. The pressure in the treatment chamber is several tens of Ton to 800 Ton (106400 Pa), preferably, 700 Ton (93100 Pa) to 800 Ton (atmospheric pressure or pressure in the neighborhood of atmospheric pressure) and pulse voltage is used to discharge. Pulse voltage is applied to generate stable plasma in atmospheric pressure or pressure in the neighborhood of atmospheric pressure in this embodiment mode. Air, oxygen or nitrogen is used as a treatment gas in this plasma treatment. Concretely, voltage to be applied is resonated, like each damped oscillation wave, as a damped oscillation waveform periodic wave in which the damped oscillation wave is generated repeatedly and intermittently. A pair of plus pulse and minus pulse is supplied to a primary side of a high-voltage transformer with repetition frequency, and the damped oscillation waveform periodic wave which is resonated as each damped oscillation wave is outputted from a secondary side of the high-voltage transformer to be applied to a pair of electrodes. The voltage rise time of each resonated damped oscillation wave is preferably 5 μs or less at the time. The repetition period of the damped oscillation wave is preferably 10 to lOOkHz. The pulse is preferably 100 to 10000 pps (10000 times per second). As the result of the plasma treatment, a surface for forming a conductive film is modified. Specifically, when Teflon is attached to the surface of the electrode, a CF2 bond is formed on the surface for forming a. conductive film. A specific state of the CF2 bond before and after the plasma treatment will be shown in Embodiment. As a result, the treated surface shows a liquid-repellent property. After that, when a wiring or the like is formed thereon, a line width becomes nanow, thereby achieving miniaturization of the wiring. When a plasma treatment is conducted preferably under atmospheric pressure or pressure in the neighborhood of atmospheric pressure in this manner, it can be easily conducted without vacuuming. As a result, manufacturing time of a thin film transistor can be shortened drastically. Needless to say, the plasma treatment may be performed in vacuum. A treatment chamber having a plasma unit for a plasma treatment and a treatment chamber for an ink-jetting step may be arranged adjacently, thereby making up a so-called multi chamber, which is capable of transporting a substrate (an object to be treated) having a surface to be treated without being exposed to the atmosphere. Specifically, a multi chamber is preferable since a substrate having a surface to be treated can be transfened without being exposed to the atmosphere in the case of conducting a plasma treatment and an ink-jetting step in vacuum. Moreover, it is not necessarily required to perform a plasma treatment in the treatment chamber since the plasma treatment can be conducted under atmospheric pressure or pressure in the neighborhood of atmospheric pressure, as shown in FIG. 15B. An uniaxial robot 410 for an X-axis and an uniaxial robot 411 for a Y-axis are provided in FIG. 15B, and a stage 407 is provided over one of the robots. A substrate
406 having a surface to be treated is provided on the stage. The electrode 403 is cylindrical and a dielectric 404 covers the circumference of the electrode. Teflon (a registered trademark) is employed as the dielectric in this embodiment mode. Other plasma conditions are described above, and thus, description thereof is omitted. When the plasma treatment is performed, the electrode and the substrate are relatively moved. When the substrate is larger than the electrode, the electrode and the substrate may be moved relatively. Alternatively, the electrode and the substrate may be moved relatively, while rotating the substrate. When they are moved in these ways, a position control may be conducted with a CCD camera or the like by an alignment marker or the like as a mark. The plasma treatment can be easily conducted without vacuuming since the plasma treatment can be conducted in the atmosphere. Consequently, manufacturing time of a thin film transistor can be drastically shortened. Of course, the plasma treatment can be performed in vacuum.
[Embodiment Mode 7] An ink-jetting apparatus (a droplet discharging apparatus) having a light-inadiation unit is described in Embodiment Mode 7. As the droplet discharging apparatus shown in FIG. 16, a droplet discharging unit 701, a light inadiation unit, a stage (a transport stage) 708 for ananging an object to be treated 702, and a CCD camera 712 are provided in a treatment chamber 706. A central processing unit 715 for controlling a laser oscillator 707, the CCD camera 712, the droplet discharging unit 701, and the stage 708 is provided. The laser oscillator 707 and a fiber 709 are provided as the light irradiation unit, and a terminal 710 is provided for the end of the fiber. The terminal includes an optical system, e.g., a lens 711 for converging laser light. As well as the laser oscillator, an ultraviolet lamp, a halogen lamp, and a black light can be employed. Light emitted from the laser oscillator passes through the fiber, is converged to be a desired size with the optical lens provided for the terminal, and is emitted on an object to be treated. An optical system comprising a shutter, a reflector such as a minor or a half minor, a cylindrical lens or a convex lens, or the like may be installed between the laser oscillator and the object to be treated so as to adjust a shape or a course of laser light emitted from the laser oscillator. Such an optical system may be provided in the terminal 710. Light can enter obliquely from above the object to be treated by adjusting the optical system in the light inadiation unit. When the object to be treated is light-transmitting, light can be emitted from below the object to be treated. Although not shown, a nozzle driving power source and a nozzle heater for discharging a droplet are incorporated in the droplet discharging apparatus, and a moving unit for moving the droplet discharging unit is provided. When a light inadiation unit having flexibility like the fiber is employed, it can be moved together with being fixed on the droplet discharging apparatus. In the droplet discharging apparatus, a substrate that is the object to be treated 702 is set in the stage 708 having a moving unit in an X-Y axis direction. The substrate, the droplet discharging unit and the light inadiation unit are relatively moved to perform a treatment on a whole substrate. In this embodiment mode, the substrate can be moved to an arbitrary point in the X - Y plane by the stage. At the time, position control is performed by the CCD camera. In this manner, a lyophilic treatment is performed on the substrate by the light inadiation unit. After that, a droplet discharging treatment of dropping a dot onto a lyophilic region is conducted by the droplet discharging unit. The lyophilic treatment or the droplet discharging treatment is achieved by relatively moving the droplet discharging unit 701 and the substrate, and a predetermined timing of light inadiation or droplet discharging, thereby drawing a desired pattern on the substrate. Thus, the lyophilic treatment or the droplet discharging treatment can be started when the substrate reaches a predetermined position by the stage, where the droplet discharging unit 701 stands by. Specifically, since the droplet discharging treatment requires a high accuracy, it is preferable that the substrate on the transport stage is stopped and only the droplet discharging unit 701 with high controllability is scanned when a droplet is discharged. In addition, it is possible that the light inadiation unit and the droplet discharging unit, and the substrate are moved simultaneously in order to prevent dots from being solidified at the start point and the end point of a wiring. The atmosphere of the treatment chamber can be controlled in the droplet discharging apparatus. For example, a pressure reduction apparatus such as a cryostat pump can be provided for an exhaust port of the treatment chamber to vacuum evacuate. A predetermined gas such as nitrogen, argon, or oxygen may be supplied thereinto, and the treatment chamber may be controlled to be an oxidative atmosphere, a reduction atmosphere or the like. When the atmosphere is controlled in this manner, the laser oscillator or the like can be arranged outside the treatment chamber and light irradiation through a window or the like can be performed. A heater for heating the objected to be treated may be provided in the droplet discharging apparatus like this. Although not shown, a measuring unit of various physical properties such as temperature or pressure may be provided as necessary. The units described above can be collectively controlled by the central processing unit. When the central processing unit is connected to a production management system or the like with a LAN cable, a wireless LAN, an optic fiber or the like, steps can be collectively controlled from the outside, which leads to enhance productivity. A lyophilic treatment and a droplet discharging treatment can be performed by using the apparatus described above. FIG. 17 shows an apparatus using an optical pickup element as a light inadiation unit. It becomes simple and easy to relatively move an object to be treated, and the light inadiation unit and the droplet discharging unit by using a light source built-in type light inadiation unit such as an optical pickup element. Consequently, it is possible to enhance position control of light inadiation or control of discharging a droplet. The treatment chamber 706 can control an atmosphere in the droplet discharging apparatus like this. For example, a pressure reduction apparatus 721 such as a cryostat pump can be provided for an exhaust port 705 of the treatment chamber to vacuum evacuate. At this time, a substrate that is an object to be treated is transported into the treatment chamber from a transport port 703, and fixed on a stage. A predetermined gas such as nitrogen, argon, or oxygen may be supplied thereinto from a
gas introduction port provided in the treatment chamber, and the treatment chamber may be controlled to be an oxidative atmosphere or a reduction atmosphere.
A heater for heating the objected to be treated may be provided in the droplet discharging apparatus like this. Other structures are identical to those of FIG. 16, and thus, description in detail thereof is omitted. In this embodiment mode, a droplet is discharged by a so-called piezo system using a piezoelectric element; however, a system in which a solution is pushed out by using bubbles generated by heating a heat-generator, a so-called thermal ink-jetting system, may be used depending on a solution material. In this case, a piezoelectric element is replaced with a heat-generator. In addition, wettability of a solution with a solution chamber flow path, an extra solution chamber, a fluid resistive portion, a chamber for pressurizing, and an outlet for a solution (nozzle, head) is important for discharging a droplet. Therefore, a carbon film, a resin film or the like for adjusting the wettability with a material is formed in each flow path. The structure of the apparatus makes it possible to perform a lyophilic treatment by light inadiation, discharge continuously a dot in a lyophilic region in the same treatment chamber, and form a minute wiring pattern on a substrate efficiently and
accurately. There are a sequential method by which a solution is sequentially discharged to form a line-like wiring and an on-demand method by which a solution is discharged in a dot-like as the droplet discharging method. Both methods can be employed. [Embodiment mode 8] An example of forming a film containing Teflon (Teflon film), instead of a plasma treatment, is described in Embodiment Mode 8. Other manufacturing methods are refened to Embodiment Mode 1. As shown in FIG. 14A, a base film 101 is formed on a substrate 100 having an insulating surface. After that, a Teflon film 128 is formed. The Teflon film may be formed to be a mono molecular layer level, i.g. 5 nm or less in thickness. The Teflon film can be formed by sputtering, CVD or the like. Thereafter, the Teflon film is selectively inadiated with laser light to form a lyophilic region. As shown in FIG. 14B, a conductive film functioning as a gate electrode 103 is formed in the lyophilic region of the Teflon film. The gate electrode can be formed by dropping a dot including a conductive material in a solution by an ink-jetting method. In this embodiment mode, a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped. As the result of forming the Teflon film and forming the lyophilic region selectively there, the gate electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. The formed Teflon film of a thickness at a mono molecular layer level is removed by the heat treatment. As shown in FIG. 14C, a gate insulating film 104, a semiconductor film 105, and a semiconductor film having N type conductivity 106 are formed sequentially and patterned into a desired shape. After that, a conductive film serving as a source and drain electrode 108 is formed. The Teflon film may be formed before forming the source and drain electrode. Further, a lyophilic region may be formed selectively in the Teflon film. Consequently, the source and drain electrode formed by an ink-jetting method can be miniaturized. A channel etch type thin film transistor shown in Embodiment Mode 1 is described in this embodiment mode, but a structure of a thin film transistor is not limited thereto. In other words, a Teflon film may be formed to have a liquid-repellent property and a lyophilic region may be formed selectively therein, in any one of the methods for manufacturing a thin film transistor described in the embodiment modes described above. As described above, a thin film transistor in which up to a source electrode and a drain electrode have been formed is completed. A substrate where such plural thin film transistors are formed is referred to as a TFT substrate. In addition, as for the thusly obtained thin film transistor, a Teflon film is formed and a lyophilic region is selectively formed before forming a conductive film by an ink-jetting method. A Teflon film is formed and a lyophilic region is selectively formed before forming a gate electrode by an ink-jetting method in this embodiment mode, but the Teflon film may be formed and the lyophilic region may be selectively formed before at least one ink-jetting step. Thus, a Teflon film may be formed and a lyophilic region may be selectively formed before an ink-jetting step which is not shown in this embodiment mode. A plasma treatment described above may be performed and further a lyophilic region may be formed in addition to the steps of forming the Teflon film and a selective lyophilic region, before employing an ink-jetting method. As described above, a thin film transistor having miniaturized gate, source and drain electrodes can be obtained by the steps of forming a Teflon film and a selective lyophilic region before an ink-jetting step. Efficiency in the use of materials improves, and a cost and an amount of waste liquid can be reduced when a wiring, a mask or the like is formed by an ink-jetting method. In particular, steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Consequently, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened.
[Embodiment mode 9] A case of forming a film containing a silane coupling agent instead of a Teflon film is described in Embodiment Mode 9. A silane coupling agent is applied by an application method such as a spin-coating method. After that, the silane coupling agent is dried. In this embodiment mode, it is dried naturally. Washing is performed so as to remove an unnecessary silane coupling agent. In this embodiment mode, it is washed with water.
Consequently, the silane coupling agent can be formed so as to have a film thickness of a mono molecular layer. After that, the silane coupling agent is baked. In this embodiment mode, a heat treatment is performed at 100 °C for ten minutes. In this way, the silane coupling agent can be formed, and thus, a surface for forming an element can be liquid-repellent. Note that the silane coupling agent can be removed.
Specifically, the silane coupling agent can be removed by a heat treatment in some cases. After that, a lyophilic region is formed selectively. A dot is dropped in the lyophilic region. Consequently, a wiring or the like formed by an ink-jetting method can be miniaturized. Other manufacturing methods are similar to those of the embodiment mode described above, and thus detailed description thereof is omitted. As described above, a thin film transistor including miniaturized gate, source and drain electrodes can be obtained by forming a silane coupling agent before an ink-jetting step and selectively forming a lyophilic region.
[Embodiment Mode 10] An interlayer insulating film provided to cover a thin film transistor and a wiring that is formed in an opening portion formed in the interlayer insulating film are described in Embodiment Mode 10. As shown in FIG. 6A, a thin film transistor (also refened to as a TFT) 120 having a protective film 113 is formed over a substrate 100 having an insulating surface, according to the embodiment modes described above. This embodiment mode describes a TFT as shown in Embodiment Mode 1, but any TFT described in the embodiment modes described above may be used. An interlayer insulating film 121 is formed to cover the TFT 120.
Accordingly, planarity can be increased. As the interlayer insulating film, an inorganic material (such as silicon oxide, silicon nitride, silicon oxynitride), a photosensitive or non-photosensitive organic material (polyimide, acryl, polyamide, polyimidamide, benzocyclobutene, or resist), siloxane, or polysilazane and a laminated structure thereof can be used. Siloxane is formed by using a polymeric material as a starting material, which has a skeleton formed by the bond of silicon (Si) and oxygen (O), and which includes at least hydrogen as a substituent, or further at least one of fluoride, alkyl group, and aromatic hydrocarbon as the substituent. Polysilazane is formed by using a liquid material including a polymeric material haying a bond of silicon (Si) and nitrogen (Ni) as a start material. As an organic material, either positive type photosensitive organic resin or negative photosensitive organic resin may be used. When planarity is increased, CMP or the like may be performed on an interlayer insulating film. As shown in FIG. 6B, an opening portion 122 having a desired shape is formed at a desired position of the interlayer insulating film 121. A case of forming the opening portion with a tapered shape in a side face thereof in the interlayer insulating film over the source electrode and the drain electrode is described in this embodiment mode. A mask is formed on the interlayer insulating film 121 and the opening portion is formed by etching by using the mask. The mask can be formed by an ink-jetting method or a photolithography method. In particular, steps in the case of forming a mask by an ink-jetting method can be more simplified than the case of a photolithography step. Therefore, reduction of costs such as a facility investment cost can be achieved, and manufacturing time can be shortened. At the time, a plasma treatment may be performed on the interlayer insulating film 121 to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region. Consequently, the mask formed by an ink-jetting method can be miniaturized. A dot including etchant may be dropped to form an opening portion in the interlayer insulating film by an ink-jetting method, as shown in FIG. 20 A. When an opening portion is formed by an ink-jetting method, efficiency in the use of etchant is improved, reduction of a cost, and reduction of waste liquid are possible. And a photolithography step can be simplified when the opening portion is formed by an ink-jetting method. As shown in FIG. 21A, a material of an interlayer insulating film and a material of a wiring may be dropped by an ink-jetting method to form the wiring 123. In this case, surfaces of the interlayer insulating film or the wiring may be polished by CMP or the like to improve the planarity as shown in FIG. 21B. A plasma treatment is performed on the interlayer insulating film 121 in which the opening portion is formed. As a result of this plasma treatment, surface modification of the interlayer insulating film and within the opening portion (including a side face of the opening portion) is made so as to be liquid-repellent, that is, low in wettability, to liquid such as water, oil or alcohol. In other words, a liquid-repellent treatment is performed by the plasma treatment. Thereafter, a lyophilic region is formed in the liquid-repellent region by inadiating the opening portion selectively with laser light. As shown in FIG. 6C, a wiring 123 is formed in the opening portion. The wiring 123 can be formed by a sputtering method or an ink-jetting method. In this embodiment mode, a dot in which a conductor of silver (Ag) is dispersed in a solvent of tetradecane is dropped to form the wiring. At the time, the inside of the opening portion of the interlayer insulating film (including a side face of the opening portion) is lyophilic. The surface of the interlayer insulating film excluding the opening portion is liquid-repellent. Therefore, a dot including a material of the wiring can easily enters the inside of the opening portion. Further, the wiring formed by an ink-jetting method can be miniaturized. It is preferable for the case of forming a wiring by an ink-jetting method to control a liquid-repellent property and a lyophilic property in this manner. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. As for the thusly obtained thin film transistor, a liquid-repellent treatment and a selective lyophilic treatment are performed before forming the wiring on the interlayer insulating film by an ink-jetting method. In this embodiment mode, the liquid-repellent treatment and the selective lyophilic treatment are performed before or after forming the opening portion, but the liquid-repellent treatment and the selective lyophilic treatment may be performed before and after forming the opening portion. When the wiring formed in the opening portion and other wirings (e.g., signal line) are formed by an ink-jetting method, the wirings can be miniaturized by performing a liquid-repellent treatment and a selective lyophilic treatment on the interlayer insulating film. As described above, a thin film transistor having a miniaturized wiring formed on the interlayer insulating film can be obtained by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step.
[Embodiment Mode 11] A method of forming a pixel electrode is shown in Embodiment Mode 11. As shown in FIG. 7A, a thin film transistor 120 having a protective film 113 is formed on a substrate 100 having an insulating surface. This embodiment mode describes a TFT as shown in Embodiment Mode 1, but any TFT described in Embodiment Modes above may be used. A case of forming a pixel electrode 125 to be connected to a source electrode and a drain electrode in a lower portion of the electrodes is described. After forming a gate insulating film, a semiconductor film and a semiconductor film having N type conductivity are patterned to form the pixel electrode in the area for forming the source electrode or the drain electrode. The pixel electrode can be formed by a sputtering method or an ink-jetting method. The pixel electrode is made of a light-transmitting material or a non-light transmitting material. For example, an ITO and the like can be used in the case of a light-transmitting material, whereas a metal film can be used in the case of a non-light transmitting material. An ITO (indium tin oxide), an IZO (indium zinc oxide) in which zinc oxide (ZnO) of 2 % to 20 % is mixed into indium oxide, ITO-SiOx in which silicon oxide (SiO ) of 2 % to 20 % is mixed into indium oxide (refened to as ITSO or NITO for convenience), an organic indium, an organotin, a titanium nitride (TiN), and the like can also be used as specific examples of the pixel electrode. Specifically, when the pixel electrode is formed by an ink-jetting method, a plasma treatment may be performed on the gate insulating film which is a surface for forming the pixel electrode to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region by laser inadiation. In FIG. 7A, a dot dispersed with a conductor of ITO is dropped by an ink-jetting method to form a pixel electrode. As a result of the liquid-repellent and the selective lyophilic treatment, the pixel electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. FIG. 7B shows an example of forming a pixel electrode over a source electrode or a drain electrode, which is different from that of FIG. 7A. The pixel electrode can be formed by a sputtering method or an ink-jetting method, as described above. Specifically, when the pixel electrode is formed by an ink-jetting method, a plasma treatment may be performed on the source electrode, the drain electrode and the gate insulating film that are each a surface forming the pixel electrode to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region by laser inadiation. In FIG. 7B, a dot dispersed with a conductor of ITO is dropped to form the pixel electrode by an ink-jetting method. As a result of the liquid-repellent treatment and the selective lyophilic treatment, the pixel electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. In FIG. 7C, an interlayer insulating film 121 is formed and planarized, and then, a wiring 123 is formed and connected to a pixel electrode, which is different from in FIGS. 7A and 7B. The pixel electrode can be formed by a sputtering method or an ink-jetting method, as mentioned above. Specifically, when the pixel electrode is formed by an ink-jetting method, a plasma treatment may be performed on the interlayer insulating film which is a surface forming the pixel electrode after forming a wiring 123 to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region by laser inadiation. In FIG. 7C, an ITSO is employed as the pixel electrode. The ITSO can be formed by dropping a dot dispersed with a conductor of ITO and silicon by an ink-jetting method. Alternatively, it can be formed by a sputtering method using an ITO containing silicon as a target. At the time, siloxane may be employed for the interlayer insulating film 121. Further, an insulating film containing nitrogen 126, e.g. silicon nitride or silicon oxynitride may be formed on the interlayer insulating film of siloxane. When a light-emitting element having such a structure is formed, light-emitting intensity and an endurance time can be improved. When acryl or polyimide is used for the interlayer insulating film 121, the insulating film containing nitrogen 126 can be eliminated. In such a structure, a liquid element may be formed. When the pixel electrode is formed by an ink-jetting method, as a result of the liquid-repellent treatment and the selective lyophilic treatment, the pixel electrode formed by an ink-jetting method can be miniaturized. After that, a heat treatment for baking or drying is conducted when the solvent of the dot is required to remove. In this way, when the pixel electrode is formed by an ink-jetting method, a liquid-repellent treatment and a selective lyophilic treatment are preferably performed on a surface for forming the pixel electrode. As described above, by the liquid-repellent treatment and the selective lyophilic treatment before an ink-jetting step, a thin film transistor having a miniaturized pixel electrode can be obtained. A TFT substrate in which up to a pixel electrode has been formed is refened to as a module TFT substrate.
[Embodiment Mode 12] A display device including a liquid crystal module having a thin film transistor (a liquid crystal display device) shown in the embodiment modes described above is described in Embodiment Mode 12. FIG. 8 is a cross-sectional view of a liquid crystal display device having a thin film transistor 120 and a pixel electrode 125 formed over a TFT substrate as described in the embodiment modes. When a light-transmitting conductive film (such as ITO or ITSO) is used for the pixel electrode 125, a transmissive liquid crystal display device can be obtained. On the contrary, when a non light-transmitting film, that is, a high-reflective film (e.g., aluminum) is used, a reflective liquid crystal display device can be obtained. A module TFT substrate used for a liquid crystal display device like this embodiment mode is refened to as a liquid crystal module TFT substrate. An orientation film 131 is formed to cover the thin film transistor 120, a protective film 113, and the pixel electrode 125. A color filter 134, an opposite electrode 133, and the orientation film 131 are formed sequentially over an opposite substrate 135. The color filter, the opposite electrode or the orientation film can be formed by an ink-jetting method. Although not shown, a black matrix may be also formed by an ink-jetting method. After that, the substrate 100 is attached to the opposite substrate 135 by a sealing material and a liquid crystal is injected thereinto to form a liquid crystal layer 136, thereby obtaining a liquid crystal module. When the liquid crystal is injected, a treatment chamber that is to be in a vacuum state is required. Note that a liquid crystal may be dropped and an ink-jetting method may be employed for the dropping method of a liquid crystal. In particular, in the case of a large-size substrate, a liquid crystal is preferably dropped. This is because a larger treatment chamber is required, a substrate weighs more and a treatment is more difficult as a substrate becomes larger, in the case of a liquid crystal injection method. When a liquid crystal is dropped, a sealing material is formed in the periphery of one substrate. The reason why one substrate is described is that the sealing material may be formed in either the substrate 100 or the opposite substrate 135. At the time, the sealing material is formed in the closed area where the end point is accorded with the initial point of the sealing material. After that, one drop or more drops of liquid crystals is/are dropped. In the case of a large-size substrate, plural drops of liquid crystals are dropped in plural portions. Then, the substrate is attached to the other substrate in vacuum. This is because it is possible to remove unnecessary air and to prevent a sealing material from being broken and expanded due to air, by making the vacuum state. Then, two or more points in the region where the sealing material is formed are solidified and bonded for temporary attachment. Two or more points in the region where the sealing material is formed may be inadiated with ultraviolet rays, when ultraviolet curable resin is used for the sealing material. After that, the substrate is taken out of the treatment chamber, and the whole sealing material is solidified and bonded so as to completely be attached. At the time, a light-shielding material is preferably ananged so that a thin film transistor or a liquid crystal may^not be inadiated with ultraviolet rays. A pillar like or spherical spacer may be used as well as the sealing material so as to keep the gap between the substrates. In this manner, a liquid crystal module is completed. After that, an external terminal may be connected to a signal line driver circuit or a scanning line driver circuit by bonding an FPC (Flexible Printed Circuit) using anisotropic conductive film. Further, the signal line driver circuit or the scanning line driver circuit may be formed as an external circuit. In this manner, a liquid crystal display device in which a thin film transistor having a miniaturized wiring is provided and to which an external terminal is connected, can be formed. In this embodiment mode, a very thin liquid crystal display device can be formed, since the thin film transistor does not include an interlayer insulating film. An interlayer insulating film may be formed to increase planarity, as shown in the above embodiment modes, in this embodiment mode. When the planarity is increased, an orientation film can be formed uniformly and voltage can be applied to a liquid crystal layer uniformly, which is preferable. As the interlayer insulating film, an inorganic material (such as silicon oxide, silicon nitride, silicon oxynitride), a photosensitive or non-photosensitive organic material (such as polyimide, acryl, polyamide, polyimidamide, benzocyclobutene or resist), siloxane, polysilazane and a laminated structure thereof can be used. As the organic material, positive type photosensitive organic resin or negative photosensitive organic resin can be used.
[Embodiment Mode 13] A display device (a light emitting device) having a light emitting module including a thin film transistor shown in the above described embodiment modes is described in Embodiment Mode 13. FIG. 10 is a cross-sectional view of a light emitting device having a thin film transistor 120 and a pixel electrode 125 formed in the TFT substrate shown in the foregoing embodiment modes. The thin film transistor 120 having the pixel electrode 125 is formed as shown in the above embodiment modes. The pixel electrode 125 functions as a first electrode of a light-emitting element. After that, an insulating film 143 functioning as a bank or a banier is formed over the first electrode. As the insulating film, an inorganic material (such as silicon oxide, silicon nitride, silicon oxynitride), a photosensitive or non-photosensitive organic material (such as polyimide, acryl, polyamide, polyimidamide, benzocyclobutene or resist), siloxane, polysilazane and a laminated structure thereof can be used. As the organic material, positive photosensitive organic resin or negative photosensitive organic resin can be used. For example, in the case of using positive photosensitive acrylic as the organic material, the photosensitive organic resin is etched by light-exposure to form an opemng portion with a curvature in the upper edge portion. This can prevent an electroluminescent layer to be formed later or the like from being disconnected. The TFT substrate in this state is refened to as a light emitting module TFT substrate. An electroluminescent layer 141 is formed in the opening portion of the insulating film 143 formed over the first electrode. A liquid-repellent treatment may be performed by a plasma treatment before forming the electroluminescent layer. Further, a lyophilic region may be formed selectively by laser inadiation in the opening portion of the insulating film in the liquid-repellent region. In this embodiment mode, a plasma treatment is performed on the opening portion of the insulating film 143 and the electroluminescent layer having a high molecular weight (polymeric) material is formed by an ink-jetting method. Thereafter, a second electrode 142 of the light-emitting element is formed to cover the electroluminescent layer 141 and the insulating film 143. A singlet excited state and a triplet excited state are possible as a kind of the molecular exciton formed by an electroluminescent layer. A ground state is generally a singlet excited state, and light emission from a singlet excited state is refened to as fluorescence. Light emission from a triplet excited , state is refened to as phosphorescence. Light-emission from an electroluminescent layer includes light emission by the both excited states. Further, fluorescence and phosphorescence may be combined, and either of them can be selected depending on luminescence property (such as light-emitting intensity or a ifetime).of respective RGB. The electroluminescent layer 141 is formed by laminating in order HIL (hole injecting layer), HTL (hole transporting layer), EML (light emitting layer), ETL (electron transporting layer), EIL (electron injecting layer) sequentially from the first electrode side conesponding to the pixel electrode 125. Note that the electroluminescent layer can employ a single layer structure or a combined structure other than a laminated structure. Materials for light emission of red (R) green (G) and blue (B) are each selectively formed by a vapor deposition method using a vapor-deposition mask, or the like for the electroluminescent layer 141. The materials for light emission of red (R) green (G) and blue (B) can be formed also by an ink-jetting method, and this case is preferable since it is possible to individually apply each RGB without using a mask. Specifically, CuPc or PEDOT for HIL, α-NPD for HTL, BCP or Alq3 for ETL and BCP: Li or CaF2 for EIL are used respectively. Alq3 doped with a dopant conesponding to each light emission of RGB (DCM or the like for R, DMQD or the like for (G) may be used for EML, for example. Note that the electroluminescent layer is not limited to the above material. For example, a hole injection property can be enhanced by co-evaporating oxide such as molybdenum oxide (MoOx: x=2 to 3) and oc-NPD or rubrene instead of using CuPc or PEDOT. Ah organic material (including a low molecular weight material or a high
molecular weight material) or a composite material of an organic material and an inorganic material can be used as the material of the electroluminescent layer. In the case of forming the electroluminescent layer of each RGB, high-definition display can be performed by using a color filter. This is because broad peak can be conected to be sharp in light emitting spectrum of each RGB by the color filter.
The case of forming materials for light emission of each RGB is described above, but a material for monochrome light emission is formed and a color filter or a color conversion layer is combined to display with full color. For example, when an electroluminescent layer for light emission of white or orange is formed, a color filter,
or a color filter combined with a color conversion layer is provided separately to obtain a full color display. A color filter or a color conversion layer may be formed on a second substrate (sealing substrate), for example, and attached to a substrate. A material for monochrome light emission, a color filter, and a color conversion layer can be each formed by an ink-jetting method.
A display of monochrome light emission may be performed. For example, an area color type display device may be formed by using monochrome light emission. A passive matrix display portion is suitable for the area color type, which can mainly display characters and symbols. In addition, it is necessary to select materials of the first electrode 125 and the
second electrode 142 in consideration of the work function. However, the first electrode and the second electrode can be an anode or a cathode depending on a pixel structure. It is preferable that the first electrode is a cathode and the second electrode is an anode in this embodiment mode, since the polarity of a driving TFT is an N channel type. On the contrary, it is preferable that the first electrode is an anode and the second electrode is a cathode when the polarity of the driving TFT is a P channel type. Hereinafter, electrode materials used for the anode and the cathode are described. It is preferable to use a metal, an alloy, a conductive compound, a mixture thereof, or the like having a high work function (work function: 4.0 eV or more) as an electrode material used for the anode. ITO (indium tin oxide), IZO (indium zinc oxide) in which zinc oxide (ZnO) of from 2 % to 20 % is mixed into indium oxide, ITSO in which silicon oxide (SiO ) of from 2 % to 20 % is mixed into indium oxide, gold, platinum, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, a nitride of a metal material (such as titanium nitride) and the like can be cited as a specific material. On the other hand, it is preferable to use a metal, an alloy, a conductive compound, a mixture thereof, or the like having a low work function (work function: 3.8 eV or less) as an electrode material used for the cathode. An element belonging to Group 1 or 2 in the periodic table, that is, an alkaline metal such as lithium or cesium, an alkaline earth metal such as magnesium, calcium, or strontium, an alloy (Mg:Ag or Al:Li) or a compound (LiF, CsF, or CaF2) including them, or a transition metal including a rare-earth metal can be cited as a specific material. The second electrode can be formed by extremely thinly forming such a metal or an alloy including such a metal and by laminating ITO, IZO, ITSO, or another metal (including an alloy) thereover, when the second electrode is required to be light transmitting in this embodiment mode. The first electrode and the second electrode can be formed by a vapor deposition method, a sputtering method, an ink-jet method, or the like. In the case of forming a conductive film, ITO or ITSO, or a laminated body thereof as the second electrode by a sputtering method, the electroluminescent layer may be damaged from the sputtering. In order to reduce damages from the sputtering method, an oxide such as molybdenum oxide (MoOx: x=2 to 3) is preferably formed on a top surface of the electroluminescent layer. Therefore, oxide such as molybdenum oxide (MoOx: x=2 to 3) which functions as HIL or the like is formed on a top face of the electroluminescent layer. An EIL (electron injecting layer), an ETL (electron transporting layer), an EML (light emitting layer), an HTL (hole transporting layer), an HIL (hole injecting layer), and the second electrode may be laminated in this order from a side of the first electrode. At this time, the first electrode functions as a cathode and the second electrode functions as an anode. Since the polarity of the driving TFT is an N channel type in this embodiment mode, it is preferable to employ a structure of the first electrode that is a cathode, EIL (electron injecting layer), ETL (electron transporting layer), EML (light emitting layer), HTL (hole transporting layer), HIL (hole injecting layer), and the second electrode that is an anode in consideration of a moving direction of an electron. Thereafter, a passivation film containing nitrogen, a DLC (Diamond like carbon), or the like may be formed by a sputtering method or a CVD method. Accordingly, penetration of moisture and oxygen can be prevented. In addition, penetration of oxygen or moisture can be prevented by covering a side face of a display device with the first electrode, the second electrode, or another electrode. Subsequently, a sealing substrate is attached. A space formed by the sealing substrate may be encapsulated with nitrogen or may be provided with a desiccant agent. In addition, light transmitting and highly water-absorbing resin may be filled therein. The sealing structure is described in detail in an embodiment mode hereafter. A light emitting module is completed in this manner. In the light emitting module, when the first electrode and the second electrode are formed to be light-transmitting, light is emitted from the electroluminescent layer in the directions shown by both anows 145 and 146, with a brightness conesponding to a video signal inputted from a single line. When the first electrode is light-transmitting and the second electrode is not light-transmitting, light is emitted only in the direction of the anow 146. When the first electrode is not light-transmitting and the second electrode is light-transmitting, light is emitted only in the direction of the anow 145. At the time, light can be efficiently utilized by using a highly reflective conductive film as the non-light-transmitting electrode provided on a side which is not a light emitting direction. In this embodiment mode, a non-light-transmitting conductive film may be formed to be thin enough to transmit light and a light-transmitting conductive film may be laminated thereover, so as to obtain a conductive film having a light-transmitting property. After that, an external terminal may be connected to a signal line driver circuit or a scanning line driver circuit by bonding an FPC (flexible printed circuit) using anisotropic conductive film. Further, the signal line driver circuit or the scanning line driver circuit may be formed as an external circuit. Like this, a light-emitting display device in which a thin film transistor having a miniaturized wiring is provided and to which an external terminal is connected, can be formed. In this embodiment mode, a very thin light-emitting display device can be formed, since the thin film transistor does not include an interlayer insulating film. An interlayer insulating film may be formed to increase planarity, as shown in the above embodiment modes, in this embodiment mode. It is preferable that the planarity is increased and thus, voltage can be applied to the electroluminescent layer uniformly. As the interlayer insulating film, an inorganic material (such as silicon oxide, silicon nitride, silicon oxynitride), a photosensitive or non-photosensitive organic material (such as polyimide, acryl, polyamide, polyimidamide, benzocyclobutene or resist), siloxane, polysilazane and a laminated structure thereof can be used. As the organic material, positive type photosensitive organic resin or negative photosensitive organic resin can be used. FIG. 9A illustrates an equivalent circuit diagram of a pixel portion of a light emitting device. One pixel includes a TFT for switching (switching TFT) 800, a TFT for driving (driving TFT) 801, and a TFT for controlling cunent (cunent controlling TFT) 802. Theses TFTs are N channel types. One electrode and a gate electrode of the switching TFT 800 are connected to a signal line 803 and a scanning line 805, respectively. One electrode of the cunent controlling TFT 802 is connected to a first power supply line 804, and a gate electrode thereof is connected to the other electrode of the switching TFT. A capacitor element 808 may be provided to hold gate-source voltage of the cunent controlling TFT. In this embodiment mode, when electric potential of the first power supply line is low and that of a light emitting element is high, the cunent controlling TFT is an N channel type. Therefore, the source electrode and the first power supply line are connected. Therefore, the capacitor element can be provided between the gate electrode and a source electrode of the cunent controlling TFT, that is, the first power supply line. When the switching TFT, the driving TFT, or the cunent controlling TFT has a high gate capacitance and leak cunent from each TFT is permissible, the capacitor element 808 is not necessarily provided. One electrode of the driving TFT 801 is connected to the other electrode of the cunent controlling TFT, and the gate electrode thereof is connected to a second power supply line 806. The second power supply line 806 has a fixed electric potential. Therefore, a gate electric potential of the driving TFT can be fixed, and the driving TFT can be operated, so that gate-source voltage Vgs is not changed by parasitic capacitance or wiring capacitance. Then, a light emitting element 807 is connected to the other electrode of the driving TFT. In this embodiment mode, when an electric potential of the first power supply line is low and that of the light emitting element is high, a cathode of the light emitting element is connected to a drain electrode of the driving TFT. Therefore, it is preferable to sequentially laminate a cathode, an electroluminescent layer and an anode. At this time, in order to reduce damages from sputtering in forming the second electrode, an oxide such as a molybdenum oxide (MoOx: x=2 to 3) is preferably formed on a top surface of the electroluminescent layer. Therefore, it is more preferable to form oxide such as molybdenum oxide (MoOx: x=2 to 3) which functions as an HIL or the like on a top surface of the electroluminescent layer. In this way, in the case of a TFT having an amorphous semiconductor film and an N channel type, it is preferable to connect the drain electrode of the TFT and the cathode and to laminate an EIL, an ETL, an EML, an HTL, an HIL, and anode in this order. Hereinafter, operation of such a pixel circuit is described. When the scanning line 805 is selected and the switching TFT is turned ON, charges begin to be stored in the capacitor element 808. The charges are stored in the capacitor element 808 until they become equal to gate-source voltage of the cunent controlling TFT. When they are equal, the current controlling TFT is turned ON, and then, the driving TFT that is serially connected thereto is turned ON. At this time, the gate potential of the driving TFT is fixed. Therefore, constant gate-source voltage Vgs which does not depend on the parasitic capacitance or the wiring capacitance can be applied to the light emitting element. In other words, cunent by the constant gate-source voltage Vgs can be supplied. Since the light emitting element is a cunent driving type element, it is preferable to employ analog driving when characteristic variation of the TFT in the pixel, specifically, Vth variation is small. As in this embodiment mode, a TFT having an amorphous semiconductor film has small characteristics variation; therefore, analog driving can be employed. On the other hand, cunent at a constant value can be supplied to the light emitting element, also in the case of digital driving, by operating the driving TFT in a saturation region (a region satisfying |Vgs-Vth|<|Vds|). FIG. 9B shows an example of a top view of a pixel portion having the above equivalent circuit. A gate electrode, a scanning line, and a second power supply line of each TFT are formed from the same conductive film over a base film by an ink-jetting method or a sputtering method. When the gate electrode or the like is formed by an ink-jetting method, a plasma treatment may be performed on the base film that is a surface for forming the gate electrode or the like to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region to form a gate electrode, a scanning line and a second power supply line therein. Consequently, the gate electrode, the scanning line and the second power supply line that are formed by an ink-jetting method can be miniaturized. Although not shown, a gate insulating film is formed after that. A first electrode 810 of the light emitting element 807 is formed on the gate insulating film. The first electrode 810 can be formed by an ink-jetting method, a sputtering method or the like. When the first electrode is formed by an ink-jetting method, a plasma treatment is conducted on the gate insulating film that is a surface for forming the first electrode to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region to form the first electrode therein. Consequently, the first electrode formed by an ink-jetting method can be miniaturized. Then, a semiconductor film is formed. The semiconductor film is formed over the entire surface by plasma CVD and pattered into a desired shape using a mask in this embodiment mode. A semiconductor film having N type conductivity may be formed on the semiconductor film, namely the semiconductor film and the semiconductor film having N type conductivity can be continuously formed. After that, the conductive film formed by sputtering or CVD is patterned to form a source wiring, a drain wiring, a signal line and a first power supply line. A mask used in patterning can be formed by an ink-jetting method or a photolithography method. The source wiring, the drain wiring, the signal line and the first power supply line can be formed by an ink-jetting method. When the source wiring, the drain wiring, the signal line and the first power supply line are formed by an ink-jetting method, a plasma treatment is conducted on a surface for forming each the source wiring, the drain wiring, the signal line and the first power supply line to form a liquid-repellent region. Further, a lyophilic region may be formed selectively in the liquid-repellent region to form the source wiring, the drain wiring, the signal line and the first power supply line therein. Consequently, the source wiring, the drain wiring, the signal line and the first power supply line formed by an ink-jetting method can be miniaturized. In this embodiment mode, the capacitor element 808 is formed from the gate wiring and the source and drain wiring which are formed with the gate insulating film therebetween. In this embodiment mode, a channel width (W) of the driving TFT may be designed to be large, since the driving TFT includes an amorphous semiconductor film. In this way, a pixel portion of the light-emitting device can be formed. A cross-sectional view of C-C 'of FIG. 9B is shown in FIG. 10. The active matrix light-emitting device like this is effective since a TFT is provided for every pixel and thus it can be driven with low voltage, when a pixel density is increased. Although this embodiment mode shows an active matrix light-emitting device in which each TFT is formed in one pixel, a passive matrix light emitting device in which a TFT is formed in every column can be also formed. In the passive matrix light emitting device, a high aperture ratio can be obtained since a TFT is not provided for every pixel. In a light emitting device in which light is emitted toward opposite sides of an electroluminescent layer, light transmittance can be increased by employing a passive matrix light emitting device.
[Embodiment Mode 14] A mode of a display device such as a light emitting device or a liquid crystal display device connected with an external terminal is described in Embodiment Mode 14. FIG. 11 shows an appearance of a display device on which a control circuit 601a and a power supply circuit 602 are mounted. A pixel portion 603 in which a light emitting element or a liquid crystal element is provided for every pixel is formed on a substrate 600. A thin film transistor in the pixel portion 603 can be formed to have a wiring or the like that is miniaturized as in the foregoing embodiment modes. A scanning line driver circuit 604a for selecting a pixel of the pixel portion 603 and a signal line driver circuit 605a for supplying a video signal to the selected pixel are mounted by an IC chip. Widths of long and short sides of an IC to be mounted or the number thereof is not limited to those described in this embodiment mode. The scanning line driver circuit or the signal line driver circuit may be integrally formed with the pixel portion. The control circuit 601a, the power supply circuit 602, an image signal processing circuit 609a, a video RAM 610a, and an audio circuit 611a are provided for a printed wiring board 607. A power supply voltage outputted from the power supply circuit 602, or various signals from the control circuit 601a, the image signal processing circuit 609a, the video RAM 610a, and the audio circuit 611a are supplied into the scanning line driver circuit 604a and the signal line driver circuit 605a through an FPC 606, and further are supplied to the pixel portion 603. The power supply voltage of the printed wiring board 607 and various signals are supplied through an interface (I/F) portion 608 in which plural input terminals are ananged. A signal is inputted into the image signal processing circuit 609a from the interface (I/F) portion 608. A signal is sent and received between the image signal processing circuit 609a and the video RAM 610a. Note that the printed wiring board 607 is mounted by using the FPC 606 in this embodiment mode; however, the present invention is not necessarily limited to this structure. The control circuit 601a and the power supply circuit 602 may be mounted directly on the substrate by a COG (Chip On Glass) method. In addition, a mounting method of an IC chip such as the signal line driver circuit and the scanning line driver circuit is not limited to this embodiment mode, and an IC chip formed on the substrate may be connected to a wiring in the pixel portion by a wire bonding method. Further, in the printed wiring board 607, noise may be caused in the power supply voltage or signals, or the rise of the signal may become slow due to capacitance formed between leading wirings, resistance of the wiring itself, and the like. Thus, various kinds of elements such as a capacitor and a buffer may be provided on the printed wiring board 607, thereby preventing noise from being caused in the power supply voltage or signals, or preventing the rise of the signal from being slow. As described above, a display device provided with a thin film transistor having a miniaturized wiring or the like can be manufactured. A mode of a display device different from that in FIG. 11 is shown in FIGS. 19A and 19B. In FIGS. 19A and 19B, a module is formed from a thin film transistor having a crystalline semiconductor film as shown in Embodiment Mode 5. Thus, an element formed in a driver circuit portion or a peripheral circuitry portion can be integrally formed on a substrate. As shown in FIG. 19A, a pixel portion 603, a scanning line driver circuit 604b, a signal line driver circuit 605b, a control circuit 601b, an audio circuit 611b, an image signal processing circuit 609b, and a video RAM 610b are provided on a substrate 600. Accordingly, the number of elements formed on a printed wiring board can be reduced. A block diagram of each circuit formed on the substrate 600 is shown in FIG. 19B. A circuit in which a liquid crystal element is formed in the pixel portion 603 is described. The pixel portion 603 is provided on a panel and a gray-scale power supply 617 for displaying with gray-scale is also formed on the panel. In the periphery of the pixel portion 603, a scanning line driver circuit 604a and a signal line driver circuit 605a are provided. The control circuit 601b includes a CPU 616, a CPU interface (I/F) 623, a WRAM 624 serving as a stack/variable SRAM used by the CPU, a PROM 615 serving as a mask ROM storing a program and image data, and a memory controller 625. The memory controller 625 has a function for making a signal for controlling the audio circuit by decoding an interface of address/data pass of PROM and WRAM, and a part of an address signal for WRAM. The audio circuit 611b includes an audio ROM 619 functioning as a mask
ROM in which audio data is stored, an audio controller 621 having a function of forming a clock signal for the audio circuit or forming an address for the audio ROM using a counter, and an amplifier 618 having a function of forming analog waveform from digital audio data or amplifying the analog waveform. The image signal processing circuit 609b includes a CRAM 622 serving as a SRAM storing color information of image data. An SRAM 626 storing coordinate information of an image or image information for an image of one line is also provided. Power from the power supply circuit 602 formed on the printed wiring board
607 is supplied to the respective circuits having these functions through the FPC 606. When a thin film transistor is manufactured by using a crystalline semiconductor film like this, it can be integrally formed on a glass substrate, and thus, downsizing and reducing in weight of a display device can be achieved. Productivity of a display device can be increased, since the number of connecting points with FPC can be reduced. As described above, a display device provided with a thin film transistor having a miniaturized wiring or the like can be manufactured.
[Embodiment Mode 15] A mode of sealing a light emitting device shown in the foregoing embodiment modes is shown in Embodiment Mode 15. FIG. 12A is a cross-sectional view of a sealed light-emitting device, and a cross-sectional view taken along D-D 'of FIG. 11. In a pixel portion 903, a driving TFT 914 having an N-channel is provided over a substrate 911 (refened to as a first substrate for convenience) with a base film 912 therebetween. The driving TFT can be formed to have a wiring or the like miniaturized in the foregoing embodiment modes. An anode 915 is connected to a wiring to serve as a source electrode or a drain electrode of the driving TFT. An electroluminescent layer 916 and a cathode 917 are formed in order over the anode. A protective film 918 is further provided to cover the cathode. The protective film is formed to have an insulating film that mainly contains silicon nitride or silicon oxynitride and that is obtained by a sputtering method (DC method or RF method), a DLC film containing hydrogen, or a carbon nitride film. The protective film can have a single layer structure or a laminated structure of the above films. For example, when a film having high hardness is used to prevent entrance of water or oxygen as the protective film, it is possible that a film for relaxing stress, e.g., a carbon nitride film is formed and then, a film having high hardness is formed thereover. Deterioration (degradation) of an electroluminescent layer by water, oxygen or the like can be prevented by the protective film. The cathode and the protective film are provided to exist also in the first connection region 920. In the connection region 920, the cathode is connected to a connection wiring 919. In a sealing region 923, the first substrate 911 is attached to an opposite substrate 922 (refened to as a second substrate for convenience) by a sealing material 921. The opposite substrate may be provided with a desiccant agent 925. By the desiccant agent, entrance of water or oxygen can be prevented. A color filter may be provided for the opposite substrate. A broad peak can be conected to be sharp in light emitting spectrum of each RGB by the color filter. The sealing material is made of thermosetting resin or ultraviolet curable resin. The first substrate and the second substrate are adhered and fixed by heating the sealing material while pressuring or by ultraviolet inadiation. For example, epoxy based resin can be employed as the sealing material. The sealing material is mixed with a spacer. The space (that is, a gap) between the first substrate and the second substrate is maintained by the spacer of the sealing material. The spacer may be spherical or column-like, and a cylindrical spacer is used in this embodiment mode, and thus, the gap is equivalent to a diameter of the circle. In a second connection region 926, a connection wiring 919 is connected to a signal line driver circuit formed from an IC chip 927 by an anisotropic conductive film 924. The IC chip is provided on the FPC 906. When the anisotropic conductive film is adhered by heating or pressuring, it is conducted carefully so that a crack is not generated due to a flexibility of a film substrate or softening by heating. For example, a substrate having high hardness may be ananged as an auxiliary in the adhering region. A clock signal, or a video signal is received from the thusly connected IC chip. When the light emitting device is sealed with the second substrate 922, a space is formed between the second substrate 922 and the protective film 918. It is possible to further prevent entrance of water or oxygen by filling an inert gas, e.g. a nitrogen gas or forming a highly water-absorbing material in the space. Light-transmitting and highly water-absorbing resin may be formed. The light emitting device can be formed by using light-transmitting resin without reducing light-transmittance, even when light from a light emitting element is emitted toward the second substrate side. FIG. 12B shows a mode of sealing without using a second substrate, which is different from that of FIG. 12A. Other structures are similar, and thus description thereof is omitted. In FIG. 12B, a second protective film 930 is provided to cover a protective film 918. An organic material such as epoxy resin, urethane resin or silicone resin can be used as the second protective film. The second protective film may be formed by dropping a polymeric (high-molecular-weight) material by an ink-jetting method. Epoxy resin is discharged by a dispenser and dried in this embodiment mode. When deterioration of an electroluminescent layer due to water, oxygen or the like does not matter, the protective film 918 may not be necessarily provided. A second substrate may be provided over the second protective film for sealing. When the light emitting device is sealed without using the second substrate, it is possible to reduce more in weight, size and thickness of a display device. A polarizing plate or a circular polarizing plate may be provided to increase contrast in this embodiment mode. For example, a polarizing plate or a circular polarizing plate can be provided for one surface or both surfaces of a display screen.
[Embodiment Mode 16] Examples of electronic devices using a display device described in the above embodiment modes can be given as follows: a video camera; a digital camera; a goggle type display (head mounted display); a navigation system; an audio reproducing device (such as a car audio or an audio component); a laptop personal computer; a game machine; a personal digital assistance (such as a mobile computer, a cellular phone, a portable game machine or an electronic book); an image reproducing device including a recording medium (specifically, a device capable of reproducing a recording medium such as a Digital Versatile Disc (DVD) and having a display that can display the image); and the like. Specifically, an ink-jetting method described in the above embodiment modes is preferably applied to a large-size television having a large screen, and the like. Practical examples of these electronic devices are shown in FIGS. 13A to 13C. FIG. 13A shows a large-size display device, which includes a chassis 2001, a supporting section 2002, a display portion 2003, a speaker portion 2004, a video input terminal 2005, and the like. The display portion 2003 is provided with a module including a pixel portion and a driver circuit portion. The pixel portion has a light emitting element or a liquid crystal element and a TFT formed by an ink-jetting method described in the above embodiment modes. Note that the display device includes all display devices for displaying information such as a display device for a personal computer, a display device for TV broadcasting reception, and a display device for advertisement. FIG. 13B shows a cellular phone that is one of mobile terminals, which includes a main body 2101, a chassis 2102, a display portion 2103, an audio input portion 2104, an audio output portion 2105, operation keys 2106, antenna 2107, and the like. The display portion 2103 is provided with a module including a pixel portion and a driver circuit portion. The pixel portion has a light emitting element or a liquid crystal element and a TFT formed by an ink-jetting method described in the above embodiment modes. In addition, costs of the cellular phone can be reduced by forming the display portion 2103 by a method of forming plural panels from one substrate (gang printing). FIG. 13C shows a sheet-like cellular phone, which includes a main body 2301, a display portion 2303, an audio input portion 2304, an audio output portion 2305, a switch 2306, an external connection port 2307, and the like. A separately prepared earphone 2308 can be connected to the cellular phone through the external connection port 2307. A touch panel display screen with a sensor is used for the display portion 2303. A series of operation can be performed by touching the touch panel operation key 2309 displayed on the display portion 2303. The display portion 2303 is provided with a module having a pixel portion and a driver circuit portion. The pixel portion has a light emitting element or a liquid crystal element and a TFT formed by an ink-jetting method described in the above embodiment modes. In addition, costs of the sheet-like cellular phone can be reduced by forming the display portion 2303 by a method of forming plural panels from one substrate (gang printing). As described above, an applicable range of the present invention is so wide that it can be applied to electronic devices of various fields. In addition, the electronic devices of this embodiment mode can employ any structure described in the above embodiment modes.
[Embodiment Mode 17] An inert gas can be employed as a treatment gas of a plasma treatment in the present invention. A rare gas such as helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe) can be used as the inert gas. Other conditions such as pressure are similar to those described in the foregoing embodiment modes.

Claims

1. A method for forming a wiring comprising the steps of: performing a liquid-repellent treatment on a surface; performing selectively a lyophilic treatment on a region of the surface; and forming a wiring on the lyophilic region by dropping a composition including a conductive material.
2. A method for forming a wiring comprising the steps of: forming a liquid-repellent region on a surface; forming selectively a lyophilic region in the liquid-repellent region; and forming the wiring on the lyophilic region by dropping a composition including a conductive material.
3. A method for forming a wiring comprising the steps of: forming a liquid-repellent region on a surface by a plasma treatment; forming selectively a lyophilic region in the liquid-repellent region; and forming the wiring on the lyophilic region by dropping a composition including a conductive material.
4. The method for forming a wiring according to Claim 3, wherein the plasma treatment is performed at a pressure of 100 Ton to 1000 Ton.
5. The method for forming a wiring according to Claim 4, wherein the plasma treatment is performed under an atmospheric pressure or a pressure in a neighborhood of an atmospheric pressure by using air, oxygen or nitrogen as a treatment gas.
6. The method for forming a wiring according to any one of Claims 2 or 3, wherein the lyophilic region is selectively formed by inadiating the liquid-repellent region with laser light.
7. The method for forming a wiring according to any one of Claims 2 or 3, wherein a region that is less liquid-repellent than the liquid-repellent region is formed as the lyophilic region.
8. The method for forming a wiring according to any one of Claims 1 to 3, wherein the composition is dropped by an ink-jetting method.
9. A method for forming a wiring comprising the steps of: forming a liquid-repellent region by forming a film containing fluorine on a surface; forming selectively a lyophilic region in the liquid-repellent region; and forming the wiring on the lyophilic region by dropping a composition including a conductive material.
10. The method for forming a wiring according to Claim 9, wherein a Teflon film or a silane coupling agent is formed to form the liquid-repellent region.
11. The method for forming a wiring according to any one of Claims 9 or 10, wherein the lyophilic region is selectively formed by irradiating the liquid-repellent region with laser light.
12. The method for forming a wiring according to any one of Claims 9 to 11, wherein a region that is less liquid-repellent than the liquid-repellent region is formed as the lyophilic region.
13. The method for forming a wiring according to any one of Claims 9 to 12, wherein the composition is dropped by an ink-jetting method.
14. A method for manufacturing a thin film transistor comprising the steps of: performing a liquid-repellent treatment on a surface; performing selectively a lyophilic treatment on a region of the surface; and forming a conductive film on the lyophilic treatment by dropping a composition including a conductive material.
15. A method for manufacturing a thin film transistor comprising the steps of: forming a liquid-repellent region on a surface; forming selectively a lyophilic region in the liquid-repellent region; and forming the conductive film on the lyophilic region by dropping a composition including a conductive material.
16. A method for manufacturing a thin film transistor comprising the steps of: forming a first liquid-repellent region by performing a plasma treatment on a surface for forming a gate electrode; forming selectively a first lyophilic region in the first liquid-repellent region; forming the gate electrode in the first lyophilic region by dropping a composition including a conductive material; forming a second liquid-repellent region by a plasma treatment on a surface for forming a source electrode and a drain electrode; forming selectively a second lyophilic region in the second liquid-repellent region; and forming the source electrode and the drain electrode in the second lyophilic region by dropping a composition including a conductive material.
17. A method for manufacturing a thin film transistor comprising the steps of: forming a first liquid-repellent region by performing a plasma treatment on a substrate; forming selectively a first lyophilic region in the first liquid-repellent region; forming a gate electrode in the first lyophilic region of the substrate by dropping a composition including a conductive material; forming a gate insulating film to cover the gate electrode; forming a semiconductor film over the gate electrode; forming a semiconductor film having one conductivity over the semiconductor film; forming a second liquid-repellent region by a plasma treatment on the semiconductor film having one conductivity and the gate insulating film; forming selectively a second lyophilic region in the second liquid-repellent region; and forming a source electrode and a drain electrode in the second lyophilic region of the semiconductor film having one conductivity and the gate insulating film by dropping a composition including a conductive material.
18. A method for manufacturing a thin film transistor, comprising the steps of: forming a source electrode and a drain electrode; forming a semiconductor film over the source electrode and the drain electrode; forming a liquid-repellent region by performing a plasma treatment on a surface for forming a gate electrode in an upper portion the semiconductor film; forming selectively a lyophilic region in the liquid-repellent region; and forming the gate electrode in the lyophilic region of the surface of the gate electrode by dropping a composition including a conductive material.
19. A method for manufacturing a thin film transistor, comprising the steps of: forming a source electrode and a drain electrode over a base film; forming a semiconductor film over the source electrode and the drain electrode; forming a first liquid-repellent region by performing a plasma treatment on the semiconductor film; forming selectively a first lyophilic region in the first liquid-repellent region; forming a mask in the lyophilic region of the semiconductor film by dropping a composition including a material of the mask; patterning the semiconductor film by using the mask; forming a gate insulating film to cover the semiconductor film; forming a second liquid-repellent region by performing a plasma treatment on the gate insulating film; forming selectively a second lyophilic region in the second liquid-repellent region; and forming a gate electrode in the second lyophilic region of the gate insulating film by dropping a composition including a conductive material.
20. A method for manufacturing a thin film transistor comprising the steps of: forming a first liquid-repellent region by performing a plasma treatment on a base film; forming selectively a first lyophilic region in the first liquid-repellent region; forming a source electrode and a drain electrode in the first lyophilic region of the base film by dropping a composition including a conductive material; forming a semiconductor film over the source electrode and the drain electrode; forming a second liquid-repellent region by a plasma treatment on the semiconductor film; forming selectively a second lyophilic region in the second liquid-repellent region; forming a mask in the second lyophilic region of the semiconductor film by dropping a composition including a material of the mask; patterning the semiconductor film by using the mask; forming a gate insulating film to cover the semiconductor film; forming a third liquid-repellent region by performing a plasma treatment on the gate insulating film; forming selectively a third lyophilic region in the third liquid-repellent region;
and forming a gate electrode in the third lyophilic region of the gate insulating film by dropping a composition including a conductive material.
21. The method for manufacturing a thin film transistor according to any one of Claims 14 to 20, wherein the liquid-repellent region is formed by forming a CF2 bond on the surface by the plasma treatment.
22. The method for manufacturing a thin film transistor according to any one of Claims 14 to 21, comprising the steps of: forming an interlayer insulating film over the thin film transistor; forming an opening portion in the interlayer insulating film; forming a liquid-repellent region in a surface of the opening portion and the interlayer insulating film by performing a plasma treatment on the interlayer insulating film in which the opening portion is formed; forming selectively a lyophilic region in the opening portion of the liquid-repellent region; and forming a wiring to be connected to a source electrode or a drain electrode of the thin film transistor through the opening portion by dropping a composition including a conductive material.
23. The method for manufacturing a thin film transistor according to any one of Claims 14 to 22, wherein the liquid-repellent region is inadiated with laser light to selectively form the lyophilic region.
24. The method for manufacturing a thin film transistor according to any one of Claims 14 to 23, wherein the composition is dropped by an ink-jetting method.
25. A method for manufacturing a thin film transistor, comprising the steps of: forming a film containing fluorine; forming selectively a lyophilic region in the film containing fluorine; forming a gate electrode on the lyophilic region by dropping a composition including a conductive material; and performing a heat treatment for baking the gate electrode, and removing the film containing fluorine by the heat treatment.
26. A method for manufacturing a thin film transistor comprising the steps of: forming a first film containing fluorine; forming selectively a liquid-repellent region in the first film containing fluorine; forming a gate electrode in the lyophilic region by dropping a composition including a conductive material; performing a heat treatment to bake the gate electrode, and removing the first film containing fluorine by the heat treatment; forming a gate insulating film to cover the gate electrode; forming a semiconductor film over the gate electrode; forming a semiconductor film having one conductivity over the semiconductor
film; forming a second film containing fluorine over the semiconductor film having one conductivity and the gate insulating film; forming selectively a second lyophilic region in the second film containing fluorine; forming a source electrode and a drain electrode in the second lyophilic region of the semiconductor film having one conductivity and the gate insulating film by dropping a composition including a conductive material; and performing a heat treatment to bake the source electrode and the drain electrode, and removing the second film containing fluorine by the heat treatment.
27. The method for manufacturing a thin film transistor according to Claim 25 or 26, wherein a film including a Teflon or a silane coupling agent is formed as the film containing fluorine.
28. The method for manufacturing a thin film transistor according to any one of Claims 25 to 27, comprising the steps of: forming an interlayer insulating film over the thin film transistor; forming an opening portion in the interlayer insulating film; forming a liquid-repellent region in a surface of the opening portion and the interlayer insulating film by performing a plasma treatment on the interlayer insulating film in which the opening portion is formed; forming selectively a lyophilic region in the opening portion of the liquid-repellent region; and forming a wiring to be connected to a source electrode or a drain electrode of the thin film transistor through the opening portion by dropping a composition including a material of the wiring.
29. The method for manufacturing a thin film transistor according to any one of Claims 25 to 28, wherein the liquid-repellent region is inadiated with laser light to selectively form the lyophilic region.
30. The method for manufacturing a thin film transistor according to any one of
Claims 25 to 29, wherein the composition is dropped by an ink-jetting method.
31. A droplet discharging method, comprising the steps of: forming a lyophilic region by inadiating selectively on an object to be treated in which a liquid-repellent region is formed with light by a light inadiation unit; and discharging a droplet onto the lyophilic region by a droplet discharging unit, in a treatment chamber including the droplet discharging unit and the light inadiation unit.
32. A droplet discharging method, using a treatment apparatus in which a first treatment chamber having a plasma unit and a dielectric, and a second treatment chamber having a droplet discharging unit and a light inadiation unit, comprising the steps of: forming a liquid-repellent region in an object to be treated by the plasma unit and the dielectric in the first treatment chamber; transporting the object to be treated into the second treatment chamber without being exposed to the atmosphere; forming selectively a lyophilic region in the objected to be treated in which a liquid-repellent region is formed by the light inadiation unit in the second treatment chamber; and discharging a droplet onto the lyophilic region by the droplet discharging unit.
33. The droplet discharging method according to Claim 31 or 32, wherein the droplet discharging unit and the light inadiation unit are integrally formed.
34. The droplet discharging method according to any one of Claims 31 to 33, wherein the light inadiation unit includes laser light.
35. The droplet discharging method according to any one of Claims 31 to 34, wherein the composition is dropped by an ink-jetting method.
PCT/JP2004/016181 2003-10-28 2004-10-25 Method for forming wiring, method for manufacturing thin film transistor and droplet discharging method WO2005041286A1 (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7226819B2 (en) 2003-10-28 2007-06-05 Semiconductor Energy Laboratory Co., Ltd. Methods for forming wiring and manufacturing thin film transistor and droplet discharging method
US7537976B2 (en) 2005-05-20 2009-05-26 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of thin film transistor
EP3244453A1 (en) * 2015-10-09 2017-11-15 Diftek Lasers, Inc. An electronic device and method of making thereof
US9859348B2 (en) 2011-10-14 2018-01-02 Diftek Lasers, Inc. Electronic device and method of making thereof
US10312310B2 (en) 2016-01-19 2019-06-04 Diftek Lasers, Inc. OLED display and method of fabrication thereof
US10446629B2 (en) 2011-10-14 2019-10-15 Diftek Lasers, Inc. Electronic device and method of making thereof

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4628109B2 (en) * 2003-04-25 2011-02-09 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
US8269227B2 (en) * 2005-06-09 2012-09-18 Semiconductor Energy Laboratory Co., Ltd. Light emitting device and electronic device
JP4857688B2 (en) * 2005-09-29 2012-01-18 カシオ計算機株式会社 Display device and manufacturing method thereof
TW200802843A (en) * 2006-05-10 2008-01-01 Casio Computer Co Ltd Display device and manufacturing method thereof
US8435719B2 (en) * 2006-08-08 2013-05-07 International Business Machines Corporation Tunable contact angle process for immersionlithography topcoats and photoresists
JP5172178B2 (en) * 2007-03-15 2013-03-27 三菱電機株式会社 Thin film transistor, display device using the same, and manufacturing method thereof
US8017422B2 (en) * 2007-06-19 2011-09-13 Semiconductor Energy Laboratory Co., Ltd. Method for forming pattern, method for manufacturing light emitting device, and light emitting device
JP4497185B2 (en) * 2007-09-18 2010-07-07 カシオ計算機株式会社 Manufacturing method of display device
JP2010077010A (en) * 2008-09-01 2010-04-08 Hiroshima Univ Device for manufacturing crystal, semiconductor device manufactured by using the same and method for manufacturing semiconductor device using the same
JP2010087208A (en) * 2008-09-30 2010-04-15 Fujifilm Corp Method for forming three-dimensional structure, method for manufacturing semiconductor device, and semiconductor device
WO2011053288A1 (en) * 2009-10-28 2011-05-05 Hewlett-Packard Development Company, L.P. Protective coating for print head feed slots
JP5706670B2 (en) * 2009-11-24 2015-04-22 株式会社半導体エネルギー研究所 Method for manufacturing SOI substrate
JP5685467B2 (en) 2010-09-16 2015-03-18 富士フイルム株式会社 Pattern forming method and pattern forming apparatus
JP5559656B2 (en) * 2010-10-14 2014-07-23 大日本スクリーン製造株式会社 Heat treatment apparatus and heat treatment method
US8388793B1 (en) * 2011-08-29 2013-03-05 Visera Technologies Company Limited Method for fabricating camera module
KR101374072B1 (en) * 2012-10-23 2014-03-13 한국생산기술연구원 Forming method of printed pattern
US10627163B1 (en) * 2019-06-06 2020-04-21 Vasily Jorjadze System and method for heating materials

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003273097A (en) * 2002-03-13 2003-09-26 Seiko Epson Corp Film-forming method and device manufactured by using the same

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3093224B2 (en) 1989-11-24 2000-10-03 日本電気株式会社 Semiconductor device
JP2840699B2 (en) 1990-12-12 1998-12-24 株式会社 半導体エネルギー研究所 Film forming apparatus and film forming method
EP1225056B1 (en) 1997-03-21 2004-11-24 Canon Kabushiki Kaisha Process for producing a printed substrate
JPH1129873A (en) 1997-07-11 1999-02-02 Sekisui Chem Co Ltd Formation of laminated film and forming device therefor
JP3539179B2 (en) 1998-01-28 2004-07-07 セイコーエプソン株式会社 A substrate, a method of manufacturing a substrate, an integrated circuit, and a method of manufacturing an integrated circuit.
JP4377984B2 (en) 1999-03-10 2009-12-02 キヤノン株式会社 Color filter, manufacturing method thereof, and liquid crystal element using the color filter
WO2001008242A1 (en) 1999-07-21 2001-02-01 E Ink Corporation Preferred methods for producing electrical circuit elements used to control an electronic display
EP1243033B1 (en) 1999-12-21 2019-12-04 Flexenable Limited Solution processing
EP1243034A1 (en) 1999-12-21 2002-09-25 Plastic Logic Limited Solution processed devices
GB9930217D0 (en) 1999-12-21 2000-02-09 Univ Cambridge Tech Solutiion processed transistors
CA2394895C (en) 1999-12-21 2014-01-28 Plastic Logic Limited Forming interconnects
WO2001046987A2 (en) 1999-12-21 2001-06-28 Plastic Logic Limited Inkjet-fabricated integrated circuits
US7183023B2 (en) * 2003-04-07 2007-02-27 Dai Nippon Printing Co., Ltd. Method for manufacturing color filter
JP4746804B2 (en) 2001-09-28 2011-08-10 株式会社ハイデン研究所 Plasma generation method and plasma generation apparatus
JP2003133691A (en) 2001-10-22 2003-05-09 Seiko Epson Corp Method and device for forming film pattern, conductive film wiring, electro-optical device, electronic equipment, and non-contact card medium
US7474002B2 (en) 2001-10-30 2009-01-06 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having dielectric film having aperture portion
JP3823916B2 (en) * 2001-12-18 2006-09-20 セイコーエプソン株式会社 Display device, electronic apparatus, and display device manufacturing method
US20040174426A1 (en) 2001-12-25 2004-09-09 Seiko Epson Corporation Image forming apparatus
JP3698138B2 (en) 2001-12-26 2005-09-21 セイコーエプソン株式会社 Water repellent treatment method, thin film forming method, organic EL device manufacturing method using the method, organic EL device, and electronic apparatus
JP2003216100A (en) 2002-01-21 2003-07-30 Matsushita Electric Ind Co Ltd El (electroluminescent) display panel and el display device and its driving method and method for inspecting the same device and driver circuit for the same device
JP2003283103A (en) * 2002-03-22 2003-10-03 Seiko Epson Corp Pattern forming method and system thereof, device manufacturing method and device
TWI276179B (en) * 2002-04-15 2007-03-11 Adv Lcd Tech Dev Ct Co Ltd Semiconductor device having semiconductor films of different crystallinity, substrate unit, and liquid crystal display, and their manufacturing method
JP2004200146A (en) * 2002-12-05 2004-07-15 Seiko Epson Corp Electroluminescent display device and its manufacturing method as well as electronic equipment
JP4151420B2 (en) * 2003-01-23 2008-09-17 セイコーエプソン株式会社 Device manufacturing method
JP4289924B2 (en) * 2003-04-07 2009-07-01 大日本印刷株式会社 Pattern forming body
JP4628109B2 (en) 2003-04-25 2011-02-09 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
JP3988676B2 (en) * 2003-05-01 2007-10-10 セイコーエプソン株式会社 Coating apparatus, thin film forming method, thin film forming apparatus, and semiconductor device manufacturing method
US6808942B1 (en) * 2003-05-23 2004-10-26 Texas Instruments Incorporated Method for controlling a critical dimension (CD) in an etch process
JP4629997B2 (en) 2003-06-02 2011-02-09 株式会社リコー Thin film transistor and thin film transistor array
US7226819B2 (en) 2003-10-28 2007-06-05 Semiconductor Energy Laboratory Co., Ltd. Methods for forming wiring and manufacturing thin film transistor and droplet discharging method
FR2869897B1 (en) * 2004-05-10 2006-10-27 Saint Gobain PHOTOCATALYTIC COATING SUBSTRATE

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003273097A (en) * 2002-03-13 2003-09-26 Seiko Epson Corp Film-forming method and device manufactured by using the same

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7226819B2 (en) 2003-10-28 2007-06-05 Semiconductor Energy Laboratory Co., Ltd. Methods for forming wiring and manufacturing thin film transistor and droplet discharging method
US7875542B2 (en) 2003-10-28 2011-01-25 Semiconductor Energy Laboratory Co., Ltd. Methods for forming wiring and manufacturing thin film transistor and droplet discharging method
US8278204B2 (en) 2003-10-28 2012-10-02 Semiconductor Energy Laboratory Co., Ltd. Methods for forming wiring and manufacturing thin film transistor and droplet discharging method
US7537976B2 (en) 2005-05-20 2009-05-26 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of thin film transistor
CN102709313A (en) * 2005-05-20 2012-10-03 株式会社半导体能源研究所 Manufacturing method of thin film transistor
US9859348B2 (en) 2011-10-14 2018-01-02 Diftek Lasers, Inc. Electronic device and method of making thereof
US10446629B2 (en) 2011-10-14 2019-10-15 Diftek Lasers, Inc. Electronic device and method of making thereof
EP3244453A1 (en) * 2015-10-09 2017-11-15 Diftek Lasers, Inc. An electronic device and method of making thereof
US10312310B2 (en) 2016-01-19 2019-06-04 Diftek Lasers, Inc. OLED display and method of fabrication thereof

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