WO2001054143A1 - Resistance et son procede de fabrication - Google Patents
Resistance et son procede de fabrication Download PDFInfo
- Publication number
- WO2001054143A1 WO2001054143A1 PCT/JP2001/000251 JP0100251W WO0154143A1 WO 2001054143 A1 WO2001054143 A1 WO 2001054143A1 JP 0100251 W JP0100251 W JP 0100251W WO 0154143 A1 WO0154143 A1 WO 0154143A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- shaped
- forming
- sheet
- insulating substrate
- slit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/075—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thin film techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/288—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thin film techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/001—Mass resistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/148—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals embracing or surrounding the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/28—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals
- H01C17/281—Apparatus or processes specially adapted for manufacturing resistors adapted for applying terminals by thick film techniques
- H01C17/283—Precursor compositions therefor, e.g. pastes, inks, glass frits
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49083—Heater type
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49087—Resistor making with envelope or housing
- Y10T29/49098—Applying terminal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49099—Coating resistive material on a base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49082—Resistor making
- Y10T29/49101—Applying terminal
Definitions
- the present invention relates to a resistor and a method for manufacturing the same, and more particularly, to a fine resistor and a method for manufacturing the same.
- FIG. 53 is a cross-sectional view of a conventional resistor.
- reference numeral 1 denotes an insulating individual substrate made of porcelain such as alumina.
- Reference numeral 2 denotes a pair of first upper electrode layers provided on both right and left ends of the upper surface of the individual substrate 1.
- Reference numeral 3 denotes a resistance layer provided on the upper surface of the individual substrate 1 so as to partially overlap the pair of first upper electrode layers 2.
- Reference numeral 4 denotes a first protective layer provided so as to cover only the entire resistive layer 3.
- Reference numeral 5 denotes a trimming groove provided in the resistance layer 3 and the first protective layer 4 for correcting the resistance value.
- Reference numeral 6 denotes a second protective layer provided only on the upper surface of the first protective layer 4.
- Reference numeral 7 denotes a pair of second upper electrode layers provided on the upper surfaces of the pair of first upper electrode layers 2 so as to extend to the full width of the individual substrate 1.
- Reference numeral 8 denotes a pair of side electrode layers provided on both side surfaces of the individual substrate 1.
- Reference numerals 9 and 10 denote a pair of nickel plating layers and a pair of solders provided on the surfaces of the pair of second upper electrode layers 7 and the pair of side electrode layers 8, respectively. It is a spoiled layer. In this case, the soldering layer 10 is provided lower than the second protective layer 6.
- FIGS. 54 (a) to (f) are process diagrams showing a conventional method for manufacturing a resistor.
- a pair of first upper electrode layers 2 is formed by coating on the left and right ends of the upper surface of the individual substrate 1 having insulating properties.
- a resistive layer 3 is formed on the upper surface of the individual substrate 1 by coating so as to partially overlap the pair of first upper electrode layers 2.
- the total resistance value of the resistive layer 3 is set to a predetermined resistance value.
- the trimming groove 5 is formed in the resistance layer 3 and the first protection layer 4 by using a laser or the like so as to fall within the range.
- the second protective layer 6 is formed by coating only on the upper surface of the first protective layer 4.
- the pair of second upper surfaces is positioned on the upper surfaces of the pair of first upper electrode layers 2 so as to extend to the full width of the individual substrate 1.
- the upper electrode layer 7 is formed by coating.
- a pair of first upper electrode layers 2 and a pair of first and second upper electrode layers are provided on the left and right side surfaces of the individual substrate 1.
- a pair of side electrode layers 8 are formed by coating so as to be electrically connected to 2 and 7.
- the surfaces of the pair of second upper electrode layers 7 and the pair of side electrode layers 8 are plated with nickel and then soldered to form a pair of nickel plating layers 9 and a pair of solders.
- a conventional layer is formed by forming Manufacture armaments
- a conventional sheet-shaped insulating substrate made of porcelain such as alumina is manufactured by forming a substrate dividing groove in advance before firing the sheet-shaped insulating substrate, and firing the insulating substrate.
- the substrate dividing grooves formed in advance on the sheet-shaped insulating substrate may have dimensional variations due to delicate compositional variations of the sheet-shaped insulating substrate and delicate temperature variations during firing of the sheet-shaped insulating substrate. (This dimensional variation reaches about 0.5 mm with a sheet-like insulating substrate of about 100 mm x 100 mm.)
- the dimensions of the individual substrate are required to be very fine in both the vertical and horizontal directions. It is necessary to classify into the dimensional ranks and prepare the screen printing masks such as the upper electrode layer 2, the resistive layer 3, the first protective layer 4, etc. corresponding to the respective dimensional ranks. It is necessary to change the mask according to the ink, and as a result, there is a problem that the process becomes very complicated (when the dimensional rank is classified in 0.05 mm increments, A total of about 600 ranks is required for the dimension classification, with a total of about 25 ranks, each with 25 ranks in the horizontal direction.)
- An object of the present invention is to provide an inexpensive and fine resistor while eliminating the need to replace a mask according to the dimensional rank of an individual substrate, which becomes unnecessary. Things. Disclosure of the invention
- a resistor according to the present invention is provided by dividing a sheet-shaped insulating substrate into a slit-shaped first divided portion and a second divided portion orthogonal to the first divided portion.
- the sheet-shaped insulating substrate is divided into individual pieces by dividing the sheet-shaped insulating substrate into the first slit-shaped divided part and the second divided part orthogonal to the first divided part. Since individual substrates are used, ⁇ Classification of the dimensions of the individual substrates is not required, thereby eliminating the step of replacing the mask according to the dimensional rank of individual substrates as in the past. At the same time, it is possible to provide an inexpensive and fine resistor.
- FIG. 1 is a sectional view of a resistor according to a first embodiment of the present invention
- FIG. 2 is a top view showing a state in which an unnecessary region is formed at the entire peripheral edge of a sheet-shaped insulating substrate used in manufacturing the resistor.
- FIGS. 3 (a) to 3 (e) are cross-sectional views showing the manufacturing process of the resistor.
- FIGS. 4 (a) and (e) are plan views showing the manufacturing process of the resistor
- FIGS. 5 (a) and (d) are cross-sectional views showing the manufacturing process of the resistor
- FIGS. 6 (a) and (d). ) Is a plan view showing the manufacturing process of the resistor
- FIGS. 7A and 7C are cross-sectional views showing the manufacturing process of the resistor
- FIGS. 8A and 8C are manufacturing processes of the resistor.
- FIG. 9 is a top view showing a state where an unnecessary region is formed at one end of a sheet-shaped insulating substrate used in manufacturing the resistor.
- FIG. 10 is a top view showing a state in which unnecessary regions are formed at both ends of a sheet-like insulating substrate used in manufacturing the resistor.
- FIG. 11 is a top view showing a state in which unnecessary regions are formed at three ends of a sheet-shaped insulating substrate used in manufacturing the resistor.
- FIG. 12 is a top view showing a state in which an unnecessary region is formed at the entire peripheral edge of a sheet-like insulating substrate used for manufacturing the resistor according to the second embodiment of the present invention.
- FIGS. 1133 (a) to (e) are cross-sectional views showing the manufacturing process of the resistor.
- FIGS. 14 (a) and (e) are plan views showing the manufacturing process of the resistor.
- 15 (a) and (d) are cross-sectional views showing the manufacturing process of the resistor.
- FIGS. 16 (a) and (d) are plan views showing the manufacturing process of the resistor.
- (c) is a cross-sectional view showing the manufacturing process of the resistor
- FIGS. 1188 ((aa)) to (c) are plan views showing the manufacturing process of the resistor
- FIG. 20 is a top view showing a state in which unnecessary regions are formed at both ends of a sheet-shaped insulating substrate used in manufacturing the resistor.
- Fig. 21 shows a sheet-shaped insulating substrate used to manufacture the resistor.
- a top view showing a state where unnecessary regions are formed at the three ends of
- FIG. 22 is a top view showing a state in which an unnecessary region is formed at the entire peripheral edge of a sheet-like insulating substrate used for manufacturing the resistor according to the third embodiment of the present invention.
- FIGS. 23 (a) and (e) are cross-sectional views showing the manufacturing process of the resistor
- FIGS. 24 (a) and (e) are plan views showing the manufacturing process of the resistor
- FIGS. (d) is a cross-sectional view showing the manufacturing process of the resistor
- FIGS. 26 (a) and (d) are plan views showing the manufacturing process of the resistor
- FIGS. 27 (a) and (c) are the same resistors.
- FIG. 2288 ((aa)) to (c) are plan views showing the manufacturing process of the resistor
- FIG. 29 is used for manufacturing the resistor.
- a top view showing a state in which an unnecessary region is formed at one end of a sheet-shaped insulating substrate to be formed;
- FIG. 30 is a top view showing a state in which unnecessary regions are formed at both ends of a sheet-like insulating substrate used in manufacturing the resistor.
- FIG. 31 is a top view showing a state in which unnecessary regions are formed at three ends of a sheet-shaped insulating substrate used for manufacturing the resistor.
- FIG. 32 is a top view showing a state in which an unnecessary region is formed at the entire peripheral edge of a sheet-like insulating substrate used for manufacturing the resistor according to the fourth embodiment of the present invention.
- FIG. 33 (33) FIGS. ((Aa)) to (e) are cross-sectional views showing the manufacturing process of the resistor, and FIGS. 34 (a) and (e) are plan views showing the manufacturing process of the resistor. 5 (a) and (c) are cross-sectional views showing the manufacturing process of the resistor, FIGS. 36 (a) and (c) are plan views showing the manufacturing process of the resistor, and FIGS. c) is a cross-sectional view showing the manufacturing process of the resistor, and FIGS. 3388 ((aa)) to (c) are plan views showing the manufacturing process of the resistor.
- FIG. 39 is a top view showing a state in which an unnecessary region is formed at one end of a sheet-shaped insulating substrate used for manufacturing the resistor.
- FIG. 40 is a top view showing a state where unnecessary regions are formed at both ends of a sheet-shaped insulating substrate used in manufacturing the resistor.
- FIG. 41 is a top view showing a state in which unnecessary regions are formed at three ends of a sheet-shaped insulating substrate used in manufacturing the resistor.
- FIG. 42 is a cross-sectional view of a resistor obtained by the method for manufacturing a resistor according to the fifth embodiment of the present invention.
- FIG. 43 is a top view showing a state in which an unnecessary region is formed at the entire periphery of a sheet-shaped insulating substrate used in manufacturing the resistor.
- FIGS. 44 (a) to (f) are cross-sectional views showing the manufacturing process of the resistor
- FIGS. 45 (a) and (f) are plan views showing the manufacturing process of the resistor
- d) is a cross-sectional view showing the manufacturing process of the resistor
- FIGS. 47 (a) and (d) are plan views showing the manufacturing process of the resistor
- FIGS. 4488 ((aa)) to (c) are Sectional view showing the manufacturing process of the resistor.
- Figs. 49 (a) and (c) are plan views showing the manufacturing process of the resistor.
- Fig. 50 is a sheet-like sheet used in manufacturing the resistor. A top view showing a state in which an unnecessary region is formed at one end of the insulating substrate;
- FIG. 51 is a top view showing a state in which unnecessary regions are formed at both ends of a sheet-shaped insulating substrate used in manufacturing the resistor.
- FIG. 52 is a top view showing a state in which unnecessary regions are formed at three ends of a sheet-like insulating substrate used in manufacturing the resistor.
- Fig. 53 is a sectional view of a conventional resistor.
- 54 (a) to 54 (f) are perspective views showing the steps of manufacturing a conventional resistor.
- FIG. 1 is a sectional view of a resistor according to a first embodiment of the present invention.
- reference numeral 11 denotes a sheet-like insulating substrate made of baked alumina having a purity of 96%, and a slit-shaped first divided portion and a second divided portion which is orthogonal to the first divided portion. This is a singulated substrate that has been singulated by being divided at the dividing portion.
- Reference numeral 12 denotes a pair of upper electrode layers mainly formed of silver and formed on the upper surface of the individual substrate 11.
- Reference numeral 13 denotes a ruthenium oxide-based resistance layer formed on the upper surface of the individual substrate 11 so as to partially overlap the pair of upper electrode layers 12.
- Reference numeral 14 denotes a first protective layer formed of a pre-coated glass layer formed on the upper surface of the resistance layer 13.
- Reference numeral 15 denotes a trimming groove provided for correcting the resistance value of the resistance layer 13 between the pair of upper electrode layers 12.
- Reference numeral 16 denotes a second protective layer mainly composed of a resin formed so as to cover the first protective layer 14 made of a brittle glass layer.
- Reference numeral 17 denotes a pair of side electrode layers made of nickel, which overlap with a part of the pair of upper electrode layers 12 and cover both side surfaces of the individual substrate 11 and both end portions of the back surface.
- Reference numeral 18 denotes a tin solder layer formed so as to cover a part of the pair of side electrode layers 17 and a part of the pair of upper electrode layers 12.
- FIG. 2 shows a state in which an unnecessary area is formed at the entire peripheral edge of a sheet-like insulating substrate used in manufacturing the resistor according to the first embodiment of the present invention.
- 3 (a)-(e), 4 (a)-(e), 5 (a)-(d), 6 (a)-(d), FIGS. 7 (a) to (c) and FIGS. 8 (a) to (c) are process diagrams showing a method of manufacturing a resistor according to the first embodiment of the present invention.
- a 0.2 mm thick insulating sheet made of 96% pure alumina is used.
- An insulating substrate 21 is prepared.
- the sheet-shaped insulating base plate 21 has an unnecessary area 21a that is not a final product at all peripheral ends. .
- the unnecessary area portion 21a is formed in a substantially square shape.
- a plurality of pairs of upper electrode layers mainly composed of silver are formed on the upper surface of the sheet-shaped insulating substrate 21 by screen printing.
- the upper electrode layer 22 was made a stable film.
- a plurality of ruthenium oxide based resistors are screen-printed so as to straddle a plurality of pairs of upper electrode layers 22.
- Layer 23 was formed and fired with a firing profile at a peak temperature of 850 ° C., thereby making resistive layer 23 a stable film.
- a first protective layer 24 composed of a plurality of pre-coated glass layers is formed by a screen printing method so as to cover the plurality of resistance layers 23, By firing with a firing profile at a peak temperature of 600 ° C., the first protective layer 24 made of a precoated glass layer was made a stable film.
- a laser is used to adjust the resistance value of the resistance layer 23 between the plural pairs of upper electrode layers 22 to a constant value. Trimming was performed by the trimming method to form a plurality of trimming grooves 25.
- a screen printing method is used to cover the first protective layer 24 composed of a plurality of pre-coated glass layers arranged in the vertical direction on the drawing.
- the first protective layer 24 composed of a plurality of pre-coated glass layers arranged in the vertical direction on the drawing.
- second protective layers 26 containing a resin as a main component, and by curing with a curing profile at a peak temperature of 200 ° C., the second protective layers 26 are formed into a stable film. did.
- a plurality of first resist layers 27 are formed by a screen printing method so as to cover the plurality of second protective layers 26. Then, the first resist layer 27 was made into a stable film by ultraviolet curing. Further, a plurality of second resist layers 28 were formed on the back surface of the sheet-like insulating substrate 21 by a screen printing method, and the second resist layer 28 was made into a stable film by ultraviolet curing.
- the sheet-shaped insulating substrate 21 on which the first resist layer 27 and the second resist layer 28 are formed is formed. Except for the unnecessary area 21 a formed at the end of the entire circumference, a slit-like shape for separating a plurality of pairs of upper electrode layers 22 and dividing them into a plurality of strip-shaped substrates 21 b.
- a plurality of first divisions 29 are formed by a dicing method. In this case, the plurality of slit-shaped first divided portions 29 are formed at a pitch of 700 zm, and the width of the bracket-shaped first divided portion 29 is 120 xm width. ing.
- the plurality of slit-shaped first divided portions 29 are formed by through holes vertically penetrating the sheet-shaped insulating substrate 21. Further, since the sheet-shaped insulating substrate 21 has a plurality of slit-shaped first divided portions 29 formed by a dicing method except for the unnecessary region portion 21a, the slit-shaped first divided portion 29 is formed. After forming part 2 9 Since a number of the strip-shaped substrates 21b are connected to the unnecessary area portion 21a, they are in a sheet state.
- the entire surface of the sheet-shaped insulating substrate 21 is formed by using an electroless plating method of immersing in a plating bath and performing plating.
- Nickel plating is performed to form a side electrode layer 30 having a thickness of about 4 to 6 zm.
- the sheet-shaped insulating substrate 21 When the side surface electrode layer 30 is formed by applying nickel plating to the entire surface by an electroless plating method, the side surface electrode layer 30 is formed in a slit shape having a through hole from the upper surface side of the sheet-shaped insulating substrate 21.
- the side surface electrode layer 30 is formed so as to cover a part of the upper surface electrode layer 22 exposed on the upper surface side of the sheet-shaped insulating substrate 21 and the first resist layer 27, On the back side of the insulating substrate 21, it is formed so as to cover the second resist layer 28.
- a plurality of first resist layers (not shown) and a plurality of second resist layers (not shown) are peeled off.
- the paired side electrode layers 30 are patterned.
- a plurality of pairs of exposed side surface electrode layers ⁇ 30 and a plurality of first resist layers are formed by using an electroplating method. (Not shown).
- a plurality of pairs of solder layers 3 1 of about 4 to 6 m thick are covered so as to cover a part of the pairs of upper electrode layers 2 2 exposed by peeling off.
- the thickness of the side electrode layer 30 is about 4 to 6 but is not limited to this range, and the thickness is 1 to 15 zm.
- this side electrode layer 30 is formed by nickel plating using an electroless plating method, the side electrode layer 30 has no magnetism. It provides a product with extremely high dimensional accuracy, and when mounting a resistor by suction using the suction pins of an automatic beautifying machine, improves the stability during suction and ensures a high mounting rate.
- the solder layer 31 is made of tin, the present invention is not limited to this. For example, a tin alloy-based material may be used. When these materials are used, stable soldering is performed during reflow soldering. Can be done.
- the upper electrode layer 22 is made of a silver-based material and the resistive layer 23 is made of a ruthenium oxide-based material, it is possible to secure resistance characteristics excellent in heat resistance and durability. It is.
- the protective layer covering the resistive layer 23 and the like includes a first protective layer 24 made of a brittle glass layer covering the resistive layer 23, the first protective layer 24, and a trimming groove 25.
- the first protective layer 24 prevents the occurrence of cracks during laser trimming and reduces the current noise because the second protective layer 26 is mainly composed of a resin covering resin.
- the second protective layer 26 since the entire resistance layer 23 is covered with the second protective layer 26 containing the resin as a main component, resistance characteristics with excellent moisture resistance can be secured.
- the first strip-shaped substrate 21 b of the sheet-shaped insulating substrate 21 has a first slit-like shape so that the plurality of resistance layers 23 are individually separated and divided into individual substrates 21 c.
- a plurality of second divided portions 32 are formed in a direction orthogonal to the divided portions 29 by using a dicing method. In this case, the plurality of second divisions 32 are formed at a pitch of 400, and the second divisions 32 Has a width of 100 xm.
- the plurality of second divisions 3 2 are formed on a plurality of strip-shaped substrates 2 lb by a dicing method except for the unnecessary area 21 a, so that the plurality of second divisions 3 2 Each time the device is formed, it is cut and divided into individual substrates 21c, and the individualized products are separated from the unnecessary region 21a.
- the resistor according to the first embodiment of the present invention is manufactured.
- the interval between the slit-shaped first divided portion 29 and the second divided portion 32 formed by the dicing method is accurate ( ⁇ 0.005). mm) and the thickness of the side electrode layer 30 and the solder layer 31 are also accurate, so the total length and width of the product resistor are exactly 0.6 mm long and 0.3 mm wide. mm.
- the pattern accuracy of the upper electrode layer 22 and the resistance layer 23 does not need to be classified into dimensional ranks of individual substrates, and it is not necessary to consider dimensional variations within the dimensional rank of the same individual substrate.
- the effective area of the resistance layer 23 can be made larger than that of the conventional product.
- the resistance layer in the conventional product had a length of about 0.20 mm and a width of 0.19 mm
- the resistance layer 23 of the resistor according to the first embodiment of the present invention had a length of about 0.20 mm. 0.25 111 111
- the width is 0.24 mm, which is about 1.6 times or more in area.
- the plurality of slit-shaped first divided portions 29 and the plurality of second divided portions 32 are formed by using a dicing method, a sheet-like substrate which does not require dimensional classification of the individual substrate is required. Since the insulating substrate 21 can be used, it is not necessary to classify the size of the individual substrate as in the conventional case. Daishi The dicing can be easily performed using a semiconductor or the like and using a general dicing equipment.
- the sheet-shaped insulating substrate 21 has an unnecessary area 21 a that is not finally formed as a product at the entire peripheral edge, and has a plurality of slit-shaped first divided parts 29 and a plurality of slits. Since the second divided portion 32 is not formed in the unnecessary region portion 21a, even after forming the plurality of slit-shaped first divided portions 29, the plurality of strip-shaped substrates 2 lb are formed.
- the post-process can be performed in the state of the sheet-shaped insulating substrate 21 having the unnecessary region 21a, so that the design of the method can be simplified.
- the product is cut and divided into a flake substrate 21c, and the individualized product is Since the unnecessary area portion 21a is separated from the unnecessary area portion 21a, the step of separating the unnecessary area portion 21a from the product later becomes unnecessary.
- the side surface electrode layer 30 is formed of a sheet-like insulating substrate. 21 can be formed, and the potential difference can be reduced when the solder layer 31 is formed by the electric heating method, whereby a stable solder layer 31 can be formed. .
- the unnecessary region 21a that does not eventually become a product is formed on the entire peripheral edge of the sheet-shaped insulating substrate 21 to form a substantially square shape.
- the unnecessary part 2 1 a need not necessarily be formed at the entire peripheral edge of the sheet-shaped insulating substrate 21; for example, as shown in FIG. 9, an unnecessary area 21 d is formed at one end of the sheet-shaped insulating substrate 21.
- FIG. 10 when the unnecessary regions 21 e are formed at both ends of the sheet-shaped insulating substrate 21, as shown in FIG. Even when the unnecessary region 21 f is formed at the three ends of the substrate 21, the same operation and effect as those of the first embodiment of the present invention can be obtained.
- the plurality of second divided portions 32 may be formed.
- the upper surface, the lower surface, or the center of the sheet-shaped insulating substrate 21 is laser-processed or dicing, leaving a thin portion on any of the back, upper, or center of the sheet-shaped insulating substrate 21. It may be formed by cutting by a method or the like, and in these cases, it is not divided into pieces each time the second divided portion 32 is formed, but is divided into pieces in two stages. is there.
- the slit-shaped first divided portion 29 was formed.
- the layer 27 and the second resist layer 28 may be formed after forming the slit-shaped first division 29.
- the strength of the sheet-shaped insulating substrate 21 is reduced. Therefore, it is necessary to reduce the printing pressure during screen printing.
- the same effect as in the first embodiment of the present invention can be obtained. Is obtained.
- the first resist layer 27 and the second resist layer 28 were peeled off before the formation of the solder layer 31. It is also possible after formation.
- a silver-based material is used as the upper electrode layer 22 and a ruthenium oxide-based material is used as the resistance layer 23.
- these materials may be used in other material systems. An effect similar to that of the first embodiment of the invention can be obtained.
- the slit-shaped first divided part 29 and the second divided part 32 are formed by using the dicing method.
- the slit-shaped first divided portion 29 and the second divided portion 32 are formed by using a divided portion forming means such as a laser inkjet, etc.
- the present invention The same operation and effect as those of the first embodiment are obtained.
- a pair of upper electrode layers 12 is formed on the upper surface of the individual substrate 11, and thereafter, a part of the pair of upper electrode layers 12 is overlapped with the pair of upper electrode layers 12.
- the resistive layer 13 is formed on the upper surface of the individual substrate 11, and then the resistive layer 13 is partially overlapped with the resistive layer 13. Even when a pair of upper electrode layers 12 are formed, the same operation and effect as those of the first embodiment of the present invention can be obtained.
- a plurality of slit-shaped first divisions 29 for dividing into a plurality of strip-shaped substrates 21b are formed, a plurality of pairs of upper surface electrode layers 2 are formed. 2, plural resistive layers 23, plural first protective layers 24, plural trimming grooves 25, plural second protective layers 26, plural (1)
- the present invention is not limited to this.
- the slit-shaped when a plurality of slit-shaped first divided portions 29 are first formed on the sheet-shaped insulating substrate 21, the slit-shaped When a sheet-shaped insulating substrate 21 in which a plurality of first divisions 29 are formed in advance is used, after forming a plurality of pairs of upper electrode layers 22 on the sheet-shaped insulating substrate 21, When a plurality of slit-shaped first divided portions 29 are formed on the sheet-shaped insulating substrate 21, after forming a plurality of resistance layers 23 on the sheet-shaped insulating substrate 21, When a plurality of slit-shaped first divided portions 29 are formed on the sheet-shaped insulating substrate 21, a sheet-shaped After forming a plurality of pairs of upper electrode layers 22 on the edge substrate 21 and forming a plurality of resistance layers 23 so as to partially overlap the plurality of upper electrode layers 22 of the brackets, When a plurality of slit-shaped first divided portions 29 are formed on the insulating substrate 21, a plurality of resistance layers 23 are
- a plurality of slit-like first divisions 29 are formed on the sheet-like insulating substrate 21.
- a plurality of pairs of upper surface electrode layers 22 and a plurality of resistance layers 23 are formed on a sheet-shaped insulating substrate 21, and the plurality of pairs of upper surface electrode layers 2 After trimming to adjust the resistance value between the two, a slit-shaped first division 29 is formed on the sheet-shaped insulating substrate 21.
- the same effects as those of the first embodiment of the present invention can be obtained.
- FIG. 12 is a top view showing a state in which an unnecessary region is formed at the entire peripheral edge of a sheet-like insulating substrate used for manufacturing a resistor according to the second embodiment of the present invention.
- 13 (a) to (e), Fig. 14 (a) to (e), Fig. 15 (a) to (d), Fig. 16 (a) to (d), Fig. 17 (A) to (c) and FIGS. 18 (a) to (c) are process diagrams showing a method of manufacturing a resistor according to the second embodiment of the present invention.
- a 0.2 mm thick insulating material made of calcined 96% pure alumina.
- a sheet-shaped insulating substrate 41 is prepared.
- the sheet-shaped insulating substrate 41 has an unnecessary area portion 41a that is not a final product at all peripheral edges.
- the unnecessary area portion 41a is formed in a substantially square shape.
- a plurality of layers each containing silver as a main component are formed on the upper surface of the sheet-like insulating substrate 41 by a screen printing method.
- a pair of upper electrode layers 42 was formed and fired with a firing profile at a peak temperature of 850 ° C., thereby making the upper electrode layers 42 stable.
- a plurality of ruthenium oxide-based materials are screen-printed so as to straddle a plurality of pairs of upper electrode layers 42.
- the resistive layer 43 was formed, and the resistive layer 43 was made to be a stable film by baking with a baking opening having a peak temperature of 850 ° C.
- a first protective layer 44 composed of a plurality of pre-coated glass layers is formed by a screen printing method so as to cover the plurality of resistance layers 43. Is formed and baked with a baking profile having a peak temperature of 600 ° C. to form a first protective layer made of a pre-coated glass layer.
- the protective layer 4 was a stable film.
- the first protective layer 44 consisting of a plurality of pre-coated glass layers arranged vertically in the drawing is covered.
- a plurality of second protective layers 46 mainly composed of resin are formed by a screen printing method, and the second protective layer 46 is stabilized by curing with a curing profile at a peak temperature of 200 ° C. Film.
- a plurality of resist layers 47 are formed on the back surface of the sheet-shaped insulating substrate 41 by a screen printing method.
- the resist layer 47 was made into a stable film by ultraviolet curing.
- the plurality of slit-shaped first divided portions 48 are formed as through holes vertically penetrating the sheet-shaped insulating substrate 41. Further, since the sheet-shaped insulating substrate 41 has a plurality of slit-shaped first divided portions 48 formed by a dicing method except for the unnecessary region portion 41a, the slit-shaped first divided portion 48 is formed. Even after forming the divided portion 48 of the plurality of strip-shaped substrates 4 1 b Since it is connected to the unnecessary area portion 41a, it shows a sheet state.
- the back surface of the sheet-shaped insulating substrate 41 and the plurality of slit-shaped first divided portions 4 are formed by sputtering.
- a side surface electrode layer 49 having a thickness of about 0.1 to 1 m made of nickel or a nickel-based alloy, for example, a nickel chromium alloy is formed on the inner surface of 8.
- the side surface electrode layer 49 formed on the inner surface of the plurality of slit-shaped first divided portions 48 is in contact with the upper surface electrode layer 42 formed on the upper surface of the sheet-shaped insulating substrate 41. And are electrically connected.
- a plurality of resist layers (not shown) are peeled off, and a plurality of pairs of side electrode layers 49 are patterned.
- a plurality of pairs of exposed side electrode layers 49 and a plurality of resist layers are exposed by using an electroplating method.
- a plurality of pairs of nickel layers 50 made of nickel having a thickness of about 4 to 6 m and a thickness of about A plurality of pairs of solder layers 51 of tin of 4 to 6 Aim are formed.
- the thickness of the side electrode layer 49 formed by the above-mentioned sputtering method is about 0.1 to 1 m, but is not limited to this range. It is appropriate that the thickness including the layer 51 is 1 to 15 m.
- solder layer 51 is made of tin
- the present invention is not limited to this.
- a tin alloy-based material may be used. When these materials are used, stable soldering is performed during reflow soldering. Can be done.
- the upper electrode layer 42 is made of a silver-based material and the resistive layer 43 is made of a ruthenium oxide-based material, it is possible to secure resistance characteristics excellent in heat resistance and durability. It is.
- the protective layer covering the resistance layer 43 and the like includes a first protective layer 44 made of a brittle glass layer covering the resistance layer 43, and a first trimming groove while covering the first protective layer 44. Since the second protective layer 46 mainly composed of resin covering the layer 45 is composed of two layers, the first protective layer 44 prevents generation of cracks at the time of laser trimming and current noise. In addition, since the entire resistance layer 43 is covered with the second protective layer 46 mainly composed of the resin, resistance characteristics excellent in moisture resistance can be secured.
- the unnecessary area portion 4 1 formed on the entire peripheral edge of the sheet-shaped insulating substrate 41 is formed. Except for a, the slit-shaped substrate 41 is divided into a plurality of strip-shaped substrates 41 in the sheet-shaped insulating substrate 41 so that the plurality of resistive layers 43 are individually separated and divided into strip-shaped substrates 41c.
- a plurality of second divided portions 52 are formed using a dicing method in a direction orthogonal to the first divided portions 48. In this case, the plurality of second divided portions 52 are formed at a pitch of 400 m, and the width of the second divided portion 52 of the parentheses is 100.
- the plurality of second divided portions 5 2 are formed on the plurality of strip-shaped substrates 41 b by a dicing method except for the unnecessary region portion 41 a. Each time 2 is formed, the product is cut and divided into individual substrates 41c, and the individualized products are separated from the unnecessary area portions 41a.
- the resistor according to the second embodiment of the present invention is manufactured.
- the length and width dimensions of the resistor manufactured by the above process are dicing
- the distance between the slit-shaped first divided part 48 and the second divided part 52 formed by the method is accurate (within ⁇ 0.05 mm), and the side electrode layer 49, nickel Since the thicknesses of the layer 50 and the solder layer 51 are also accurate, the total length and the total width of the product resistor are exactly 0.6 111111 in length and 0.3 mm in width.
- the pattern accuracy of the upper electrode layer 42 and the resistance layer 43 does not require the dimensional rung classification of the individual substrates, and it is necessary to consider the dimensional variation within the dimensional rank of the same individual substrate. Therefore, the effective area of the resistance layer 43 can be made larger than that of the conventional product.
- the resistance layer of the conventional product had a length of about 0.20 mm and a width of 0.19 mm
- the resistance layer 43 of the resistor according to the second embodiment of the present invention had a length of Approximately 0.25 01] 11
- the width is 0.24 mm, and the area is about 1.6 times or more.
- the plurality of slit-shaped first divided portions 48 and the plurality of second divided portions 52 are formed by using a dicing method, a sheet-like shape which does not require dimensional classification of the individual substrate is required. Since the insulating substrate 41 can be used, it is not necessary to classify the size of the individual substrate as in the conventional case. Also, dicing can be easily performed using a general dicing facility for semiconductors and the like.
- the sheet-shaped insulating substrate 41 has an unnecessary region 41 a that is not finally formed as a product at the entire peripheral edge, and has a plurality of slit-shaped first divided portions 48 and a plurality of slits. Since the second divided portion 52 is not formed in the unnecessary area portion 41a, even after the plurality of slit-shaped first divided portions 48 are formed, the plurality of strip-shaped substrates 41 are not formed. b is connected to the unnecessary area portion 41a, so that the sheet-shaped insulating substrate 41 becomes a plurality of strip-shaped substrates 41b.
- the sheet-shaped insulating substrate 41 having the unnecessary region portions 41a is still in a state of being separated. Since the process can be performed, the design of the construction method can be simplified.
- a plurality of second divisions 52 are formed, each time the plurality of second divisions 52 are formed, they are cut and divided into individual substrates 41c, and the individualized products are Since the unnecessary area portion 41a is separated from the unnecessary area portion 41a, the step of separating the unnecessary area portion 41a from the product later becomes unnecessary.
- the side electrode layers 49 are formed in the state of a sheet-shaped insulating substrate 41, the side electrode layers 49 are formed in a sheet shape. And the potential difference can be reduced when the nickel layer 50 and the solder layer 51 are formed by the electroplating method. Thus, a nickel layer 50 and a solder layer 51 can be formed.
- the unnecessary area portion 41 a that is not finally formed as a product is formed at the entire peripheral edge of the sheet-shaped insulating substrate 41 to form a substantially square shape.
- the unnecessary area portion 41a does not necessarily need to be formed on the entire periphery of the sheet-shaped insulating substrate 41, for example, as shown in FIG.
- an unnecessary area portion 4 1d is formed at one end of the insulating substrate 41, as shown in FIG. 20, when an unnecessary area portion 4 1e is formed at both ends of the sheet-shaped insulating substrate 41, As shown in FIG. 21, even when the unnecessary region portions 41 f are formed at the three ends of the sheet-shaped insulating substrate 41, the same operation and effect as those of the second embodiment of the present invention are obtained.
- the upper surface, the lower surface, or the center of the sheet-shaped insulating substrate 41 is left with a thin portion on any of the rear surface, the upper surface, and the center of the sheet-shaped insulating substrate 41, and the laser is used. It may be formed by cutting with a dicing method or the like.In these cases, the second divided portion 52 is not divided into pieces each time it is formed, but is divided into two pieces. It is.
- the slit-shaped first divided portion 48 is formed after forming the resist layer 47, but the resist layer 47 is formed in the slit-shaped first portion. It may be formed after forming the divided portion 48.
- the resist layer 47 is screen-printed after forming the slit-shaped first divisional portion 48 in this manner, the strength of the sheet-shaped insulating substrate 41 is reduced, so that the screen printing is performed. It is necessary to reduce the printing pressure of
- the resist layer 47 is formed immediately after the formation of the first protective layer 44 made of a precoated glass layer, the same effect as that of the second embodiment of the present invention can be obtained.
- the resist layer 47 was peeled off before the nickel layer 50 and the solder layer 51 were formed. It is also possible after the formation of.
- a silver-based material is used for the upper electrode layer 42 and a ruthenium oxide-based material is used for the resistance layer 43.
- a ruthenium oxide-based material is used for the resistance layer 43.
- the slit-shaped first divided portion 48 and the second divided portion 52 are formed using the dicing method.
- a divided portion forming means such as a laser beam inkjet, etc. The same operation and effect as those of the second embodiment can be obtained.
- a plurality of slit-shaped first divided portions 48 for dividing into a plurality of strip-shaped substrates 41b, a plurality of pairs of upper surface electrode layers 42 , A plurality of resistive layers 43, a plurality of first protective layers 4, a plurality of trimming grooves 45, a plurality of second protective layers 46, a sheet-shaped insulating substrate 41 on which a plurality of resist layers 47 are formed
- a plurality of slit-shaped first divided portions 48 are formed in the above description, the present invention is not limited to this.
- the sheet-shaped insulating substrate 41 may have When a plurality of slit-shaped first divided portions 48 are formed first, when a sheet-shaped insulating substrate 41 in which a plurality of slit-shaped first divided portions 48 are formed in advance is used, After a plurality of pairs of upper electrode layers 42 are formed on the sheet-like insulating substrate 41, the sheet-like insulating substrate In the case where a plurality of slit-shaped first divided portions 48 are formed in 41, a plurality of resistance layers 43 are formed on the sheet-shaped insulating substrate 41, and then the sheet-shaped insulating substrate 41 is formed.
- a plurality of slit-shaped first divided portions 48 When a plurality of slit-shaped first divided portions 48 are formed, a plurality of pairs of upper surface electrode layers 42 are formed on a sheet-shaped insulating substrate 41, and a plurality of pairs of upper surface electrode layers 4 of parentheses are formed. After forming a plurality of resistance layers 43 so that a part thereof overlaps with 2, a plurality of slit-shaped first divided portions 48 are formed on the sheet-shaped insulating substrate 41. A plurality of resistive layers 43 are formed on the insulating substrate 41 of a plurality of pairs, and a plurality of pairs of upper surface electrodes are formed so as to partially overlap the plurality of resistive layers 43 of the bracket.
- the layer 42 After the layer 42 is formed, when a plurality of slit-shaped first divided portions 48 are formed on the sheet-shaped insulating substrate 41, a plurality of pairs of upper surface electrodes are formed on the sheet-shaped insulating substrate 41. After forming a layer 42 and a plurality of resistance layers 43 and performing trimming to adjust a resistance value between the plurality of pairs of upper electrode layers 42 in the plurality of resistance layers 43 of the brackets, the sheet shape is obtained. Even when the slit-shaped first divided portion 48 is formed on the insulating substrate 41, the same effects as those of the second embodiment of the present invention can be obtained.
- FIG. 22 is a top view showing a state in which an unnecessary area is formed at the entire peripheral edge of a sheet-shaped insulating substrate used for manufacturing the resistor according to the third embodiment of the present invention.
- 23 Fig. (A) to (e), Fig. 24 (a) to (e), Fig. 25 (a) to (d), Fig. 26 (a) to (d), Fig. 27 (A) to (c) and FIGS. 28 (a) to (c) are process diagrams showing a method for manufacturing a resistor according to the third embodiment of the present invention.
- Fig. 22 First, as shown in Fig. 22, Fig. 23 (a), and Fig. 24 (a), it has a 0.2 mm thick insulation made of calcined 96% pure alumina.
- a sheet-shaped insulating substrate .61 is prepared.
- the sheet-shaped insulating substrate 61 has an unnecessary area portion 61 a that is not a final product at the end of the entire periphery. .
- the unnecessary area portion 61a is configured in a substantially square shape.
- a plurality of sheets mainly composed of silver are formed on the upper surface of the sheet-like insulating substrate 61 by a screen printing method.
- a pair of upper electrode layers 62 are formed, and a firing profile at a peak temperature of 850 ° C is formed. By firing in an aisle, the upper electrode layer 62 was made a stable film.
- the ruthenium oxide-based material is screen-printed so as to straddle a plurality of pairs of upper electrode layers 62.
- a plurality of resistive layers 63 were formed, and baked with a firing port at a peak temperature of 850 ° C., to make the resistive layers 63 stable.
- the first protective layer 64 composed of a plurality of pre-coated glass layers is screen-printed so as to cover the plurality of resistive layers 63.
- the resistance of the resistance layer 63 between the plural pairs of upper electrode layers 62 is adjusted to a constant value. Trimming was performed by the one-to-one trimming method to form a plurality of trimming grooves 65.
- a screen is formed so as to cover the first protective layer 64 composed of a plurality of pre-coated glass layers arranged vertically in the drawing.
- the second protective layers 66 are formed.
- the second protective layers 66 are formed.
- a plurality of slit-shaped first divisions 67 for separating a plurality of pairs of upper electrode layers 62 and dividing into a plurality of strip substrates 61 are formed by a dicing method.
- the plurality of slit-shaped first divisions 67 are formed at a pitch of 70,0 xm, and the bracket-shaped first divisions 6 7 The width of 7 is 120 m wide.
- the plurality of slit-shaped first divided portions 67 are formed by through holes vertically penetrating the sheet-shaped insulating substrate 61.
- the sheet-shaped insulating substrate 61 has a plurality of slit-shaped first divided portions 67 formed by a dicing method except for the unnecessary region portion 61a, the slit-shaped first divided portion 67 is formed. Even after the division 67 is formed, the plurality of strip-shaped substrates 6 lb are connected to the unnecessary area 61 a, so that they are in a sheet state.
- the side surface electrode layer 70 formed on the inner surface of the plurality of slit-shaped first divided portions 67 contacts the upper surface electrode layer 62 formed on the upper surface of the sheet-shaped insulating substrate 61. And are electrically connected.
- a plurality of pairs of exposed side surface electrode layers 70 and a plurality of pairs of upper surfaces are formed by using an electric plating method.
- a plurality of pairs of nickel layers 71 made of nickel having a thickness of about 4 to 6 Aim and a plurality of pairs made of tin having a thickness of about 4 to 6 cover a part of the pole layer 62.
- a solder layer 72 is formed.
- the thickness of the side electrode layer 70 formed by the above-mentioned sputtering method is about 0.1 to 1 m, but is not limited to this range.
- the nickel layer 71 and the solder layer 72 are not limited to this range.
- a thickness of 1 to 15 m is appropriate for adding the thickness.
- solder layer 72 is made of tin
- the present invention is not limited to this.
- a tin alloy-based material may be used. When these materials are used, stable soldering is performed during reflow soldering. Can be done.
- the upper electrode layer 62 is made of a silver-based material and the resistive layer 63 is made of a ruthenium oxide-based material, resistance characteristics excellent in heat resistance and durability can be ensured. It is.
- the protective layer covering the resistance layer 63 and the like includes a first protective layer 64 made of a brittle glass layer covering the resistance layer 63, a first protective layer 64, and a trimming groove. Since the second protective layer 66 is mainly composed of a resin covering the second protective layer 66, the first protective layer 64 prevents generation of cracks at the time of laser trimming and current noise. In addition, since the entire resistance layer 63 is covered with the second protective layer 66 mainly composed of the resin, resistance characteristics excellent in moisture resistance can be secured.
- the slits are formed such that the plurality of resistive layers 63 are individually separated into the plurality of strip-shaped substrates 61b in the sheet-shaped insulating substrate 61 and divided into individual substrates 61c.
- a plurality of second divided portions 73 are formed in a direction orthogonal to the first divided portions 67 using a dicing method. In this case, the plurality of second divided portions 73 are formed at a pitch of 400 m, and the second divided portion of the parentheses is formed.
- the width of 73 is 100 m wide.
- the plurality of second divided portions 73 are formed on the plurality of strip-shaped substrates 61b by a dicing method except for the unnecessary region portion 61a, the plurality of second divided portions 73 are formed. Each time 3 is formed, the product is cut and divided into individual substrates 61c, and the individualized products are separated from the unnecessary area portions 61a.
- the resistor according to the third embodiment of the present invention is manufactured.
- the interval between the slit-shaped first divided portion 67 and the second divided portion 73 formed by the dicing method is accurate ( ⁇ 0.000).
- the thickness of the side electrode layer ⁇ 0, nickel layer 71 and solder layer 72 are also accurate, so the total length and width of the product resistor is exactly 0. 6 111111
- the width is 0.3 mm.
- the pattern accuracy of the upper electrode layer 62 and the resistance layer 63 is not required because the dimensional rank of the singular substrate is not required and the dimensional variation within the dimensional rank of the same individual substrate needs to be considered. Therefore, the effective area of the resistance layer 63 can be made larger than that of the conventional product.
- the resistance layer in the conventional product had a length of about 0.20 mm and a width of 0.19 mm, whereas the resistance layer 63 of the resistor in the third embodiment of the present invention had a length.
- the width is about 0.25 111 11 and 0.24 mm, which is about 1.6 times or more in area.
- the plurality of slit-shaped first divided portions 67 and the plurality of second divided portions 73 are formed by using a dicing method, a dimensional classification of the individual substrate is not required.
- Insulated substrate 61 can be used, which eliminates the need for conventional dimensional classification of individual substrates, thus eliminating the need for conventional mask replacement process. With, Daishi Also, the dicing can be easily performed using a general dicing equipment such as a semiconductor.
- the sheet-shaped insulating substrate 61 has an unnecessary area 61 a that is not finally formed as a product at the entire peripheral edge, and has a plurality of slit-shaped first divided sections 67 and a plurality of slit-shaped first divided sections 67.
- the second divided portion 73 is not formed in the unnecessary area portion 61a, even after the plurality of slit-shaped first divided portions 67 are formed, the plurality of strip-shaped substrates 6 lb is connected to the unnecessary area portion 61a, so that the sheet-shaped insulating substrate 61 is not finely separated into a plurality of strip-shaped substrates 61, and therefore, a plurality of slit-shaped first Even after the formation of the divided portion 67, the post-process can be performed in the state of the sheet-shaped insulating substrate 61 having the unnecessary region portion 61a, so that the design of the method can be simplified.
- each time the plurality of second divisions 73 are formed they are cut and divided into individual substrates 61c, and the individualized products are Since the unnecessary area section 61a is separated from the unnecessary area section 61a, the step of separating the unnecessary area section 61a from the product later becomes unnecessary.
- the side electrode layers 70 can be formed at necessary places on the sheet-shaped insulating substrate 61, and the potential difference can be reduced when the nickel layer 71 and the solder layer 72 are formed by the electroplating method. As a result, a stable nickel layer 71 and a stable solder layer 72 can be formed.
- the unnecessary region 6a that is not finally formed as a product is formed on the entire peripheral edge of the sheet-shaped insulating substrate 61.
- the unnecessary region portion 61a is not necessarily formed at the entire peripheral edge of the sheet-shaped insulating substrate 61.
- the unnecessary region portion 61a is not necessarily formed.
- an unnecessary area 61 d is formed at one end of the sheet-shaped insulating substrate 61 as shown in FIG. 9, the unnecessary area is formed at both ends of the sheet-shaped insulating substrate 61 as shown in FIG. 30.
- 6 e is formed, as shown in FIG. 31, even when the unnecessary region portions 6 1 f are formed at the three ends of the sheet-shaped insulating substrate 61, the third embodiment of the present invention is performed. It has the same effect as the example. ,
- the plurality of second divided portions 73 may be formed. Any one of the upper surface, the lower surface, and the center of the sheet-shaped insulating substrate 61 is laser-processed while leaving a thin portion on any of the back surface, the upper surface, and the center of the sheet-shaped insulating substrate 61. It may be formed by cutting with a dicing method or the like.In these cases, the pieces are not divided into pieces each time the second divided portion 73 is formed, but are divided into pieces in two stages. It is.
- a silver-based material was used for the upper electrode layer 62 and a ruthenium oxide-based material was used for the resistance layer 63. An effect similar to that of the third embodiment of the present invention can be obtained.
- the slit-shaped first divided portion 67 and the second divided portion 73 are formed using the dicing method.
- a divided portion forming means such as a laser inkjet, etc.
- the third embodiment of the invention has the same functions and effects as the third embodiment.
- a plurality of slit-shaped first divisions 67 for dividing into a plurality of strip-shaped substrates 6 1b are formed.
- a plurality of pairs of upper electrode layers 6 2 , A plurality of resistive layers 63, a plurality of first protective layers 64, a plurality of trimming grooves 65, a plurality of second protective layers 66 formed in a sheet-like shape, and a slit-like A description has been given of a case in which a plurality of divided portions 67 are formed.
- the present invention is not limited to this.
- a slit-shaped first In the case where a plurality of divisions 67 of 1 are formed, in the case of using a sheet-like insulating substrate 61 in which a plurality of slit-like first divisions 67 are formed in advance, sheet-like insulation is provided. After forming a plurality of pairs of upper electrode layers 62 on the substrate 61, the slit-shaped first substrate is formed on the sheet-shaped insulating substrate 61. When a plurality of divided portions 67 are formed, a plurality of resistive layers 63 are formed on the sheet-shaped insulating substrate 61, and then a slit-shaped first divided portion is formed on the sheet-shaped insulating substrate 61.
- a plurality of pairs of upper electrode layers 62 are formed on a sheet-shaped insulating substrate 61, and a plurality of pairs are formed so as to partially overlap the plurality of pairs of upper electrode layers 62.
- a plurality of slit-shaped first divided portions 67 are formed on the sheet-shaped insulating substrate 61 after forming the resistive layer 63 of the same type, a plurality of resistors are formed on the sheet-shaped insulating substrate 61.
- a slit-shaped insulating substrate 61 is formed.
- FIG. 32 is a top view showing a state in which an unnecessary region is formed at the entire periphery of a sheet-shaped insulating substrate used for manufacturing a resistor according to the fourth embodiment of the present invention.
- 33 (a) to (e), Fig. 34 (a) to (e), Fig. 35 (a) to (c), Fig. 36 (a) to (c), Fig. 37 (A) to (c) and FIG. 38 (a) to (c) are process diagrams showing a method for manufacturing a resistor in the fourth embodiment of the present invention.
- -First as shown in Fig. 32, Fig. 33 (a), and Fig. 34 (a), it has a 0.2 mm thick insulation made of calcined 96% pure alumina.
- a sheet-shaped insulating substrate 81 is prepared.
- the sheet-shaped insulating substrate 81 has an unnecessary area portion 81a that is not finally formed as a product at all peripheral ends.
- the unnecessary area portion 81a is formed in a substantially square shape.
- silver is used as a main component on the upper surface of the sheet-like insulating substrate 81 by a screen printing method.
- a plurality of pairs of upper electrode layers 82 were formed and baked with a firing profile at a peak temperature of 850 ° C., whereby the upper electrode layers 82 were made into stable films.
- a plurality of ruthenium oxide-based materials are screen-printed so as to straddle a plurality of pairs of upper electrode layers 82.
- the resistive layer 83 was formed, and baked with a firing port at a peak temperature of 850 ° C., thereby making the resistive layer 83 a stable film.
- a first protective layer composed of a plurality of pre-coated glass layers is formed by a screen printing method so as to cover the plurality of resistive layers 83.
- the first protective layer 84 consisting of a pre-coated glass layer was made a stable film by forming the layer 84 and firing it with a firing profile at a peak temperature of 600 ° C.
- a plurality of trimming grooves 85 were formed by laser trimming.
- the first protective layer 84 composed of a plurality of pre-coated glass layers arranged vertically in the drawing is covered.
- a plurality of second protective layers 86 containing a resin as a main component are formed by a screen printing method, and the second protective layer 86 is stably formed by curing with a curing profile at a peak temperature of 200 ° C. It was a membrane.
- a plurality of slit-shaped first divided portions 87 for separating a plurality of pairs of upper electrode layers 82 and dividing into a plurality of strip-shaped substrates 81b are formed by a dicing method.
- the plurality of slit-shaped first divided portions 87 are formed at a pitch of 700, and the width of the bracket-shaped slit-shaped first divided portions 87 is 120; I have.
- the plurality of slit-shaped first divided portions 87 are formed by through holes vertically penetrating the sheet-shaped insulating substrate 81. Further, since the sheet-shaped insulating substrate 81 has a plurality of slit-shaped first divided portions 87 formed by a dicing method except for the unnecessary region portions 81a, the slit-shaped first divided portions are formed. Part 8 Even after the formation of 7, the plurality of strip-shaped substrates 81b are connected to the unnecessary area portions 81a, so that they exhibit a sheet state.
- the entire back surface of the sheet-shaped insulating substrate 81 in which a plurality of slit-shaped first divided portions 87 are formed is formed.
- a metal film 88 made of nickel or a nickel-based alloy is formed by a sputtering method, an electroless plating method or the like, and a plurality of pairs of side surfaces made of nickel or a nickel-based alloy are formed on the inner surface of the slit-shaped first divided portion 87.
- the electrode layer 8.9 is formed by a sputtering method, an electroless plating method, or the like.
- the side electrode layer 89 formed on the inner surface of the plurality of slit-shaped first divided portions 87 contacts the upper electrode layer 82 formed on the upper surface of the sheet-shaped insulating substrate 81. They are electrically connected.
- an unnecessary portion of the metal film 88 formed on the entire back surface of the sheet-like insulating substrate 81 is subjected to laser irradiation.
- a plurality of pairs of exposed side electrode layers 89 and a plurality of pairs of top electrode layers are exposed by using an electroplating method.
- a plurality of pairs of nickel layers 91 made of about 4 to 6 / m Nigel and a plurality of pairs of solder layers 92 made of tin having a thickness of about 4 to 6 m are formed so as to partially cover 82.
- the thickness of the side electrode layers 89 is about 0.1 to lm, so that the nickel layer 91 and the solder layer 92 are formed.
- the plurality of pairs of side electrode layers 89 are formed by an electroless plating method, since the thickness of the side electrode layers 89 is about 4 to 6 m, the solder layer It is sufficient to form only 9 2.
- the solder layer 92 is made of tin, but is not limited to this. Instead, tin alloy-based materials may be used. When these materials are used, stable soldering can be performed during reflow soldering.
- the upper electrode layer 82 is made of a silver-based material and the resistive layer 83 is made of a ruthenium oxide-based material, resistance characteristics excellent in heat resistance and durability can be ensured. It is.
- the protective layer covering the resistance layer 83 and the like includes a first protective layer 84 made of a brittle glass layer that covers the resistance layer 83, a first protective layer 84, and a trimming groove 85.
- the first protective layer 84 prevents the occurrence of cracks during laser trimming and current noise by forming the second protective layer 86 mainly composed of a resin that covers
- the second protective layer 86 containing the resin as a main component covers the entire resistive layer 83 so that resistance characteristics with excellent moisture resistance can be secured.
- the unnecessary area portion 81 formed on the entire peripheral edge of the sheet-like insulating substrate 81 is formed.
- the slits are formed such that the plurality of resistive layers 83 are separated individually into a plurality of strip-shaped substrates 8 1 b in the sheet-shaped insulating substrate 81 and divided into individual substrates 8 1 c.
- a plurality of second divided portions 93 are formed in a direction orthogonal to the first divided portions 87 by using a dicing method. In this case, the plurality of second divided portions 93 are formed at a pitch of 400 m, and the width of the second divided portion 93 in parentheses is 100.
- the plurality of second divided portions 93 are formed on the plurality of strip-shaped substrates 81b by a dicing method except for the unnecessary region portion 81a, the plurality of second divided portions 93 are formed. Each time 3 is formed, the product is cut and divided into individual substrates 81c, and the individualized products are separated from the unnecessary area portions 81a.
- the resistor according to the fourth embodiment of the present invention is manufactured. It is made. .
- the interval between the slit-shaped first divided portion 87 and the second 'divided portion 93 formed by the dicing method is accurate ( ⁇ 0.000). (Within 5 mm) and the thickness of the side electrode layer 89, nickel layer 91, and solder layer 92 are accurate, so that the total length and width of the product resistor is exactly 0.6 mm. 1! 1111 The width is 0.3 mm. Also, regarding the pattern accuracy of the upper electrode layer 82 and the resistance layer 83, it is not necessary to classify the dimensional rank of the individual substrate and it is necessary to consider the dimensional variation within the dimensional rank of the same individual substrate.
- the effective area of the resistance layer 83 can be made larger than that of the conventional product. That is, the resistance layer in the conventional product had a length of about 0.20] 11111 and a width of 0.19 mm, whereas the resistance layer 83 of the resistor in the fourth embodiment of the present invention had a length of The width is about 0.25 1! 1111 and the width is 0.24 mm, which is about 1.6 times or more in area.
- the plurality of slit-shaped first divided portions 87 and the plurality of second divided portions 93 are formed by using a dicing method, a sheet-like shape that does not require dimensional classification of the individual substrate is required. Insulating substrate 81 of this type can be used, which eliminates the need to classify the size of individual pieces as in the conventional case. Also, dicing can be easily performed using a general dicing facility for semiconductors and the like.
- the sheet-shaped insulating substrate 81 has an unnecessary area portion 81a that is not finally formed as a product at the entire peripheral edge, and has a plurality of slit-shaped first split portions 87 and a plurality of slit-shaped first split portions 87. Since the second divided portion 93 is not formed in the unnecessary area portion 81a, a plurality of slit-shaped first divided portions 87 are formed. Even after formation, the plurality of strip-shaped substrates 8 1 b are connected to the unnecessary area portion 8 1 a, so that the sheet-shaped insulating substrate 81 is finely separated into the plurality of strip-shaped substrates 8 1 b.
- the post-process can be performed in a state of the sheet-shaped insulating substrate 81 having the unnecessary region portion 81a, so that the method The design can be simplified. Further, when a plurality of second divided portions 93 are formed, each time the plurality of second divided portions 93 are formed, the product is cut and divided into individual substrates 81c, and the individualized product is Since the unnecessary region portion 81a is separated from the unnecessary region portion 81a, a step of separating the unnecessary region portion 81a from the product later becomes unnecessary.
- the side electrode layer 89 is formed.
- the potential difference can be reduced when the nickel layer 91 and the solder layer 92 are formed by the electroplating method. In this way, a stable nickel layer 91 and a solder layer 92 can be formed.
- the unnecessary area portion 81a that is not finally formed as a product is formed at the entire peripheral edge of the sheet-shaped insulating substrate 81 to form a substantially square shape.
- the unnecessary area portion 81a is not necessarily formed at the entire peripheral edge of the sheet-shaped insulating substrate 81, for example, as shown in FIG.
- unnecessary areas 8 1 f are formed at the three ends of the sheet-shaped insulating substrate 81. Even in the case where four lines are formed, the same operation and effect as those of the fourth embodiment of the present invention are exerted.
- the plurality of second divided portions 93 are formed by the dicing method.
- the plurality of second divided portions 93 may be formed.
- the upper surface, the rear surface, and the center of the sheet-shaped insulating substrate 81 are left with a thin portion on any of the rear surface, the upper surface, and the center of the sheet-shaped insulating substrate 81, using a laser method. It may be formed by cutting with a dicing method or the like.In these cases, the pieces are not divided into pieces each time the second divided portion 93 is formed, but are divided into pieces in two stages. It is.
- a silver-based material was used for the upper electrode layer 82 and a ruthenium oxide-based material was used for the resistance layer 83, but these materials may be used in other material systems. An effect similar to that of the fourth embodiment of the present invention can be obtained.
- the slit-shaped first divided part 87 and the second divided part 93 are formed by using the dicing method.
- the present invention is not limited thereto. The same operation and effect as those of the fourth embodiment can be obtained.
- a plurality of slit-shaped first divided portions 87 for dividing into a plurality of strip-shaped substrates 81b when forming a plurality of slit-shaped first divided portions 87 for dividing into a plurality of strip-shaped substrates 81b, a plurality of pairs of upper surface electrode layers 82 are formed.
- a plurality of resistance layers 83, a plurality of first protection layers 84, a plurality of trimming grooves 85, a plurality of second protection layers 86, and a sheet-like insulating substrate 81 formed with slit-like first To form multiple divisions 8 7
- the present invention is not limited to this.
- a plurality of slit-shaped first divided portions 87 may be formed first on the sheet-shaped insulating substrate 81.
- a plurality of pairs of upper surface electrode layers 82 are formed on the sheet-shaped insulating substrate 81.
- a plurality of resistance layers 83 are formed on the sheet-shaped insulating substrate 81.
- a plurality of resistive layers 83 After forming a plurality of resistive layers 83 so that a part thereof overlaps a plurality of pairs of upper surface electrode layers 82 of the brackets
- a plurality of resistance layers 83 are formed on the sheet-shaped insulating substrate ′ 81, and a plurality of brackets are formed.
- a plurality of pairs of upper electrode layers 82 are formed so as to partially overlap with the resistive layer 83, a plurality of slit-shaped first divided portions 87 are formed on the sheet-shaped insulating substrate 81.
- a plurality of pairs of upper electrode layers 8 2 and a plurality of resistance layers 8 3 are formed on a sheet-shaped insulating substrate 8 1, and the plurality of pairs of upper electrode layers 8 2 After the trimming is performed to adjust the resistance value between the two, the first split portion 87 having a slit shape is formed on the insulating substrate 81 in the form of a sheet. This has the same effect as the fourth embodiment.
- FIG. 42 is a sectional view of a resistor according to a fifth embodiment of the present invention.
- reference numeral 101 denotes a sheet-like insulating substrate made of fired 96% -purity alumina, which is orthogonal to the slit-shaped first division and the first division.
- the individual substrate is divided into individual substrates by being divided at the second division.
- 102 is a pair of metal layers mainly composed of gold formed on the upper surface of the individual substrate 101.
- Reference numeral 103 denotes a pair of upper electrode layers mainly composed of silver formed on the upper surface of the individual substrate 101 so as to partially overlap the pair of metal layers 102.
- Reference numeral 104 denotes a ruthenium oxide-based resistance layer formed on the upper surface of the individual substrate 101 so as to partially overlap the pair of upper electrode layers 103.
- 105 is a first protective layer formed of a pre-coated glass layer formed on the upper surface of the resistance layer 104.
- Reference numeral 106 denotes a trimming groove provided for correcting the resistance value of the resistance layer 104 between the pair of upper electrode layers 103.
- Reference numeral 107 denotes a second protective layer mainly composed of a resin formed so as to cover the first protective layer 105 made of a precoated glass layer.
- Reference numeral 108 denotes a pair of nickel side surfaces formed so as to overlap a part of the pair of upper electrode layers 103 and to cover both side surfaces of the individual substrate 101 and both end portions of the back surface. It is an electrode layer.
- Reference numeral 109 denotes a solder layer made of tin formed so as to cover a part of the pair of side electrode layers 108 and a part of the pair of upper electrode layers 103.
- FIG. 43 is a top view showing a state in which an unnecessary region is formed at the entire peripheral edge of a sheet-like insulating substrate used for manufacturing the resistor according to the fifth embodiment of the present invention.
- Figures (a)-(f), Figures 45 (a)-(f), Figures 46 (a)-(d), Figures 47 (a)-(d), Figures 48 (a)- (C) and FIGS. 49 (a) to (c) are process diagrams showing a method for manufacturing a resistor according to the fifth embodiment of the present invention.
- a sheet made of fired 96% pure alumina and having a thickness of 0.2 is insulative.
- the sheet-shaped insulating substrate 1 1 1 has an unnecessary area 1 1 1 a that is not a final product at the entire peripheral end. is there.
- the unnecessary area portion 111a is configured in a substantially square shape.
- a plurality of first divided portions are straddled on the upper surface of the sheet-shaped insulating substrate 111.
- Pairs of metal layers 112 mainly composed of gold are formed by a screen printing method and baked with a firing profile at a peak temperature of 850 ° C to form a stable film of metal layers 112.
- the plurality of pairs of metal layers 112 are electrically connected to the upper surface of the sheet-like insulating substrate 111.
- the upper electrode layer 113 was a stable film.
- the ruthenium oxide-based material is screen-printed over a plurality of pairs of upper electrode layers 113.
- the resistance layers 114 were made into stable films.
- a first protective layer 1 15 comprising a plurality of pre-coated glass layers is formed by a screen printing method so as to cover the plurality of resistance layers 114.
- the first protective layer 115 made of a pre-coated glass layer was formed into a stable film by firing with a firing port having a peak temperature of 600 ° C.
- a firing port having a peak temperature of 600 ° C. in order to adjust the resistance value of the resistance layer 114 between the plural pairs of upper electrode layers 113 to a constant value.
- trimming was performed by a laser trimming method to form a plurality of trimming grooves # 16.
- a screen is formed so as to cover the first protective layers 11 and 5 composed of a plurality of pre-coated glass layers arranged vertically in the drawing.
- a plurality of second protective layers 117 mainly composed of resin are formed by a printing method, and the second protective layer 117 is stabilized by curing with a curing profile at a peak temperature of 200 ° C. It was a membrane.
- a plurality of first resist layers 111 are screen-printed so as to cover the plurality of second protective layers 117. 8 was formed, and the first resist layer 118 was made into a stable film by ultraviolet curing. Further, a plurality of second resist layers 119 were formed on the back surface of the sheet-shaped insulating substrate 111 by a screen printing method, and the second resist layers 119 were made into stable films by ultraviolet curing.
- a sheet-like insulating layer having a first resist layer 118 and a second resist layer 119 formed thereon Except for the unnecessary area portion 1 1 1 a formed on the entire periphery of the edge substrate 1 1 1, only a plurality of pairs of metal layers 1 1 2 are separated and divided into a plurality of strip-shaped substrates 1 1 1 b.
- a plurality of slit-shaped first divided portions 120 for forming the same are formed by a dicing method. In this case, the plurality of slit-shaped first divided portions 120 are formed at a pitch of 700 m, and the width of the first slit-shaped divided portion 120 of the bracket is 120 width. ing.
- the plurality of slit-shaped first divided portions 120 are formed by through holes vertically penetrating the sheet-shaped insulating substrate 111. And the sheet-like insulating substrate Since the plate 111 has a plurality of slit-shaped first divided portions 120 formed by dicing except for the unnecessary region portion 111a, the slit-shaped first divided portions 120 are formed. After the formation, the plurality of strip-shaped substrates 1 1 1b are still in a sheet state because they are connected to the unnecessary area portions 1 1 1a. Next, as shown in Fig. 46 (d) and Fig. 47 (d), the sheet-shaped insulating substrate 1 1 1 was immersed in a plating bath and used for electroless plating.
- Nickel plating is applied to the entire surface of the substrate to form a side electrode layer 121 having a thickness of about 4 to 6 m.
- the sheet-shaped insulating substrate 111 is formed.
- the side electrode layer 121 is formed by nickel plating on the entire surface by the electroless plating method, the side electrode layer 121 is a through hole from the top side of the sheet-shaped insulating substrate 111. It is formed up to the back side of the sheet-shaped insulating substrate 111 through the entire inner surface of the slit-shaped first divided portion 120.
- the side electrode layer 121 is formed so as to cover a part of the upper electrode layer 113 exposed on the upper surface side of the sheet-shaped insulating substrate 111 and the first resist layer 118, Further, the back surface of the sheet-shaped insulating substrate 111 is formed so as to cover the second resist layer 119.
- FIGS. 4 (a) and 49 (a) a plurality of first resist layers (not shown) and a plurality of second resist layers (not shown) are peeled off, A plurality of pairs of side electrode layers 1 2 1 are patterned.
- a plurality of pairs of exposed side electrode layers 121 and a plurality of first electrodes are formed by using an electroplating method.
- a plurality of pairs of tin having a thickness of about 4 to 6 m are formed so as to cover a part of the upper electrode layer 113 exposed by removing the resist layer (not shown).
- a layer 1 2 2 is formed.
- the thickness of the side electrode layer 121 is about 4 to 6 / zm, but is not limited to this range, and the thickness is appropriately 1 to 15 im. In the configuration, one with extremely high dimensional accuracy can be obtained.
- solder layer 122 is made of tin
- the present invention is not limited to this.
- a tin alloy-based material may be used. When these materials are used, the solder layer becomes stable during reflow soldering. It can be soldered.
- the metal layer 112 is made of a gold-based material
- the upper electrode layer 113 is made of a silver-based material
- the resistance layer 114 is made of a ruthenium oxide-based material. As a result, it is possible to secure resistance characteristics with excellent heat resistance and durability.
- the protective layer covering the resistive layer 114 and the like includes a first protective layer 115 made of a pre-coated glass layer covering the resistive layer 114 and the first protective layer 115 while covering the first protective layer 115. Since it is composed of two layers of the second protective layer 1 17 mainly composed of resin that covers the trimming groove 1 16, the first protective layer 1 15 prevents cracks during laser trimming. Current noise can be reduced, and the second protective layer 117 composed mainly of the resin can cover the entire resistive layer 114 to secure resistance characteristics with excellent moisture resistance. .
- a plurality of resistive layers 1 1 4 are individually separated into a plurality of strip-shaped substrates 1 1 1b of the sheet-shaped insulating substrate 1 1 1 In the direction orthogonal to the slit-shaped first divided section 120 so that it is divided into A plurality of second divided portions 123 are formed by using the ising method.
- the plurality of second divided portions 123 are formed at a pitch of 400 m, and the width of the second divided portion 123 is 100 m wide.
- the plurality of second divided portions 123 are formed on the plurality of strip-shaped substrates 111b by a dicing method except for the unnecessary region portion 111a, the plurality of second divided portions 123 are formed. Each time the divided portion 123 is formed, the product is cut and divided into individual substrates 111c, and the individualized products are separated from the unnecessary region portions 111a.
- the resistor according to the fifth embodiment of the present invention is manufactured.
- the length dimension and width dimension of the resistor manufactured by the above-described process are accurate when the interval between the slit-shaped first divided section 120 and the second divided section 123 formed by the dicing method is accurate ( ⁇ (Less than 0.05 mm) and the thickness of the side electrode layer 121 and the solder layer 122 are also accurate, so that the total length and width of the product resistor is exactly
- the 6MIX width is 0.3 mm.
- the pattern accuracy of the metal layer 112, the upper electrode layer 113, and the resistance layer 114 does not require the dimensional rank classification of individual substrates, and the dimensional variation within the dimensional rank of the same individual substrate is not required. Therefore, the effective area of the resistance layer 114 can be made larger than that of the conventional product.
- the resistance layer in the conventional product had a length of about 0.20 X width 0.19 nun
- the resistance layer 114 of the resistor in the fifth embodiment of the present invention had a length of Approximately 0.25111111
- the width is approximately 0.24 mm, and the area is about 1.6 times or more.
- the plurality of slit-shaped first divided portions 120 and the plurality of second divided portions 123 are formed using a dicing method, the dimensions of the individual substrate are reduced.
- a sheet-like insulating substrate 1 1 1 that does not require legal classification can be used, which eliminates the need for conventional dimensional classification of individual substrate, thus complicating the process due to conventional mask replacement.
- dicing can be easily performed using semiconductors and other general dicing equipment.
- the sheet-shaped insulating substrate 111 has an unnecessary area portion 111a that is not finally formed as a product at the entire peripheral edge, and a plurality of slit-shaped first divided portions 120a. And the plurality of second divided portions 1 2 3 are not formed in the unnecessary area portion 1 1 1 a, so that even after the plurality of slit-shaped first divided portions 120 are formed,
- the strip-shaped substrate 1 1 1b is connected to the unnecessary area portion 1 1 1a, so that the sheet-shaped insulating substrate 1 1 1 is not separated into a plurality of strip-shaped substrates 1 1 1b.
- a post-process can be performed in a state of the sheet-shaped insulating substrate 111 having the unnecessary region portion 111a. Therefore, the design of the construction method can be simplified. Further, when a plurality of second divisions 123 are formed, each time the plurality of second divisions 123 are formed, the substrate is cut and divided into individual substrates 1 1 1 c, and then individualized. Since the product is separated from the unnecessary area portion 1 1 1a, the step of separating the unnecessary area portion 1 1;! A from the product later becomes unnecessary.
- the side electrode layers 1 2 1 and the plurality of pairs of solder layers 1 2 2 are formed in the state of a sheet-shaped insulating substrate 1.11, the side electrode layers 1 2 1 are formed.
- the potential difference can be reduced when forming the solder layer 1 2 2 by the electroplating method. 2 can be formed.
- the unnecessary area portion 111a that does not become a final product is formed on the entire peripheral edge of the sheet-shaped insulating substrate 111.
- the unnecessary area portion 111a does not necessarily need to be formed at the entire peripheral edge of the sheet-like insulating substrate 111.
- Fig. 1 when the unnecessary area portion 1 1 1 d is formed at one end of the sheet-shaped insulating substrate 1 1 1, as shown in FIG.
- the unnecessary area portion 111 e is formed, as shown in Fig. 52, even when the unnecessary area portion 111 f is formed at three ends of the sheet-like insulating substrate 111,
- the fifth embodiment of the present invention has the same functions and effects as the fifth embodiment.
- the plurality of second divided portions 123 are formed by the dicing method.
- the plurality of second divided portions 1 2 3 is a sheet-shaped insulating substrate 1 1 1 leaving any thin part on the back side, top side, or center of the sheet-shaped insulating substrate 1 1 1 1. Any of the top side, back side, or center May be formed by cutting with a laser method, a dicing method, or the like.In these cases, instead of being divided into pieces each time the second divided portion 123 is formed, it is formed in two steps. It is to be singulated.
- the slit-shaped first divided portion 120 is formed after the first resist layer 118 and the second resist layer 119 are formed.
- the first resist layer 118 and the second resist layer 119 may be formed after forming the slit-shaped first divided portion 120.
- the sheet-shaped insulating substrate 1 1 The strength of 1 is weak Therefore, it is necessary to reduce the printing pressure during screen printing.
- the peeling of the 18 and the second resist layer 1 19 was performed before the formation of the solder layer 122, but this can be performed even after the formation of the solder layer 122.
- a gold-based material is used for the metal layer 112
- a silver-based material is used for the upper electrode layer 113
- ruthenium oxide is used for the resistance layer 114.
- the slit-shaped first divided portion 120 and the second divided portion 123 are formed by the dicing method.
- a divided portion forming means such as a laser or a warhead jet
- the plurality of pairs of upper electrode layers 113 are formed.
- a plurality of resistance layers 114 are formed so as to straddle, after forming the plurality of resistance layers 114 on the upper surface of the sheet-shaped insulating substrate 111, the plurality of resistance layers 114 are formed. Even when a plurality of pairs of upper electrode layers 113 are formed so as to partially overlap the same, the same operation and effect as those of the fifth embodiment of the present invention can be obtained.
- a plurality of slit-shaped first divided portions 120 for dividing into a plurality of strip-shaped substrates 111 b are formed, a plurality of pairs of metal layers are formed.
- 1 1 2 multiple pairs of top electrode layers 1 1 3, multiple resistive layers 1 1 4, multiple first protective layers 1 1 5, multiple trimming grooves 1 1 6, multiple second protective layers 1 17, the plurality of first resist layers 1 18, and the plurality of second resist layers 1 1 9.
- the present invention is not limited to this.
- a plurality of pairs of metal layers 1 1 1 2 and a plurality of The upper electrode layer 113 and the plurality of resistance layers 114 are formed, and trimming is performed to adjust the resistance between the plurality of pairs of upper electrode layers 113 in the plurality of resistance layers 114.
- the plurality of pairs of metal layers 1 1 2 are separated only into the plurality of pairs of metal layers 1 1 2 in the sheet-shaped insulating substrate 1 1 1 1 to form a plurality of sheet-shaped insulating substrates 1 1 1 2.
- the same effect as in the fifth embodiment of the present invention described above can be obtained by forming a plurality of slit-shaped first divided portions 120 for dividing the substrate into strip-shaped substrates 111b. Is played.
- the step of forming a plurality of pairs of metal layers 112 on the upper surface of the sheet-like insulating substrate 111 includes the steps of: Forming a plurality of pairs of upper electrode layers 1 13 and a plurality of resistance layers 1 1 4 electrically connected to the metal layer 1 1 2 on the upper surface thereof so that both are electrically connected to each other; Performing trimming to adjust a resistance value between the plurality of pairs of upper electrode layers 113 in the plurality of resistance layers 114; and a plurality of trimming steps so as to cover at least the plurality of resistance layers 114.
- the plurality of pairs of metal layers 112 are separated into only the plurality of pairs of metal layers 112 in the sheet-like insulating substrate 111 which has been subjected to the forming step.
- a plurality of strip-shaped first divided portions 120 for dividing into a plurality of strip-shaped substrates 11 into 1 lb are formed on a substrate 1.
- a sheet-shaped insulating substrate 1 1 Since a plurality of pairs of metal layers 1 1 2 formed on the upper surface of 1 and a plurality of pairs of upper electrode layers 1 1 3 are configured to be electrically connected to each other, between the pair of upper electrode layers 1 1 3
- the adjacent metal layer 112 can be used in addition to the upper electrode layer 113, so that particularly in the case of a fine resistor,
- a trimming meter can be easily brought into contact with the upper electrode, and a sheet-like insulating substrate 1 1 1 1 1
- the divided portion 120 only the metal layer 112 is cut and the upper electrode layer 113 is not cut, so that no burrs are generated, and thus the upper surface of the resistor is made smooth. Therefore, there is an effect that mounting efficiency can be improved.
- the resistor of the present invention is divided into individual pieces by dividing the sheet-shaped insulating substrate into the slit-shaped first divided portion and the second divided portion orthogonal to the first divided portion.
- the sheet-shaped insulating substrate is divided into the first slit-shaped portions.
- the singulated substrate is divided by using the singulated substrate and the second divided portion which is orthogonal to the first divided portion, the dimensional classification of the singulated substrate becomes unnecessary. As a result, it is possible to eliminate the step of replacing the mask according to the dimensional rank of the individual substrate as in the conventional case, and to provide an inexpensive and fine resistor. It is.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60139855T DE60139855D1 (de) | 2000-01-17 | 2001-01-17 | Widerstand und seine herstellungsmethode |
US10/181,306 US6935016B2 (en) | 2000-01-17 | 2001-01-17 | Method for manufacturing a resistor |
EP01901377A EP1255256B1 (en) | 2000-01-17 | 2001-01-17 | Resistor and method for fabricating the same |
US11/037,533 US7165315B2 (en) | 2000-01-17 | 2005-01-18 | Method for fabricating a resistor |
US11/037,935 US7334318B2 (en) | 2000-01-17 | 2005-01-18 | Method for fabricating a resistor |
US11/037,963 US7188404B2 (en) | 2000-01-17 | 2005-01-18 | Method for fabricating a resistor |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000007407 | 2000-01-17 | ||
JP2000-007407 | 2000-01-17 | ||
JP2000043913A JP2001237112A (ja) | 2000-02-22 | 2000-02-22 | 抵抗器の製造方法 |
JP2000-043913 | 2000-02-22 | ||
JP2000-045507 | 2000-02-23 | ||
JP2000045507A JP2001274002A (ja) | 2000-01-17 | 2000-02-23 | 抵抗器およびその製造方法 |
Related Child Applications (4)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10181306 A-371-Of-International | 2001-01-17 | ||
US11/037,533 Division US7165315B2 (en) | 2000-01-17 | 2005-01-18 | Method for fabricating a resistor |
US11/037,935 Division US7334318B2 (en) | 2000-01-17 | 2005-01-18 | Method for fabricating a resistor |
US11/037,963 Division US7188404B2 (en) | 2000-01-17 | 2005-01-18 | Method for fabricating a resistor |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2001054143A1 true WO2001054143A1 (fr) | 2001-07-26 |
Family
ID=27342059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2001/000251 WO2001054143A1 (fr) | 2000-01-17 | 2001-01-17 | Resistance et son procede de fabrication |
Country Status (6)
Country | Link |
---|---|
US (4) | US6935016B2 (ja) |
EP (3) | EP1255256B1 (ja) |
KR (1) | KR100468373B1 (ja) |
CN (2) | CN1722316B (ja) |
DE (1) | DE60139855D1 (ja) |
WO (1) | WO2001054143A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7237324B2 (en) * | 2002-01-15 | 2007-07-03 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing chip resistor |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020176927A1 (en) * | 2001-03-29 | 2002-11-28 | Kodas Toivo T. | Combinatorial synthesis of material systems |
DE10162276C5 (de) * | 2001-12-19 | 2019-03-14 | Watlow Electric Manufacturing Co. | Rohrförmiger Durchlauferhitzer und Heizplatte sowie Verfahren zu deren Herstellung |
JP2004140117A (ja) * | 2002-10-16 | 2004-05-13 | Hitachi Ltd | 多層回路基板、及び多層回路基板の製造方法 |
TWI266568B (en) * | 2004-03-08 | 2006-11-11 | Brain Power Co | Method for manufacturing embedded thin film resistor on printed circuit board |
CN100521835C (zh) * | 2005-12-29 | 2009-07-29 | 梁敏玲 | 电阻膜加热装置的制造方法及所形成的电阻膜加热装置 |
TW200733149A (en) * | 2006-02-22 | 2007-09-01 | Walsin Technology Corp | Manufacturing method of chip resistor |
US7911318B2 (en) * | 2007-02-16 | 2011-03-22 | Industrial Technology Research Institute | Circuit boards with embedded resistors |
US8044764B2 (en) * | 2008-03-12 | 2011-10-25 | International Business Machines Corporation | Resistor and design structure having resistor material length with sub-lithographic width |
US8111129B2 (en) | 2008-03-12 | 2012-02-07 | International Business Machines Corporation | Resistor and design structure having substantially parallel resistor material lengths |
KR101089840B1 (ko) * | 2009-04-01 | 2011-12-05 | 삼성전기주식회사 | 회로 기판 모듈 및 그의 제조 방법 |
TWM439246U (en) * | 2012-06-25 | 2012-10-11 | Ralec Electronic Corp | Micro metal sheet resistance |
TWI491875B (zh) * | 2013-12-26 | 2015-07-11 | Taiwan Green Point Entpr Co | Electrochemical sensing test piece and its manufacturing method |
TWI571891B (zh) * | 2014-03-03 | 2017-02-21 | Walsin Tech Corp | Thin film resistor method |
US9552908B2 (en) * | 2015-06-16 | 2017-01-24 | National Cheng Kung University | Chip resistor device having terminal electrodes |
JP6506636B2 (ja) * | 2015-06-18 | 2019-04-24 | Koa株式会社 | チップ抵抗器の製造方法 |
CN106328330A (zh) * | 2015-06-19 | 2017-01-11 | 旺诠股份有限公司 | 晶片式薄膜电阻的制造方法 |
US10083781B2 (en) | 2015-10-30 | 2018-09-25 | Vishay Dale Electronics, Llc | Surface mount resistors and methods of manufacturing same |
TWI620318B (zh) * | 2016-08-10 | 2018-04-01 | Wafer resistor device and method of manufacturing same | |
US10290403B2 (en) * | 2016-12-15 | 2019-05-14 | National Cheng Kung University | Methods of fabricating chip resistors using aluminum terminal electrodes |
CN107233900A (zh) * | 2017-06-20 | 2017-10-10 | 山西大同大学 | 一种二硫化钼复合纳米金光催化剂及其制备方法 |
US10438729B2 (en) | 2017-11-10 | 2019-10-08 | Vishay Dale Electronics, Llc | Resistor with upper surface heat dissipation |
WO2021044876A1 (ja) * | 2019-09-04 | 2021-03-11 | Semitec株式会社 | 抵抗器、その製造方法及び抵抗器を備えた装置 |
KR102231104B1 (ko) * | 2019-12-27 | 2021-03-23 | 삼성전기주식회사 | 저항 부품 |
TWI791363B (zh) * | 2021-12-28 | 2023-02-01 | 國巨股份有限公司 | 微型電阻層之製造方法以及微型電阻器之製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03142904A (ja) * | 1989-10-30 | 1991-06-18 | Matsushita Electric Ind Co Ltd | チップ抵抗器の製造方法 |
JPH04102302A (ja) * | 1990-08-21 | 1992-04-03 | Rohm Co Ltd | チップ型抵抗器の製造方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0774001A (ja) | 1993-09-02 | 1995-03-17 | Murata Mfg Co Ltd | 抵抗素子を含む電子部品 |
JPH0786012A (ja) | 1993-09-13 | 1995-03-31 | Matsushita Electric Ind Co Ltd | 角形チップ抵抗器の製造方法 |
US5680092A (en) * | 1993-11-11 | 1997-10-21 | Matsushita Electric Industrial Co., Ltd. | Chip resistor and method for producing the same |
JPH07245228A (ja) | 1994-03-03 | 1995-09-19 | Murata Mfg Co Ltd | 表面実装型電子部品の製造方法 |
JPH08306503A (ja) * | 1995-05-11 | 1996-11-22 | Rohm Co Ltd | チップ状電子部品 |
JPH0950901A (ja) | 1995-08-07 | 1997-02-18 | Hokuriku Electric Ind Co Ltd | チップ電子部品とその製造方法 |
JPH09120902A (ja) | 1995-10-24 | 1997-05-06 | Hokuriku Electric Ind Co Ltd | チップ電子部品とその製造方法 |
JP3637124B2 (ja) * | 1996-01-10 | 2005-04-13 | ローム株式会社 | チップ型抵抗器の構造及びその製造方法 |
DE69715091T2 (de) * | 1996-05-29 | 2003-01-02 | Matsushita Electric Industrial Co., Ltd. | Widerstand für Oberflächenmontage |
JPH1116762A (ja) | 1997-06-23 | 1999-01-22 | Taiyo Yuden Co Ltd | 電子部品の外部電極形成方法 |
US6636143B1 (en) * | 1997-07-03 | 2003-10-21 | Matsushita Electric Industrial Co., Ltd. | Resistor and method of manufacturing the same |
JPH1126204A (ja) * | 1997-07-09 | 1999-01-29 | Matsushita Electric Ind Co Ltd | 抵抗器およびその製造方法 |
JPH11307304A (ja) | 1998-04-20 | 1999-11-05 | Hokuriku Electric Ind Co Ltd | チップ抵抗器及びその製造方法 |
-
2001
- 2001-01-17 CN CN2005100914102A patent/CN1722316B/zh not_active Expired - Fee Related
- 2001-01-17 EP EP01901377A patent/EP1255256B1/en not_active Expired - Lifetime
- 2001-01-17 DE DE60139855T patent/DE60139855D1/de not_active Expired - Lifetime
- 2001-01-17 WO PCT/JP2001/000251 patent/WO2001054143A1/ja active IP Right Grant
- 2001-01-17 CN CNB01803621XA patent/CN1220219C/zh not_active Expired - Lifetime
- 2001-01-17 US US10/181,306 patent/US6935016B2/en not_active Expired - Fee Related
- 2001-01-17 EP EP08161552A patent/EP1981041A2/en not_active Withdrawn
- 2001-01-17 KR KR10-2002-7009193A patent/KR100468373B1/ko not_active IP Right Cessation
- 2001-01-17 EP EP08161550A patent/EP1981040A2/en not_active Withdrawn
-
2005
- 2005-01-18 US US11/037,935 patent/US7334318B2/en not_active Expired - Fee Related
- 2005-01-18 US US11/037,533 patent/US7165315B2/en not_active Expired - Fee Related
- 2005-01-18 US US11/037,963 patent/US7188404B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03142904A (ja) * | 1989-10-30 | 1991-06-18 | Matsushita Electric Ind Co Ltd | チップ抵抗器の製造方法 |
JPH04102302A (ja) * | 1990-08-21 | 1992-04-03 | Rohm Co Ltd | チップ型抵抗器の製造方法 |
Non-Patent Citations (1)
Title |
---|
See also references of EP1255256A4 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7237324B2 (en) * | 2002-01-15 | 2007-07-03 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing chip resistor |
Also Published As
Publication number | Publication date |
---|---|
US20050158960A1 (en) | 2005-07-21 |
US7188404B2 (en) | 2007-03-13 |
EP1255256A4 (en) | 2008-06-18 |
DE60139855D1 (de) | 2009-10-22 |
KR100468373B1 (ko) | 2005-01-27 |
US7334318B2 (en) | 2008-02-26 |
KR20020071946A (ko) | 2002-09-13 |
US20030132828A1 (en) | 2003-07-17 |
EP1981040A2 (en) | 2008-10-15 |
US7165315B2 (en) | 2007-01-23 |
CN1395734A (zh) | 2003-02-05 |
US6935016B2 (en) | 2005-08-30 |
CN1220219C (zh) | 2005-09-21 |
EP1981041A2 (en) | 2008-10-15 |
CN1722316B (zh) | 2010-09-29 |
US20050125991A1 (en) | 2005-06-16 |
EP1255256B1 (en) | 2009-09-09 |
US20050153515A1 (en) | 2005-07-14 |
CN1722316A (zh) | 2006-01-18 |
EP1255256A1 (en) | 2002-11-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2001054143A1 (fr) | Resistance et son procede de fabrication | |
TWI394175B (zh) | 電阻器及其製造方法 | |
KR100501559B1 (ko) | 저항기 및 그 제조 방법 | |
JP3846312B2 (ja) | 多連チップ抵抗器の製造方法 | |
JP3608569B2 (ja) | 抵抗器の製造方法 | |
JP3608570B2 (ja) | 抵抗器の製造方法 | |
JP2004146859A (ja) | 抵抗器の製造方法 | |
JP3905030B2 (ja) | 抵抗器の製造方法 | |
JP3636190B2 (ja) | 抵抗器およびその製造方法 | |
JP2001274002A5 (ja) | ||
JP4415502B2 (ja) | 抵抗器およびその製造方法 | |
JP4530024B2 (ja) | 抵抗器およびその製造方法 | |
JP2004288808A (ja) | 抵抗器の製造方法 | |
JP2001237112A (ja) | 抵抗器の製造方法 | |
JP3812442B2 (ja) | 多連チップ抵抗器の製造方法 | |
JP2004146858A (ja) | 抵抗器の製造方法 | |
JP2001274002A (ja) | 抵抗器およびその製造方法 | |
JP3846311B2 (ja) | 多連チップ抵抗器の製造方法 | |
JP2005159381A (ja) | 抵抗器の製造方法 | |
JP2003007518A (ja) | 多連チップ抵抗器の製造方法 | |
JPH05304002A (ja) | 角形チップ抵抗器及びその製造方法 | |
JPH0372602A (ja) | 角板型薄膜チップ抵抗器の製造方法 | |
JP2001257102A (ja) | 多連チップ抵抗器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): CN KR SG US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE TR |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
DFPE | Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101) | ||
WWE | Wipo information: entry into national phase |
Ref document number: 01803621X Country of ref document: CN |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2001901377 Country of ref document: EP Ref document number: 1020027009193 Country of ref document: KR |
|
WWP | Wipo information: published in national office |
Ref document number: 1020027009193 Country of ref document: KR |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10181306 Country of ref document: US |
|
WWP | Wipo information: published in national office |
Ref document number: 2001901377 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 1020027009193 Country of ref document: KR |