US4400762A - Edge termination for an electrical circuit device - Google Patents
Edge termination for an electrical circuit device Download PDFInfo
- Publication number
- US4400762A US4400762A US06/392,921 US39292182A US4400762A US 4400762 A US4400762 A US 4400762A US 39292182 A US39292182 A US 39292182A US 4400762 A US4400762 A US 4400762A
- Authority
- US
- United States
- Prior art keywords
- planar surface
- substrate
- electrical circuit
- aperture
- edge termination
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 229910000679 solder Inorganic materials 0.000 claims abstract description 28
- 239000011248 coating agent Substances 0.000 claims abstract description 10
- 238000000576 coating method Methods 0.000 claims abstract description 10
- 239000012777 electrically insulating material Substances 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 28
- 239000010409 thin film Substances 0.000 abstract description 4
- 239000000919 ceramic Substances 0.000 abstract description 3
- 230000000717 retained effect Effects 0.000 abstract 1
- 238000000034 method Methods 0.000 description 12
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 6
- 238000000151 deposition Methods 0.000 description 6
- 238000007373 indentation Methods 0.000 description 6
- 229910052709 silver Inorganic materials 0.000 description 6
- 239000004332 silver Substances 0.000 description 6
- 230000008021 deposition Effects 0.000 description 5
- 230000009977 dual effect Effects 0.000 description 5
- 239000004020 conductor Substances 0.000 description 4
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 238000002386 leaching Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 238000005476 soldering Methods 0.000 description 3
- 238000004873 anchoring Methods 0.000 description 2
- 229910010293 ceramic material Inorganic materials 0.000 description 2
- 239000011195 cermet Substances 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000002939 deleterious effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000003973 paint Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3405—Edge mounted components, e.g. terminals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/165—Containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0272—Adaptations for fluid transport, e.g. channels, holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/09163—Slotted edge
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/09181—Notches in edge pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/1034—Edge terminals, i.e. separate pieces of metal attached to the edge of the printed circuit board [PCB]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
Definitions
- the invention relates to electrical circuit devices, and particularly to a method and means for electrically connecting terminal leads, which extend outwardly from one surface of an insulating substrate, to electrical circuitry deposited on an adjoining surface of the substrate.
- the material of the substrate member is usually steatite, alumina or other ceramic based composition.
- the conducting edge termination material is arranged to complete the circuit between termination leads extending outwardly from one edge and the adjacent intersecting surface which is intended to support the thick or thin film circuitry deposited thereon.
- the edge termination material underlies the deposited circuit layer(s) and under a solder layer on an adjoining surface in supporting contact with terminal leads projecting outwardly from that surface.
- the circuitry may be relatively simple, as for instance, a resistor network, capacitor electrodes or may include relatively complex semiconductor portions in the form of attached chips or other devices which comprise a hybrid assembly.
- the leads are very often attached by using conventional lead frame preforms, or other support carriers for a multiplicity of leads, and are further anchored to the substrate by means of solder applied with well-known solder flow bath or similar facilities.
- solder applied with well-known solder flow bath or similar facilities.
- the leads may be initially held in place by wedging into a substrate opening and transported through a solder flow bath, where the solder will cling to the inner ends of the leads and to deposited solder-accepting edge termination areas applied to a surface of the substrate. The solder does not adhere to other portions of the substrate or the circuit.
- edge termination composition is conventionally made from a material, such as silver, which tends to go into solution with a later-deposited solder layer, there is always present the possibility of leaching away of termination material which has been deposited on the adjoining surfaces during soldering operations.
- This deposition is usually applied by a transfer roller and often is thinnest at the relatively sharp edge defining the intersection of the two angularly relative surfaces.
- the Applicants are aware of some manufacturers who even go so far as to hand paint this sharp edge to insure a greater thickness of termination material. Obviously, this is a very expensive operation.
- This indentation may take the form of a simple notch at the line of intersection, or is preferably provided by means of a groove extending across the edge or surface which supports the terminal leads of conventional parallelepiped-formed dual in-line or single in-line packaged components.
- the groove finds its preference in the fact that molding dies used to press the ceramic substrate to form are easier to machine with a groove, as opposed to being machined to provide a plurality of relatively small protrusions arranged to form notched areas in the substrate. These projections used for notching are also relatively small and subject to early abrasive wear during use of the dies.
- the present invention contemplates a method and means for improving and maintaining electrical conductivity in the edge termination layer deposited on one surface of a substrate and extending over an intersecting edge to an adjoining angularly disposed surface.
- the edge termination layer is of a conductive material intended to continue the circuit between electrical components supported by the substrate on the one surface and terminal leads extending outwardly from the adjoining surface.
- the material is compatible for electrical and mechanical connection with a solder layer deposited for retaining and anchoring the respective leads of the device.
- the substrate may be made of a ceramic material, such as alumina or steatite, and is pressed or otherwise formed to include an indented area, which is the subject of the present invention.
- the indented area may be in the form of a notch or an elongated groove intersecting both of the adjoining surfaces.
- the groove is preferably formed in the substrate simultaneously with the pressing operation. It will be apparent, that when necessary, and without departing from the invention, the groove or notch may be formed by abrasive, laser, or cutting operations after the substrate has been formed.
- the indented area provides a channel for insuring adequate deposition of the edge termination material as it traverses the adjoining surfaces. This is comparable to providing a conducting "wire" running from a respective lead attached to one surface, from the lead, across the edge termination surface supporting the lead, through the channel and onto the first-mentioned surface for electrical connection with circuitry supported by that surface.
- any problems concerning leaching away of termination material during the soldering operations will be minimized by insuring adequate thickness of termination material as it extends from one surface across the relatively sharp edge or juncture between the adjoining surfaces.
- FIG. 1 is a perspective view of a single in-line packaging substrate suitable for use in the practice of the present invention
- FIG. 2 is a perspective view of the substrate of FIG. 1, illustrating the application of a layer of edge termination material extending from the edge surface and over onto a top surface relative to the view of FIG. 2;
- FIG. 3 is a perspective view, including the edge termination material underlying a typical resistive network circuit deposited on the upper surface of the substrate of FIGS. 1 and 2;
- FIG. 4 is a perspective view of the finished product with a conformal coating applied thereto and termination leads mounted and soldered in place to provide a single in-line package;
- FIG. 5 is a perspective view of a substrate provided for dual in-line packaging, and further arranged to incorporate the teachings of the present invention.
- FIG. 6 is a perspective view, partly in section, illustrating a finished dual in-line package device in accordance with a second embodiment of this invention.
- FIGS. 1-4 An embodiment of the present invention is illustrated in the views of FIGS. 1-4, inclusive.
- a substrate 10 in the form of a parallelepiped is supplied to support electrical circuit components and terminal leads, as will hereinafter be described.
- the insulating substrate 10 is pressed, or otherwise formed, from a ceramic material, such as alumina or steatite, to provide opposed upper and lower planar surfaces 11.
- a ceramic material such as alumina or steatite
- the planar surface 11 is a side or edge surface 12.
- This surface 12 is preferably planar and disposed normal to the surfaces 11.
- Either one or both of the surfaces 11 may contain the electrical circuitry, which may be in the form of a network of resistors, a combination of resistors and capacitors and semiconductor chips, or chips of capacitors or the like.
- This circuit configuration is made in accordance with known techniques, and does not form a particular part of the present invention.
- the single in-line packaged (SIP) device presented by the views of FIGS. 1-4, inclusive, has been previously disclosed and claimed in U.S. Pat. No. 4,127,934, assigned to the same assignee as the present invention.
- the side or edge surface 12 includes a plurality of spaced apart openings 15 traversing the substrate 10 from the edge surface 12 all the way through to the opposite edge 13. These openings or apertures 15 are arranged to receive terminal leads, as will hereinafter be described.
- the substrate 10 is provided with a pair of forwardly projecting standoffs 16 and 17.
- These indentations are an important part of the present invention, and will hereinafter be described in detail.
- the grooves may be "V" shaped as shown, or may be rounded off (not shown) in a general "U” shape, or semicircular, where so desired.
- the present embodiment is preferred at this time, since it is more facilely and inexpensively provided under known molding and pressing techniques.
- the molding dies are more easily made to form the continuous groove 18 disposed for the entire length of the edge surface 12.
- the second embodiment illustrated in the views of FIGS. 5 and 6 utilizes indentations in the form of notches, but the notches are necessarily small when compared to the elongated grooves 18.
- the presently described substrate has approximate overall dimensions of 0.78" ⁇ 0.30" ⁇ 0.08" with grooves 18 being only approximately 0.01" wide at the outermost dimension.
- notches are even smaller and the machining of pressing dies for forming this configuration is very detailed and complex.
- the substrate 10 is provided with edge termination areas 20.
- the areas 20 are transfer printed by means of a transfer wheel (not shown) laying down a conducting material, such as silver paste, which extends across the face of the surface 12, and preferably a bit inwardly of the openings 15.
- the areas 20 also overlap the surface 11, as shown at 21. This overlapping area 21 connects the electrical circuitry to the edge of the substrate 10, as will later be explained.
- the material of the termination areas 20 (in this case silver paste) is well-known, and is compatible with solder for connecting to terminal leads. After application, the silver paste edge termination material 20 is fired on the substrate in the usual fashion.
- the termination material in the areas 20 nearly fills the grooves 18 to serve as a "wire-like" conductor passing from the holes or apertures 15 over and onto the overlapped areas 21 of the surface 11.
- This arrangement assures adequate thickness of the edge termination material.
- silver paste materials are ideal for serving as conductors and for compatibility with known solders, they also have the disadvantage of tending to migrate into molten solder.
- the solder as will later be explained, is deposited in automatic equipment, as fully described in the aforementioned Bartley et al related patents and represented by U.S. Pat. No. 4,127,934, using wave solder baths and other known automatic techniques.
- edge termination areas 20 and later described soldering techniques As much as the entire process of depositing the edge termination areas 20 and later described soldering techniques is intended to be fully automatic, slight variations in processing can lead to the application of a relatively thin layer at the line of intersection 25. This relatively thin coat will tend to leach away from the substrate and migrate into the later applied solder.
- the present invention therefore contemplates providing the "wire-like" conductive path to insure proper conductivity between the areas 20 and 21.
- a typical resistive network may be laid down on the surface 11 with known techniques utilizing thick or thin film material, such as the well-known cermet resistor materials, one of which is described in the Brandt et al U.S. Pat. No. 3,639,274, assigned to the same assignee as the present invention.
- the particular composition does not form a part of the present invention.
- the resistive areas are denoted by the reference character 26, and in the case of cermet material, are screen printed or otherwise deposited to extend over the previously laid down conductive paths 27 which extend into and overlap the edge termination areas 21.
- the conductive strips 27 are also of a glassy matrix, including highly conductive metallic materials intermixed therewith.
- the layers may be fired individually or co-fired as desired. It is generally preferred to provide the conductive paths or layers 27 of material that resist adhesion to solder, to assist in preventing solder from adhering to portions of the substrate where it is unwanted. For this reason, it is also preferable to permit a small portion to slightly overlap the termination material 20 at the upper edge of the planar surface 12.
- leads 30 are inserted in each of the respective openings 15 in the manner disclosed and claimed in U.S. Pat. Nos. 4,127,934, 4,187,529 and 4,213,113.
- solder pads 31 are automatically applied by transporting the substrate 11, with the leads 30 attached thereto through a waveform solder bath (not shown).
- the leads are preferably attached to a carrier strip of a lead frame (not shown) as disclosed in the aforementioned patents.
- a conformal coating 32 as a means of protecting the resistive and conductive layers 26 and 27, respectively, from the elements.
- Identification (not shown) may be printed directly to the conformally coated surface.
- the solder pads 31 serve to provide additional conductivity from the edge termination material at the areas 20 and overlapping into the areas 21 to connect with the network.
- the solder pads 31 act to also provide an additional anchoring means for the leads 30.
- FIGS. 5 and 6 illustrate another technique of providing the indented areas, which are the subject of the present invention. It will be apparent that either the grooved indentations illustrated in the views of FIGS. 1-4, or the notches 35 may be utilized in either the SIP or the DIP devices with even facility.
- the two different devices, i.e. SIP and DIP are merely shown as examples to indicate broad application of the present invention, which also may reside in various configurations of indented areas traversing between two adjoining planar surfaces, i.e. surfaces at 11 and 12 of the SIP construction of FIGS. 1-4 and planar surfaces 36 and 37 defined by the line of intersection 38 of the substrate 40 of FIGS. 5 and 6.
- the embodiment of FIGS. 5 and 6 is explained in detail in the Beckman et al U.S. Pat. No. 3,873,890, assigned to the same assignee as the present invention.
- the dual in-line package construction of the device of FIGS. 5 and 6 comprises a substrate 40 having a surface 36 arranged to receive a thick or thin film network 42 comprising a resistive layer 43 connected to leads 44 by means of conducting paths 45 overlying termination pads 46 which extend from the surface 36 over the line of intersection 38 and onto the edge termination portion 47 of the edge 37.
- Solder pads 48 are applied as described in connection with the discussion of the first embodiment.
- a conformal coating 50 is later applied after the leads 44 have been anchored in place.
- notched areas extend between the planar surfaces 37 and 38 to provide a means of increasing the thickness of the edge termination coating overlapping both surfaces 36 and 37 and intersecting the line of intersection 38.
- This wire-like conductive path assures adequate thickness of termination material to minimize the deleterious effects of "leaching" or migrating of silver into the solder as the solder is applied to retain the leads in place.
- the invention herein has been specifically described in connection with devices having leads projecting from one or more sides of a substrate, it will also be understood that, such as in the case of certain hybrid circuits (not shown), the provision of the notches 35 or grooves 18 is equally applicable to devices which have no leads. In fact, the invention finds application in instances where solder is not applied.
- the channels defined by the notches 35 or grooves 18 provide a ready means of assuring adequate "flow" during printing or other deposition of a layer, such as the edge termination areas or portions 21 and 46.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
Description
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/392,921 US4400762A (en) | 1980-08-25 | 1982-06-28 | Edge termination for an electrical circuit device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US18132980A | 1980-08-25 | 1980-08-25 | |
US06/392,921 US4400762A (en) | 1980-08-25 | 1982-06-28 | Edge termination for an electrical circuit device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US18132980A Continuation | 1980-08-25 | 1980-08-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
US4400762A true US4400762A (en) | 1983-08-23 |
Family
ID=26877084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US06/392,921 Expired - Lifetime US4400762A (en) | 1980-08-25 | 1982-06-28 | Edge termination for an electrical circuit device |
Country Status (1)
Country | Link |
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US (1) | US4400762A (en) |
Cited By (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5204655A (en) * | 1990-09-13 | 1993-04-20 | Ngk Insulators, Ltd. | Resistor element with a planar ceramic substrate covered with a resistive metallic film and having apertures for lead wire connection |
US5365403A (en) * | 1992-07-17 | 1994-11-15 | Vlt Corporation | Packaging electrical components |
US5600101A (en) * | 1994-07-21 | 1997-02-04 | Murata Manufacturing Co., Ltd. | Multilayer electronic component and method of manufacturing the same |
US5621193A (en) * | 1995-05-23 | 1997-04-15 | Northrop Grumman Corporation | Ceramic edge connect process |
US5621619A (en) * | 1990-10-25 | 1997-04-15 | Cts Corporation | All ceramic surface mount sip and dip networks having spacers and solder barriers |
US5644103A (en) * | 1994-11-10 | 1997-07-01 | Vlt Corporation | Packaging electrical components having a scallop formed in an edge of a circuit board |
US5727727A (en) * | 1995-02-02 | 1998-03-17 | Vlt Corporation | Flowing solder in a gap |
US5728600A (en) * | 1994-11-15 | 1998-03-17 | Vlt Corporation | Circuit encapsulation process |
US5808358A (en) * | 1994-11-10 | 1998-09-15 | Vlt Corporation | Packaging electrical circuits |
US5876859A (en) * | 1994-11-10 | 1999-03-02 | Vlt Corporation | Direct metal bonding |
US5945130A (en) * | 1994-11-15 | 1999-08-31 | Vlt Corporation | Apparatus for circuit encapsulation |
US6031726A (en) * | 1995-11-06 | 2000-02-29 | Vlt Corporation | Low profile mounting of power converters with the converter body in an aperture |
US6234842B1 (en) | 1998-11-20 | 2001-05-22 | Vlt Corporation | Power converter connector assembly |
US6316737B1 (en) | 1999-09-09 | 2001-11-13 | Vlt Corporation | Making a connection between a component and a circuit board |
US6434005B1 (en) | 2000-10-27 | 2002-08-13 | Vlt Corporation | Power converter packaging |
US20040160714A1 (en) * | 2001-04-24 | 2004-08-19 | Vlt Corporation, A Texas Corporation | Components having actively controlled circuit elements |
US7443229B1 (en) | 2001-04-24 | 2008-10-28 | Picor Corporation | Active filtering |
US20100294546A1 (en) * | 2009-05-22 | 2010-11-25 | Sean Nickel | Circuit board and method for a low profile wire connection |
USD668658S1 (en) * | 2011-11-15 | 2012-10-09 | Connectblue Ab | Module |
USD668659S1 (en) * | 2011-11-15 | 2012-10-09 | Connectblue Ab | Module |
USD680119S1 (en) * | 2011-11-15 | 2013-04-16 | Connectblue Ab | Module |
USD680545S1 (en) * | 2011-11-15 | 2013-04-23 | Connectblue Ab | Module |
USD689053S1 (en) * | 2011-11-15 | 2013-09-03 | Connectblue Ab | Module |
USD692896S1 (en) * | 2011-11-15 | 2013-11-05 | Connectblue Ab | Module |
US11013118B2 (en) * | 2019-05-23 | 2021-05-18 | Jujube Llc | Electronic component mounting structure and method |
US11244881B2 (en) * | 2019-09-30 | 2022-02-08 | Texas Instruments Incorporated | Package terminal cavities |
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US3346774A (en) * | 1965-07-30 | 1967-10-10 | Cts Corp | Electrical component substrate with cavities for anchoring lead wires therein |
US3365536A (en) * | 1965-11-10 | 1968-01-23 | Sprague Electric Co | Circuit module |
US3492536A (en) * | 1968-01-18 | 1970-01-27 | Cts Corp | Means for anchoring and connecting lead wires to an electrical component |
US3531581A (en) * | 1968-03-11 | 1970-09-29 | Beckman Instruments Inc | Electrical assembly and terminal lead construction |
US3638162A (en) * | 1970-05-04 | 1972-01-25 | Gulf & Western Ind Prod Co | Programable electric circuit card |
US3639274A (en) * | 1967-09-06 | 1972-02-01 | Allen Bradley Co | Electrical resistance composition |
US3873890A (en) * | 1973-08-20 | 1975-03-25 | Allen Bradley Co | Terminal construction for electrical circuit device |
US4127934A (en) * | 1975-09-02 | 1978-12-05 | Allen-Bradley Company | Method of making terminal construction for electrical circuit device |
US4187529A (en) * | 1975-09-02 | 1980-02-05 | Allen-Bradley Company | Terminal construction for electrical circuit device |
US4213113A (en) * | 1978-09-08 | 1980-07-15 | Allen-Bradley Company | Electrical resistor element and method of manufacturing the same |
-
1982
- 1982-06-28 US US06/392,921 patent/US4400762A/en not_active Expired - Lifetime
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3346774A (en) * | 1965-07-30 | 1967-10-10 | Cts Corp | Electrical component substrate with cavities for anchoring lead wires therein |
US3365536A (en) * | 1965-11-10 | 1968-01-23 | Sprague Electric Co | Circuit module |
US3639274A (en) * | 1967-09-06 | 1972-02-01 | Allen Bradley Co | Electrical resistance composition |
US3492536A (en) * | 1968-01-18 | 1970-01-27 | Cts Corp | Means for anchoring and connecting lead wires to an electrical component |
US3531581A (en) * | 1968-03-11 | 1970-09-29 | Beckman Instruments Inc | Electrical assembly and terminal lead construction |
US3638162A (en) * | 1970-05-04 | 1972-01-25 | Gulf & Western Ind Prod Co | Programable electric circuit card |
US3873890A (en) * | 1973-08-20 | 1975-03-25 | Allen Bradley Co | Terminal construction for electrical circuit device |
US4127934A (en) * | 1975-09-02 | 1978-12-05 | Allen-Bradley Company | Method of making terminal construction for electrical circuit device |
US4187529A (en) * | 1975-09-02 | 1980-02-05 | Allen-Bradley Company | Terminal construction for electrical circuit device |
US4213113A (en) * | 1978-09-08 | 1980-07-15 | Allen-Bradley Company | Electrical resistor element and method of manufacturing the same |
Cited By (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5204655A (en) * | 1990-09-13 | 1993-04-20 | Ngk Insulators, Ltd. | Resistor element with a planar ceramic substrate covered with a resistive metallic film and having apertures for lead wire connection |
US5621619A (en) * | 1990-10-25 | 1997-04-15 | Cts Corporation | All ceramic surface mount sip and dip networks having spacers and solder barriers |
US5663869A (en) * | 1992-07-17 | 1997-09-02 | Vlt Corporation | Packaging electrical components |
US5365403A (en) * | 1992-07-17 | 1994-11-15 | Vlt Corporation | Packaging electrical components |
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