US20200413529A1 - Circuit board - Google Patents
Circuit board Download PDFInfo
- Publication number
- US20200413529A1 US20200413529A1 US16/854,009 US202016854009A US2020413529A1 US 20200413529 A1 US20200413529 A1 US 20200413529A1 US 202016854009 A US202016854009 A US 202016854009A US 2020413529 A1 US2020413529 A1 US 2020413529A1
- Authority
- US
- United States
- Prior art keywords
- layer
- wiring layer
- electromagnetic shielding
- circuit board
- outer wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K9/00—Screening of apparatus or components against electric or magnetic fields
- H05K9/0007—Casings
- H05K9/002—Casings with localised screening
- H05K9/0022—Casings with localised screening of components mounted on printed circuit boards [PCB]
- H05K9/0024—Shield cases mounted on a PCB, e.g. cans or caps or conformal shields
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10371—Shields or metal cases
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Definitions
- the subject matter herein generally relates to a circuit board and a method for manufacturing the circuit board.
- a circuit board may have an electromagnetic shielding layer to reduce electromagnetic interference (EMI) in the circuit board.
- the sidewall of the EMI layer may include a number of mounting legs.
- the sidewall of the circuit board needs to define a number of receiving grooves for the mounting legs.
- the mounting legs are inserted into the receiving grooves to connect the electromagnetic shielding layer to the circuit board.
- the mounting legs and the receiving grooves increase the cost and the complexity of manufacturing process. Improvement in the art is desired.
- FIG. 1 is a flowchart of an embodiment of a method for manufacturing a circuit board.
- FIG. 2 is a diagrammatic view of a copper baseboard used in the method of FIG. 1 .
- FIG. 3 is a diagrammatic view showing a first copper layer formed on the copper baseboard of FIG. 2 .
- FIG. 4 is a diagrammatic view showing the first copper layer of FIG. 3 etched to form an inner wiring layer.
- FIG. 5 is a diagrammatic view showing a second dielectric layer and a second copper layer formed on the inner wiring layer of FIG. 4 .
- FIG. 6A is a diagrammatic view showing the second copper layer and the copper foil of FIG. 5 etched to form a first outer wiring layer and a second outer wiring layer.
- FIG. 6B is a plan view of FIG. 6A .
- FIG. 7 is a diagrammatic view showing electronic components mounted on the first outer wiring layer of FIG. 6A .
- FIG. 8 is a diagrammatic view showing conductive posts formed on an electromagnetic shielding substrate.
- FIG. 9A is a diagrammatic view showing the electromagnetic shielding substrate of FIG. 8 cut to form electromagnetic shielding units.
- FIG. 9B is a plan view of FIG. 9A .
- FIG. 10 is a diagrammatic view showing the electromagnetic shielding units of FIG. 9A mounted on the first outer wiring layer of FIG. 7 .
- FIG. 11 is a diagrammatic view showing an adhesive layer formed on the first outer wiring layer of FIG. 10 .
- FIG. 12 is a diagrammatic view showing an intermediate product of FIG. 11 cut to form a circuit board.
- a method for manufacturing a circuit board 100 (see FIG. 12 ) is presented in accordance with an embodiment.
- the method for manufacturing the circuit board 100 is provided by way of example, as there are a variety of ways to carry out the method.
- the method can begin at block 11 .
- a copper baseboard 10 which includes a first dielectric layer 102 , a copper foil 101 formed on the first dielectric layer 102 , and a first protection layer 103 formed on the copper foil 101 .
- the copper baseboard 10 is a single-sided copper baseboard. In other embodiments, the copper baseboard 10 may be a double-sided copper baseboard.
- the first dielectric layer 102 is made of a dielectric material such as resin or glass.
- the first dielectric layer 102 is made of a resin selected from a group consisting of polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and any combination thereof.
- the first protection layer 103 prevents the copper foil 101 from being oxidized.
- a first copper layer 11 is formed on the first dielectric layer 102 .
- the first copper layer 11 is formed by electroplating. Before forming the first copper layer 11 , at least two blind holes (not labeled) are defined in the first dielectric layer 102 . The first copper layer 11 fills in the blind holes to form first conductive vias 10 a that electrically connect the first copper layer 11 and the copper foil 101 to each other.
- the blind holes can be formed by drilling or laser etching.
- the blind holes pass through the first dielectric layer 102 , and do not pass through the copper foil 101 .
- each blind hole is chemically plated to form a conductive layer (not shown) at the inner wall of the blind hole.
- the first copper layer 11 fills in each blind hole with the conductive layer.
- the first copper layer 11 is etched to form an inner wiring layer 11 a.
- the inner wiring layer 11 a is formed by lithographic exposure and development.
- a first photosensitive layer (not shown) is formed on the first copper layer 11 .
- the first photosensitive layer is patterned to form hollow patterns through exposure and development.
- the first copper layer 11 is etched through the patterned first copper layer 11 to form the inner wiring layer 11 a . Then, the patterned first copper layer 11 is removed.
- a second dielectric layer 12 and a second copper layer 13 are formed on the inner wiring layer 11 a.
- At least two blind holes are defined in the second dielectric layer 12 .
- the second copper layer 13 further fills in the blind holes to form at least two second conductive vias 12 a that electrically connect the second copper layer 13 to the inner wiring layer 11 a .
- a distance between two adjacent second conductive vias 12 a can be more than a distance between two adjacent first conductive vias 10 a.
- the second dielectric layer 12 is made of polypropylene.
- the first protection layer 103 is removed.
- the second copper layer 13 and the copper foil 101 are etched to form a first outer wiring layer 13 a and a second outer wiring layer 101 a respectively.
- a first solder mask layer 20 is formed on the second outer wiring layer 101 a , thereby obtaining a circuit baseboard 1 .
- the circuit baseboard 1 includes a number of circuit units A 1 spaced apart from each other and arranged in a matrix.
- the first outer wiring layer 13 a includes a number of solder pads 131 that electrically connect to the inner wiring layer 11 a through the second conductive vias 12 a.
- the electronic components 2 can be resistors, capacitors, or others.
- each of the electronic components 2 includes at least two electrodes 21 .
- Each of the electrodes 21 is connected to one of the solder pads 131 through a soldering ball 3 .
- the soldering ball 3 can be made of solder paste, conductive silver paste, or conductive copper paste.
- an electromagnetic shielding substrate 40 is provided.
- the electromagnetic shielding substrate 40 includes an electromagnetic shielding layer 41 and a second protection layer 43 formed on the electromagnetic shielding layer 41 .
- a third dielectric layer 403 is formed on a surface of the electromagnetic shielding layer 41 facing away from the second protection layer 43 .
- a number of blind holes (not labeled) are defined in the third dielectric layer 403 .
- Conductive paste or electroplated copper is filled in the blind holes to form a number of conductive posts 42 .
- the electromagnetic shielding layer 41 is made of steel, aluminum, or copper.
- the third dielectric layer 403 is removed, and the electromagnetic shielding substrate 40 is cut to form a number of electromagnetic shielding units 4 .
- the electromagnetic shielding units 4 are arranged in a matrix.
- Each of the electromagnetic shielding units 4 includes the electromagnetic shielding layer 41 , the second protection layer 43 formed on the electromagnetic shielding layer 41 , and at least two of the conductive posts 42 formed on the surface of the electromagnetic shielding layer 41 facing away from the second protection layer 43 .
- the conductive posts 42 can be adjacent to the edges of the electromagnetic shielding layer 41 .
- the electromagnetic shielding layer 41 and the conductive posts 42 cooperatively define a receiving space 40 a.
- Each of the conductive posts 42 can be in a shape of a regular or elliptical cylinder, or a prism.
- the conductive posts 42 can be regularly or randomly arranged.
- the density of the conductive posts 42 may be adjusted according to the wavelengths of electromagnetic waves to be emitted by the electronic components 2 . To achieve an optimal shielding effect, the distance between adjacent conductive posts 42 should be smaller than the wavelengths of the anticipated electromagnetic waves.
- each of the electromagnetic shielding units 4 is mounted on the solder pads 131 through the conductive posts 42 and covers one of the electronic components 2 .
- an adhesive layer 5 is formed on the first outer wiring layer 13 a that connects each of the electromagnetic shielding units 4 to the first outer wiring layer 13 a , thereby forming an intermediate product 6 .
- the adhesive layer 5 fills in the receiving space 40 a of each of the electromagnetic shielding units 4 (that is, the gaps between each electromagnetic shielding unit 4 and the electronic component 2 covered by the electromagnetic shielding unit 4 ) and the gaps between each two adjacent electromagnetic shielding units 4 .
- the adhesive layer 5 can be flush with the electromagnetic shielding layer 41 .
- the intermediate product 6 is cut along gaps between every two adjacent electromagnetic shielding units 4 .
- the second protection layer 43 is removed, and a second solder mask layer 22 is formed on the electromagnetic shielding layer 41 , thereby forming a number of the circuit boards 100 .
- the second solder mask layer 22 can further cover the adhesive layer 5 .
- the electronic component In the circuit board 100 , the electronic component generates electromagnetic waves which are reflected or absorbed by the electromagnetic shielding units 4 .
- the circuit board 100 of the present disclosure has a number of electromagnetic shielding units 4 , and cutting the intermediate product 6 forms a number of circuit boards 100 .
- the method can simplify the process and reduce the manufacturing cost.
- the flexibility for manufacturing the circuit board can be improved.
- the electromagnetic shielding units are connected to the inner wiring layer through the conductive posts, and the electronic components are received in their own electromagnetic shielding units.
- the conductive continuity of the electromagnetic shielding units is improved, which also improves the electromagnetic shielding effect.
- the electromagnetic shielding effect is further enhanced.
- circuit board 100 of the embodiment includes only three wiring layers, the number of the wiring layers can also be varied according to need.
- the present disclosure further provides an embodiment of a circuit board 100 .
- the circuit board 100 includes an inner wiring layer 11 a , a first dielectric layer 102 , and a second dielectric layer 12 .
- the first dielectric layer 102 and the second dielectric layer 12 are formed on opposite surfaces of the inner wiring layer 11 a.
- the circuit board 100 further includes a first outer wiring layer 13 a and a second outer wiring layer 101 a .
- the second outer wiring layer 101 a is formed on the first dielectric layer 102
- the first outer wiring layer 13 a is formed on the second dielectric layer 12 .
- At least one electronic component 2 is mounted on the first outer wiring layer 13 a .
- the first outer wiring layer 13 a includes a number of solder pads 131 .
- a first solder mask layer 20 is formed on the second outer wiring layer 101 a.
- each of the electronic components 2 includes at least two electrodes 21 .
- Each of the electrodes 21 is connected to one of the solder pads 131 through a soldering ball 3 .
- the soldering ball 3 can be made of solder paste, conductive silver paste, or conductive copper paste.
- the first dielectric layer 102 defines at least one first conductive via 10 a that electrically connects the second outer wiring layer 101 a and the inner wiring layer 11 a .
- the second dielectric layer 12 defines at least one second conductive via 12 a that electrically connects the first outer wiring layer 13 a and the inner wiring layer 11 a to each other.
- a distance between two adjacent second conductive vias 12 a can be more than a distance between two adjacent first conductive vias 10 a , causing a density of the inner wiring layer 11 a to be less than a density of the first outer wiring layer 13 a.
- the circuit board 100 further includes at least one electromagnetic shielding unit 4 .
- the electromagnetic shielding unit 4 includes an electromagnetic shielding layer 41 and at least two conductive posts 42 formed on the electromagnetic shielding layer 41 .
- the electromagnetic shielding layer 41 and the conductive posts 42 cooperatively define a receiving space 40 a .
- the electromagnetic shielding unit 4 is mounted on the solder pads 131 through the conductive posts 42 and covers one of the electronic components 2 . That is, the electronic component 2 is received in the receiving space 40 a .
- An adhesive layer 5 is formed on the first outer wiring layer 13 a that connects each of the electromagnetic shielding units 4 to the first outer wiring layer 13 a .
- the adhesive layer 5 fills in the receiving space 40 a of each of the electromagnetic shielding units 4 (that is, space between each electromagnetic shielding unit 4 and the electronic components 2 covered by the electromagnetic shielding unit 4 ).
- a second solder mask layer 22 is formed on the electromagnetic shielding layer 41 .
- the second solder mask layer 22 can further cover the adhesive layer 5 .
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
Description
- The subject matter herein generally relates to a circuit board and a method for manufacturing the circuit board.
- A circuit board may have an electromagnetic shielding layer to reduce electromagnetic interference (EMI) in the circuit board. The sidewall of the EMI layer may include a number of mounting legs. The sidewall of the circuit board needs to define a number of receiving grooves for the mounting legs. The mounting legs are inserted into the receiving grooves to connect the electromagnetic shielding layer to the circuit board. However, the mounting legs and the receiving grooves increase the cost and the complexity of manufacturing process. Improvement in the art is desired.
- Implementations of the present technology will now be described, by way of embodiment, with reference to the attached figures.
-
FIG. 1 is a flowchart of an embodiment of a method for manufacturing a circuit board. -
FIG. 2 is a diagrammatic view of a copper baseboard used in the method ofFIG. 1 . -
FIG. 3 is a diagrammatic view showing a first copper layer formed on the copper baseboard ofFIG. 2 . -
FIG. 4 is a diagrammatic view showing the first copper layer ofFIG. 3 etched to form an inner wiring layer. -
FIG. 5 is a diagrammatic view showing a second dielectric layer and a second copper layer formed on the inner wiring layer ofFIG. 4 . -
FIG. 6A is a diagrammatic view showing the second copper layer and the copper foil ofFIG. 5 etched to form a first outer wiring layer and a second outer wiring layer. -
FIG. 6B is a plan view ofFIG. 6A . -
FIG. 7 is a diagrammatic view showing electronic components mounted on the first outer wiring layer ofFIG. 6A . -
FIG. 8 is a diagrammatic view showing conductive posts formed on an electromagnetic shielding substrate. -
FIG. 9A is a diagrammatic view showing the electromagnetic shielding substrate ofFIG. 8 cut to form electromagnetic shielding units. -
FIG. 9B is a plan view ofFIG. 9A . -
FIG. 10 is a diagrammatic view showing the electromagnetic shielding units ofFIG. 9A mounted on the first outer wiring layer ofFIG. 7 . -
FIG. 11 is a diagrammatic view showing an adhesive layer formed on the first outer wiring layer ofFIG. 10 . -
FIG. 12 is a diagrammatic view showing an intermediate product ofFIG. 11 cut to form a circuit board. - It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
- The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.
- Referring to
FIG. 1 , a method for manufacturing a circuit board 100 (seeFIG. 12 ) is presented in accordance with an embodiment. The method for manufacturing thecircuit board 100 is provided by way of example, as there are a variety of ways to carry out the method. The method can begin atblock 11. - At
block 11, referring toFIG. 2 , acopper baseboard 10 is provided, which includes a firstdielectric layer 102, acopper foil 101 formed on the firstdielectric layer 102, and afirst protection layer 103 formed on thecopper foil 101. - The
copper baseboard 10 is a single-sided copper baseboard. In other embodiments, thecopper baseboard 10 may be a double-sided copper baseboard. - The first
dielectric layer 102 is made of a dielectric material such as resin or glass. In at least one embodiment, the firstdielectric layer 102 is made of a resin selected from a group consisting of polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and any combination thereof. - The
first protection layer 103 prevents thecopper foil 101 from being oxidized. - At
block 12, referring toFIG. 3 , afirst copper layer 11 is formed on the firstdielectric layer 102. - In at least one embodiment, the
first copper layer 11 is formed by electroplating. Before forming thefirst copper layer 11, at least two blind holes (not labeled) are defined in the firstdielectric layer 102. Thefirst copper layer 11 fills in the blind holes to form firstconductive vias 10 a that electrically connect thefirst copper layer 11 and thecopper foil 101 to each other. - The blind holes can be formed by drilling or laser etching. The blind holes pass through the first
dielectric layer 102, and do not pass through thecopper foil 101. - In at least one embodiment, after defining the blind holes in the first
dielectric layer 102, each blind hole is chemically plated to form a conductive layer (not shown) at the inner wall of the blind hole. Thefirst copper layer 11 fills in each blind hole with the conductive layer. - At
block 13, referring toFIG. 4 , thefirst copper layer 11 is etched to form aninner wiring layer 11 a. - The
inner wiring layer 11 a is formed by lithographic exposure and development. In at least one embodiment, a first photosensitive layer (not shown) is formed on thefirst copper layer 11. The first photosensitive layer is patterned to form hollow patterns through exposure and development. Thefirst copper layer 11 is etched through the patternedfirst copper layer 11 to form theinner wiring layer 11 a. Then, the patternedfirst copper layer 11 is removed. - At
block 14, referring toFIG. 5 , a seconddielectric layer 12 and asecond copper layer 13 are formed on theinner wiring layer 11 a. - In at least one embodiment, before forming the
second copper layer 13, at least two blind holes (not labeled) are defined in thesecond dielectric layer 12. Thesecond copper layer 13 further fills in the blind holes to form at least two secondconductive vias 12 a that electrically connect thesecond copper layer 13 to theinner wiring layer 11 a. A distance between two adjacent secondconductive vias 12 a can be more than a distance between two adjacent firstconductive vias 10 a. - In at least one embodiment, the
second dielectric layer 12 is made of polypropylene. - At
block 15, referring toFIGS. 6A and 6B , thefirst protection layer 103 is removed. Thesecond copper layer 13 and thecopper foil 101 are etched to form a firstouter wiring layer 13 a and a secondouter wiring layer 101 a respectively. A firstsolder mask layer 20 is formed on the secondouter wiring layer 101 a, thereby obtaining a circuit baseboard 1. - The circuit baseboard 1 includes a number of circuit units A1 spaced apart from each other and arranged in a matrix.
- At
block 16, referring toFIG. 7 , a number ofelectronic components 2 are mounted on the firstouter wiring layer 13 a. The firstouter wiring layer 13 a includes a number ofsolder pads 131 that electrically connect to theinner wiring layer 11 a through the secondconductive vias 12 a. - The
electronic components 2 can be resistors, capacitors, or others. In at least one embodiment, each of theelectronic components 2 includes at least twoelectrodes 21. Each of theelectrodes 21 is connected to one of thesolder pads 131 through asoldering ball 3. Thesoldering ball 3 can be made of solder paste, conductive silver paste, or conductive copper paste. - At
block 17, referring toFIG. 8 , anelectromagnetic shielding substrate 40 is provided. Theelectromagnetic shielding substrate 40 includes anelectromagnetic shielding layer 41 and asecond protection layer 43 formed on theelectromagnetic shielding layer 41. Athird dielectric layer 403 is formed on a surface of theelectromagnetic shielding layer 41 facing away from thesecond protection layer 43. A number of blind holes (not labeled) are defined in the thirddielectric layer 403. Conductive paste or electroplated copper is filled in the blind holes to form a number ofconductive posts 42. - In at least one embodiment, the
electromagnetic shielding layer 41 is made of steel, aluminum, or copper. - At
block 18, referring toFIGS. 9A and 9B , the thirddielectric layer 403 is removed, and theelectromagnetic shielding substrate 40 is cut to form a number ofelectromagnetic shielding units 4. - The
electromagnetic shielding units 4 are arranged in a matrix. Each of theelectromagnetic shielding units 4 includes theelectromagnetic shielding layer 41, thesecond protection layer 43 formed on theelectromagnetic shielding layer 41, and at least two of theconductive posts 42 formed on the surface of theelectromagnetic shielding layer 41 facing away from thesecond protection layer 43. Theconductive posts 42 can be adjacent to the edges of theelectromagnetic shielding layer 41. Theelectromagnetic shielding layer 41 and theconductive posts 42 cooperatively define a receivingspace 40 a. - Each of the
conductive posts 42 can be in a shape of a regular or elliptical cylinder, or a prism. Theconductive posts 42 can be regularly or randomly arranged. The density of theconductive posts 42 may be adjusted according to the wavelengths of electromagnetic waves to be emitted by theelectronic components 2. To achieve an optimal shielding effect, the distance between adjacentconductive posts 42 should be smaller than the wavelengths of the anticipated electromagnetic waves. - At
block 19, referring toFIG. 10 , each of theelectromagnetic shielding units 4 is mounted on thesolder pads 131 through theconductive posts 42 and covers one of theelectronic components 2. - At
block 20, referring toFIG. 11 , anadhesive layer 5 is formed on the firstouter wiring layer 13 a that connects each of theelectromagnetic shielding units 4 to the firstouter wiring layer 13 a, thereby forming anintermediate product 6. Theadhesive layer 5 fills in the receivingspace 40 a of each of the electromagnetic shielding units 4 (that is, the gaps between eachelectromagnetic shielding unit 4 and theelectronic component 2 covered by the electromagnetic shielding unit 4) and the gaps between each two adjacentelectromagnetic shielding units 4. Theadhesive layer 5 can be flush with theelectromagnetic shielding layer 41. - At
block 21, referring toFIG. 12 , theintermediate product 6 is cut along gaps between every two adjacentelectromagnetic shielding units 4. Thesecond protection layer 43 is removed, and a secondsolder mask layer 22 is formed on theelectromagnetic shielding layer 41, thereby forming a number of thecircuit boards 100. The secondsolder mask layer 22 can further cover theadhesive layer 5. - In the
circuit board 100, the electronic component generates electromagnetic waves which are reflected or absorbed by theelectromagnetic shielding units 4. Thecircuit board 100 of the present disclosure has a number ofelectromagnetic shielding units 4, and cutting theintermediate product 6 forms a number ofcircuit boards 100. Thus, the method can simplify the process and reduce the manufacturing cost. Furthermore, the flexibility for manufacturing the circuit board can be improved. The electromagnetic shielding units are connected to the inner wiring layer through the conductive posts, and the electronic components are received in their own electromagnetic shielding units. The conductive continuity of the electromagnetic shielding units is improved, which also improves the electromagnetic shielding effect. Furthermore, by infilling adhesive between the inner wiring layer and the electromagnetic shielding units and embedding the electronic components in the circuit board, the electromagnetic shielding effect is further enhanced. - Although the
circuit board 100 of the embodiment includes only three wiring layers, the number of the wiring layers can also be varied according to need. - Referring to
FIG. 12 , the present disclosure further provides an embodiment of acircuit board 100. Thecircuit board 100 includes aninner wiring layer 11 a, a firstdielectric layer 102, and asecond dielectric layer 12. Thefirst dielectric layer 102 and thesecond dielectric layer 12 are formed on opposite surfaces of theinner wiring layer 11 a. - The
circuit board 100 further includes a firstouter wiring layer 13 a and a secondouter wiring layer 101 a. The secondouter wiring layer 101 a is formed on thefirst dielectric layer 102, and the firstouter wiring layer 13 a is formed on thesecond dielectric layer 12. At least oneelectronic component 2 is mounted on the firstouter wiring layer 13 a. The firstouter wiring layer 13 a includes a number ofsolder pads 131. A firstsolder mask layer 20 is formed on the secondouter wiring layer 101 a. - In at least one embodiment, each of the
electronic components 2 includes at least twoelectrodes 21. Each of theelectrodes 21 is connected to one of thesolder pads 131 through asoldering ball 3. Thesoldering ball 3 can be made of solder paste, conductive silver paste, or conductive copper paste. - In at least one embodiment, the
first dielectric layer 102 defines at least one first conductive via 10 a that electrically connects the secondouter wiring layer 101 a and theinner wiring layer 11 a. Thesecond dielectric layer 12 defines at least one second conductive via 12 a that electrically connects the firstouter wiring layer 13 a and theinner wiring layer 11 a to each other. A distance between two adjacent secondconductive vias 12 a can be more than a distance between two adjacent firstconductive vias 10 a, causing a density of theinner wiring layer 11 a to be less than a density of the firstouter wiring layer 13 a. - The
circuit board 100 further includes at least oneelectromagnetic shielding unit 4. Theelectromagnetic shielding unit 4 includes anelectromagnetic shielding layer 41 and at least twoconductive posts 42 formed on theelectromagnetic shielding layer 41. Theelectromagnetic shielding layer 41 and theconductive posts 42 cooperatively define a receivingspace 40 a. Theelectromagnetic shielding unit 4 is mounted on thesolder pads 131 through theconductive posts 42 and covers one of theelectronic components 2. That is, theelectronic component 2 is received in the receivingspace 40 a. Anadhesive layer 5 is formed on the firstouter wiring layer 13 a that connects each of theelectromagnetic shielding units 4 to the firstouter wiring layer 13 a. Theadhesive layer 5 fills in the receivingspace 40 a of each of the electromagnetic shielding units 4 (that is, space between eachelectromagnetic shielding unit 4 and theelectronic components 2 covered by the electromagnetic shielding unit 4). A secondsolder mask layer 22 is formed on theelectromagnetic shielding layer 41. The secondsolder mask layer 22 can further cover theadhesive layer 5. - Even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only. Changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the plain meaning of the terms in which the appended claims are expressed.
Claims (10)
Priority Applications (1)
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US16/854,009 US20200413529A1 (en) | 2019-06-28 | 2020-04-21 | Circuit board |
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CN201910578256.3A CN112153883B (en) | 2019-06-28 | 2019-06-28 | Circuit board manufacturing method and circuit board |
CN201910578256.3 | 2019-06-28 | ||
US16/522,829 US10764992B1 (en) | 2019-06-28 | 2019-07-26 | Circuit board and method for manufacturing the same |
US16/854,009 US20200413529A1 (en) | 2019-06-28 | 2020-04-21 | Circuit board |
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US16/522,829 Division US10764992B1 (en) | 2019-06-28 | 2019-07-26 | Circuit board and method for manufacturing the same |
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US20200413529A1 true US20200413529A1 (en) | 2020-12-31 |
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US16/522,829 Active US10764992B1 (en) | 2019-06-28 | 2019-07-26 | Circuit board and method for manufacturing the same |
US16/854,009 Abandoned US20200413529A1 (en) | 2019-06-28 | 2020-04-21 | Circuit board |
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US10764992B1 (en) | 2020-09-01 |
CN112153883B (en) | 2022-12-06 |
CN112153883A (en) | 2020-12-29 |
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