TWI625775B - Wafer processing method (3) - Google Patents

Abstract

A method of processing a wafer is provided, wherein a back surface of the wafer is polished to a predetermined thickness, and after the electrode exposed to the back surface is bonded to the electrode of the element wafer, the wafer is easily divided along the scribe line.

A chip having electrodes formed on a surface of a plurality of regions arranged in a lattice-like dicing region and having electrodes on the back surface thereof exposed to the electrodes is attached, and a wafer having electrodes corresponding to the electrodes is mounted and mounted The wafer having the wafer is divided along a dicing line, and the processing method of the wafer is characterized by comprising the following procedure: a slab bonding process, bonding the surface of the slab to the surface of the wafer through an adhesive layer; Forming the wafer on the back side of the wafer bonding process to form a predetermined thickness; the wafer mounting process, the wafer having electrodes corresponding to the electrodes exposed on the back side of the wafer on which the back grinding process has been performed, and the wafers Electrode bonding installation; a dividing process of processing a wafer on which a wafer is mounted on the back side by a wafer mounting process, and processing the wafer on the back side along the dicing street to be divided into individual components on which the wafer is mounted; the wafer support program is mounted on the wafer a wafer side adhesive dicing tape on the back side of the wafer on which the dividing process is performed and supporting the outer periphery of the dicing tape by a ring frame; and Strip the program, it has been bonded to the embodiment of the wafer support plate of the release surface of the wafer Procedure.

Description

Wafer processing method (3) Field of invention

The present invention relates to a wafer processing method in which a back surface of a wafer having a plurality of elements formed on a surface thereof is ground to form a predetermined thickness.

Background of the invention

In the conductor element manufacturing process, a plurality of regions are divided by a predetermined dividing line called a dicing street arranged in a lattice shape on the back surface of a substantially circular disk-shaped semiconductor wafer, and ICs and LSIs are formed in the divided regions. And other components. Further, the semiconductor wafer is cut along the dicing street to divide the region where the element is formed, thereby manufacturing each semiconductor element. The thus-divided wafer is processed to a predetermined thickness by grinding by a grinding device before being cut along the scribe line.

In addition, a multilayer semiconductor package in which a plurality of elements are laminated is proposed in order to increase the capacity and density of the semiconductor device (for example, refer to Patent Document 2).

[First technical literature]

[Patent Literature]

[Patent Document 1] JP-A-2002-76167

Summary of invention

However, when the back surface of the wafer is ground to a predetermined thickness and exposed to the electrodes of the electrode bonding element wafer on the back surface, the dividing process of dividing the wafer along the dicing street is performed, but the wafer is bonded to the wafer before performing the dividing process. The plurality of component wafer sides on the back side are supported by the ring-shaped frame through the dicing tape. When the dicing tape is adhered to the plurality of element wafer sides on the back surface of the wafer, or when the wafer supported by the dicing tape is supported by the ring frame, the wafer may be damaged. Further, since the Δ wafer having a substantially triangular shape of the end material exists in the outer periphery of the wafer, the Δ wafer is scattered when the wafer is processed along the scribe line. Therefore, in order to prevent the Δ wafer from scattering, a temporary element wafer is mounted on the lower side of the Δ wafer, which has a problem of deterioration in productivity.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and a main object of the present invention is to provide a wafer processing method which can be easily formed along a surface of a wafer bonded to an electrode of a predetermined thickness after being polished on a back surface of the wafer. A wafer processing method for cutting a wafer by dividing a wafer.

In order to solve the above-mentioned problems of the main technology, according to the present invention, the surface of the wafer is formed on a plurality of regions which are arranged in a lattice-shaped scribe line region, and the back surface of the wafer on which the electrode connected to the device is exposed on the back surface is formed. Mounting a wafer having an electrode corresponding to the electrode, and dividing the wafer on which the wafer is mounted along a dicing street, the processing method of the wafer The method includes the following steps: a flat bonding process, bonding a surface of the flat plate to the surface of the wafer through an adhesive layer; and a back grinding process of grinding the back surface of the wafer on which the flat bonding process is performed to form the wafer to a predetermined thickness; a wafer mounting process for bonding a wafer having electrodes corresponding to electrodes exposed on the back surface of a wafer on which the back grinding process has been performed, and the electrodes; and dividing the program, the wafer mounting process is performed and the wafer is mounted on the back side The wafer is processed by the back side along the dicing street, and is divided into individual components on which the wafer is mounted; the wafer support program adheres the dicing tape to the wafer side mounted on the back side of the wafer on which the dividing process is performed and by the ring The frame supports the outer periphery of the dicing tape; and the slab stripping process detaches the slab bonded to the surface of the wafer on which the wafer support program has been implemented.

The division process is performed by cutting the cutting blade along the scribe line, thereby dividing the wafer into individual components on which the wafer is mounted.

Further, the dividing process performs laser processing by irradiating laser light along the dicing street, thereby dividing the wafer into individual components on which the wafer is mounted.

In the wafer processing method of the present invention, the surface of the flat plate is bonded to the surface of the wafer through an adhesive layer by a flat bonding process; and the back surface of the wafer is polished to form a predetermined thickness; In the wafer mounting process, a wafer having electrodes corresponding to electrodes exposed on the back surface of the wafer is bonded to the electrodes; and the dividing process is performed by dividing the wafer from the back side along the dicing street and dividing into individual wafers on which the wafer is mounted. a wafer support program that adheres a dicing tape to a wafer side mounted on the back side of the wafer and supports a peripheral portion of the dicing tape by a ring frame; and a flat stripping process that peels the flat surface bonded to the surface of the wafer, thereby Since the wafer is divided into the respective components on which the wafer is mounted in a state of being bonded to the flat surface before being bonded to the dicing tape, the problem of breakage when the dicing tape is adhered can be released.

Further, since the wafer is divided into the respective components on which the wafer is mounted in a state of being bonded to the flat plate, the Δ wafer does not scatter at the time of division, so that it is not necessary to mount a temporary component wafer, and productivity can be improved.

2‧‧‧Semiconductor wafer

2a‧‧‧ Surface of semiconductor wafer

2b‧‧‧Back of semiconductor wafer

3‧‧‧ tablet

3a‧‧‧ surface of the plate

3b‧‧‧ Back of the tablet

4‧‧‧ grinding device

5‧‧‧ wafer mounting device

6‧‧‧Cutting device

7‧‧‧ Laser processing equipment

8‧‧‧ ring frame

9‧‧‧Component separation device

21‧‧‧ cutting road

22‧‧‧ components

23, 251‧‧‧ electrodes

25‧‧‧ wafer

30‧‧‧Adhesive layer

41‧‧‧Clamping table for grinding device

42‧‧‧ grinding means

51‧‧‧Clamping station for wafer mounting device

61‧‧‧Clamping device chuck

62‧‧‧ cutting means

63‧‧‧Photographing means

71‧‧‧ collet table for laser processing equipment

72‧‧‧Laser light exposure

73‧‧‧Photographing means

80‧‧‧ cutting tape

91‧‧‧ box keeping means

92‧‧‧ Tape expansion means

93‧‧‧ Picker

201‧‧‧Cutting trench

202‧‧‧Laser processing trench

203‧‧‧Modified layer

421‧‧‧Spindle sleeve

422‧‧‧Rotating spindle

423‧‧‧Installation

424‧‧‧ grinding wheel

425‧‧‧Abutment

426‧‧‧ grinding diamonds

427‧‧‧ fastening bolts

621‧‧‧Spindle sleeve

622‧‧‧Rotating spindle

623‧‧‧Cutting inserts

721‧‧‧shell

722‧‧‧ concentrator

911‧‧‧ frame holding member

911a‧‧‧Loading surface

912‧‧‧ clamp

921‧‧‧Expanding drum

922‧‧‧Support flange

923‧‧‧ means

923a‧‧ ‧ cylinder

923b‧‧‧ piston rod

41a, 424a, 424b, 434b, 622a, 623a, X, Y, X1, X2, Z1, UV‧‧‧ UV

Z2‧‧‧ arrow

LB‧‧ pulse laser

P‧‧‧Light spot

1(a) and 1(b) are perspective views of a semiconductor wafer as a wafer divided by the wafer processing method of the present invention.

2(a) and 2(b) are explanatory views showing a flat bonding process in the method of processing a wafer of the present invention.

Fig. 3 is a perspective view of an essential part of a polishing apparatus for carrying out a back grinding process in the wafer processing method of the present invention.

Fig. 4 is an explanatory view showing a back grinding process in the wafer processing method of the present invention.

5(a) and 5(b) are explanatory views showing a wafer mounting procedure in the wafer processing method of the present invention.

6 is a cross-cutting process in a wafer processing method for implementing the present invention. A perspective view of the key part of the cutting device of the sequential cutting program.

7(a) to 7(c) are explanatory views showing a cutting program as a dividing program in the wafer processing method of the present invention.

Fig. 8 is a perspective view showing a principal part of a laser processing apparatus for performing a laser processing groove forming program and a reforming layer forming program as a dividing program in the wafer processing method of the present invention.

9(a) to 9(c) are explanatory views showing a laser processing groove forming program which is a division program in the wafer processing method of the present invention.

Figs. 10(a) to 10(c) are explanatory views showing a reforming layer forming program as a dividing program in the wafer processing method of the present invention.

Fig. 11 is an explanatory view showing a wafer support program in the wafer processing method of the present invention.

12(a) and 12(b) are explanatory views showing a flat stripping procedure in the wafer processing method of the present invention.

Figure 13 is a perspective view of a component separating device for carrying out the component separation process in the wafer processing method of the present invention.

14(a) to 14(c) are explanatory views of a component separation program in the wafer processing method of the present invention.

Detailed description of the preferred embodiment

Hereinafter, preferred embodiments of the method for processing a wafer in the present invention will be described in detail with reference to additional drawings.

1(a) and (b) are perspective views showing a semiconductor wafer processed as a wafer in accordance with the present invention. The semiconductor wafer 2 shown in FIGS. 1(a) and 1(b) is formed of a tantalum wafer having a thickness of, for example, 600 μm, and a plurality of dicing streets 21 are formed in a lattice shape on the surface 2a, and by the plurality of strips The plurality of areas partitioned by the scribe line 21 form an element 22 such as an IC or an LSI. Further, the electrode 23 connected to each element 22 is exposed on the back surface 2b of the wafer 2. However, there is also a wafer in which the electrode 23 is not exposed on the back surface 2b. Hereinafter, a wafer processing method in which a wafer to be described later is mounted on the back surface 2b of the semiconductor wafer 2 and divided into individual elements along the scribe line 21 will be described.

First, in order to protect the element 22 formed on the surface 2a of the semiconductor wafer 2, a flat bonding process of bonding the surface of the flat surface to the surface 2a of the semiconductor wafer 2 through the adhesive layer is performed. That is, as shown in FIGS. 2(a) and 2(b), the surface 3a of the flat plate 3 is bonded to the surface 2a of the semiconductor wafer 2 through the adhesive layer 30 (plate bonding process). Therefore, the flat plate 3 bonded to the surface 2a of the semiconductor wafer 2 through the adhesive layer 30 is formed in a state in which the back surface 3b is exposed. However, in the illustrated embodiment, the flat plate 3 is formed of a glass plate having a thickness of, for example, 1 mm, and the adhesive layer 30 is an adhesive which is lowered in adhesion by ultraviolet rays.

If the above-described flat bonding process has been carried out, a back surface polishing process in which the back surface 2b of the semiconductor wafer 2 is polished to form the semiconductor wafer 2 to a predetermined thickness of the element is performed. This back grinding process is carried out using the polishing apparatus 4 shown in FIG. The polishing apparatus 4 shown in FIG. 3 has a chuck table 41 for holding a workpiece, and a polishing means 42 for polishing and holding the workpiece on the chuck table 41. The chuck table 41 is configured to suck and hold the workpiece on the upper surface of the holding surface, and is rotatable in a direction indicated by an arrow 41a in Fig. 3 by a rotation driving mechanism (not shown). The polishing means 42 includes a spindle sleeve 421 that is rotatably supported by the spindle sleeve 421 and that is rotated by a rotary drive (not shown). A rotating rotating spindle 422, a mounting member 423 attached to the lower end of the rotating spindle 422, and a grinding wheel 424 mounted below the mounting member 423. The grinding wheel 424 is formed by a base 425 and a grinding stone 426 which is annularly mounted on the lower surface of the base 425. The base 425 is attached to the lower surface of the mounting member 423 by a fastening bolt 427.

The back surface polishing process is carried out by using the above-described polishing apparatus 4, and as shown in FIG. 3, the flat surface 3 side of the semiconductor wafer 2 on which the flat bonding process was performed is placed on the upper surface (holding surface) of the chuck stage 41. Then, the semiconductor wafer 2 is adsorbed and held by the chuck 3 through the flat plate 3 by a suction means (not shown) (wafer holding program). Therefore, the semiconductor wafer 2 held on the chuck stage 41 has its back surface 2b on the upper side. When the semiconductor wafer 2 is sucked and held by the flat plate 3 by the flat plate 3 as described above, the chucking table 41 is rotated by, for example, 300 rpm in the direction indicated by the arrow 41a in FIG. The wheel 424 is rotated at a direction of, for example, 6000 rpm in the direction indicated by an arrow 424a in FIG. 3, as shown in FIG. 4, the abrasive vermiculite 426 is brought into contact with the back surface 2b of the semiconductor wafer 2 which is the processed surface, and the grinding wheel 424 is as shown in FIG. In FIG. 4, as shown by an arrow 424b, a predetermined amount of grinding feed is performed downward at a grinding feed speed of, for example, 1 μm/sec (in a direction perpendicular to the holding surface of the chuck table 41). As a result, the back surface 2b of the semiconductor wafer 2 is polished and the semiconductor wafer 2 is formed to a predetermined thickness (for example, 50 μm). In this manner, the electrode 23 is not exposed on the wafer of the back surface 2b before the polishing process is performed, and the electrode 23 is exposed on the polishing back surface 2b to form the back surface 2b of the semiconductor wafer 2 having a predetermined thickness.

Next, a wafer mounting process for bonding the electrodes to mount the wafer is performed, the wafer having a back surface exposed to the wafer 2 on which the back grinding process has been performed The electrode corresponding to the electrode 23 of the face 2b. That is, as shown in FIG. 5(a), the side of the flat plate 3 bonded to the surface of the semiconductor wafer 2 on which the back grinding process has been performed is placed on the chuck stage 51 of the wafer mounting device 5, and is actuated. The attraction means (not shown) sucks and holds the semiconductor wafer 2 through the flat plate 3. Therefore, the semiconductor wafer 2 held by the flat plate 3 on the chuck table 51 has the back surface 2b as the upper side. The electrodes 25 are bonded to each other, and the wafer 25 has an electrode 251 corresponding to the electrode 23 exposed on the back surface 2b of the semiconductor wafer 2 held by the chuck table 51 through the flat plate 3. Further, as shown in FIG. 5(b), the wafer 25 is mounted corresponding to all the original members 22 formed on the semiconductor wafer 2.

When the wafer mounting process described above is carried out, a division process is performed in which the back surface 2b side of the semiconductor wafer 2 on which the wafer 25 is mounted is processed along the dicing street 21 and divided into individual elements. The first embodiment of the division program is implemented using the cutting device 6 shown in Fig. 6 . The cutting device 6 shown in FIG. 6 has a cutting table 61 that holds a workpiece, a cutting device 62 that cuts and holds a workpiece on the chuck table 61, and a workpiece that is imaged and held on the chuck table 61. Shooting means 63. The chuck table 61 is configured to be capable of sucking and holding the workpiece, and is moved in the cutting feed direction indicated by an arrow X in FIG. 6 by a cutting feed mechanism (not shown), and is not shown. The feed mechanism moves it toward the indexing feed direction indicated by the arrow Y.

The cutting means 62 includes a main sleeve 621 arranged substantially horizontally, a rotating main shaft 622 rotatably supported by the main shaft 621, and a cutting insert 623 attached to a front end of the rotating main shaft 622. The rotating main shaft 622 is formed as The servo motor (not shown) disposed in the spindle housing 621 is rotated in the direction indicated by the arrow 622a. The aforementioned photographing means 63 is installed on the main In the embodiment shown in the figure, in addition to the general imaging unit (CCD) that is imaged by visible light, the infrared ray illumination means that irradiates the workpiece with infrared rays and captures the infrared ray that is irradiated by the infrared illumination means. The optical system and the imaging component (infrared CCD) that outputs the electrical signal corresponding to the infrared light captured by the optical system are configured to send the captured image signal to a control means (not shown).

The dividing process is performed by using the cutting device 6 described above, and the side of the flat plate 3 bonded to the surface of the semiconductor wafer 2 is placed on the chuck table 61 as shown in FIG. 6, and the semiconductor is transmitted through the flat plate 3 by a suction means not shown. The wafer 2 is held on the chuck stage 61. Therefore, the semiconductor wafer 2 held by the chuck table 61 through the flat plate 3 has the upper surface 2a on which the surface 25a on which the wafer 25 is mounted. In this manner, the chuck stage 61 that sucks and holds the semiconductor wafer 2 is attached directly under the photographing means 63 by a cutting feed mechanism (not shown).

When the chuck table 61 is attached directly under the photographing means 63, a calibration procedure for detecting the cutting area of the semiconductor wafer 2 by the photographing means 63 and a control means (not shown) is performed. In other words, the imaging means 63 and the control means (not shown) perform an image corresponding to the area corresponding to the dicing street 21 formed in the predetermined direction of the semiconductor wafer 2, and the pattern for matching the pattern with the cutting blade 623. Processing, and calibration of the cutting area of the cutting insert 623 (calibration procedure) is performed. Further, the calibration of the cutting position of the cutting insert 623 is also performed in the region corresponding to the dicing street 21 formed in the direction orthogonal to the predetermined direction of the semiconductor wafer 2. At this time, the surface 2a formed by the dicing street 21 of the semiconductor wafer 2 is located on the lower side, but the imaging means 63 has an optical system capable of capturing infrared rays by means of infrared illumination as described above, and Since the imaging means constituted by the imaging part (infrared CCD) corresponding to the infrared signal is output, the cutting path 21 can be penetrated by the back surface 2b.

As described above, the detection is held on the chuck table 61 in the region corresponding to the dicing street 21 of the semiconductor wafer 2. If the calibration of the cutting field has been performed, the cutting of the chuck table 61 holding the semiconductor wafer 2 is started in the cutting field. Position moves. At this time, as shown in FIG. 7(a), the semiconductor wafer 2 is mounted such that one end of the region corresponding to the dicing street 21 to be cut (the left end of FIG. 7(a)) is positioned just below the cutting blade 623. The right side.

When the chuck table 61 is attached to the cutting start position of the cutting processing region as described above, the cutting blade 623 is cut into and out by a standby position indicated by a two-dotted line in FIG. 7(a) as indicated by an arrow Z1. And positioned at a predetermined cut-in feed position as indicated by the solid line in Fig. 7(a). This cutting-in feeding position is set to the position where the lower end of the cutting insert 623 reaches the flat plate 3 as shown in Fig. 7 (a).

Next, the cutting insert 623 is rotated at a predetermined rotational speed in the direction indicated by an arrow 623a in Fig. 7(a), and the chuck table 61 is oriented in the direction indicated by an arrow X1 in Fig. 7(a). The cutting feed speed moves. Further, if the chuck table 61 reaches the other end of the position corresponding to the cutting path 21 as shown in FIG. 7(b) (the right end of FIG. 7(b)) is located on the left side of the predetermined amount just below the cutting blade 623, then The movement of the chuck table 61 is stopped. By cutting the feed chuck stage 61 in this manner, the cutting groove 201 can be formed along the scribe line 21 as shown in Fig. 7(c) to cut the semiconductor wafer 2 (cutting process).

Next, the cutting insert 623 is raised and positioned at the standby position indicated by the dotted line at 2 o'clock as indicated by an arrow Z2 in Fig. 7(b), and the chuck table 61 is oriented as indicated by an arrow X2 in Fig. 7(b). Move in the direction and return to the position shown in Figure 7(a). Further, the chuck table 61 is fed in a direction perpendicular to the paper surface (index feeding direction) with an amount corresponding to the interval of the cutting path 21, and the area corresponding to the next cutting path 21 to be cut is to be made. It is positioned at a position corresponding to the cutting insert 623. Thus, when the region corresponding to the next cutting path 21 to be cut has been positioned at a position corresponding to the cutting insert 623, the aforementioned cutting procedure is carried out.

However, the aforementioned cutting procedure is performed under the following processing conditions, for example.

Cutting blade rotation speed: 30000rpm

Cutting feed speed: 50mm / sec

The aforementioned cutting groove forming process is performed in a region corresponding to all the dicing streets 21 formed in the semiconductor wafer 2. As a result, the semiconductor wafer 2 is divided along the dicing street 21 into the respective elements 22 on which the wafer 25 is mounted. However, since the element 22 divided into the respective elements has been bonded to the flat plate 3, the form of the semiconductor wafer 2 can be maintained.

Next, a second embodiment of the division program will be described. The second embodiment of the division program is implemented using the laser processing apparatus 7 shown in Fig. 8. The laser processing apparatus 7 shown in Fig. 8 has a laser beam irradiation means 72 for holding a workpiece chuck stage 71, irradiating a workpiece to be held on the chuck table 71, and a filming and holding means 72. A photographing means 73 of the workpiece on the headstock 71. The chuck table 71 is configured to be capable of sucking and holding the workpiece, and is formed to be moved in the processing feed direction indicated by an arrow X in FIG. 8 by a processing feed means (not shown), and is not shown. The degree feeding means moves in the indexing feeding direction indicated by an arrow Y in Fig. 8.

The aforementioned laser beam illumination means 72 comprises a substantially horizontal arrangement A cylindrical shape housing 721. A laser beam oscillating means including a pulsed laser ray oscillator (not shown) or a reverse frequency setting means is disposed in the casing 721. The front end of the casing 721 is provided with a concentrator 722 for collecting the pulsed laser light oscillated by the pulsed laser ray oscillating means. Further, the laser beam irradiation means 72 has a light collecting point position adjusting means (not shown) for adjusting the position of the light collecting point of the pulsed laser light collected by the light collector 722.

The imaging means 73 attached to the front end of the casing 721 constituting the laser beam irradiation means 72 is an infrared illumination means for irradiating the workpiece with infrared rays, in addition to a general imaging component (CCD) which is imaged by visible light. An optical system that captures infrared rays illuminated by the infrared illumination means, and an imaging component (infrared CCD) that outputs an electrical signal corresponding to the infrared light captured by the optical system, and can transmit the captured image signal to a not shown The means of control.

When the division processing is performed by the above-described laser processing apparatus 7, as shown in FIG. 8, the side of the flat plate 3 bonded to the surface of the semiconductor wafer 2 is placed on the chuck stage 71, and the suction means not shown is operated. The semiconductor wafer 2 is held on the chuck stage 71 through the flat plate 3. Therefore, the semiconductor wafer 2 held by the chuck table 71 through the flat plate 3 has the surface 2a on which the wafer 25 is mounted, and becomes the upper side. In this manner, the chuck stage 71 that sucks and holds the semiconductor wafer 2 is positioned directly below the imaging means 73 by a processing feed mechanism (not shown).

When the chuck table 71 is positioned directly below the imaging means 73, the calibration operation of the processing area of the semiconductor wafer 2 to be subjected to laser processing is detected by the imaging means 73 and a control means (not shown). That is, the photographer The segment 73 and the control means (not shown) perform image processing such as pattern matching and perform calibration (calibration procedure) of the laser beam irradiation position for performing cutting in a predetermined direction of the semiconductor wafer 2. The track 21 is aligned with the concentrator 722 of the laser beam illumination means 72 that illuminates the laser beam along the scribe line 21. Further, the alignment of the laser beam irradiation position is performed similarly to the dicing street 21 formed in the direction in which the semiconductor wafer 2 is orthogonal to the predetermined direction. At this time, although the surface 2a of the semiconductor wafer 2 on which the dicing street 21 is formed is located on the lower side, the imaging means 73 has an infrared ray illumination means, an optical system for capturing infrared rays, and an electric signal corresponding to the infrared ray as described above. Since the imaging means including the component (infrared CCD) is photographed, the scribe line 21 can be imaged by the back surface 2b side.

If the aforementioned calibration procedure is carried out, as shown in FIG. 9, the chuck table 7] is moved to the laser beam irradiation area where the concentrator 722 of the laser beam irradiation means 72 for irradiating the laser light is located, and is predetermined. The scribe line 21 is positioned directly below the concentrator 722. At this time, as shown in FIG. 9(a), the semiconductor wafer 2 is positioned such that one end of the scribe line 21 (the left end of FIG. 9(a)) is located directly under the concentrator 722. Then, as shown in FIG. 9(a), the light collecting spot P of the pulse laser LB irradiated by the concentrator 722 is focused on the vicinity of the back surface 2b (near) of the semiconductor wafer 2. Next, the semiconductor wafer 2 is irradiated with pulsed laser light having an absorption wavelength by the concentrator 722 of the laser beam irradiation means 72, and the chuck table 71 is indicated by an arrow X1 in FIG. 9(a). The direction moves at a predetermined processing feed speed. And, as shown in FIG. 9(b), when the other end of the scribe line 21 (the right end of FIG. 9(b)) reaches the position directly below the concentrator 722, the irradiation of the pulsed laser light is stopped and the chuck is stopped. The movement of the stage 71 (laser processing groove forming program).

Next, the chuck table 71 is moved in the direction perpendicular to the paper surface (the index feeding direction) so as to be just the interval between the dicing streets 21 (corresponding to the interval between the dicing streets 21). Further, while the pulsed laser beam 722 is irradiated by the concentrator 722 of the laser beam irradiation means 72, the chuck table 71 is moved at a predetermined processing feed speed in the direction indicated by an arrow X2 in FIG. 9(b). When the position shown in Fig. 7(a) is reached, the irradiation of the pulsed laser light is stopped and the movement of the chuck table 71 is stopped.

By performing the laser processing groove forming process described above, the laser processing groove 202 is formed along the scribe line 21 in the semiconductor wafer 2 as shown in FIG. 9(c). Further, by performing the laser processing groove forming process along all of the dicing streets 21 formed on the semiconductor wafer 2, the semiconductor wafer 2 is divided along the dicing street 21 into the respective elements 22 on which the wafer 25 is mounted. However, since the element 22 divided into the respective elements is bonded to the flat plate 3, the form of the semiconductor wafer 2 can be maintained.

The laser processing groove forming process described above is carried out, for example, under the following processing conditions.

Laser light wavelength: 355nm

Repeat frequency: 200kHz

Output: 1.5W

Spot spot diameter: φ 10μm

Processing feed speed: 300mm / sec

Next, another embodiment of the division program implemented by the above-described laser processing apparatus 7 will be described with reference to FIG. The second embodiment of the laser processing program can be implemented using a laser processing apparatus substantially the same as the laser processing apparatus 7. Therefore, in the second embodiment shown in FIG. 10, The same components of the laser processing apparatus 7 described above are denoted by the same reference numerals.

In the embodiment shown in Fig. 10, the above-described wafer holding program and calibration procedure are also carried out in the same manner as in the embodiment shown in Figs. 8 and 9 described above.

If the aforementioned calibration procedure is carried out, as shown in FIG. 10, the chuck stage 71 is moved to the laser beam irradiation area where the concentrator 722 of the laser beam irradiation means 72 for irradiating the laser beam is located, and the predetermined cutting is performed. The track 21 is positioned directly below the concentrator 722. At this time, the semiconductor wafer 2 shown in FIG. 10(a) is positioned such that one end of the scribe line 21 (the left end of FIG. 10(a)) is located directly under the concentrator 722. Then, as shown in FIG. 10(a), the light collecting point P of the pulsed laser beam irradiated by the concentrator 722 is positioned at the intermediate portion in the thickness direction of the semiconductor wafer 2. Next, the semiconductor wafer 2 is irradiated with pulsed laser light having a transparent wavelength by the concentrator 722 of the laser beam irradiation means 72, and the chuck table 71 is indicated by an arrow X1 in FIG. 10(a). The direction moves at a predetermined processing feed speed. Further, as shown in FIG. 10(b), when the other end of the scribe line 21 (the right end of FIG. 10(b)) reaches the position directly below the concentrator 722, the irradiation of the pulsed laser light is stopped and the chuck table is stopped. Movement of 71 (modification layer formation procedure).

Next, the chuck table 71 is moved in the direction perpendicular to the paper surface (the index feeding direction) by the interval of the dicing streets 21 (corresponding to the interval of the dicing streets 21). Further, while the laser beam 722 of the laser beam irradiation means 72 is irradiated with the laser beam, the chuck table 71 is moved at a predetermined processing feed speed in the direction indicated by an arrow X2 in FIG. 10(b), and When the position shown in Fig. 10(a) is reached, the irradiation of the pulsed laser light is stopped, and the movement of the chuck table 71 is stopped.

By performing the above-described reforming layer forming process, the modified layer 203 is formed along the scribe line 21 in the semiconductor wafer 2 as shown in FIG. 10(c). The modified layer 203 It is easily broken in a state of being melted and resolidified. Further, the reforming layer forming process is performed along all the dicing streets 21 formed on the semiconductor wafer 2. As a result, the semiconductor wafer 2 is formed to be substantially divided into the respective elements 22 on which the wafer 25 is mounted along the dicing streets 21 on which the modified layer 203 is formed.

The modified layer forming procedure is carried out, for example, under the following processing conditions.

Laser light wavelength: 1064nm

Repeat frequency: 80kHz

Output: 0.2W

Spot spot diameter: φ 1μm

Processing feed speed: 180mm / sec

The dividing tool (including the cutting program, the laser processing groove forming program, and the reforming layer forming program) is divided into the respective elements 22 on which the wafer 25 is mounted in a state where the surface 2a of the semiconductor wafer 2 is bonded to the flat plate 3, Therefore, the Δ wafer does not scatter, so that it is not necessary to mount a temporary component wafer, and productivity can be improved.

When the above-described dividing procedure is carried out, the wafer 25 attached to the back surface 2b of the semiconductor wafer 2 is adhered to the dicing tape, and the wafer support program of the peripheral portion of the dicing tape is supported by the annular frame. For example, as shown in FIG. 11, the surface of the dicing tape 80 attached to the outer peripheral portion is adhered to the side of the wafer 25 on the back surface 2b of the semiconductor wafer 2 so as to cover the inner opening portion of the annular frame 8. Therefore, the semiconductor wafer 2 adhered to the surface of the dicing tape 80, the flat plate 3 bonded to the surface 2a becomes the upper side. The dicing tape 80 is applied with an adhesive on the surface of, for example, a polyethylene film having a thickness of 100 μm. And, as shown in Figure 11, In the embodiment, the wafer 25 attached to the back surface 2b of the semiconductor wafer 2 is adhered to the surface of the dicing tape 80 attached to the outer periphery of the annular frame 8, but the wafer mounted on the back surface 2b of the semiconductor wafer 2 is shown. When the dicing tape 80 is adhered, the outer peripheral portion of the dicing tape 80 may be attached to the annular frame 8 at the same time. As described above, since the wafer support program is implemented after the above-described dividing process is performed, the problem that the semiconductor wafer 2 is damaged when it is adhered to the dicing tape can be eliminated.

Next, a flat stripping program for peeling off the flat plate 3 bonded to the front surface 2a of the semiconductor wafer 2 on which the wafer supporting program has been carried out is carried out. In the flat stripping process, as shown in FIG. 12(a), ultraviolet rays (UV) are irradiated from the back surface 3b side of the flat plate 3 bonded to the surface 2a of the semiconductor wafer 2 supported by the annular frame 8 through the dicing tape 80. As a result, since the adhesive layer 30 that bonds the surface 2a of the semiconductor wafer 2 and the surface 3a of the flat plate 3 is an adhesive which is lowered by the ultraviolet ray adhesive force, the adhesive force is lowered. Therefore, the flat plate 3 bonded to the front surface 2a of the semiconductor wafer 2 can be easily peeled off as shown in Fig. 12(b). At this time, the outer peripheral portion of the semiconductor wafer 2 on which the element 22 is not formed is removed in a state of being bonded to the flat plate 3. Therefore, the dicing tape 80 attached to the ring frame 8 is in a state in which the wafer 25 bonded to the back surface of the wafer 22 is adhered.

As described above, when the wafer support program and the flat stripping program are implemented, a component separation process is performed in which the dicing tape 80 attached to the semiconductor wafer 2 is expanded to separate the semiconductor wafer 2 along the scribe line 21 into The individual components 22 of the wafer 25 are mounted. This component separation procedure is carried out using the component separation device 9 as shown in FIG. The component separating device 9 shown in Fig. 13 has a frame holding means 91 for holding the aforementioned annular frame 8, for expansion The tape expanding means 92 attached to the dicing tape 80 held by the ring frame 8 of the frame holding means 91, and the picking chuck 93 are attached. The frame holding means 91 is formed by a plurality of clamps 912 as fixing means disposed on the outer circumference of the frame holding member 911. The mounting surface 911a on which the annular frame 8 is placed is formed on the upper surface of the frame holding member 911, and the annular frame 8 is placed on the mounting surface 911a. Further, the annular frame 8 placed on the mounting surface 911a is fixed to the frame holding member 911 by a clamp 912. The frame holding means 91 thus constructed can be supported by the tape expanding means 92 so as to be able to advance and retreat in the up and down direction.

The tape expanding means 92 has an expanding drum 921 disposed inside the annular frame holding member 911. The expansion drum 921 has an inner diameter and an outer diameter which are smaller than the inner diameter of the annular frame 8 and which are larger than the outer diameter of the semiconductor wafer 2 attached to the dicing tape 80 of the annular frame 8. Further, the expansion drum 921 has a support flange 922 at the lower end. In the embodiment shown in the drawing, the tape expanding means 92 has a supporting means 923 for supporting the annular frame holding member 911 so as to be able to advance and retreat in the vertical direction. The support means 923 is formed by a plurality of cylinders 923a disposed on the support flange 922, and the piston rod 923b is coupled to the lower surface of the annular frame holding member 911. As shown in FIG. 14(a), the support means 923 formed of the plurality of cylinders 923a moves the annular frame holding member 911 in the vertical direction to a height at which the mounting surface 911a and the upper end of the expanding drum 921 are substantially the same height. The position and the upper end of the expanding drum 921 are between the expanded positions below the predetermined amount as shown in Fig. 14(b).

The component separation procedure performed using the element separating device 9 constructed as above will be described with reference to FIG. That is, the ring frame 8 to which the dicing tape 80 to which the semiconductor wafer 2 is attached is placed as shown in FIG. 14(a). The mounting surface 911a of the frame holding member 911 of the frame holding means 91 is formed, and is fixed to the frame holding member 911 by the clamp 912 (frame holding program). At this time, the frame holding member 911 is attached to the reference position shown in FIG. 14(a). Next, the plurality of cylinders 923a as the supporting means 923 constituting the tape expanding means 92 are actuated, and the annular frame holding member 911 is lowered to the expanded position shown in Fig. 14 (b). Therefore, since the annular frame 8 fixed to the mounting surface 911a of the frame holding member 911 is also lowered, as shown in FIG. 14(b), the dicing tape 80 attached to the annular frame 8 is cut to the expansion drum. The upper edge of 921 is expanded and expanded (tape expansion procedure). As a result, since the tensile force is applied to the semiconductor wafer 2 adhered to the dicing tape 80 radially, the respective elements 22 to which the wafer 25 is mounted are separated and a space S is formed between the elements. Moreover, when the semiconductor wafer 2 adhered to the dicing tape 80 exerts a radial tensile force, the modified layer 203 formed along the scribe line 21 is broken, and the semiconductor wafer 2 is separated into the components on which the wafer 25 is mounted. 22 and a space S is formed between the elements.

Next, as shown in FIG. 14(c), the pickup unit 93 sucks the element 22 on which the wafer 25 is attached, peels it off from the dicing tape 80, picks it up, and conveys it to a tray or wafer bonding process not shown. On the other hand, in the picking up procedure, since the gap S between the respective elements 22 to which the wafer 25 adhered to the dicing tape 80 is attached is widened as described above, it can be easily picked up without coming into contact with the adjacent elements 22.

Claims (3)

A method for processing a wafer by forming a device on a plurality of regions on a surface of a scribe line segment arranged in a lattice shape, and exposing a back surface of a wafer to which an electrode connected to the device is exposed on a back surface, and mounting the electrode corresponding to the electrode a wafer having an electrode, and dividing a wafer on which the wafer is mounted along a dicing line, the wafer processing method characterized by comprising the following procedure: a slab bonding process, bonding the surface of the slab to the wafer through an adhesive layer a surface; a back grinding process for polishing a back surface of a wafer on which the flat bonding process has been performed to form a wafer to a predetermined thickness; and a wafer mounting process having an electrode with a surface exposed on a wafer on which the back grinding process has been performed a corresponding electrode is bonded to the electrodes to mount the wafer; and a dividing process is performed on the wafer on which the wafer is mounted on the back surface by the wafer mounting process, and the wafer is processed along the dicing street to be divided into components on which the wafer is mounted. a wafer support program for adhering the dicing tape to the wafer side mounted on the back side of the wafer on which the dicing process is performed, Dicing tape-shaped frame supports the outside peripheral portion; and a plate release procedure, the embodiment has been bonded to the flat surface of the wafer peeling the wafer support Procedure. The method for processing a wafer according to claim 1, wherein the dividing process is performed by cutting a cutting blade along a cutting pass, thereby dividing the wafer Cut into the components that are mounted with the wafer. The wafer processing method according to claim 1, wherein the laser processing is performed by irradiating the laser light along the dicing street, thereby dividing the wafer into individual components on which the wafer is mounted.