TWI662594B - Flexible substrate and circuit structure and method of manufacturing the same - Google Patents
Flexible substrate and circuit structure and method of manufacturing the same Download PDFInfo
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- TWI662594B TWI662594B TW107128592A TW107128592A TWI662594B TW I662594 B TWI662594 B TW I662594B TW 107128592 A TW107128592 A TW 107128592A TW 107128592 A TW107128592 A TW 107128592A TW I662594 B TWI662594 B TW I662594B
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- 239000000758 substrate Substances 0.000 title claims abstract description 53
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 41
- 229920000307 polymer substrate Polymers 0.000 claims abstract description 87
- 238000000034 method Methods 0.000 claims abstract description 44
- 239000002861 polymer material Substances 0.000 claims abstract description 31
- 235000012431 wafers Nutrition 0.000 claims description 118
- 239000004065 semiconductor Substances 0.000 claims description 51
- 239000000463 material Substances 0.000 claims description 13
- 230000017105 transposition Effects 0.000 claims description 8
- 239000004642 Polyimide Substances 0.000 claims description 3
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 3
- 229920002803 thermoplastic polyurethane Polymers 0.000 claims description 3
- -1 polydimethylsiloxane Polymers 0.000 claims description 2
- 229920000642 polymer Polymers 0.000 claims description 2
- 239000004814 polyurethane Substances 0.000 claims description 2
- 239000004433 Thermoplastic polyurethane Substances 0.000 claims 1
- 229920002635 polyurethane Polymers 0.000 claims 1
- 229920006259 thermoplastic polyimide Polymers 0.000 claims 1
- 238000007650 screen-printing Methods 0.000 description 9
- 238000006073 displacement reaction Methods 0.000 description 4
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 2
- 238000001723 curing Methods 0.000 description 2
- 239000003292 glue Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000009969 flowable effect Effects 0.000 description 1
- 239000000499 gel Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- Microelectronics & Electronic Packaging (AREA)
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Abstract
一種軟性基板及線路結構的製造方法,其步驟如下。於載體上形成離形層。將至少一晶片配置在離形層上。注入高分子材料,以至少覆蓋至少一晶片的部分側壁。將高分子材料固化為高分子基板。分離高分子基板與離形層,其中至少一晶片嵌入高分子基板中。於高分子基板的第一表面上形成第一線路結構,第一線路結構與至少一晶片的第一接墊電性連接。A method for manufacturing a flexible substrate and a circuit structure includes the following steps. A release layer is formed on the carrier. At least one wafer is disposed on the release layer. A polymer material is injected to cover at least part of the sidewall of at least one wafer. The polymer material is cured into a polymer substrate. The polymer substrate and the release layer are separated, and at least one wafer is embedded in the polymer substrate. A first circuit structure is formed on the first surface of the polymer substrate, and the first circuit structure is electrically connected to the first pad of at least one wafer.
Description
本發明是有關於一種軟性基板及線路結構及其製造方法。The invention relates to a flexible substrate, a circuit structure and a manufacturing method thereof.
隨著半導體技術日益進步,發光二極體(light emitting diode,LED)的發光亮度與發光效率大幅地提升。因此,發光二極體顯示器已逐漸取代傳統的顯示器而成為新一代的照明元件,其廣泛地應用在例如家用照明裝置、汽車照明裝置、手持照明裝置、液晶面板背光源、交通號誌指示燈、指示或廣告看板等照明應用上。With the advancement of semiconductor technology, the brightness and efficiency of light emitting diodes (LEDs) have been greatly improved. Therefore, light-emitting diode displays have gradually replaced traditional displays and become a new generation of lighting elements, which are widely used in, for example, home lighting devices, automotive lighting devices, handheld lighting devices, LCD panel backlights, traffic signal indicators, For lighting applications such as signs or advertising boards.
然而,在一般發光二極體晶片打件時,容易因線路板不平整而造成晶片位移(shift)、晶片旋轉(rotate)的問題,或者是在一般發光二極體顯示器的轉置製程時容易發生晶片偏移問題。如何解決上述晶片位移、旋轉或是偏移問題將成為未來重要的一門課題。However, in the case of general light-emitting diode wafers, it is easy to cause problems such as wafer shift and wafer rotation due to the unevenness of the circuit board, or it is easy during the transpose process of general light-emitting diode displays. A wafer offset problem has occurred. How to solve the above problems of wafer displacement, rotation or offset will become an important subject in the future.
本發明提供一種軟性基板及線路結構及其製造方法,其可製造出可撓性或具有拉伸性的線路基板結構,並解決晶片打件時因線路板不平整所造成的晶片位移、晶片旋轉的問題或改善一般發光二極體顯示器之轉置製程時的晶片偏移問題。The invention provides a flexible substrate and a circuit structure and a manufacturing method thereof, which can manufacture a flexible or stretchable circuit substrate structure, and solve the wafer displacement and wafer rotation caused by the unevenness of the circuit board when the wafer is punched. Or improve the problem of chip shift during the transpose process of general light emitting diode displays.
本發明提供一種軟性基板及線路結構的製造方法,其步驟如下。於載體上形成離形層。將至少一晶片配置在離形層上。注入高分子材料,以至少覆蓋至少一晶片的部分側壁。將高分子材料固化為高分子基板。分離高分子基板與離形層,其中至少一晶片嵌入高分子基板中。於高分子基板的第一表面上形成第一線路結構,第一線路結構與至少一晶片的第一接墊電性連接。The invention provides a method for manufacturing a flexible substrate and a circuit structure. The steps are as follows. A release layer is formed on the carrier. At least one wafer is disposed on the release layer. A polymer material is injected to cover at least part of the sidewall of at least one wafer. The polymer material is cured into a polymer substrate. The polymer substrate and the release layer are separated, and at least one wafer is embedded in the polymer substrate. A first circuit structure is formed on the first surface of the polymer substrate, and the first circuit structure is electrically connected to the first pad of at least one wafer.
本發明提供一種軟性基板及線路結構,包括高分子基板、多個發光元件晶片以及第一線路結構。高分子基板具有相對的第一表面與第二表面。多個發光元件晶片嵌入高分子基板中。第一線路結構配置於高分子基板的第一表面上。各發光元件晶片中的第一接墊或第二接墊與高分子基板的第一表面共平面。The invention provides a flexible substrate and a circuit structure, including a polymer substrate, a plurality of light-emitting element wafers, and a first circuit structure. The polymer substrate has a first surface and a second surface opposite to each other. A plurality of light-emitting element wafers are embedded in a polymer substrate. The first circuit structure is disposed on the first surface of the polymer substrate. The first pad or the second pad in each light-emitting element wafer is coplanar with the first surface of the polymer substrate.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above features and advantages of the present invention more comprehensible, embodiments are hereinafter described in detail with reference to the accompanying drawings.
參照本實施例之圖式以更全面地闡述本發明。然而,本發明亦可以各種不同的形式體現,而不應限於本文中所述之實施例。圖式中的層與區域的厚度會為了清楚起見而放大。相同或相似之標號表示相同或相似之元件,以下段落將不再一一贅述。The invention is explained more fully with reference to the drawings of this embodiment. However, the present invention may be embodied in various forms and should not be limited to the embodiments described herein. The thicknesses of layers and regions in the drawings are exaggerated for clarity. The same or similar reference numerals indicate the same or similar elements, and the following paragraphs will not repeat them one by one.
圖1A至圖1E是依照本發明的第一實施例的一種軟性基板及線路結構的製造流程的立體示意圖。本實施例提供一種軟性基板及線路結構的製造方法,其以晶片優先模封方式將晶片100嵌入高分子基板108中,詳細步驟如下。1A to 1E are schematic perspective views of a manufacturing process of a flexible substrate and a circuit structure according to a first embodiment of the present invention. This embodiment provides a method for manufacturing a flexible substrate and a circuit structure, in which the wafer 100 is embedded in the polymer substrate 108 in a wafer priority molding method. The detailed steps are as follows.
請參照圖1A,首先,於載體102上形成離形層104。在一實施例中,載體102的材料可以是玻璃、石英、金屬、陶瓷或其它合適的材料。在一些實施例中,離形層104的材料可以是聚合物、有機材料、無機材料或其組合。在其他實施例中,離形層104可包括固態、液態或是凝膠態。Referring to FIG. 1A, first, a release layer 104 is formed on a carrier 102. In an embodiment, the material of the carrier 102 may be glass, quartz, metal, ceramic or other suitable materials. In some embodiments, the material of the release layer 104 may be a polymer, an organic material, an inorganic material, or a combination thereof. In other embodiments, the release layer 104 may include a solid, liquid, or gel state.
請參照圖1B,藉由轉置法將多個晶片100配置在離形層104上。在一實施例中,所述轉置法包括靜電方式、真空吸取方式、機械手臂取放(pick and place)方式、晶圓對晶圓接合(wafer to wafer bonding)方式或黏取方式。但本發明不以此為限,只要是能將晶片100配置在離形層104上的任何轉置方式皆為本發明的範疇。在一實施例中,晶片100可以是長、寬、高皆小於1毫米(mm)的微發光二極體。由於晶片100的體積小,在轉置時容易位移或旋轉,因此離形層104可用以將晶片100暫時固定或貼附在載體102上,而改善產生位移或旋轉的現象。在一些實施例中,離形層104的材料包括具有暫時固定特性的材料。另外,晶片100的數量、功能以及配置可依實際需求來進行調整。舉例來說,圖1B中的單一個晶片100可以是發出單色的發光二極體。另一方面,圖1B中的單一個晶片100可包括將紅色發光二極體、藍色發光二極體以及綠色發光二極體整合在一模組中。在一些實施例中,晶片100可例如是發光元件晶片、主動元件晶片、被動元件晶片或其組合。在替代實施例中,各個晶片100可以是具有相同功能的晶片或是具有不同功能的晶片。Referring to FIG. 1B, a plurality of wafers 100 are disposed on the release layer 104 by a transposition method. In an embodiment, the transposition method includes an electrostatic method, a vacuum suction method, a pick and place method, a wafer to wafer bonding method, or a sticking method. However, the present invention is not limited to this, as long as any transposition method capable of disposing the wafer 100 on the release layer 104 is within the scope of the present invention. In one embodiment, the wafer 100 may be a micro-emitting diode having a length, a width, and a height of less than 1 millimeter (mm). Because the wafer 100 has a small volume and is easily displaced or rotated during transposition, the release layer 104 can be used to temporarily fix or attach the wafer 100 to the carrier 102 to improve the phenomenon of displacement or rotation. In some embodiments, the material of the release layer 104 includes a material having temporary fixing characteristics. In addition, the number, function, and configuration of the chips 100 can be adjusted according to actual needs. For example, the single wafer 100 in FIG. 1B may be a light-emitting diode that emits a single color. On the other hand, a single wafer 100 in FIG. 1B may include integrating a red light emitting diode, a blue light emitting diode, and a green light emitting diode into a module. In some embodiments, the wafer 100 may be, for example, a light emitting device wafer, an active device wafer, a passive device wafer, or a combination thereof. In alternative embodiments, each wafer 100 may be a wafer having the same function or a wafer having a different function.
請參照圖1C與圖1D,在將晶片100配置在離形層104上之後,注入高分子材料106,以覆蓋晶片100。在一實施例中,高分子材料106包括聚二甲基矽氧烷(Polydimethylsiloxane,PDMS)、聚氨酯(Polyurethane,PU)、熱可塑性聚氨酯(Thermoplastic Urethane,TPU)、聚亞醯胺(Polyimide,PI)或其組合。Referring to FIGS. 1C and 1D, after the wafer 100 is disposed on the release layer 104, a polymer material 106 is injected to cover the wafer 100. In one embodiment, the polymer material 106 includes Polydimethylsiloxane (PDMS), Polyurethane (PU), Thermoplastic Urethane (TPU), and Polyimide (PI). Or a combination.
請參照圖1D,將高分子材料106固化為高分子基板108。此時,高分子基板108的第一表面108a朝向且接觸離形層104。在一實施例中,所述固化步驟例如採用加溫成膜處理,舉例來說藉由將高分子材料106加熱至60℃至220℃之間,以使高分子材料106固化或成膜。但本發明不以此為限,在其他實施例中,依據高分子材料106的種類不同,所述固化的方式或溫度也有所不同。Referring to FIG. 1D, the polymer material 106 is cured into a polymer substrate 108. At this time, the first surface 108 a of the polymer substrate 108 faces and contacts the release layer 104. In an embodiment, the curing step is, for example, a heating film-forming treatment, for example, the polymer material 106 is heated to a temperature between 60 ° C. and 220 ° C. to cure or form the polymer material 106. However, the present invention is not limited to this. In other embodiments, the curing method or temperature is different according to the type of the polymer material 106.
請參照圖1D與圖1E,分離高分子基板108與離形層104。具體來說,可藉由物理性脫模(mechanical debond)、雷射脫模(laser debond)或變溫脫模(heating or cooling debond)的方式將高分子基板108與離形層104(或載體102)分開或分離。在此情況下,可將高分子基板108上下翻轉,使得高分子基板108的第一表面108a朝上,如圖1E所示,晶片100嵌入於高分子基板108中,且晶片100的至少一接墊(如圖2B所示的接墊208、210)外露於高分子基板108。某種程度來說,各個晶片100的所述至少一接墊可視為共平面,其便於進行後續網印步驟(screen printing)110,以更進一步地提高軟性基板及線路結構的良率。1D and FIG. 1E, the polymer substrate 108 and the release layer 104 are separated. Specifically, the polymer substrate 108 and the release layer 104 (or the carrier 102) can be mechanically debond, laser debond, or heating or cooling debond. ) Separate or separate. In this case, the polymer substrate 108 may be turned upside down so that the first surface 108a of the polymer substrate 108 faces upward. As shown in FIG. 1E, the wafer 100 is embedded in the polymer substrate 108, and at least one of the wafers 100 is connected. The pads (such as the pads 208 and 210 shown in FIG. 2B) are exposed on the polymer substrate 108. To some extent, the at least one pad of each wafer 100 can be considered as a coplanar plane, which facilitates subsequent screen printing 110 to further improve the yield of the flexible substrate and the circuit structure.
接著,進行網印步驟110,以將第一線路結構112(如圖2F所示)形成在高分子基板108的表面上。在一實施例中,網印步驟110使用可拉伸性的導電銀膠與絕緣膠間隔設置,來印刷出所需多層不同輸入訊號的導電線路,但本發明不以此為限。在本實施例中,將晶片100嵌入至高分子基板108之後再形成第一線路結構112的步驟可固定晶片100的位置,並使得晶片100的所述至少一接墊共平面,以利於網印步驟110。詳細地說,在本實施例中,將晶片100轉置至離形層104上,再注入高分子材料106的步驟可減少高分子基板108與嵌入高分子基板108中的晶片100之間的高度差,進而解決因晶片表面或擺放不平整使得後續線路結構與晶片產生電性連接偏移的問題。也就是說,以本實施例的製造方法所製造的軟性基板及線路結構的良率可獲得改善。Next, a screen printing step 110 is performed to form a first circuit structure 112 (as shown in FIG. 2F) on the surface of the polymer substrate 108. In one embodiment, the screen printing step 110 uses the stretchable conductive silver glue and the insulation glue to be spaced apart to print the required multiple layers of different input signal conductive lines, but the invention is not limited thereto. In this embodiment, the step of forming the first circuit structure 112 after the wafer 100 is embedded in the polymer substrate 108 can fix the position of the wafer 100 and make the at least one pad of the wafer 100 coplanar to facilitate the screen printing step. 110. In detail, in this embodiment, the step of transposing the wafer 100 onto the release layer 104 and then injecting the polymer material 106 can reduce the height between the polymer substrate 108 and the wafer 100 embedded in the polymer substrate 108. Poor, thereby solving the problem that the subsequent circuit structure and the chip have an electrical connection offset due to unevenness of the surface or placement of the chip. That is, the yield of the flexible substrate and the circuit structure manufactured by the manufacturing method of this embodiment can be improved.
此外,在分離高分子基板108與離形層104之後且進行網印步驟110之前,可選擇性地清除殘留在高分子基板108上的離形層104。在一實施例中,可藉由離子轟擊的方式或是溶液(例如是酒精、丙酮或甲苯)清洗的方式來清除殘留在高分子基板108上的離形層104,以使高分子基板108上的離形層104減少殘留。In addition, after the polymer substrate 108 is separated from the release layer 104 and before the screen printing step 110 is performed, the release layer 104 remaining on the polymer substrate 108 may be selectively removed. In one embodiment, the release layer 104 remaining on the polymer substrate 108 can be removed by ion bombardment or cleaning with a solution (such as alcohol, acetone, or toluene), so that the polymer substrate 108 can be removed. The release layer 104 reduces residue.
圖2A至圖2F是依照本發明的第二實施例的一種軟性基板及線路結構的製造流程的剖面示意圖。2A to 2F are schematic cross-sectional views illustrating a manufacturing process of a flexible substrate and a circuit structure according to a second embodiment of the present invention.
請參照圖2A與圖2B,第二實施例的軟性基板及線路結構的製造流程與第一實施例的軟性基板及線路結構的製造流程基本上相似,也就是說,圖2A與圖1A相同且已於上述段落說明過,於此便不再贅述。第二實施例的軟性基板及線路結構的製造流程是以發光元件晶片200為例來進行說明。在本實施例中,發光元件晶片200可以是水平式發光二極體。如圖2B的放大圖所示,發光元件晶片200包括第一半導體層202、發光層204、第二半導體層206、第一接墊208以及第二接墊210。發光層204形成於第一半導體層202上。第二半導體層206形成於發光層204上。第一接墊208形成於第一半導體層202上。第二接墊210形成於第二半導體層206上。另外,還包括絕緣材料(未繪示)環繞發光元件晶片200的外緣來保護發光元件晶片200。Please refer to FIG. 2A and FIG. 2B. The manufacturing process of the flexible substrate and circuit structure of the second embodiment is basically similar to the manufacturing process of the flexible substrate and circuit structure of the first embodiment. That is, FIG. It has been described in the above paragraphs, and will not be repeated here. The manufacturing process of the flexible substrate and wiring structure of the second embodiment is described by taking the light-emitting element wafer 200 as an example. In this embodiment, the light-emitting element wafer 200 may be a horizontal light-emitting diode. As shown in the enlarged view of FIG. 2B, the light-emitting element wafer 200 includes a first semiconductor layer 202, a light-emitting layer 204, a second semiconductor layer 206, a first pad 208, and a second pad 210. The light emitting layer 204 is formed on the first semiconductor layer 202. The second semiconductor layer 206 is formed on the light emitting layer 204. The first pad 208 is formed on the first semiconductor layer 202. The second pad 210 is formed on the second semiconductor layer 206. In addition, an insulating material (not shown) is provided around the outer edge of the light-emitting element wafer 200 to protect the light-emitting element wafer 200.
詳細地說,發光元件晶片200(以下簡稱為晶片200)的製造方法如下。首先,於磊晶基板(未繪示)上依序形成第一半導體層202、發光層204以及第二半導體層206。在一實施例中,第一半導體層202的導電型與第二半導體層206的導電型不同。舉例來說,第一半導體層202可以是N型半導體材料,第二半導體層206可以是P型半導體材料;反之亦然。在一些實施例中,發光層204的材料可例如是多重量子井發光材料。然後,移除部分第二半導體層206與部分發光層204,以暴露出第一半導體層202的部分表面。接著,將第一接墊208形成在第一半導體層202的部分表面上,並將第二接墊210形成在第二半導體層206的表面上。在一實施例中,第一接墊208與第二接墊210可以是相同材料,例如是導電材料。在本實施例中,第二接墊210高於第一接墊208,且第一接墊208的頂面208t與第二接墊210的頂面210t之間具有一高度差H1。在一實施例中,高度差H1約為1微米(μm),但不以此為限。Specifically, a method of manufacturing the light-emitting element wafer 200 (hereinafter simply referred to as the wafer 200) is as follows. First, a first semiconductor layer 202, a light emitting layer 204, and a second semiconductor layer 206 are sequentially formed on an epitaxial substrate (not shown). In one embodiment, the conductivity type of the first semiconductor layer 202 is different from that of the second semiconductor layer 206. For example, the first semiconductor layer 202 may be an N-type semiconductor material, and the second semiconductor layer 206 may be a P-type semiconductor material; and vice versa. In some embodiments, the material of the light emitting layer 204 may be, for example, a multiple quantum well light emitting material. Then, a part of the second semiconductor layer 206 and a part of the light emitting layer 204 are removed to expose a part of the surface of the first semiconductor layer 202. Next, a first pad 208 is formed on a part of the surface of the first semiconductor layer 202, and a second pad 210 is formed on the surface of the second semiconductor layer 206. In one embodiment, the first pad 208 and the second pad 210 may be the same material, such as a conductive material. In this embodiment, the second pad 210 is higher than the first pad 208, and there is a height difference H1 between the top surface 208t of the first pad 208 and the top surface 210t of the second pad 210. In one embodiment, the height difference H1 is about 1 micrometer (μm), but not limited thereto.
如圖2B所示,藉由轉置法將多個晶片200配置在離形層104上。詳細地說,先將晶片200上下翻轉,使得第一接墊208的頂面208t與第二接墊210的頂面210t朝向離形層104。在一實施例中,第二接墊210的頂面210t抵靠或接觸離形層104,而第一接墊208的頂面208t與離形層104相隔一距離。上述步驟可視為是以接墊朝下(pad-down)的方式來配置晶片200於離形層104上。雖然圖2B僅繪示出3個晶片200,但本發明不以此為限。在其他實施例中,晶片200數量與配置可依需求來調整。在替代實施例中,晶片200可排列成陣列。As shown in FIG. 2B, a plurality of wafers 200 are disposed on the release layer 104 by a transposition method. In detail, first, the wafer 200 is turned upside down so that the top surface 208t of the first pad 208 and the top surface 210t of the second pad 210 face the release layer 104. In one embodiment, the top surface 210t of the second pad 210 abuts or contacts the release layer 104, and the top surface 208t of the first pad 208 is separated from the release layer 104 by a distance. The above steps can be considered as a method of disposing the wafer 200 on the release layer 104 in a pad-down manner. Although FIG. 2B shows only three wafers 200, the present invention is not limited thereto. In other embodiments, the number and configuration of the wafers 200 can be adjusted as required. In alternative embodiments, the wafers 200 may be arranged in an array.
請參照圖2C,在將晶片200配置在離形層104上之後,注入高分子材料106,以包覆晶片200的表面。具體來說,由於高分子材料106為可流動性材料,因此,高分子材料106不僅覆蓋晶片200的側壁200s與上表面200t,還填入第一接墊208的頂面208t與離形層104之間的空間105中。Referring to FIG. 2C, after the wafer 200 is disposed on the release layer 104, a polymer material 106 is injected to cover the surface of the wafer 200. Specifically, since the polymer material 106 is a flowable material, the polymer material 106 not only covers the side walls 200s and the upper surface 200t of the wafer 200, but also fills the top surface 208t of the first pad 208 and the release layer 104. In the space 105.
請參照圖2C與圖2D,將高分子材料106固化為高分子基板108,且分離高分子基板108與離形層104。在此情況下,如圖2D所示,將高分子基板108上下翻轉,使得第一接墊208的頂面208t與第二接墊210的頂面210t朝上。晶片200嵌入於高分子基板108中,且第二接墊210的頂面210t外露於高分子基板108的第一表面108a。在本實施例中,晶片200的第二接墊210的頂面210t與高分子基板108的第一表面108a共平面。在一實施例中,高分子基板108的厚度H2可以是1微米至2000微米。相較於高分子基板108的厚度H2,第一接墊208的頂面208t與第二接墊210的頂面210t之間約為1微米的高度差H1可視為共平面。在替代實施例中,第一接墊208的頂面208t與第二接墊210的頂面210t皆與高分子基板108的第一表面108a共平面。2C and 2D, the polymer material 106 is cured into a polymer substrate 108, and the polymer substrate 108 and the release layer 104 are separated. In this case, as shown in FIG. 2D, the polymer substrate 108 is turned upside down so that the top surface 208t of the first pad 208 and the top surface 210t of the second pad 210 face upward. The wafer 200 is embedded in the polymer substrate 108, and the top surface 210 t of the second pad 210 is exposed on the first surface 108 a of the polymer substrate 108. In this embodiment, the top surface 210t of the second pad 210 of the wafer 200 is coplanar with the first surface 108a of the polymer substrate 108. In one embodiment, the thickness H2 of the polymer substrate 108 may be 1 micrometer to 2000 micrometers. Compared to the thickness H2 of the polymer substrate 108, a height difference H1 of about 1 micrometer between the top surface 208t of the first pad 208 and the top surface 210t of the second pad 210 can be considered as a coplanar plane. In an alternative embodiment, the top surface 208t of the first pad 208 and the top surface 210t of the second pad 210 are both coplanar with the first surface 108a of the polymer substrate 108.
請參照圖2D與圖2E,移除高分子基板108的一部分,以形成開口109。開口109自高分子基板108的第一表面108a向下延伸,並暴露出晶片200的第一接墊208的頂面208t。在一實施例中,形成開口109的方式可包括(但不限於)微影製程與蝕刻製程。Referring to FIG. 2D and FIG. 2E, a part of the polymer substrate 108 is removed to form an opening 109. The opening 109 extends downward from the first surface 108 a of the polymer substrate 108 and exposes a top surface 208 t of the first pad 208 of the wafer 200. In one embodiment, the method for forming the opening 109 may include, but is not limited to, a lithography process and an etching process.
請參照圖2E與圖2F,接著,進行網印步驟,以於高分子基板108的第一表面108a上形成第一線路結構112。具體來說,第一線路結構112包括導電層114、118、120與絕緣層116。導電層114形成於第二接墊210的頂面210t上,以與第二接墊210電性連接。導電層118形成於導電層114上方。絕緣層116形成於導電層114、118之間,以電性絕緣導電層114、118。導電層120填入開口109中且延伸覆蓋配置高分子基板108的部分第一表面108a,以與第一接墊208電性連接。在一實施例中,導電層114與導電層120可依序形成,而導電層118與導電層120可同時形成。形成第一線路結構112之後,本實施例之內嵌晶片200的軟性基板及線路結構便已製造完成。在一些實施例中,內嵌晶片200的軟性基板及線路結構可視為一種發光二極體顯示器,例如是交通號誌指示燈、透明可撓面板、指示或廣告看板等。Please refer to FIG. 2E and FIG. 2F. Next, a screen printing step is performed to form a first circuit structure 112 on the first surface 108a of the polymer substrate 108. Specifically, the first circuit structure 112 includes conductive layers 114, 118, and 120 and an insulating layer 116. The conductive layer 114 is formed on the top surface 210 t of the second pad 210 to be electrically connected to the second pad 210. The conductive layer 118 is formed over the conductive layer 114. The insulating layer 116 is formed between the conductive layers 114 and 118 to electrically insulate the conductive layers 114 and 118. The conductive layer 120 is filled in the opening 109 and extends to cover a portion of the first surface 108 a on which the polymer substrate 108 is disposed, so as to be electrically connected to the first pad 208. In one embodiment, the conductive layer 114 and the conductive layer 120 may be sequentially formed, and the conductive layer 118 and the conductive layer 120 may be formed simultaneously. After the first circuit structure 112 is formed, the flexible substrate and the circuit structure of the embedded wafer 200 in this embodiment have been manufactured. In some embodiments, the flexible substrate and circuit structure of the embedded chip 200 can be regarded as a light emitting diode display, such as a traffic light indicator, a transparent flexible panel, a sign or an advertising sign.
圖3A至圖3E是依照本發明的第三實施例的一種軟性基板及線路結構的製造流程的剖面示意圖。3A to 3E are schematic cross-sectional views illustrating a manufacturing process of a flexible substrate and a circuit structure according to a third embodiment of the present invention.
請參照圖3A與圖3B,第三實施例的軟性基板及線路結構的製造流程與第一實施例的軟性基板及線路結構的製造流程基本上相似,也就是說,圖3A與圖1A相同且已於上述段落說明過,於此便不再贅述。第三實施例的軟性基板及線路結構的製造流程是以發光元件晶片200為例來進行說明。在本實施例中,發光元件晶片200可以是水平式發光二極體。Please refer to FIGS. 3A and 3B. The manufacturing process of the flexible substrate and circuit structure of the third embodiment is basically similar to the manufacturing process of the flexible substrate and circuit structure of the first embodiment, that is, FIG. 3A is the same as FIG. 1A and It has been described in the above paragraphs, and will not be repeated here. The manufacturing process of the flexible substrate and wiring structure of the third embodiment is described by taking the light-emitting element wafer 200 as an example. In this embodiment, the light-emitting element wafer 200 may be a horizontal light-emitting diode.
詳細地說,如圖3B所示,藉由轉置法將晶片200配置在離形層104上的步驟包括:使得第一接墊208的頂面208t與第二接墊210的頂面210t背離離形層104。在一實施例中,晶片200的第一半導體層202的背面202b抵靠或接觸離形層104。上述步驟可視為是以接墊朝上(pad-up)的方式來配置晶片200於離形層104上。In detail, as shown in FIG. 3B, the step of disposing the wafer 200 on the release layer 104 by the transposition method includes: making the top surface 208t of the first pad 208 and the top surface 210t of the second pad 210 face away from each other. Shed layer 104. In one embodiment, the back surface 202 b of the first semiconductor layer 202 of the wafer 200 abuts or contacts the release layer 104. The above steps can be regarded as the pad-up configuration of the wafer 200 on the release layer 104.
請參照圖3C,在將晶片200配置在離形層104上之後,注入高分子材料106,以覆蓋晶片200的部分側壁200s。在一實施例中,高分子材料106的厚度T1小於或等於晶片200的厚度T2。在替代實施例中,高分子材料106至少覆蓋晶片200的側壁200s的高度的三分之一。也就是說,高分子材料106的厚度T1可大於或等於晶片200的厚度T2的三分之一。在此情況下,如圖3C所示,第一接墊208的頂面208t與第二接墊210的頂面210t外露於高分子材料106。Referring to FIG. 3C, after the wafer 200 is disposed on the release layer 104, a polymer material 106 is injected to cover a part of the sidewall 200s of the wafer 200. In one embodiment, the thickness T1 of the polymer material 106 is less than or equal to the thickness T2 of the wafer 200. In an alternative embodiment, the polymer material 106 covers at least one third of the height of the sidewall 200s of the wafer 200. That is, the thickness T1 of the polymer material 106 may be greater than or equal to one third of the thickness T2 of the wafer 200. In this case, as shown in FIG. 3C, the top surface 208 t of the first pad 208 and the top surface 210 t of the second pad 210 are exposed to the polymer material 106.
請參照圖3C與圖3D,將高分子材料106固化為高分子基板108,且分離高分子基板108與離形層104。此情況下,如圖3D所示,晶片200嵌入高分子基板108中,且第一接墊208的頂面208t與第二接墊210的頂面210t外露於高分子基板108的第一表面108a。在一實施例中,晶片200的第一半導體層202的背面202b與高分子基板108的第二表面108b共平面。在替代實施例中,晶片200的第一接墊208的頂面208t與高分子基板108的第一表面108a共平面。3C and 3D, the polymer material 106 is cured into a polymer substrate 108, and the polymer substrate 108 and the release layer 104 are separated. In this case, as shown in FIG. 3D, the wafer 200 is embedded in the polymer substrate 108, and the top surface 208t of the first pad 208 and the top surface 210t of the second pad 210 are exposed on the first surface 108a of the polymer substrate 108. . In one embodiment, the back surface 202 b of the first semiconductor layer 202 of the wafer 200 is coplanar with the second surface 108 b of the polymer substrate 108. In an alternative embodiment, the top surface 208 t of the first pad 208 of the wafer 200 is coplanar with the first surface 108 a of the polymer substrate 108.
請參照圖3D與圖3E,進行網印步驟,以於高分子基板108的第一表面108a上形成第一線路結構212。舉例來說,第一線路結構212包括導電層214、218、220與絕緣層216。導電層214形成於第一接墊208的頂面208t上,以與第一接墊208電性連接。導電層218形成於導電層214上方。絕緣層216形成於導電層214、218之間,以電性絕緣導電層214、218。導電層220形成第二接墊210的頂面210t上,以與第二接墊210電性連接。在一實施例中,導電層214與導電層220可依序形成,而導電層218與導電層220可同時形成。Referring to FIGS. 3D and 3E, a screen printing step is performed to form a first circuit structure 212 on the first surface 108 a of the polymer substrate 108. For example, the first circuit structure 212 includes conductive layers 214, 218, 220 and an insulating layer 216. The conductive layer 214 is formed on the top surface 208 t of the first pad 208 to be electrically connected to the first pad 208. The conductive layer 218 is formed over the conductive layer 214. The insulating layer 216 is formed between the conductive layers 214 and 218 to electrically insulate the conductive layers 214 and 218. The conductive layer 220 is formed on the top surface 210 t of the second pad 210 to be electrically connected to the second pad 210. In one embodiment, the conductive layer 214 and the conductive layer 220 may be sequentially formed, and the conductive layer 218 and the conductive layer 220 may be formed simultaneously.
圖4是依照本發明的第四實施例的一種軟性基板及線路結構的剖面示意圖。4 is a schematic cross-sectional view of a flexible substrate and a circuit structure according to a fourth embodiment of the present invention.
請參照圖4,第四實施例的軟性基板及線路結構與第三實施例的軟性基板及線路結構基本上相似。上述兩者不同之處在於,第四實施例的軟性基板及線路結構所內嵌的晶片300為垂直式發光二極體。具體來說,發光元件晶片300包括第一半導體層202、發光層204、第二半導體層206、第一接墊208以及第二接墊210。發光層204形成於第一半導體層202與第二半導體層206之間。第一接墊208形成於第一半導體層202上,遠離發光層204的一側。第二接墊210形成於第二半導體層206上,遠離發光層204的另一側。在本實施例中,第一接墊208的頂面208t朝上,第二接墊210的頂面210t朝下。Referring to FIG. 4, the flexible substrate and circuit structure of the fourth embodiment are basically similar to the flexible substrate and circuit structure of the third embodiment. The above two are different in that the wafer 300 embedded in the flexible substrate and the circuit structure of the fourth embodiment is a vertical light emitting diode. Specifically, the light emitting element wafer 300 includes a first semiconductor layer 202, a light emitting layer 204, a second semiconductor layer 206, a first pad 208, and a second pad 210. The light emitting layer 204 is formed between the first semiconductor layer 202 and the second semiconductor layer 206. The first pad 208 is formed on the first semiconductor layer 202, a side far from the light emitting layer 204. The second pad 210 is formed on the second semiconductor layer 206 away from the other side of the light emitting layer 204. In this embodiment, the top surface 208t of the first pad 208 faces upward, and the top surface 210t of the second pad 210 faces downward.
高分子基板108環繞發光元件晶片300的側壁300s,第一接墊208的頂面208t外露於高分子基板108的第一表面108a,而第二接墊210的頂面210t外露於高分子基板108的第二表面108b。在一實施例中,高分子基板108的第一表面108a與第二表面108b彼此相對。雖然圖4中的第一接墊208的頂面208t高於高分子基板108的第一表面108a,但本發明不以此為限。在其他實施例中,第一接墊208的頂面208t與高分子基板108的第一表面108a可實質上共平面。相似地,第二接墊210的頂面210t與高分子基板108的第二表面108b亦可實質上共平面。The polymer substrate 108 surrounds the sidewall 300s of the light-emitting element wafer 300. The top surface 208t of the first pad 208 is exposed on the first surface 108a of the polymer substrate 108, and the top surface 210t of the second pad 210 is exposed on the polymer substrate 108 Of the second surface 108b. In one embodiment, the first surface 108 a and the second surface 108 b of the polymer substrate 108 are opposite to each other. Although the top surface 208t of the first pad 208 in FIG. 4 is higher than the first surface 108a of the polymer substrate 108, the present invention is not limited thereto. In other embodiments, the top surface 208t of the first pad 208 and the first surface 108a of the polymer substrate 108 may be substantially coplanar. Similarly, the top surface 210t of the second pad 210 and the second surface 108b of the polymer substrate 108 can also be substantially coplanar.
第一線路結構312a形成於高分子基板108的第一表面108a上,且與第一接墊208電性連接。第一線路結構312b形成於高分子基板108的第二表面108b上,且與第二接墊210電性連接。The first circuit structure 312 a is formed on the first surface 108 a of the polymer substrate 108 and is electrically connected to the first pad 208. The first circuit structure 312 b is formed on the second surface 108 b of the polymer substrate 108 and is electrically connected to the second pad 210.
雖然上述實施例僅繪示水平式發光二極體晶片與垂直式發光二極體晶片,但本發明不以此為限。在其他實施例中,內嵌在軟性基板及線路結構中的晶片亦可以是倒置(flip chip)發光二極體晶片、主動元件晶片、被動元件晶片或其組合。Although the above embodiments only show the horizontal light-emitting diode wafer and the vertical light-emitting diode wafer, the present invention is not limited thereto. In other embodiments, the chip embedded in the flexible substrate and the circuit structure may also be a flip chip light emitting diode wafer, an active device wafer, a passive device wafer, or a combination thereof.
綜上所述,本發明藉由晶片優先模封方式(chip first molding),將至少一晶片嵌入高分子基板中。接著,藉由網印法在高分子基板的第一表面上形成第一線路結構,使得第一線路結構與至少一晶片的第一接墊電性連接。因此,本發明的製造方法可製造出可撓性或具有拉伸性的線路板結構,並解決晶片因表面或擺放不平整所造成的晶片位移或晶片旋轉的問題,而導致後續驅動線路與晶片電性連接偏移的問題。此外,相較於傳統的印刷線路板的製造方法,本發明的軟性基板及線路結構的製造方法具有製程簡單、快速生產以及製造成本較低等優勢,以使產品具有商業競爭力。In summary, the present invention embeds at least one wafer into a polymer substrate by a chip first molding method. Next, a first circuit structure is formed on the first surface of the polymer substrate by a screen printing method, so that the first circuit structure is electrically connected to the first pad of at least one wafer. Therefore, the manufacturing method of the present invention can manufacture a flexible or stretchable circuit board structure, and solve the problems of wafer displacement or wafer rotation caused by unevenness of the surface or placement of the wafer, which leads to subsequent drive circuits and The problem of chip electrical connection deviation. In addition, compared with the traditional manufacturing method of the printed wiring board, the manufacturing method of the flexible substrate and the wiring structure of the present invention has the advantages of simple manufacturing process, rapid production, and low manufacturing cost, so that the product has commercial competitiveness.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed as above with the examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some modifications and retouching without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application.
100、200、300‧‧‧晶片100, 200, 300‧‧‧ chips
102‧‧‧載體102‧‧‧ carrier
104‧‧‧離形層104‧‧‧ Release layer
106‧‧‧高分子材料106‧‧‧ Polymer Materials
108‧‧‧高分子基板108‧‧‧Polymer substrate
108a‧‧‧第一表面108a‧‧‧first surface
108b‧‧‧第二表面108b‧‧‧Second surface
109‧‧‧開口109‧‧‧ opening
110‧‧‧網印步驟110‧‧‧Screen printing steps
112、212、312a‧‧‧第一線路結構112, 212, 312a‧‧‧ First Line Structure
312b‧‧‧第二線路結構312b‧‧‧Second Line Structure
114、118、120、214、218、220‧‧‧導電層114, 118, 120, 214, 218, 220‧‧‧ conductive layers
116、216‧‧‧絕緣層116, 216‧‧‧ Insulation
200s、300s‧‧‧晶片的側壁200s, 300s‧Sidewall of the wafer
202‧‧‧第一半導體層202‧‧‧First semiconductor layer
204‧‧‧發光層204‧‧‧Light-emitting layer
206‧‧‧第二半導體層206‧‧‧Second semiconductor layer
208‧‧‧第一接墊208‧‧‧The first pad
208t‧‧‧第一接墊的頂面208t‧‧‧ Top surface of the first pad
210‧‧‧第二接墊210‧‧‧The second pad
210t‧‧‧第二接墊的頂面210t‧‧‧ Top surface of the second pad
H1‧‧‧高度差H1‧‧‧height difference
H2‧‧‧高分子基板的厚度H2‧‧‧thickness of polymer substrate
T1‧‧‧高分子材料的厚度T1‧‧‧thickness of polymer materials
T2‧‧‧晶片的厚度T2‧‧‧ Wafer thickness
圖1A至圖1E是依照本發明的第一實施例的一種軟性基板及線路結構的製造流程的立體示意圖。 圖2A至圖2F是依照本發明的第二實施例的一種軟性基板及線路結構的製造流程的剖面示意圖。 圖3A至圖3E是依照本發明的第三實施例的一種軟性基板及線路結構的製造流程的剖面示意圖。 圖4是依照本發明的第四實施例的一種軟性基板及線路結構的剖面示意圖。1A to 1E are schematic perspective views of a manufacturing process of a flexible substrate and a circuit structure according to a first embodiment of the present invention. 2A to 2F are schematic cross-sectional views illustrating a manufacturing process of a flexible substrate and a circuit structure according to a second embodiment of the present invention. 3A to 3E are schematic cross-sectional views illustrating a manufacturing process of a flexible substrate and a circuit structure according to a third embodiment of the present invention. 4 is a schematic cross-sectional view of a flexible substrate and a circuit structure according to a fourth embodiment of the present invention.
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US20130228917A1 (en) * | 2008-12-12 | 2013-09-05 | Stats Chippac, Ltd. | Semiconductor Device and Method for Forming a Low Profile Embedded Wafer Level Ball Grid Array Molded Laser Package (EWLP-MLP) |
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