TWI569696B - Method of manufacturing circuit board and chip package and circuit board manufactured by using the method - Google Patents

Description

Method of manufacturing a circuit board and a chip package, and a circuit board produced by using the method

The present invention relates to a method and apparatus for fabricating a circuit board including a cavity and a chip package, together with embodiments thereof, and a circuit board produced by the manufacturing method.

The Korean Patent Application No. 10-2012-0116744 filed on October 19, 2012, and the Korean Patent Application No. 10-2013-0020670 filed on Feb. 26, 2013, is hereby incorporated by reference. The entire contents of these applications have been incorporated herein by reference.

As the parts and dimensions of electronic devices have been shrinking in recent years, and users have versatile products, the number of electronic devices has increased. As a result, there is a demand for circuit board manufacturing technology capable of mounting a large number of electronic components at high density.

A multi-layer circuit board is an element in an electronic device, which is a multi-layered body formed by stacking a plurality of substrates, and electronic components are mounted on each layer. Since the multilayer circuit board has a single side circuit board or a double side circuit board, Electrically more complex functions, and high-density mounting of electronic components, multilayer circuit boards are widely used in a variety of electronic devices.

In particular, in recent years, there has been a need for system integration technology to make light, thin, short, and small electronic products, and a system integration technology for manufacturing cavity printed circuit board (PCB) technology, which is attracting attention. In a cavity type PCB, since the parts are not completely buried in the PCB, they are buried in the cavity formed in the direction in which the wafer is mounted, so that when the parts are replaced or the parts are inspected, the holes are buried in the cavity far more than the buried PCB. The insider is more convenient and effective.

However, multilayer technology is rarely used in cavity-type PCBs. This is due to the difficulty of accurately forming the cavity, which may damage the circuit in the cavity during the process of plating or etching the PCB.

In particular, when laser drilling is performed on a PCB on which a completed part is stacked, the internal circuit pattern and the internal insulating layer may often be damaged due to difficulty in adjusting the depth. At the same time, when the cavity is formed by using the slotting machine, the cavity needs to be formed separately due to the great precision in the process, and the product reliability may be lowered in the case of mass production, and it is difficult to be productive due to low productivity. Mass production. At the same time, the borehole is inevitably damaged by the borehole in the cavity of the finished product. As a result of damage to the outer wall of the cavity, it will cause absorption of moisture and cause collapse of the laminate and damage to the underside of the cavity. Due to the manufacturing cost of the drilling jig, the overall manufacturing cost is increased, and the design width of the cavity is small. When the cavity is formed and the parts are stacked before the insulation layer is laminated, due to the hard heat The flow of the resin is not easy to control, resulting in easy sticking and additional decontamination work. At the same time, since it is difficult to completely remove the stain, the reliability of the substrate is lowered and the mass production capacity is also lowered.

One or more embodiments provide a method of simply manufacturing a circuit board and a chip package at low cost, and fabricating the circuit board by this method.

According to an exemplary embodiment, a method of manufacturing a circuit board provided includes: preparing a substrate comprising a core layer and a first conductive layer formed on at least one surface of the core layer and containing an internal circuit pattern; forming a composite material Covering the first conductive layer; forming at least one cavity in the composite material, exposing the core layer and the first conductive layer through the cavity; forming a stack of sheets by curing the composite material having at least one cavity therein; and forming A second conductive layer having an external circuit pattern is on one of the outer surfaces of the laminate.

The composite material may comprise a matrix in which the structural system is impregnated and the matrix comprises a grade B thermosetting resin.

The formation of the laminated body may include applying heat to complete the crosslinking of the B-grade thermosetting resin, and obtaining a C-grade thermosetting resin.

The weight of the B-grade thermosetting resin may be less than the weight of the C-grade thermosetting resin.

The temperature during the manufacturing process in which the composite material is formed may be lower than the temperature during the manufacture of the cured composite material.

The formation of the at least one cavity may comprise using a wet etch to The removal composition is exposed to a portion that is formed by using a solution to form at least one cavity.

The solution can comprise a glass etchant.

The core layer can be formed of the same material as the laminated body.

The composite material can comprise a metal layer formed on an outer surface of the composite material facing the substrate.

The foregoing method of manufacturing may further include removing a portion of the metal layer, wherein at least one cavity is formed, prior to forming the at least one cavity.

According to another embodiment, there is provided a circuit board manufactured using the above method.

According to another embodiment, there is provided a method of fabricating a wafer package, the method comprising: preparing a substrate comprising a core layer and a first conductive layer formed on at least one surface of the core layer and including an internal circuit diagram Forming a composite material to cover the first conductive layer; forming at least one cavity in the composite material, exposing the core layer and the first conductive layer through the cavity; by curing at least one cavity therein Combining materials to form a stack of sheets; forming a second conductive layer comprising an external circuit pattern on an outer surface of the laminated body; and mounting a semiconductor wafer in the at least one cavity while the semiconductor wafer is At least one of the first and second conductive layers is electrically connected.

The composite material may comprise a matrix in which the structural system is impregnated and the matrix comprises a grade B thermosetting resin.

The formation of the laminated body may include applying heat to complete the crosslinking of the thermosetting resin in the B-stage, and obtaining a C-grade thermosetting resin.

The weight of the thermosetting resin in the B grade may be less than the weight of the thermosetting resin in the C grade.

The forming of the at least one cavity may comprise using a wet etch to remove exposed portions of the composite material by using a solution to form at least one cavity.

100‧‧‧Substrate

115‧‧‧ core layer

120‧‧‧ Conductive layer

121‧‧‧Internal circuit pattern

200‧‧‧ boards

210‧‧‧Combined materials

211‧‧‧Matrix

212‧‧‧ Structure

214‧‧‧glass fiber

215‧‧‧ laminated body

216‧‧‧矽 base filler

220‧‧‧metal layer

221‧‧‧External circuit pattern

223‧‧‧Parts

30, 31, 32‧‧‧ semiconductor wafers

35‧‧‧Connecting line

300, 300a‧‧‧ chip package

CV‧‧‧ hollow cavity

The above and other embodiments will be more apparent from the detailed description of the exemplary embodiments and the accompanying drawings, wherein: Figures 1, 2, 5, 6, 7, and 9 are in accordance with embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 3 is a detailed explanatory view of a composite material of FIG. 2 in an embodiment of the present invention; and FIG. 4 is a view showing molding of a thermosetting resin according to temperature in an embodiment of the present invention. FIG. 8 is a graph showing a temperature history of a circuit board manufacturing method per cycle according to an embodiment of the present invention; and FIG. 10 and FIG. 11 are diagrams illustrating a method of manufacturing a wafer package according to an embodiment of the present invention; A cross-sectional view of the wafer package.

Because the present invention conceptually allows for a variety of implementations In the form of a specific exemplary embodiment, the drawings are illustrated and detailed descriptions are provided. However, it is not intended to limit the scope of the invention to the specific scope of the invention, and all modifications, devices and substitutes are included in the present invention without departing from the spirit and scope of the invention. The description of the embodiments herein is a detailed description of the related art and may not be necessary to cause a ambiguity in the meaning of the present invention.

The singular terms used herein are used for the purpose of describing particular embodiments, and are not intended to limit the inventive concept. The singular forms used herein are intended to include the plural and the singular and It should be further understood that the term "including" and / or "including" includes the features, integers, steps, operations, components, components, and/or groups described, but does not exclude one or more other features. The existence or addition of the whole, steps, operations, components, ingredients, and/or groups.

The phrase 〝 and/or 使用 used herein includes any and all combinations of one or more of the associated listed items. To the extent that the elements are recited in the singular, at least

Embodiments of the present invention will be described in further detail with reference to the accompanying drawings. For the clarity of the drawings, the thickness and extent of the various layers are enlarged to make the surface clearer. The thickness and extent of some of the laminates are specifically enlarged to facilitate the description of the drawings.

1, 2, 5, 6, 7, and 9 are diagrams in accordance with various embodiments of the present invention A cross-sectional view illustrating a method of manufacturing a circuit board. Fig. 3 is a detailed explanatory view of the composite material 210 of Fig. 2. Fig. 4 is a graph showing whether a thermosetting resin can be molded in accordance with temperature according to an embodiment of the present invention. Figure 8 is a graph showing the temperature of the manufacturing process per cycle of the method of manufacturing a circuit board in accordance with an embodiment of the present invention.

Referring to Fig. 1, a substrate 100 is prepared.

The substrate 100 is part of a circuit board in which an internal circuit pattern 121 for communicating electrical signals is formed. The substrate 100 includes a conductive layer 120 including internal circuit patterns 121 formed on the surfaces of both surfaces of the core layer 115.

The core layer 115 is formed of the same material as the laminated body 215 (refer to Fig. 7), which will be described later. In particular, the core layer 115, such as the laminate 215, comprises a fully cured thermosetting resin.

The conductive layer 120 may include a conductive material such as copper (Cu) or silver (Ag), but the embodiment is not limited thereto. The conductive layer 120 may be formed on each of the double surfaces of the core layer 115 by screen printing or roll coating.

The internal circuit pattern 121 can be formed by various graphic printing methods, such as a method including a masking method and a flat/model method, or a thickening method including a half-add (SAP) method, and a modified half-add (MSAP) method. Law, Advanced Amendment Half Addition (AMSAP) method, and Full Addition (FAP) method. In short, the subtractive method selectively removes unnecessary portions other than the electrical conductor from the conductive layer 120 to form a circuit board, and the thickening method selectively utilizes plating on the core layer 115 to deposit a conductive material. In order to form a circuit pattern, all are public Well known, so it is not described in detail in this article. Fig. 1 shows the results obtained by forming the internal circuit pattern 121 by the masking method.

Through holes or perforations may be formed in the substrate 100 to supply electrical via the internal circuit patterns 121 formed above and below the core layer 115. Although FIG. 1 illustrates the through holes through which the two inner surfaces are plated, the number and shape of the through holes are not limited as such. The thickness, material, shape, and structure of the substrate 100 are not limited to those described above, and may be changed as needed.

Referring to FIG. 2, a composite material 210 is formed on the substrate 100.

When manufacturing a multilayer circuit board, the composite material 210 will have a conductive layer 120 is insulated from the metal layer 220 (refer to Fig. 9). The composite material 210 includes a structure 212 (see FIG. 3) and a matrix 211 (see FIG. 3), wherein the structure 212 is impregnated.

Fig. 3 is a detailed view for explaining the composite material 210 shown in Fig. 2.

The structure 212 is a material added to reinforce the mechanical and chemical strength and durability of the composite material 210 or the laminated body 215 (refer to Fig. 7). For example, structure 212 comprises a glass based material. In particular, the structure 212 can include glass fibers 214 and a ruthenium based filler 216. The glass fiber material 214 is a linear material that is woven in the composite material 210 or the laminate body 215 to support the entire structure of the composite material 210 or the laminated body 215 (refer to Fig. 7), and has, for example, a reinforcing bar in reinforced concrete. effect. The ruthenium-based filler 216 is distributed as a particulate material in the laminate 215 (refer to FIG. 7) or the composite material 210. Eli increases strength and durability and acts as, for example, gravel in reinforced concrete.

The matrix 211 corresponds to a material having the impregnated structure 212 for insulating the different conductive layers 120 from each other and insulating the conductive layer 120 from the metal layer 220. The matrix 211 comprises a thermosetting resin such as an epoxy resin. According to an embodiment, the matrix 211 included in the composite material 210 is a thermosetting resin. The characteristics of the B-grade thermosetting resin will be described in detail.

Fig. 4 is a graph showing the relationship between the thermosetting resin grade and the temperature.

Referring to Fig. 4, the X axis represents temperature and the Y axis represents thermosetting resin molding characteristics according to temperature. In other words, the temperature increases from the low temperature to the high temperature along the X axis, and the mobility of the thermosetting resin increases along the Y axis.

The thermosetting resin contains at least a B grade and a C grade.

The grade B refers to a state in which the thermosetting resin is partially cured and the curing reaction is in an intermediate state before the complete curing. The B-grade thermosetting resin contains a polymer which is not crosslinked by heating. Therefore, when heated to the B-stage thermosetting resin, the kinetic energy of the polymer is increased to have mobility and softness. When contacting a certain melt, molecules in the solution penetrate the polymer to expand the thermosetting resin.

As described above, the matrix 211 included in the composite material 210 is a class B thermosetting resin. Therefore, when heated to the composite material 210, mobility can be obtained, and the molding work is completed. Referring to Fig. 4, when heated to a grade B thermosetting resin, the thermosetting resin is not cured, but is soft. It is enough to mold. Therefore, when the composite material 210 deposited on the substrate 100 is heated, the B-grade thermosetting resin is contained in the composite material 210 and can be molded. Therefore, when the lamination operation is completed by pressurization, the thermosetting resin is filled in the internal circuit pattern 121. The temperature at which the thermosetting resin is heat-molded is the temperature before the thermosetting resin enters the C-stage. The temperature of the heat molding, such as an epoxy resin, may range from about 120 ° C to about 180 ° C. As will be explained in detail with reference to Fig. 6, since the matrix 211 contained in the composite material 210 belongs to the class B thermosetting resin, the matrix 211 has low chemical resistance, and therefore, since the matrix 211 can be etched by solution, The cavity CV can be formed by wet etching.

Next, the C grade means a state in which the thermosetting resin is completely cured. In other words, the C grade means that energy is applied to complete the crosslinking, and the thermosetting resin is in a state of being stably crosslinked. Therefore, the weight of the C-grade thermosetting resin is larger than the weight of the B-grade thermosetting resin because the polymer form is increased by crosslinking. Since it is impossible to mold the C-grade thermosetting resin by heating, the C-grade thermosetting resin cannot be dissolved and melted in some solutions. As will be described in detail with reference to Fig. 7, the matrix 211 included in the laminated body 215 (refer to Fig. 7) is a C-stage thermal hardening obtained by completely curing the B-stage thermosetting resin contained in the composite material 210. Resin. Therefore, the laminated body 215 can be molded without increasing chemical resistance, strength and durability.

As shown in FIG. 2, the composite material 210 includes a metal layer 220 formed on the outer surface of the composite material 210 while facing the substrate 100. Metal layer 220 may be formed of copper or silver.

However, the present embodiment is not limited to the one shown in FIG. 2, and the composite material 210 having no metal layer 220 may be coated on the substrate 100, and then the metal layer 220 may be formed by screen printing or roll coating. On the outer surface of the composite material 210.

Referring to Fig. 5, a portion of the metal layer 220 in which the cavity CV is formed is removed.

In particular, the process of Figure 5 can be considered to belong to the window forming process. According to an embodiment, the cavity CV in the composite material 210 is formed by wet etching. Therefore, when the metal layer 220 is formed on the composite material 210, the process of forming the window is completed.

Although not shown, a dry film barrier (DRF) is applied to complete exposure and development, and a pattern is formed in the portion 223 reserved for forming the cavity CV. Next, a portion of the metal layer 220 corresponding to the portion 223 reserved for forming the cavity CV is removed by the DFR method, and a pattern is formed thereon as a mask. Second, the DFR is stripped. The window formation process can be performed using any well-known method.

Referring to FIG. 6, at least one cavity CV is concentratedly formed in the composite material 210. Although only one cavity CV is shown in Fig. 6, a plurality of cavities CV may be formed according to the product design.

By removing the composite material 210, a cavity CV is formed to mount the semiconductor wafer. The cavity CV is an opening through which the composite material is disposed The core layer 115 under the material 210 and the conductive layer 120 including the internal circuit pattern 121 are exposed. The cavity CV is different from the perforation, and only the conductive layer 120 disposed under the composite material 210 can be exposed through the perforations. Since the cavity CV is a space in which a semiconductor wafer is to be mounted in the future, the function of the cavity CV is different from that of the perforation, and the inner surface of the perforation is plated as a member for electrical connection. At the same time, the cavity CV differs from the perforation in that the cavity CV has a sufficient width for mounting a semiconductor wafer.

In detail, the cavity CV is formed by wet etching. The cavity CV is formed by removing the composite material 210 exposed to the portion 223. The metal layer 220 is used as an automatically aligned mask during etching. As shown in FIG. 3, the composite material 210 includes a matrix 211 and a structure 212. Therefore, the solution used for wet etching should be capable of simultaneously removing the matrix 211 and the structure 212. The solution used contains an etch glass agent for removing the structure 212 containing the glass component.

The method of removing the composite material 210 may be through only one process or a plurality of repeated processes. For example, the matrix 211 included in the portion 223 of the composite material 210 forming the cavity CV can be removed in the first process using the first solution, and also included in the portion 223 of the composite material 210 that is reserved to form the cavity CV. The structure 212 can be removed in the second process using the second solution. If necessary, the first process may be repeated after the second process, or the first process may be performed after the second process is completed.

The first solution may be an alkaline solution such as sodium permanganate or hydrogen Sodium oxide, an organic solution such as acetone or other acidic solution. The second solution may be an acidic solution such as hydrofluoric acid (HF) or a known etch glass agent. Any acidic, basic, or neutral etching aid that can swell the thermosetting resin can be used before the matrix 211 is removed in the first process.

According to an embodiment, the cavity CV is formed by wet etching to form the composite material 210.

As described above, since the composite material 210 contains the B-stage thermosetting resin, the cavity CV can be formed by wet etching. When the composite material 210 is formed on both surfaces of the substrate 100 and directly cured, since the B-stage thermosetting resin is completely cured to become a highly chemically resistant C-grade thermosetting resin, it is impossible to form by wet etching. Cavity CV. However, according to the present embodiment, since the composite material 210 is formed and the cavity CV is formed before the composite material 210 is cured into the laminated body 215 (refer to Fig. 7), wet etching can be performed.

Referring to the description of Fig. 1, the core layer 115 such as the laminated body 215 contains a C-stage thermosetting resin (refer to Fig. 7). Therefore, although the core layer 115 is exposed to the etching liquid during the formation of the cavity CV, the core layer 115 is not damaged by the etching liquid. That is, the core layer 115 and the composite material 210 contain different grades of thermosetting resin, so that there is a predetermined etching selectivity. Meanwhile, since the materials of the composite material 210 and the conductive layer 120 are different from each other, the conductive layer 120 does not react with the etching liquid phase used for removing the composite material 210.

According to this embodiment, since the cavity CV is wet etching The problem is that the cavity forming method in the PCB on which the completed part is to be stacked is solved, and the cavities can also be formed collectively. At the same time, since the damage to the outer wall caused by the precise drilling of the cavity position in the product can be avoided, and the drilling jig is not required, the cavity of various shapes can be designed at low cost. In addition, contamination can be avoided, and production costs and production process time can be reduced.

Referring to Fig. 7, the laminated body 215 is formed by completely curing the composite material 210 in which the cavity CV is formed.

In detail, the laminated body 215 such as the composite material 210 includes a matrix 211 (refer to FIG. 3) and a structure 212 (refer to FIG. 3), but the matrix 211 included in the laminated body 215 is C-stage thermosetting. Resin. The step of forming the laminated body 215 is to heat the Class B thermosetting resin contained in the composite material 210 to obtain a Class C thermosetting resin. That is, thermal energy is applied to complete the cross-linking, and the thermosetting resin is firmly crosslinked. Therefore, the chemical resistance, strength and durability of the laminated body 215 are improved.

The temperature at which the cured composite material 210 is completed may be higher than the temperature at which the composite material 210 shown in FIG. 2 is molded. For example, the curing must be carried out for several minutes at a temperature equal to or higher than about 200 °C.

Figure 8 is a graph showing the temperature history of the circuit board manufacturing method per cycle in an embodiment of the present invention.

The method of FIG. 8 includes intermittently forming a laminate 215 from the composite material 210. That is, the molded composite material 210 is formed at a temperature T1. The steps are performed during t1. The step of forming the laminated body 215 by curing the composite material 210 is intermittently performed during t3. The step of forming the cavity CV is performed during t2 during the period t3 and during the period t1. After the cavity CV etch is completed, the composite material 210 is cured during t3 at a temperature T2 to form a lamination body 215.

The process temperature required to form the composite material 210 and the molding composition 210 to penetrate the internal circuit pattern 121 during t1 is lower than the process temperature required to form the lamination body 215 during t3. This is due to the fact that the thermal energy required to crosslink the polymer is higher than the thermal energy required to increase the mobility of the polymer.

According to the present embodiment, the laminated body 215 comprising the final circuit board of the polymer having the required strength and durability has physical properties suitable for packaging, and the cavity CV can be concentrated by using an intermittent process and a wet etching process. . Therefore, the manufacturing method of the circuit board according to the present embodiment can manufacture a circuit board having physical properties satisfying the user's demand in a short time with less investment and equipment cost.

Referring to Fig. 9, an external circuit pattern 221 is formed on the metal layer 220 which is formed on the outer surface of the laminated body 215. The method of forming the external circuit pattern 221 is the same as the method of forming the internal circuit pattern 121. Although not shown in Fig. 9, a circuit board can be made by printing a protective layer by piercing a dedicated hole and performing other surface treatments.

10 and 11 are wafer packages 300 and 300a manufactured by the method of manufacturing wafer packages 300 and 300a in accordance with various embodiments of the present invention. Sectional view.

Each of the chip packages 300 and 300a shown in Figs. 10 and 11 includes a semiconductor wafer mounted on the circuit board 200 shown in Fig. 9.

Referring to Figures 10 and 11, a semiconductor wafer system is mounted on the circuit board 200 shown in Figure 9. As shown in Figure 10. A semiconductor wafer 30 can be mounted on the circuit board 200. However, the present embodiment is not limited thereto. As shown in FIG. 11, a plurality of semiconductor wafers 31 and 32 may be mounted on the circuit board 200. Although two semiconductor wafers 30 and 31 are mounted in FIG. 11, the present embodiment is not limited thereto, and three or more semiconductor wafers may be mounted on the circuit board 200.

At least one semiconductor wafer 30, 31 or 32 is mounted within the cavity CV. In Fig. 11, the semiconductor wafer 31 can be mounted in the cavity CV, and the semiconductor wafer 32 can be mounted outside the cavity CV. Each of the semiconductor wafers 30, 31, and 32 may be electrically connected to an exposed portion of the metal layer 220 on which the external circuit pattern 221 is formed, or to the conductive layer 120 on which the internal circuit pattern 121 is formed, using the connection line 35. Exposure part. Therefore, the chip package 300 or 300a, that is, the circuit board 200 on which the semiconductor wafers 30, 31, and 32 are mounted, can be fabricated.

According to the present embodiment, since the cavity CV is formed in the circuit board 200, as shown in FIG. 10, the thickness of the wafer package 300 can be further reduced by mounting the semiconductor wafer 30 in the cavity CV. Since the thickness of the semiconductor wafer mounted in the cavity CV can be reduced, the semiconductor wafer 30 is reduced. Back grinding is possible and wafer throughput can be increased. Meanwhile, as shown in Fig. 11, since the semiconductor wafer 31 is mounted in the cavity CV, more semiconductor wafers can be mounted than the chip package of the circuit board without the cavity.

Although not shown, an electrical connector, such as a solder ball, may be formed on the metal layer 220. The metal layer 220 is disposed on the opposite surface of the surface of the circuit board 200, and a cavity CV is formed in the circuit board 200. Meanwhile, the wafer package 300 or 300a may seal a part or all of the semiconductor wafers 30, 31 and 32, the connection wires 35, and the circuit board 200 with a molding resin such as an epoxy molding compound to complete the product.

Although a multilayer circuit board including a total of four conductive layers 120 and metal layers 220 is exemplified in the present embodiment, the concept of the present invention is not limited thereto. The manufacturing method of the present invention can be applied to various other multilayer circuit boards (for example, a 6-layer circuit board or an 8-layer circuit board, etc.).

Meanwhile, for convenience of explanation, the present embodiment exemplifies a predetermined through hole, a plated through hole (PTH), a predetermined circuit pattern, and the like, but the concept of the present invention is not limited thereto. It is to be understood that any different shapes, numbers, or different figures are included in the inventive concept.

As described above, according to the present embodiment, the manufacturing process of the circuit board is simplified, the manufacturing cost is reduced, and the cost competitiveness is enhanced.

In summary, the inventive concept of the present invention has been specifically described in the embodiments of the present invention. Those skilled in the art who are familiar with this aspect may The present invention has been changed in various forms and contents without departing from the scope and spirit of the appended claims.

300‧‧‧ chip package

100‧‧‧Substrate

30‧‧‧Semiconductor wafer

35‧‧‧Connecting line

120‧‧‧ Conductive layer

121‧‧‧Internal circuit graphics

215‧‧‧ laminated body

220‧‧‧metal layer

221‧‧‧External circuit graphics

CV‧‧‧ cavity

Claims (17)

A method of manufacturing a circuit board, comprising: preparing a substrate, the substrate comprising a core layer and a first conductive layer formed on at least one surface of the core layer, the first conductive layer comprising an internal circuit pattern; forming a composite material And covering the first conductive layer; forming a metal layer on the outer surface of the composite material and facing the substrate; removing a portion of the metal layer to form at least one cavity therein; in the composite material Forming at least a cavity through which the core layer and the first conductive layer are exposed; forming a stack of sheets by curing the composite material in which at least one cavity is formed; and by removing other portions of the metal layer, Forming a second conductive layer having an external circuit pattern on an outer surface of the laminate; wherein the forming of the at least one cavity comprises using a wet etch to remove the exposed portion of the composite, the portion A solution is employed to form the at least one cavity. The manufacturing method of claim 1, wherein the composite material comprises a matrix in which the structural system is impregnated, and the matrix comprises a B-grade thermosetting resin. The manufacturing method of claim 2, wherein the method of forming the laminated body comprises heating to complete the crosslinking of the B-grade thermosetting resin, and obtaining a C-grade thermosetting resin. The manufacturing method of claim 3, wherein the weight of the B-grade thermosetting resin is less than the weight of the C-grade thermosetting resin. The manufacturing method of claim 1, wherein the temperature in the manufacturing process of forming the composite material is lower than the temperature during curing of the composite material. The manufacturing method of claim 1, wherein the solution contains a glass etchant. The manufacturing method of claim 1, wherein the core layer is formed of the same material forming the laminate. The manufacturing method of claim 1, wherein the core layer is formed of the same material forming the composite material, and the material of the composite material belongs to the level before the composite material is cured to form the laminated body. It is different from the material forming the core layer according to the grade classified by temperature. The manufacturing method of claim 1, further comprising: mounting a semiconductor wafer in the at least one cavity, and electrically electrically connecting the semiconductor wafer to at least one of the first and second conductive layers connection. The manufacturing method of claim 9, wherein the composite material comprises a matrix in which the structural system is impregnated and the matrix comprises a B-stage thermosetting resin. The manufacturing method of claim 10, wherein the method of forming the laminated body comprises heating to complete crosslinking of a class B thermosetting resin, and obtaining a class C thermosetting resin. The manufacturing method of claim 11, wherein the weight of the B-stage thermosetting resin is less than the weight of the C-stage thermosetting resin. The method of manufacturing of claim 9, wherein the forming of the at least one cavity comprises using a wet etch to remove the exposed portion of the composite material, the portion using a solution to form the at least one cavity. A circuit board manufactured using the manufacturing method of claim 1 of the patent application. A circuit board manufactured using the manufacturing method of claim 2 of the patent application. A circuit board manufactured using the manufacturing method of claim 3 of the patent application. A circuit board manufactured using the manufacturing method of claim 8 of the patent application.