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TWI550739B - 埋置形成於半導體晶粒上之凸塊於可穿透黏著層中之半導體裝置及方法以減少在單一化過程中晶粒之移動 - Google Patents

埋置形成於半導體晶粒上之凸塊於可穿透黏著層中之半導體裝置及方法以減少在單一化過程中晶粒之移動 Download PDF

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Publication number
TWI550739B
TWI550739B TW100115333A TW100115333A TWI550739B TW I550739 B TWI550739 B TW I550739B TW 100115333 A TW100115333 A TW 100115333A TW 100115333 A TW100115333 A TW 100115333A TW I550739 B TWI550739 B TW I550739B
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Taiwan
Prior art keywords
semiconductor die
adhesive layer
semiconductor
bump
bumps
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TW100115333A
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English (en)
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TW201203412A (en
Inventor
瑞莎Ａ 派蓋菈
林耀劍
具俊謨
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史達晶片有限公司
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Publication of TW201203412A publication Critical patent/TW201203412A/zh
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Publication of TWI550739B publication Critical patent/TWI550739B/zh

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Description

埋置形成於半導體晶粒上之凸塊於可穿透黏著層中之半導體裝置及方法以減少在單一化過程中晶粒之移動
本發明一般係關於半導體裝置，且更特別地係關於一種埋置形成於半導體晶粒上之凸塊於可穿透黏著層中之半導體裝置及方法以減少在封裝化過程中晶粒之移動。
在現代電子產品中普遍可發現半導體裝置。半導體裝置在電性元件的數目與密度上有所變化。各別半導體裝置一般包含一種電性元件，例如發光二極體(LED)、小訊號電晶體、電阻器、電容器、電感器與功率金屬氧化物半導體場效電晶體(MOSFET)。積體半導體裝置基本上包含數百至數百萬個電性元件。積體半導體裝置實例包括微控制器、微處理器、電荷耦合裝置(CCD)、太陽能電池與數位微鏡裝置(DMD)。
半導體裝置進行廣範圍的功能，譬如高速計算、傳送與接收電磁訊號、控制電子裝置、將太陽光轉換成電力、以及產生視覺投射給電視顯示器。在娛樂、通訊、功率轉換、網路、電腦與消費性產品中可發現半導體裝置。在軍事應用、航空飛行、汽車、工業控制器與辦公室設備中亦可發現半導體裝置。
半導體裝置應用半導體材料的電性特性。藉由施加電場或基極電流或經由摻雜之製程，半導體材料的原子結構允許其電傳導性被操作。摻雜會將雜質引入到半導體材料內，以操作並控制該半導體裝置的傳導率。
半導體裝置包含主動與被動電性結構。包括雙極性與場效電晶體的主動結構會控制電流的流動。藉由改變電場或基極電流之摻雜與施加的程度，該電晶體可促進或限制電流的流動。被動結構，包括電阻器、電容器與電感器，其係會在進行許多電性功能所必要的電壓與電流之間產生關係。該被動與主動結構會被電性連接，以形成電路，其係致使半導體裝置進行高速計算與其他有用功能。
半導體裝置一般可使用兩複雜製造製程來製造，亦即前端製造與後端製造，每一個均潛在地包含數百個步驟。前端製造包含將複數個晶粒形成在半導體晶圓表面上。每一個晶粒基本上相等，其係並且包含藉由電性連接主動與被動元件所形成的電路。後端製造包含從該拋光晶圓將個別晶粒切單，並且將該晶粒封裝，以提供結構性支撐與環境隔離。
半導體製造的一個目標係為產生更小的半導體裝置。更小的裝置基本上消耗更少功率、具有更高性能，其係並且可更有效率地生產。此外，更小的半導體裝置具有更小足跡，其係對更小終端產品而言是所希的。更小的晶粒尺寸可藉由改善前端製程來得到，其係會造成具有更小、更高密度之主動與被動元件的晶粒。藉由改善電性互連與封裝材料，後端製程會造成具有更小足跡的半導體裝置封裝物。
在扇出晶圓級晶片尺寸封裝(FO-WLCSP)中，半導體晶粒一般會使用黏著層被安裝到暫時性支撐載體。一封裝材料或模鑄化物則會被沈積在該半導體晶粒上，以用於環境保護，使免於受到外部元件與污染。當將該封裝材料沈積在該晶粒周圍時，該封裝製程則會施力於半導體晶粒上。在該載體上的黏著層係無法充足地在封裝期間內將該半導體晶粒固持在適當之處。該力會造成該半導體晶粒的垂直或水平移動或運動。
在封裝化以後，該暫時性載體與黏著層會被移除，且一建立互連結構會被形成在該半導體晶粒與封裝材料上。複數個通道必須被形成經過該互連結構的絕緣層，以電性連接到該半導體晶粒上的接觸襯墊。該通道係藉由機械鑽孔或雷射切割所形成。該通道形成經常殘留殘渣與其他污染物在該接觸襯墊上，其係可干擾電性連接並減少電性性能。
用來減少在封裝期間內半導體晶粒的移動並且避免通道形成在該晶粒上之接觸襯墊上的的需求係存在。於是，在一種實施例中，本發明係為一種製造半導體裝置的方法，其係包含以下步驟：提供一暫時性載體；形成一可穿透黏著層於該暫時性載體上；提供一第一半導體晶粒，其係具有複數個凸塊形成在第一半導體晶粒的一表面上；藉由將該凸塊埋置於該可穿透黏著層內，將第一半導體晶粒安裝到該暫時性載體；以及將一封裝材料沈積在第一半導體晶粒上。於沈積該封裝材料的同時，埋置於該可穿透黏著層內的凸塊可減少第一半導體晶粒的移動。該方法進一步包括以下步驟：移除該暫時性載體與可穿透黏著層，以及將一互連結構形成在該半導體晶粒上。該互連結構會被電性連接到該凸塊。
在另一個實施例中，本發明係為一種製造半導體裝置的方法，其係包含以下步驟：提供一載體；形成一黏著層於該載體上；提供一第一半導體晶粒，其係具有複數個凸塊形成在第一半導體晶粒的一表面上；藉由將該凸塊埋置於該黏著層內，以將第一半導體晶粒安裝到該載體；將一封裝材料沈積在第一半導體晶粒上；移除該載體；以及形成一互連結構於該半導體晶粒上。
在另一個實施例中，本發明係為一種製造半導體裝置的方法，其係包含以下步驟：提供一第一半導體晶粒，其係具有複數個凸塊形成在第一半導體晶粒的一表面上；將第一半導體晶粒的凸塊埋置於一黏著層內；將一封裝材料沈積在第一半導體晶粒上；以及形成一互連結構於該半導體晶粒上。
在另一個實施例中，本發明係為一種半導體裝置，其係包含：一黏著層；以及第一半導體晶粒，其係具有複數個凸塊形成在第一半導體晶粒的一表面上。該凸塊係被埋置於該黏著層內。一封裝材料係沈積在第一半導體晶粒上。一互連結構係形成於該半導體晶粒上。
本發明係在參考圖式之以下說明中的一或更多實施例中被說明，其中相同數目代表相同或類似元件。雖然本發明係關於最佳模式來說明，以用於得到本發明之目的，但是熟習該技藝人士將理解到，其係傾向於涵蓋被包括在由以下揭露與圖式所支持之附加申請專利範圍與其等同物所定義之本發明精神與範圍內的替代方案、變更與等同物。
半導體裝置一般可使用兩複雜製造製程來製造：前端製造以及後端製造。前端製造包含將複數個晶粒形成在半導體晶圓表面上。在該晶圓上的每一個晶粒皆包含主動與被動電性元件，其係可被電性連接，以形成功能性電路。主動電性元件，譬如電晶體與二極體，其係具有控制電流流動的能力。被動電性元件，譬如電容器、電感器、電阻器與轉換器，其係會在進行電路功能所必要的電壓與電流之間產生關係。
被動與主動元件會藉由包括摻雜、沈積、光學微影、蝕刻與平面化的一連串製程步驟而被形成在半導體晶圓表面上。藉由譬如離子植入或熱擴散的技術，摻雜會將雜質引入到半導體材料內。該摻雜製程修改在主動裝置中半導體材料的導電率、將該半導體材料轉換成一絕緣體、導體、或者應一電場或基極電流來動態改變該半導體材料傳導率。電晶體包含當施加電場或基極電流時、為了致使電晶體促進或限制電流流動而排列之改變摻雜種類與程度的區域。
主動與被動元件係由具有不同電特性的材料層所形成。該些層可藉由被沈積之材料種類所部份決定的許多沈積技術來形成。例如，薄膜沈積包含化學蒸汽沈積(CVD)、物理蒸汽沈積(PVD)、電解電鍍以及無電電鍍製程。每一層通常會被圖案化，以形成主動元件、被動元件部份或元件之間的電性連接。
該些層可使用光學微影被圖案化，其係包含將例如光阻的光敏材料沈積在欲被圖案化之層上。一圖案可使用光線從一光遮罩傳送到光阻。受到光線的光阻圖案部份則可使用溶劑來移除，以暴露欲被圖案化的底層部份。剩下的光阻則可被移除，而留下一圖案化層。或者，藉由將材料直接沈積入藉由使用譬如無電與電解電鍍技術的先前沈積/蝕刻製程而形成的區域或空隙內，可將某些種類的材料圖案化。
將一薄膜材料沈積在現存圖案上，其係可誇大底層圖案並可產生一非均勻的平表面。對產生更小且更密集封裝的主動與被動元件而言，均勻平表面是必要的。平面化可被使用來將材料自晶圓表面移除，並可產生均勻平表面。平面化包含以拋光襯墊將晶圓表面拋光。研磨材料與腐蝕化物可在拋光期間內被添加到晶圓表面。該化物之研磨與腐蝕動作的合併機械動作可將任何不規則地形移除，以導致均勻的平表面。
後端製造意指將該拋光晶圓切割或切單成個別晶粒，隨後並且將該晶粒封裝，以用於結構性支撐與環境隔離。為了將該晶粒切單，該晶圓會沿著稱為鋸片街區或劃片之晶圓的非功能性區域被劃線與破壞。該晶圓可使用雷射切割工具或鋸片刀片被切單。在單一化以後，該個別晶粒會被安裝到一封裝基板，其係包括用於與其他系統元件互連的接腳或接觸襯墊。形成在半導體晶粒上的接觸襯墊隨後會被連接到在該封裝物內的接觸襯墊。該電性連接可以銲料凸塊、柱形凸塊、導電膏或佈線接合來進行。一種封裝材料或其它模鑄材料會被沈積在封裝物上，以提供物理支撐與電性隔離。該拋光的封裝物隨後會被插入於電性系統內，且該半導體裝置的功能對其他系統元件而言係為有效。
圖1顯示擁有具有複數個半導體封裝物被安裝於其表面之晶片載體基板或印刷電路板(PCB)52的電子裝置50。取決於該應用，電子裝置50具有一種半導體封裝物或複數種半導體封裝物。為了顯示之目的，不同種類的半導體封裝物係被顯示於圖1中。
電子裝置50係為獨立自足的系統，其係使用該半導體封裝物來進行一或更多的電性功能。或者，電子裝置50係為更大系統的子元件。例如，電子裝置50係為可被插入於電腦內的圖形卡、網路介面卡或其它訊號處理卡。該半導體封裝物包括微處理器、記憶體、特殊應用積體電路(ASIC)、邏輯電路、類比電路、射頻電路、離散裝置或其它半導體晶粒或電性元件。
在圖1中，PCB52提供一般性基板，以用於被安裝在PCB上之半導體封裝物的結構性支撐與電性互連。傳導訊號軌跡54使用蒸發、電解電鍍、無電電鍍、網版印刷或其它適當的金屬沈積製程而被形成在PCB52的表面上或諸層內。訊號軌跡54提供用於半導體封裝物、安裝元件與其他外部系統元件之任一個之間的電性通訊。軌跡54亦可同樣地提供功率與接地連接到每一個半導體封裝物。
在一些實施例中，半導體裝置具有兩封裝級。第一級封裝係為一種用於將半導體晶粒機械與電性附著到中間載體的技術。第二級封裝包含將該中間載體機械與電性附著到PCB。在其他實施例中，半導體裝置僅僅具有第一級封裝，在此該晶粒會被機械且電性地直接安裝到PCB。
為了顯示之目的，數種第一級封裝，包括接合佈線封裝56以及覆晶58，其係會被顯示於PCB52上。此外，數種第二級封裝，包括球柵陣列(BGA)60、凸塊晶片載體(BCC)62、雙排型封裝(DIP)64、地格柵陣列(LGA)66、多晶片模組(MCM)68、四方形扁平無引腳封裝(QFN)70以及四方形扁平封裝72，其係顯示被安裝在PCB52上。依據該系統需求規格，任何半導體封裝物之組合，以第一與第二級封裝型態以及其他電子元件的任何組合來架構，其係均可被連接到PCB52。在一些實施例中，電子裝置50包括單一附著的半導體封裝物，同時其他實施例則需要多重互連封裝物。藉由將一或更多個半導體封裝物組合在一單一基板上，製造商可將事先製造的元件合併到電子裝置與系統內。因為該半導體封裝物包括複雜的功能，所以電子裝置則可使用較便宜的元件以及流線製造製程來製造。結果所產生的裝置則不太可能失敗，並且製造上不會太貴，其係會造成消費者的成本下降。
圖2a-2c顯示模範半導體封裝物。圖2a顯示被安裝在PCB52上之DIP64的進一步細節。半導體晶粒74包括一主動區域，其包含類比或數位電路，其係實施當作被形成在該晶粒內的主動裝置、被動裝置、傳導層與介質層，其係並且根據該晶粒的電性設計而被電性互連。例如，該電路包括被形成在半導體晶粒74主動區域內的一或更多電晶體、二極體、電感器、電容器、電阻器與其他電路元件。接觸襯墊76係為一或更多層的傳導材料，譬如鋁(Al)、銅(Cu)、錫(Sn)、鎳(Ni)、金(Au)或銀(Ag)，其係並且電性連接到被形成在半導體晶粒74內的電路元件。在DIP64組裝期間內，使用金-矽共晶層或黏著材料，譬如熱環氧或環氧樹脂，半導體晶粒74會被安裝到中間載體78。該封裝物體部包括一絕緣性封裝材料，譬如聚合物或陶瓷。導體引線80與接合佈線82會提供電性互連於半導體晶粒74與PCB52之間。封裝材料84會被沈積在該封裝物上，以用於環境保護，其係藉由避免濕氣與顆粒進入該封裝物並且污染晶粒74或接合佈線82。
圖2b顯示安裝在PCB52上之BCC62的進一步細節。半導體晶粒88係使用下填或環氧樹脂黏著材料92被安裝在載體90上。接合佈線94提供第一級封裝互連於接觸襯墊96與98之間。模鑄化合物或封裝材料100會被沈積在半導體晶粒88與接合佈線94上，以提供物理支撐與電性絕緣給該裝置。接觸襯墊102係使用適當的金屬沈積製程，譬如電解電鍍或無電電鍍，被形成在PCB52的表面上，以避免氧化。接觸襯墊102會被電性連接到在PCB52中的一或更多傳導訊號軌跡54。凸塊104係形成在BCC62的接觸襯墊98以及PCB52的接觸襯墊102之間。
在圖2C中，半導體晶粒58係以覆晶型第一級封裝而面向下地安裝到中間載體106。半導體晶粒58的主動區域108包含類比或數位電路，其係被實施當作根據該晶粒之電性設計而形成的主動裝置、被動裝置、傳導層與介質層。例如，該電路可包括一或更多個電晶體、二極體、電感器、電容器、電阻器與其他電路元件於主動區域108內。半導體晶粒58係經由凸塊110被電性與機械性連接到載體106。
BGA60係使用凸塊112被電性且機械性連接到具有BGA型第二級封裝的PCB52。半導體晶粒58會經由凸塊110、訊號線114與凸塊112而被電性連接到在PCB52中的傳導訊號軌跡54。一種模鑄化合物或封裝材料116係被沈積在半導體晶粒58與載體106上，以提供物理性支撐與電性絕緣給該裝置。該覆晶半導體裝置提供從半導體晶粒58上主動裝置到PCB52上傳導軌跡的短導電路徑，以便減少訊號傳播距離，降低電容並且改善整個電路性能。在另一個實施例中，半導體晶粒58可使用不具有中間載體106的覆晶型第一級封裝而被機械且電性地直接連接到PCB52。
相關於圖1與2a-2c，圖3a-3g顯示一種埋置形成於半導體晶粒上之凸塊於可穿透黏著層的製程以減少在封裝化過程中晶粒之移動。圖3a顯示一種暫時性基板或載體120，其係包含犧牲基底材料，譬如矽、聚合物、聚合物合成物、金屬、陶瓷、玻璃、玻璃環氧樹脂、氧化鈹、或其它適當的低成本、剛性材料，以用於結構性支撐。可穿透的黏著層或帶子122則可被施加在載體120上。可穿透黏著層122係為單一或多層聚合物，譬如抗熱與機械應力的b-階硬化環氧樹脂。
在圖3b中，半導體晶粒124具有一主動表面126，其係包含類比或數位電路，其係被實施當作根據該晶粒的電性設計與功能而被形成在該晶粒內並且被電性互連的主動裝置、被動裝置、傳導層以及介質層。例如，該電路包括被形成在主動表面126內的一或更多電晶體、二極體與其他電路元件，以實施類比電路或數位電路，譬如數位訊號處理器(DSP)、ASIC、記憶體或其它訊號處理電路。半導體晶粒124亦可包含用於射頻訊號處理的整合被動元件，譬如電感器、電容器與電阻器。
電性傳導層128係使用PVD、CVD、電解電鍍、無電電鍍製程、或其它適當的金屬沈積製程而被形成在主動表面126上。傳導層128係為鋁、銅、錫、鎳、金、銀或其它適當導電材料的其中一層或更多層。傳導層128當作接觸襯墊來操作，其係被電性連接到在主動表面126上的電路。
導電凸塊材料係被沈積在接觸襯墊128上，其係使用蒸發、電解電鍍、無電電鍍、球降落或網版印刷製程。凸塊材料係為鋁、錫、鎳、金、銀、鉛、鉍、銅、銲料與其組合，其係具有選擇性流量方案。例如，凸塊材料係為共晶錫/鉛、高鉛銲料或無鉛銲料。該凸塊材料則使用適當的附著或接合製程而被接合到接觸襯墊128。在一種實施例中，該凸塊材料係藉由將該材料加熱到其熔點以上而回流，以形成圓球或凸塊130。在一些應用中，凸塊130可回流第二次，以改善到接觸襯墊128的電性連接。該些凸塊亦可被壓縮接合到接觸襯墊128。
半導體晶粒124係被安裝到載體120，力F則被施加到背表面132，以致使凸塊130穿透入黏著層122。在主動表面126緊鄰或接觸界面層122之頂表面以後，力F可被移除。圖3c顯示所有半導體晶粒124被安裝到載體120，其係具有凸塊130被埋置於可穿透黏著層122內。凸塊130會或不會接觸載體120表面。可穿透黏著層122會被固化，以使黏著層變硬並且安全地固持凸塊130。
在圖3d，封裝材料或模鑄化合物134，其係使用焊膏印刷、壓縮模鑄、轉移模鑄、液體封裝模鑄、真空積層、旋塗或其它適當施加器來沈積在半導體晶粒124與載體120上。封裝材料134係為聚合物合成材料，譬如具有填充物的環氧樹脂、具有填充物的環氧丙烯酸、或具有適當填充物的聚合物。封裝材料134係為非傳導性，其係並且在環境上可保護半導體裝置，使免於外部元件與污染。
以凸塊130埋置入可穿透黏著層122與被固化的黏著層，半導體晶粒124可在封裝材料134之沈積期間內仍維持固定。該埋置的凸塊130可將半導體晶粒124穩固地維持在適當之處，在將封裝材料134沈積與固化的同時，減少該晶粒的水平或垂直移動。假如可穿透黏著層122的玻璃轉移溫度(Tg)小於封裝材料134之Tg的話，那麼黏著層則可與封裝材料一起同時被固化。
在圖3e中，暫時性載體120與可穿透黏著層122可藉由化學蝕刻、機械剝離、化學機械拋光、機械研磨、熱烘烤、紫外光、雷射掃瞄或濕式剝除來移除。凸塊130則可自接觸襯墊128曝露。
在圖3f中，底側建立互連結構136會被形成在半導體晶粒124與封裝材料134的主動表面126上。該建立互連結構136包括使用圖案化與金屬沈積製程(譬如濺射、電解電鍍與無電電鍍)來形成的電性傳導層138。傳導層138係為鋁、銅、錫、鎳、金、銀或其它適當導電材料的其中之一或更多層。一部份的傳導層138會被電性連接到半導體晶粒124的凸塊130與接觸襯墊128。其他部份的傳導層138則依據半導體裝置的設計與功能而被電性共用或電性隔離。
該建立互連結構136進一步包括形成在傳導層138之間的一絕緣或鈍化層140，其係並且包含二氧化矽(SiO2)、氮化矽(Si3N4)、氧氮化矽(SiON)、氧化鉭(Ta2O5)、氧化鋁(Al2O3)、或具有類似絕緣與結構特性之其他材料的其中一層或更多層。絕緣層140係使用PVD、CVD、印刷、旋塗、噴塗、燒結或熱氧化來形成。凸塊130則被埋置於絕緣層140內。
在圖3g，導電凸塊材料係被沈積在建立互連結構136上，其係並且使用蒸發、電解電鍍、無電電鍍、球降落或網版印刷製程而被電性連接到傳導層138。凸塊材料係為鋁、錫、鎳、金、銀、鉛、鉍、銅、銲料與其組合，其係具有選擇性流量方案。例如，凸塊材料係為共晶錫/鉛、高鉛銲料或無鉛銲料。該凸塊材料則使用適當的附著或接合製程而被接合到傳導層138。在一種實施例中，該凸塊材料係藉由將該材料加熱到其熔點以上而回流，以形成圓球或凸塊142。在一些應用中，凸塊142可回流第二次，以改善到傳導層138的電性接觸。該些凸塊亦可被壓縮接合到傳導層138。凸塊142代表一種可形成在傳導層138上的互連結構。該互連結構亦可使用接合佈線、柱形凸塊、微凸塊或其它電性互連。
半導體晶粒124會用鋸片刀片或雷射切割工具144被切單成各別扇出晶圓級晶片尺寸封裝146。
圖4顯示在單一化以後的扇出晶圓級晶片尺寸封裝146。半導體晶粒124會被電性連接到建立互連結構136與凸塊142。以凸塊130埋置入可穿透黏著層122，半導體晶粒124可在封裝材料134之沈積期間內仍維持固定於適當之處。該埋置的凸塊130可將半導體晶粒124穩固地維持在適當之處，在將封裝材料134沈積與固化的同時，減少該晶粒的水平或垂直移動。如在背景中所說明的，藉由消除將濕式接觸襯墊或通道形成在互連結構以暴露接觸襯墊之需求，該埋置的凸塊130亦可簡化該製造製程。
在另一實施例中，自圖3b延續，半導體晶粒124係被安裝到載體120，力F則被施加到背表面132，以致使凸塊130穿透入黏著層122。在此情形中，凸塊130可穿透黏著層122到一深度，該深度會使主動表面126自可穿透黏著層122的頂表面位移間隙148，如圖5a所示。圖5b顯示所有半導體晶粒124被安裝到載體120，其係具有凸塊130被埋置於可穿透黏著層122內，同時在主動表面126與黏著層之間留有間隙148。凸塊130會或不會接觸載體120表面。可穿透黏著層122會被固化，以使黏著層變硬並且安全地固持凸塊130。
在圖5c，封裝材料或模鑄化合物150，其係使用焊膏印刷、壓縮模鑄、轉移模鑄、液體封裝模鑄、真空積層、旋塗或其它適當施加器來沈積在半導體晶粒124與載體120上。封裝材料150充填主動表面126與可穿透黏著層122之間的間隙148。封裝材料150係為聚合物合成材料，譬如具有填充物的環氧樹脂、具有填充物的環氧丙烯酸、或具有適當填充物的聚合物。封裝材料150係為非傳導性，其係並且在環境上可保護半導體裝置，使免於外部元件與污染。
以凸塊130埋置入可穿透黏著層122與被固化的黏著層，半導體晶粒124可在封裝材料150之沈積期間內仍維持固定。該埋置的凸塊130可將半導體晶粒124穩固地維持在適當之處，在將封裝材料150沈積與固化的同時，減少該晶粒的水平或垂直移動。假如可穿透黏著層122的Tg小於封裝材料150之Tg的話，那麼黏著層則可與封裝材料一起同時被固化。
在圖5d中，暫時性載體120與可穿透黏著層122可藉由化學蝕刻、機械剝離、化學機械拋光、機械研磨、熱烘烤、紫外光、雷射掃瞄或濕式剝除來移除。封裝材料150仍然覆蓋主動表面126並且當作在半導體晶粒124與建立互連結構152之間的應力鬆弛緩衝物。凸塊130則可自封裝材料150被曝露。
在圖5e中，底側建立互連結構152會被形成在封裝材料150上。該建立互連結構152包括使用圖案化與金屬沈積製程(譬如濺射、電解電鍍與無電電鍍)來形成的電性傳導層154。傳導層154係為鋁、銅、錫、鎳、金、銀或其它適當導電材料的其中之一或更多層。一部份的傳導層154會被電性連接到半導體晶粒124的凸塊130與接觸襯墊128。其他部份的傳導層154則可依據半導體裝置的設計與功能而被電性共用或電性隔離。
該建立互連結構152進一步包括形成在傳導層154之間的一絕緣或鈍化層156，其係並且包含二氧化矽(SiO2)、氮化矽(Si3N4)、氧氮化矽(SiON)、氧化鉭(Ta2O5)、氧化鋁(Al2O3)、或具有類似絕緣與結構特性之其他材料的其中一層或更多層。絕緣層156係使用PVD、CVD、印刷、旋塗、噴塗、燒結或熱氧化來形成。凸塊130則被部份埋置於絕緣層156內。
在圖5f，導電凸塊材料係被沈積在建立互連結構152上，其係並且使用蒸發、電解電鍍、無電電鍍、球降落或網版印刷製程而被電性連接到傳導層154。凸塊材料係為鋁、錫、鎳、金、銀、鉛、鉍、銅、銲料與其組合，其係具有選擇性流量方案。例如，凸塊材料係為共晶錫/鉛、高鉛銲料或無鉛銲料。該凸塊材料則使用適當的附著或接合製程而被接合到傳導層154。在一種實施例中，該凸塊材料係藉由將該材料加熱到其熔點以上而回流，以形成圓球或凸塊158。在一些應用中，凸塊158可回流第二次，以改善到傳導層154的電性接觸。該些凸塊亦可被壓縮接合到傳導層154。凸塊158代表一種可形成在傳導層154上的互連結構。該互連結構亦可使用接合佈線、柱形凸塊、微凸塊或其它電性互連。
半導體晶粒124會用鋸片刀片或雷射切割工具160被切單成各別扇出晶圓級晶片尺寸封裝162。
圖6顯示在單一化以後的扇出晶圓級晶片尺寸封裝162。半導體晶粒124會被電性連接到建立互連結構152與凸塊158。以凸塊130埋置入可穿透黏著層122，半導體晶粒124可在封裝材料150之沈積期間內仍維持固定於適當之處。該埋置的凸塊130可將半導體晶粒124穩固地維持在適當之處，在將封裝材料150沈積與固化的同時，減少該晶粒的水平或垂直移動。如在背景中所說明的，藉由消除將濕式接觸襯墊或通道形成在互連結構以暴露接觸襯墊128之需求，該埋置的凸塊130亦可簡化該製造製程。以半導體晶粒124與可穿透黏著層122之間的間隙148，封裝材料150能夠覆蓋主動表面126，以提供應力鬆弛於該半導體晶粒與建立互連結構之間。
圖7a顯示具有暫時性基板或載體170的另一實施例，其係包含犧牲基底材料，譬如矽、聚合物、聚合物合成物、金屬、陶瓷、玻璃、玻璃環氧樹脂、氧化鈹、或其它適當的低成本、剛性材料，以用於結構性支撐。黏著層或帶子172則可被施加在載體170上。黏著層172係為單一或多層聚合物，譬如抗熱與機械應力的b-階硬化環氧樹脂。
複數個開口或狹縫173係藉由機械鑽孔、蝕刻或雷射切割而被形成在黏著層172中。狹縫173對應形成在被安裝到載體170之半導體晶粒174之凸塊180的位置，其係並且操作當作對準標記，以避免精確接合設備的需求。狹縫173的深度實質等於或稍微大於或小於凸塊180的高度，且狹縫173的寬度實質等於或稍微小於凸塊180的寬度，以在凸塊與黏著層122之間形成緊密的接合。如圖7b所示，選擇性圖案化膠膏或黏膠175可被沈積入狹縫173，以用於較佳黏著到凸塊180。
在圖7c中，半導體晶粒174具有一主動表面176，其係包含類比或數位電路，其係被實施當作根據該晶粒的電性設計與功能而被形成在該晶粒內並且被電性互連的主動裝置、被動裝置、傳導層以及介質層。例如，該電路包括被形成在主動表面176內的一或更多電晶體、二極體與其他電路元件，以實施類比電路或數位電路，譬如數位訊號處理器(DSP)、ASIC、記憶體或其它訊號處理電路。半導體晶粒174亦可包含用於射頻訊號處理的整合被動元件，譬如電感器、電容器與電阻器。
電性傳導層178係使用PVD、CVD、電解電鍍、無電電鍍製程、或其它適當的金屬沈積製程而被形成在主動表面126上。傳導層178係為鋁、銅、錫、鎳、金、銀或其它適當導電材料的其中一層或更多層。傳導層178當作接觸襯墊來操作、其係被電性連接到在主動表面176上的電路。
導電凸塊材料係使用蒸發、電解電鍍、無電電鍍、球降落或網版印刷製程而被沈積在接觸襯墊178上。凸塊材料係為鋁、錫、鎳、金、銀、鉛、鉍、銅、銲料與其組合，其係具有選擇性流量方案。例如，凸塊材料係為共晶錫/鉛、高鉛銲料或無鉛銲料。該凸塊材料則使用適當的附著或接合製程而被接合到接觸襯墊178。在一種實施例中，該凸塊材料係藉由將該材料加熱到其熔點以上而回流，以形成圓球或凸塊180。在一些應用中，凸塊180可回流第二次，以改善到接觸襯墊178的電性連接。該些凸塊亦可被壓縮接合到接觸襯墊178。
半導體晶粒174係被對準並且被安裝到載體170，力F則被施加到背表面181，以致使凸塊180穿透入黏著層122的狹縫173內。在主動表面176緊鄰或接觸界面層172之頂表面以後，力F可被移除。圖7d顯示所有半導體晶粒174被安裝到載體170，其係具有凸塊180被埋置於黏著層172的狹縫173內。可穿透黏著層172會被固化，以使黏著層變硬並且安全地固持凸塊180。
在圖7e，封裝材料或模鑄化合物184，其係使用焊膏印刷、壓縮模鑄、轉移模鑄、液體封裝模鑄、真空積層、旋塗或其它適當施加器來沈積在半導體晶粒174與載體170上。封裝材料184係為聚合物合成材料，譬如具有填充物的環氧樹脂、具有填充物的環氧丙烯酸、或具有適當填充物的聚合物。封裝材料184係為非傳導性，其係並且在環境上可保護半導體裝置，使免於外部元件與污染。
以凸塊180埋置入黏著層172與被固化的黏著層內，半導體晶粒174可在封裝材料184之沈積期間內仍維持固定。該埋置的凸塊180可將半導體晶粒174穩固地維持在適當之處，在將封裝材料184沈積與固化的同時，減少該晶粒的水平或垂直移動。假如可穿透黏著層172的Tg小於封裝材料184之Tg的話，那麼黏著層則可與封裝材料一起同時被固化。
在圖7f中，暫時性載體170與黏著層172可藉由化學蝕刻、機械剝離、化學機械拋光、機械研磨、熱烘烤、紫外光、雷射掃瞄或濕式剝除來移除。凸塊180則可自接觸襯墊178曝露。
在圖7g中，底側建立互連結構186會被形成在半導體晶粒174與封裝材料184的主動表面176上。該建立互連結構186包括使用圖案化與金屬沈積製程(譬如濺射、電解電鍍與無電電鍍)來形成的電性傳導層188。傳導層188係為鋁、銅、錫、鎳、金、銀或其它適當導電材料的其中之一或更多層。一部份的傳導層188會被電性連接到半導體晶粒174的凸塊180與接觸襯墊178。其他部份的傳導層188則依據半導體裝置的設計與功能而被電性共用或電性隔離。
該建立互連結構186進一步包括形成在傳導層188之間的一絕緣或鈍化層190，其係並且包含二氧化矽(SiO2)、氮化矽(Si3N4)、氧氮化矽(SiON)、氧化鉭(Ta2O5)、氧化鋁(Al2O3)、或具有類似絕緣與結構特性之其他材料的其中一層或更多層。絕緣層190係使用PVD、CVD、印刷、旋塗、噴塗、燒結或熱氧化來形成。凸塊180則被埋置於絕緣層190內。
在圖7h，導電凸塊材料係被沈積在建立互連結構186上，其係並且使用蒸發、電解電鍍、無電電鍍、球降落或網版印刷製程而被電性連接到傳導層188。凸塊材料係為鋁、錫、鎳、金、銀、鉛、鉍、銅、銲料與其組合，其係具有選擇性流量方案。例如，凸塊材料係為共晶錫/鉛、高鉛銲料或無鉛銲料。該凸塊材料則使用適當的附著或接合製程而被接合到傳導層188。在一種實施例中，該凸塊材料係藉由將該材料加熱到其熔點以上而回流，以形成圓球或凸塊192。在一些應用中，凸塊192可回流第二次，以改善到傳導層188的電性接觸。該些凸塊亦可被壓縮接合到傳導層188。凸塊192代表一種可形成在傳導層188上的互連結構。該互連結構亦可使用接合佈線、柱形凸塊、微凸塊或其它電性互連。
半導體晶粒174會用鋸片刀片或雷射切割工具193被切單成各別扇出晶圓級晶片尺寸封裝。
在另一個實施例中，自圖7d起延續，封裝材料或模鑄化合物194，其係使用焊膏印刷、壓縮模鑄、轉移模鑄、液體封裝模鑄、真空積層、旋塗或其它適當施加器來沈積在半導體晶粒174與載體170上，如圖8a所示。封裝材料194係為聚合物合成材料，譬如具有填充物的環氧樹脂、具有填充物的環氧丙烯酸、或具有適當填充物的聚合物。封裝材料194係為非傳導性，其係並且在環境上可保護半導體裝置，使免於外部元件與污染。
在圖8b中，暫時性載體170可藉由化學蝕刻、機械剝離、化學機械拋光、機械研磨、熱烘烤、紫外光、雷射掃瞄或濕式剝除來移除。在此情形中，黏著層172仍然在主動表面176與凸塊180上。
在圖8c中，底側建立互連結構196會被形成在半導體晶粒174與封裝材料184的主動表面176上。該建立互連結構196包括使用圖案化與金屬沈積製程(譬如濺射、電解電鍍與無電電鍍)來形成的電性傳導層198。傳導層198係為鋁、銅、錫、鎳、金、銀或其它適當導電材料的其中之一或更多層。一部份的傳導層198會被電性連接到半導體晶粒174的凸塊180與接觸襯墊178。其他部份的傳導層198則依據半導體裝置的設計與功能而被電性共用或電性隔離。
該建立互連結構196進一步包括形成在傳導層198之間的一絕緣或鈍化層200，其係並且包含二氧化矽(SiO2)、氮化矽(Si3N4)、氧氮化矽(SiON)、氧化鉭(Ta2O5)、氧化鋁(Al2O3)、或具有類似絕緣與結構特性之其他材料的其中一層或更多層。絕緣層200係使用PVD、CVD、印刷、旋塗、噴塗、燒結或熱氧化來形成。
在圖8d，導電凸塊材料係被沈積在建立互連結構196上，其係並且使用蒸發、電解電鍍、無電電鍍、球降落或網版印刷製程而被電性連接到傳導層198。凸塊材料係為鋁、錫、鎳、金、銀、鉛、鉍、銅、銲料與其組合，其係具有選擇性流量方案。例如，凸塊材料係為共晶錫/鉛、高鉛銲料或無鉛銲料。該凸塊材料則使用適當的附著或接合製程而被接合到傳導層198。在一種實施例中，該凸塊材料係藉由將該材料加熱到其熔點以上而回流，以形成圓球或凸塊202。在一些應用中，凸塊202可回流第二次，以改善到傳導層198的電性接觸。該些凸塊亦可被壓縮接合到傳導層198。凸塊202代表一種可形成在傳導層198上的互連結構。該互連結構亦可使用接合佈線、柱形凸塊、微凸塊或其它電性互連。
半導體晶粒174會用鋸片刀片或雷射切割工具204被切單成各別扇出晶圓級晶片尺寸封裝。
圖9顯示一種實施例，自圖4起延續，其係具有複數個虛擬凸塊210形成在主動表面126上。虛擬凸塊210係與凸塊130同時地形成並且穿透黏著層122，如圖3b所說明。該互連結構136係被形成在虛擬凸塊210上，以致於該虛擬凸塊能夠被埋置入絕緣層140內。虛擬凸塊210不具有任何電性連接到主動表面126內的電路或到傳導層138，但卻提供額外的機械互鎖強度於半導體晶粒124與建立互連結構136之間。
圖10顯示一種實施例，自圖4延續，具有複數個通道形成經過互連結構136。該些通道會被填以鋁、銅或具有熱傳導性的另一材料，以形成熱傳導通道212。凸塊142a會被電性連接到傳導層138，以用於供電與訊號傳送。熱傳導通道212係被粉末冶金地連接到凸塊142b，以提供散熱路徑，以將熱引導離開半導體晶粒124。
圖11顯示一種實施例，自圖10延續，其係具有散熱片或散熱裝置214被安裝到建立互連結構136並且被連接到熱傳導通道212。PCB216係被安裝到散熱片214與凸塊142。熱傳導通道212、散熱片214與PCB216之組合提供散熱路徑，以將熱引導離開半導體晶粒124。選擇性熱界面材料(TIM)218則可被形成在散熱片212的一或兩表面上。TIM218係為氧化鋁、氧化鋅、氮化硼或銀粉末。TIM218有助於將半導體晶粒124所產生的熱分佈與耗散。
圖12顯示一種實施例，自圖4延續，其係具有凸塊220形成在主動表面126上。為了使電阻更低、電流攜帶能力更大以及改善電性能，凸塊220具有的截面面積大於凸塊130。
圖13顯示一種實施例，自圖6延續，其係具有重新分佈層(RDL)222被形成在封裝材料150上並且被電性連接到在建立互連結構152中的傳導層154。RDL222會被電性連接於凸塊130與凸塊158之間。
圖14顯示一種實施例，自圖4延續，半導體晶粒224具有一主動表面226，其係包含類比或數位電路，其係被實施當作根據該晶粒的電性設計與功能而被形成在該晶粒內並且被電性互連的主動裝置、被動裝置、傳導層以及介質層。例如，該電路包括被形成在主動表面226內的一或更多電晶體、二極體與其他電路元件，以實施類比電路或數位電路，譬如數位訊號處理器(DSP)、ASIC、記憶體或其它訊號處理電路。半導體晶粒224亦可包含用於射頻訊號處理的整合被動元件，譬如電感器、電容器與電阻器。複數個接觸襯墊228係被形成在主動表面226上並被電性連接到主動表面上的電路。複數個凸塊230係被形成在接觸襯墊228上。半導體晶粒224係藉由將凸塊230電性連接到傳導層138而被安裝到建立互連結構136。各別的被動或主動元件則同樣地被安裝到建立互連結構136。
雖然本發明的一或更多實施例已經被詳細說明，但是熟習該技藝人士將理解，在不背離以下申請專利範圍所陳述的本發明範圍之下，可對那些實施例進行修改與改編。
50．．．電子裝置
52．．．印刷電路板(PCB)
54．．．傳導訊號軌跡
56．．．接合佈線封裝
58．．．覆晶
60．．．球柵陣列(BGA)
62．．．凸塊晶片載體(BCC)
64．．．雙排型封裝(DIP)
66．．．地格柵陣列(LGA)
68．．．多晶片模組(MCM)
70．．．四方形扁平無引腳封裝(QFN)
72．．．四方形扁平封裝
74．．．半導體晶粒
76．．．接觸襯墊
78．．．中間載體
80．．．導體引線
82．．．接合佈線
84．．．封裝材料
88．．．半導體晶粒
90．．．載體
92．．．下填或環氧樹脂黏著材料
94．．．接合佈線
96．．．接觸襯墊
98．．．接觸襯墊
100．．．模鑄化合物或封裝材料
102．．．接觸襯墊
104．．．凸塊
106．．．中間載體
108．．．主動區域
110．．．凸塊
112．．．凸塊
114．．．訊號線
116．．．模鑄化合物或封裝材料
120．．．暫時性基板或載體
122．．．可穿透黏著層
124．．．半導體晶粒
126．．．主動表面
128．．．電性傳導層
130．．．圓球或凸塊
132．．．背表面
134．．．封裝材料或模鑄化合物
136．．．底側建立互連結構
138．．．電性傳導層
140．．．絕緣或鈍化層
142．．．圓球或凸塊
142a．．．凸塊
142b．．．凸塊
144．．．鋸片刀片或雷射切割工具
146．．．扇出晶圓級晶片尺寸封裝
148．．．間隙
150．．．封裝材料
152．．．建立互連結構
154．．．傳導層
156．．．絕緣或鈍化層
158．．．凸塊
160．．．鋸片刀片或雷射切割工具
162．．．扇出晶圓級晶片尺寸封裝
170．．．暫時性基板或載體
172．．．黏著層或帶子
173．．．開口或狹縫
174．．．半導體晶粒
175．．．圖案化膠膏或黏膠
176．．．主動表面
180．．．凸塊
181．．．背表面
184．．．封裝材料或模鑄化合物
186．．．建立互連結構
188．．．電性傳導層
190．．．絕緣或鈍化層
192‧‧‧凸塊
193‧‧‧鋸片刀片或雷射切割工具
194‧‧‧封裝材料或模鑄化合物
196‧‧‧底側建立互連結構
198‧‧‧電性傳導層
200‧‧‧絕緣或鈍化層
202‧‧‧凸塊
204‧‧‧鋸片刀片或雷射切割工具
212‧‧‧熱傳導通道
214‧‧‧散熱片或散熱裝置
216‧‧‧印刷電路板PCB
218‧‧‧選擇性熱界面材料(TIM)
220‧‧‧凸塊
222‧‧‧重新分佈層(RDL)
224‧‧‧半導體晶粒
226‧‧‧主動表面
228‧‧‧接觸襯墊
230‧‧‧凸塊
圖1顯示具有不同型態封裝物被安裝到其表面的PCB；
圖2a-2c顯示被安裝到PCB之代表性半導體封裝物的進一步細節；
圖3a-3g顯示一種將形成在半導體晶粒上的凸塊埋置於可穿透黏著層內的製程，以減少在封裝期間內之晶粒移動；
圖4顯示具有被埋置於該建立互連結構之凸塊的半導體晶粒；
圖5a-5f顯示一種將凸塊埋置於在半導體晶粒與互連結構之間具有間隙之該可穿透黏著層內的製程；
圖6顯示具有凸塊被埋置於該互連結構內以及在該半導體晶粒與互連結構之間具有一間隙的半導體晶粒；
圖7a-7h顯示一種將凸塊埋置於形成在黏著層中之狹縫的製程；
圖8a-8d顯示一種將凸塊埋置於形成在黏著層中之狹縫的製程，該黏著層仍在該互連結構上；
圖9顯示具有虛擬凸塊被埋置於該互連結構內的半導體晶粒；
圖10顯示具有熱傳導凸塊被埋置於該互連結構內的半導體晶粒；
圖11顯示具有熱傳導凸塊與散熱片被安裝到該互連結構的半導體晶粒；
圖12顯示具有大型凸塊被埋置於該互連結構內的半導體晶粒；
圖13顯示具有RDL被形成在該互連結構內的半導體晶粒；以及
圖14顯示被安裝到該互連結構的第二半導體晶粒。
124．．．半導體晶粒
126．．．主動表面
128．．．電性傳導層
130．．．圓球或凸塊
132．．．背表面
134．．．封裝材料或模鑄化合物
136．．．底側建立互連結構
138．．．電性傳導層
140．．．絕緣或鈍化層
142．．．圓球或凸塊
146．．．扇出晶圓級晶片尺寸封裝

Claims (25)

  1. 一種製造半導體裝置的方法，包含：提供一基板；形成一黏著層於該基板上；提供一第一半導體晶粒，其係具有複數個凸塊形成在第一半導體晶粒的一表面上；藉由將該凸塊埋置於該黏著層內，將第一半導體晶粒安裝到該基板；將一封裝材料沈積在第一半導體晶粒上；移除該基板而在移除該基板之後保留該黏著層；以及形成一互連結構於該黏著層上，該互連結構有電性連接到該第一半導體晶粒的該些凸塊。
  2. 如申請專利範圍第1項之方法，其中埋置於該黏著層內的凸塊可於該封裝材料沈積的同時，減少第一半導體晶粒的移動。
  3. 如申請專利範圍第1項之方法，進一步包括形成複數個狹縫於該黏著層中。
  4. 如申請專利範圍第1項之方法，進一步包括形成一重新分佈層於該封裝材料上。
  5. 如申請專利範圍第1項之方法，進一步包括將一第二半導體晶粒或元件安裝到與第一半導體晶粒相反的互連結構表面。
  6. 如申請專利範圍第1項之方法，其中第一個凸塊具有比第二個凸塊更大的截面面積。
  7. 一種製造半導體裝置的方法，包含：提供一第一半導體晶粒，其係具有複數個凸塊形成在第一半導體晶粒的一表面上；將第一半導體晶粒的凸塊部分地埋置於一黏著層內以取代該第一半導體晶粒的該表面為該黏著層；將一封裝材料沈積在第一半導體晶粒上以及於該黏著層和該第一半導體晶粒的該表面之間；在沈積該封裝材料之後移除該黏著層；以及形成一互連結構於該封裝材料上，其包含該封裝材料的一部分是被沈積在該第一半導體晶粒的該表面上。
  8. 如申請專利範圍第7項之方法，進一步包括：提供一基板；形成該黏著層於該基板上；以及在沈積該封裝材料以後，將該基板移除。
  9. 如申請專利範圍第7項之方法，進一步包括將複數個狹縫形成在該黏著層中。
  10. 如申請專利範圍第7項之方法，進一步包括：形成一熱傳導凸塊於第一半導體晶粒的表面上；以及將一散熱片安裝到該互連結構，該散熱片會被熱連接到該熱傳導凸塊。
  11. 如申請專利範圍第7項之方法，進一步包括放置一第二半導體晶粒或元件於與第一半導體晶粒相反的互連結構表面之上。
  12. 如申請專利範圍第7項之方法，進一步包括形成一 重新分佈層於該封裝材料上。
  13. 一種半導體裝置，包含：一第一半導體晶粒，其含有一第一凸塊形成在第一半導體晶粒的一表面上；一可穿透黏著層，其被放置在該第一半導體晶粒之上且該第一凸塊被埋置於該可穿透黏著層內以取代該第一半導體晶粒的該表面為該可穿透黏著層；以及一封裝材料，其係沈積在第一半導體晶粒上以及該可穿透黏著層和該第一半導體晶粒的該表面之間。
  14. 如申請專利範圍第13項之半導體裝置，其中該第一凸塊被埋置於該可穿透黏著層內以減少該第一半導體晶粒的移動。
  15. 如申請專利範圍第13項之半導體裝置，進一步包括一互連結構，其係形成於該半導體晶粒上並且被電性連接到該第一凸塊。
  16. 如申請專利範圍第13項之半導體裝置，進一步包括一第二凸塊，其被放置於該半導體晶粒上，該第二凸塊包括一截面面積大於該第一凸塊。
  17. 如申請專利範圍第13項之半導體裝置，進一步包括複數個開口形成在該黏著層中。
  18. 如申請專利範圍第15項之半導體裝置，進一步包括：一熱傳導通道，其係形成於該互連結構中；以及一散熱片，其係放置於該互連結構之相反於該第一半導體晶粒的一表面上並且被連接到該熱傳導通道。
  19. 如申請專利範圍第15項之半導體裝置，進一步包括一第二半導體晶粒或元件，其係放置於該互連結構之相反於該第一半導體晶粒的一表面上。
  20. 一種半導體裝置，包含：一第一半導體晶粒，其包括凸塊形成於該半導體晶粒的一表面上；包含複數個開口的一黏著層，其被放置於該第一半導體晶粒上，其中該些凸塊被埋置在該黏著層中的該些開口中；以及一封裝材料，其係沈積在第一半導體晶粒上。
  21. 如申請專利範圍第20項之半導體裝置，其中該凸塊中的第一個係形成於該第一半導體晶粒的一表面上並且至少部分地被埋置在該黏著層中已減少該第一半導體晶粒的移動。
  22. 如申請專利範圍第20項之半導體裝置，進一步包括一互連結構，其係形成於該第一半導體晶粒上。
  23. 如申請專利範圍第22項之半導體裝置，進一步包括一熱傳導通道，其係形成於該互連結構中。
  24. 如申請專利範圍第22項之半導體裝置，進一步包括一散熱片，其係放置於該互連結構之相反於該第一半導體晶粒的一表面上。
  25. 如申請專利範圍第22項之半導體裝置，進一步包括一第二半導體晶粒或元件，其係放置於該互連結構之相反於該第一半導體晶粒的一表面上。
TW100115333A 2010-05-13 2011-05-02 埋置形成於半導體晶粒上之凸塊於可穿透黏著層中之半導體裝置及方法以減少在單一化過程中晶粒之移動 TWI550739B (zh)

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