TWI479967B - Solder precoating method - Google Patents
Solder precoating method Download PDFInfo
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- TWI479967B TWI479967B TW097121380A TW97121380A TWI479967B TW I479967 B TWI479967 B TW I479967B TW 097121380 A TW097121380 A TW 097121380A TW 97121380 A TW97121380 A TW 97121380A TW I479967 B TWI479967 B TW I479967B
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- 229910000679 solder Inorganic materials 0.000 title claims description 131
- 238000000034 method Methods 0.000 title claims description 11
- 239000000758 substrate Substances 0.000 claims description 63
- 238000000576 coating method Methods 0.000 claims description 8
- 239000011248 coating agent Substances 0.000 claims description 6
- 239000011295 pitch Substances 0.000 description 19
- 239000000463 material Substances 0.000 description 6
- 239000000843 powder Substances 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 230000004907 flux Effects 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 238000011156 evaluation Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000001556 precipitation Methods 0.000 description 2
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- 229910020816 Sn Pb Inorganic materials 0.000 description 1
- 229910020836 Sn-Ag Inorganic materials 0.000 description 1
- 229910020922 Sn-Pb Inorganic materials 0.000 description 1
- 229910020988 Sn—Ag Inorganic materials 0.000 description 1
- 229910008783 Sn—Pb Inorganic materials 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000004359 castor oil Substances 0.000 description 1
- 235000019438 castor oil Nutrition 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- ZEMPKEQAKRGZGQ-XOQCFJPHSA-N glycerol triricinoleate Natural products CCCCCC[C@@H](O)CC=CCCCCCCCC(=O)OC[C@@H](COC(=O)CCCCCCCC=CC[C@@H](O)CCCCCC)OC(=O)CCCCCCCC=CC[C@H](O)CCCCCC ZEMPKEQAKRGZGQ-XOQCFJPHSA-N 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
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- 150000002739 metals Chemical class 0.000 description 1
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- 239000001301 oxygen Substances 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 238000005496 tempering Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
Description
本發明係關於在欲組裝電子零件的電路基板之電極部上,將焊料施行預塗而成的焊料預塗基板、使用其之組裝基板及焊料預塗方法。The present invention relates to a solder pre-coated substrate in which solder is pre-coated on an electrode portion of a circuit board on which electronic components are to be assembled, an assembly substrate using the same, and a solder pre-coating method.
近年,隨電子機器、電子零件的小型化,電子電路基板的電極亦在狹窄範圍內,依極狹窄間隔形成多數電極,使電子電路基板的電極部(焊墊)排列間距呈細微化。例如在半導體封裝時,泛用具有利用絕緣膜(防焊膜,solder mask)被覆著依細微間距排列的佈線圖案、並將從絕緣膜露出的佈線圖案區域視為電極部之電路圖案的電子電路基板,藉由在此種電子電路基板的電極部預先形成焊料層(預塗焊料),便可經由該焊料層將半導體晶片端子(電子零件)接合於基板。此處,當對電子電路基板之經細微間距化的電極部施行焊料預塗時,因為將頗難如習知般的利用網版印刷法等將焊料膏劑正確地施行印刷,因而一般均採取將焊料膏劑全面塗佈於電路基板上之後,經加熱,便將焊料預塗於各電極部表面上的方法。In recent years, with the miniaturization of electronic equipment and electronic components, the electrodes of the electronic circuit board are also formed in a narrow range, and a plurality of electrodes are formed at extremely narrow intervals, so that the arrangement pitch of the electrode portions (pads) of the electronic circuit board is fine. For example, in the case of a semiconductor package, an electronic circuit having a wiring pattern in which a fine pitch is arranged by an insulating film (solder mask) and a wiring pattern region exposed from the insulating film is regarded as a circuit pattern of an electrode portion is used. In the substrate, a solder layer (pre-coated solder) is formed in advance on the electrode portion of the electronic circuit board, whereby the semiconductor wafer terminal (electronic component) can be bonded to the substrate via the solder layer. Here, when the solder pre-coating is performed on the finely pitched electrode portion of the electronic circuit board, it is generally difficult to accurately perform the printing of the solder paste by a screen printing method or the like as usual, and thus generally adopts After the solder paste is completely coated on the circuit board, the solder is pre-coated on the surface of each electrode portion by heating.
但是,在電極部的排列間距越趨於細微化的演進中,於利用將焊料膏劑全面塗佈於基板上並施行加熱,而將焊料施行預塗的方法中,當將焊料預塗於基板電極部上之時,將因焊料表面張力、濕潤性等影響而發生各種問題。具體而言,將發生下述問題:1)如圖4所示,在各電極部3a、 3b間,所形成焊料4的最大突起部位置將不同的問題;2)如圖5所示,在單一電極部3內,焊料4的突起部將會形成複數個的問題;3)如圖6所示,對電極側面的焊料層形成將較優先,導致在電極部3上面所形成的焊料量將變少的問題。若有發生該等問題,各電極部間的焊料高度便將出現變動,導致與電子零件間將呈接合不良情形。However, in the evolution of the arrangement pitch of the electrode portions becoming more and more fine, in the method of applying the solder paste to the substrate by applying the solder paste to the substrate and applying the solder, the solder is pre-coated on the substrate electrode. At the time of the part, various problems occur due to the influence of the surface tension of the solder, the wettability, and the like. Specifically, the following problems occur: 1) as shown in FIG. 4, in each electrode portion 3a, Between 3b, the position of the largest protrusion of the formed solder 4 will be different; 2) as shown in Fig. 5, in the single electrode portion 3, the protrusion of the solder 4 will form a plurality of problems; 3) as shown in Fig. 6. As shown, the formation of the solder layer on the side of the electrode will be prioritized, resulting in a problem that the amount of solder formed on the electrode portion 3 will be reduced. If such a problem occurs, the height of the solder between the electrode portions will fluctuate, resulting in poor bonding with the electronic components.
迴避上述1)~3)問題的手段之一,可考慮對電極部(焊墊)的形狀下工夫。例如截至目前便有提案使耦接導體圖案(電極部)由成為佈線的佈線圖案,以及在接合於電子零件所設置凸塊的位置處,所形成連續於佈線圖案的耦接焊墊而構成;且形成耦接焊墊寬度尺寸W1大於佈線圖案寬度尺寸W2之形狀的手段,換言之,電極部形狀係形成具有長邊方向其中一部分的寬度,較大於其他部分處之寬廣部形狀的手段(參照專利文獻1)。此外,亦有提案將焊墊(電極部)形成長度L與寬度W比為(L/W)<10之形狀的手段(參照專利文獻2)。One of the means to avoid the above problems 1) to 3) can be considered in the shape of the electrode portion (pad). For example, it has been proposed so far that the coupling conductor pattern (electrode portion) is formed by a wiring pattern that becomes a wiring, and a coupling pad that is continuous with the wiring pattern at a position where the bump is provided to the electronic component; And forming a means for coupling the pad width dimension W1 to be larger than the shape of the wiring pattern width dimension W2, in other words, the electrode portion shape is formed by means having a width of a part of the long side direction, which is larger than the wide part shape at the other portion (refer to the patent) Document 1). Further, there has been proposed a method in which the pad (electrode portion) is formed into a shape having a length L and a width W of (L/W) < 10 (see Patent Document 2).
[專利文獻1]日本專利特開2000-77441號公報[專利文獻2]日本專利特開平5-226825號公報[Patent Document 1] Japanese Laid-Open Patent Publication No. 2000-77441 (Patent Document 2) Japanese Patent Laid-Open No. Hei 5-226825
然而,根據專利文獻1所記載的手段,因為在電極部中必需設置寬廣部,因而不利於排列間距之細微化,當今後更進一步要求電子機器、電子零件的小型化時,預測將頗難因應。另一方面,專利文獻2所記載的手段,因為電極 部形成特定形狀,且使用特定的焊料材料,因而有焊料材料受限制的缺點。However, according to the method described in Patent Document 1, since it is necessary to provide a wide portion in the electrode portion, it is disadvantageous to miniaturization of the arrangement pitch, and further, when it is required to further downsize electronic equipment and electronic parts, prediction is difficult to cope with. . On the other hand, the means described in Patent Document 2 is because of the electrode The portion is formed into a specific shape, and a specific solder material is used, and thus there is a disadvantage that the solder material is limited.
緣是,本發明之課題在於提供無關焊料材料,在依細微間距配置的複數電極部上,形成高度無變動的焊料層,能與電子零件間進行安定接合的焊料預塗基板,以及使用其所形成的組裝基板。On the other hand, an object of the present invention is to provide a solder-pre-coated substrate which can be stably bonded to electronic components by forming a solder layer having a high degree of variation on a plurality of electrode portions arranged at fine pitches, irrespective of solder material, and using the same. The assembled substrate is formed.
本發明者等為能解決上述課題經深入鑽研的結果,查明產生上述1)~3)問題的要因,將受電極部的上面形狀與電極部厚度二者的大幅影響。所以,發現藉由將電極部排列間距盡可能細微化的電極部上面形狀設為矩形,且將上面形狀中電極長度(L)對電極寬度(W)的比(L/W)設為特定範圍,並將電極部厚度設定在上述電極寬度以下,便可解決上述課題,遂完成本發明。As a result of intensive studies to solve the above problems, the inventors of the present invention have found out the causes of the above problems 1) to 3), and have a large influence on both the shape of the upper surface of the electrode receiving portion and the thickness of the electrode portion. Therefore, it has been found that the shape of the upper surface of the electrode portion which is as fine as possible in the arrangement pitch of the electrode portions is a rectangle, and the ratio (L/W) of the electrode length (L) to the electrode width (W) in the upper shape is set to a specific range. The above problem can be solved by setting the thickness of the electrode portion to be equal to or less than the electrode width, and the present invention has been completed.
即,本發明的焊料預塗基板係在覆蓋基板主面的絕緣膜開口部內,依細微間距配置複數電極部,並在該電極部上施行焊料預塗的焊料預塗基板,其特徵在於:電極部形狀係滿足下述(i)與(ii)的形狀:(i)電極部上面係呈電極長度(L)對電極寬度(W)的比(L/W)為6.0以下的矩形(但,L≧W);(ii)電極部厚度(t)係在電極寬度(W)以下。That is, the solder pre-coated substrate of the present invention is a solder pre-coated substrate in which a plurality of electrode portions are arranged at fine pitches in an opening portion of an insulating film covering the main surface of the substrate, and a solder pre-coating is applied to the electrode portion. The shape of the portion satisfies the following shapes (i) and (ii): (i) the upper surface of the electrode portion is a rectangle having a ratio (L/W) of the electrode length (L) to the electrode width (W) of 6.0 or less (however, L≧W); (ii) The electrode portion thickness (t) is equal to or less than the electrode width (W).
本發明的組裝基板之特徵係利用在上述本發明焊料預塗基板上所預塗的焊料,將電子零件熱壓接。The assembled substrate of the present invention is characterized in that the electronic component is thermocompression bonded using the solder precoated on the solder precoated substrate of the present invention described above.
本發明的焊料預塗方法係使用在覆蓋基板主面的絕緣 膜開口部內,依細微間距配置複數電極部的基板,在該基板的電極部上施行焊料膏劑塗佈後,經加熱,而在該電極部上施行焊料預塗的方法,其特徵在於:將上述電極部的形狀設定為滿足下述(i)與(ii)的形狀:(i)電極部上面係呈電極長度(L)對電極寬度(W)的比(L/W)為6.0以下的矩形(但,L≧W);(ii)電極部厚度(t)係在電極寬度(W)以下。The solder precoating method of the present invention uses insulation on the main surface of the cover substrate In the film opening portion, a substrate having a plurality of electrode portions is arranged at a fine pitch, and a solder paste is applied to the electrode portion of the substrate, and then solder is applied to the electrode portion by heating. The shape of the electrode portion is set to satisfy the following shapes (i) and (ii): (i) the upper surface of the electrode portion is a rectangle having a ratio (L/W) of the electrode length (L) to the electrode width (W) of 6.0 or less. (However, L≧W); (ii) The electrode portion thickness (t) is equal to or less than the electrode width (W).
根據本發明,在基板上依細微間距配置的複數電極部上所形成的焊料層,將不會發生諸如:最大突起部位置在各電極間不同、或在單一電極部內將會形成複數個突起部、或電極側面的焊料層形成較優先導致電極部上面所形成的焊料量減少等問題;因為將成為並無高度變動的良好焊料層,因而可獲得能與電子零件間形成安定接合的效果。此外,根據本發明,焊料層形成時所使用的焊料材料並無限制,且電極部的排列間距亦可較習知更細微化。According to the present invention, the solder layer formed on the plurality of electrode portions arranged on the substrate at fine pitches will not occur such that the maximum protrusion position is different between the electrodes or a plurality of protrusions are formed in the single electrode portion. The solder layer on the side surface of the electrode is more likely to cause a problem such as a decrease in the amount of solder formed on the surface of the electrode portion. Since it is a good solder layer which does not have a high degree of variation, an effect of forming a stable bond with the electronic component can be obtained. Further, according to the present invention, the solder material used in the formation of the solder layer is not limited, and the arrangement pitch of the electrode portions can be made finer than conventionally.
本發明的焊料預塗基板係例如圖1所示,在覆蓋基板1主面的絕緣膜2開口部內2’,依細微間距配置複數電極部3,在具有特定形狀的該電極部3上施行焊料(未圖示)的預塗。In the solder pre-coated substrate of the present invention, as shown in FIG. 1, the plurality of electrode portions 3 are arranged at a fine pitch in the opening 2' of the insulating film 2 covering the main surface of the substrate 1, and solder is applied to the electrode portion 3 having a specific shape. Pre-coating (not shown).
另外,圖1中,(a)所示係基板的概略俯視圖,(b)所示係上述(a)中,依x-x線切剖時的剖面示意圖,(c)所示係上述(a)中,依y-y線切剖時的剖面示意圖。In addition, in Fig. 1, (a) is a schematic plan view of the base substrate, and (b) is a schematic cross-sectional view taken along the line x-x in (a), and (c) is the above (a). In the middle, the cross-sectional view of the y-y line is cut.
本發明的焊料預塗基板之電極部3,係形成同時滿足下述(i)與(ii)的形狀:(i)電極部3上面係呈現電極長度(L)對電極寬度(W)的比(L/W)為6.0以下的矩形(但,L≧W);(ii)電極部3的厚度(t)係電極寬度(W)以下。The electrode portion 3 of the solder pre-coated substrate of the present invention is formed to satisfy the following shapes (i) and (ii): (i) the ratio of the electrode length (L) to the electrode width (W) is exhibited on the upper surface of the electrode portion 3 (L/W) is a rectangle of 6.0 or less (however, L ≧ W); (ii) The thickness (t) of the electrode portion 3 is equal to or less than the electrode width (W).
依此的話,本發明的電極部3藉由設定為其上面的電極長度(L)對電極寬度(W)的比(L/W)在6.0以下,且厚度(t)在電極寬度(W)以下,便可在其表面(上面)形成無高度變動的良好焊料。最好,上述(i)的(L/W)值係5.0以下。此外,本發明的電極部3係藉由其上面呈矩形,便亦可因應電極部3的排列間距細微化(特別係各電極部3間的間距在後述範圍內的情況)。In this case, the ratio (L/W) of the electrode length (L) to the electrode width (W) set to the electrode portion 3 of the present invention is 6.0 or less, and the thickness (t) is at the electrode width (W). Hereinafter, a good solder having no height variation can be formed on the surface (upper surface). Preferably, the (L/W) value of the above (i) is 5.0 or less. Further, the electrode portion 3 of the present invention has a rectangular shape on the upper surface thereof, and the arrangement pitch of the electrode portions 3 can be made fine (in particular, the pitch between the electrode portions 3 is within a range described later).
本發明的焊料預塗基板中,電極長度(L)具體來說最好係30~250 μm,尤以70~150 μm為佳。若電極長度(L)過小,當在絕緣膜2中設置開口部2’時,便將有良率變差、焊料預塗基板的生產性降低之可能性。反之,若電極長度(L)過長,便有在電極部3上所形成焊料4最大突起部分的位置,在各電極部3a、3b間呈不同(參照圖4)、單一個電極部3內容易形成複數個焊料4的突起部(參照圖5)、以及較難在此種高度變動較大的焊料部上接合半導體晶片的傾向。In the solder precoated substrate of the present invention, the electrode length (L) is preferably 30 to 250 μm, particularly preferably 70 to 150 μm. When the electrode length (L) is too small, when the opening 2' is provided in the insulating film 2, there is a possibility that the yield is deteriorated and the productivity of the solder precoated substrate is lowered. On the other hand, if the electrode length (L) is too long, the position of the largest projection of the solder 4 formed on the electrode portion 3 is different between the electrode portions 3a and 3b (see Fig. 4), and the contents of the single electrode portion 3 are different. It is easy to form a plurality of protrusions of the solder 4 (see FIG. 5), and it is difficult to bond the semiconductor wafer to the solder portion having such a large variation in height.
另外,相關電極寬度(W)的具體範圍,只要配合上述電極長度(L),適當設定為滿足上述(i)的話便可,相關電極部的厚度(t)之具體範圍,則只要配合上述電極寬度(W), 適當設定為滿足上述(ii)的話便可。In addition, the specific range of the relevant electrode width (W) may be appropriately set so as to satisfy the above (i), and the specific range of the thickness (t) of the relevant electrode portion may be the same as the above electrode. Width (W), It is sufficient to set it as necessary to satisfy the above (ii).
本發明的焊料預塗基板中,各電極部3間的間距具體來說係最好在150μm以下,尤以100μm以下為佳。一般,電極部3的排列間距越小,電極部3上所形成的焊料量將越少,焊料高度變動對組裝性的影響將有越大之傾向,根據本發明,因為將可有效地抑制該高度的變動發生,因而即使如上述範圍內的細微間距亦可因應。In the solder precoated substrate of the present invention, the pitch between the electrode portions 3 is preferably 150 μm or less, and particularly preferably 100 μm or less. In general, the smaller the arrangement pitch of the electrode portions 3, the smaller the amount of solder formed on the electrode portion 3, and the influence of the variation in the solder height on the assemblability tends to be larger. According to the present invention, the amount of solder can be effectively suppressed. The height variation occurs, so that even fine pitches within the above range can be accommodated.
本發明的焊料預塗基板,係使用如圖1所示電子電路基板,即在覆蓋基板1主面的絕緣膜2開口部內2’,依細微間距複數設置滿足上述(i)與(ii)之特定形狀電極部3的基板,根據在該基板1的電極部3上施行焊料膏劑塗佈後、經加熱而在基板1的電極部3將熔融焊料施行預塗的本發明預塗方法便可獲得。In the solder pre-coated substrate of the present invention, an electronic circuit substrate as shown in FIG. 1 is used, that is, 2' in the opening portion of the insulating film 2 covering the main surface of the substrate 1, and the plurality of fine pitches are provided to satisfy the above (i) and (ii). The substrate of the specific shape electrode portion 3 can be obtained by applying the solder paste on the electrode portion 3 of the substrate 1 and then pre-coating the molten solder on the electrode portion 3 of the substrate 1 by heating. .
在基板1的電極部3上施行焊料膏劑塗佈之際,例如並非使用在基板1上依每個電極部3形成開口的網狀遮罩(screen mask),而是使用在涵蓋複數電極部3的廣範圍內形成開口之網狀遮罩,並利用網版印刷等方式,在涵蓋依細微間距排列的多數電極部3在內之廣範圍內,無視各個電極部3的位置或形狀,概略地將焊料膏劑施行全面塗佈便可。When the solder paste application is performed on the electrode portion 3 of the substrate 1, for example, a screen mask in which an opening is formed in each of the electrode portions 3 on the substrate 1 is used, but is used to cover the plurality of electrode portions 3. A mesh mask having an opening formed in a wide range, and the position or shape of each electrode portion 3 is roughly ignored in a wide range including a plurality of electrode portions 3 arranged at fine pitches by screen printing or the like. The solder paste can be fully coated.
將已塗佈焊料膏劑的基板加熱並無特別的限制,例如依150~200℃左右施行預熱,並依最高溫度170~280℃左右施行圓滑熱處理(reflow)便可。對基板上的塗佈與圓滑熱處理,係可在大氣中實施,亦可在N2 、Ar、He等非活性 環境中實施。The substrate to which the solder paste has been applied is not particularly limited. For example, preheating is performed at about 150 to 200 ° C, and reflowing can be performed at a maximum temperature of about 170 to 280 ° C. The coating and smoothing heat treatment on the substrate can be carried out in the atmosphere or in an inactive environment such as N 2 , Ar or He.
本發明的焊料預塗基板中,就焊料層形成時所使用的焊料材料並無特別的限制,上述焊料膏劑係可使用例如習知周知含有焊料粉末與助焊劑的焊料膏劑,亦可使用習知周知含有析出型焊料材料與助焊劑的析出型焊料膏劑。In the solder pre-coated substrate of the present invention, the solder material used in the formation of the solder layer is not particularly limited, and for example, a solder paste containing a solder powder and a flux known in the art may be used as the solder paste. A precipitation type solder paste containing a precipitation type solder material and a flux is known.
依此所形成的本發明焊料預塗基板之焊料,就高度(最大突起部的高度)通常係10~20 μm左右,各電極部3間的焊料高度變動較少。具體而言,在電極部3上所預塗焊料高度(即最大突起部的高度)的標準差(n=20),通常最好是1~2.5,尤以1~2為佳。另外,本發明的焊料預塗基板上所形成的焊料,係如圖2與圖3所示,並不會有上述1)~3)的問題,在單一個電極部上將形成一個突起部,且電極部上面所形成的焊料量將較多於側面。In the solder of the solder precoated substrate of the present invention thus formed, the height (the height of the largest protrusion) is usually about 10 to 20 μm, and the solder height variation between the electrode portions 3 is small. Specifically, the standard deviation (n=20) of the pre-coated solder height (i.e., the height of the largest protrusion) on the electrode portion 3 is usually preferably from 1 to 2.5, particularly preferably from 1 to 2. Further, as shown in FIG. 2 and FIG. 3, the solder formed on the solder pre-coated substrate of the present invention does not have the above problems 1) to 3), and a single protrusion portion is formed on a single electrode portion. Further, the amount of solder formed on the electrode portion will be more than the side surface.
本發明的組裝基板係利用在前述本發明的焊料預塗基板上所預塗之焊料,將在電子電路基板上所搭載的電子零件進行熱壓接。In the assembled substrate of the present invention, the electronic components mounted on the electronic circuit board are thermocompression bonded by the solder precoated on the solder precoated substrate of the present invention.
特別係本發明的組裝基板,最好利用在焊料預塗基板主面的電極部上所預塗的焊料,將焊料預塗基板的主面、與電子零件的主面(詳言之,在基板主面的電極部、與電子零件主面上所設置的電極(凸塊))施行覆晶耦接,惟並不僅侷限於此。In particular, in the assembled substrate of the present invention, it is preferable to pre-coat the main surface of the substrate and the main surface of the electronic component with the solder pre-coated on the electrode portion of the main surface of the solder pre-coated substrate (in detail, on the substrate) The electrode portion of the main surface and the electrode (bump) provided on the main surface of the electronic component are flip-chip coupled, but are not limited thereto.
當屬於覆晶耦接的組裝基板時,最好呈現在焊料預塗基板與電子零件之間填充著填底膠樹脂(underfi11 resin)的態樣。即,一般若考慮填底膠樹脂的填充性,則基板上 的電極長度(L)越長將越有利,但是另一方面,若電極長度(L)過長,則所形成的焊料將成為如圖4或圖5所示形狀,導致容易發生高度變動情形。相對於此,本發明中,為能充分確保填底膠樹脂的填充性,即使將電極長度(L)設定為較長,仍可藉由將電極部形成滿足上述(i)與(ii)的形狀,便可依良好的形狀形成無高度變動的焊料層。When it is a flip chip coupled assembly substrate, it is preferable to exhibit a state in which an underfi11 resin is filled between the solder precoated substrate and the electronic component. That is, generally, considering the filling property of the underfill resin, the substrate is The longer the electrode length (L) is, the more advantageous it is. On the other hand, if the electrode length (L) is too long, the formed solder will have a shape as shown in Fig. 4 or Fig. 5, which tends to cause a height variation. On the other hand, in the present invention, in order to sufficiently ensure the filling property of the underfill resin, even if the electrode length (L) is set to be long, the electrode portion can be formed to satisfy the above (i) and (ii). With a shape, a solder layer having no height variation can be formed in a good shape.
以下,舉實施例就本發明進行詳細說明,惟本發明並不僅侷限於以下的實施例。Hereinafter, the invention will be described in detail by way of examples, but the invention is not limited to the following examples.
首先,將WW級妥爾松香(Tall Rosin)70重量份、己基卡必醇(hexyl carbitol)(溶劑)20重量份、及氫化蓖麻油(ricinus)(搖變劑)10重量份進行混合,並依120℃施行加熱熔融,經冷卻至室溫,便調製得具黏性的助焊劑。First, 70 parts by weight of WW grade Tall Rosin, 20 parts by weight of hexyl carbitol (solvent), and 10 parts by weight of hydrogenated castor oil (shake agent) are mixed. It is heated and melted at 120 ° C, and after cooling to room temperature, a viscous flux is prepared.
將下述(a)~(d)所示焊料粉末(均為平均粒徑5 μm)任一種35重量份、與依上述所調製之助焊劑65重量份,利用調質攪拌機(THINKY(股)製「AWATORI RENTARO」)施行混練,分別調製表1所示4種金屬組成的焊料膏劑。The solder powder (all of the average particle diameters of 5 μm) shown in the following (a) to (d) is used in an amount of 35 parts by weight, and 65 parts by weight of the flux prepared as described above, using a tempering mixer (THINKY) The "AWATORI RENTARO" system was subjected to kneading, and the solder pastes of the four kinds of metals shown in Table 1 were separately prepared.
(a)Ag含有量3.5重量%的Sn-Ag系焊料合金粉末(Sn3.5Ag) (b)Ag含有量3.0重量%、Cu含有量0.5重量%的Sn-Ag-Cu系焊料合金粉末(Sn3Ag0.5Cu) (c)Sn含有量100重量%的Sn系焊料合金粉末(Sn) (d)Sn含有量63重量%、Pb含有量37重量%的Sn-Pb系 焊料合金粉末(63Sn37Pb)(a) Sn-Ag-based solder alloy powder (Sn3.5Ag) having an Ag content of 3.5% by weight (b) Sn-Ag-Cu-based solder alloy powder (Sn3Ag0.5Cu) having an Ag content of 3.0% by weight and a Cu content of 0.5% by weight (c) Sn-containing solder alloy powder (Sn) containing 100% by weight of Sn (d) Sn-Pb system having a Sn content of 63% by weight and a Pb content of 37% by weight Solder alloy powder (63Sn37Pb)
將主面利用具有開口部的絕緣膜施行覆蓋,在該開口部內依100μm間距配置各部尺寸(電極長度(L)、電極寬度(W)、電極部厚度(t))如表1所示的電極,而製得各種半導體封裝基板。在該基板上,將表1所示金屬組成的焊料膏劑利用網版印刷依全面狀塗佈呈100μm厚,使用最高溫度260℃的圓滑熱處理曲線(環境:氧濃度300ppm以下)施行加熱後,浸漬於已裝入60℃丁基卡必醇(butyl carbitol)溶液的超音波洗淨機中,而將助焊劑除去,便獲得焊料預塗基板。The main surface was covered with an insulating film having an opening, and the dimensions of each part (electrode length (L), electrode width (W), and electrode portion thickness (t)) were arranged at a pitch of 100 μm in the opening as shown in Table 1. And various semiconductor package substrates are produced. On the substrate, a solder paste having a metal composition shown in Table 1 was applied to a 100 μm thick screen by screen printing, and heated by a smooth heat treatment curve (ambient: oxygen concentration: 300 ppm or less) at a maximum temperature of 260° C., and then impregnated. The solder pre-coated substrate was obtained by removing the flux in an ultrasonic cleaner equipped with a butyl carbitol solution at 60 ° C.
針對依上述所獲得的各焊料預塗基板,施行下述評估。 結果如表2所示。The following evaluations were performed for each of the solder pre-coated substrates obtained as described above. The results are shown in Table 2.
使用顯微鏡觀察焊料預塗基板上所形成的焊料層,針對焊料層最大突起部的位置偏移、突起部有無複數產生、及電極側面的焊料層形成狀態進行確認,並依以下的基準施行評估。The solder layer formed on the solder pre-coated substrate was observed with a microscope, and the positional deviation of the maximum protrusion portion of the solder layer, the presence or absence of the presence or absence of the protrusion portion, and the formation state of the solder layer on the side surface of the electrode were confirmed, and evaluation was performed according to the following criteria.
(1)關於最大突起部的位置偏移、突起部有無複數產生:○:最大突起部位於距電極部中心C朝電極長邊方向在電極長度(L)±10%以內的範圍內,且突起部並無二以上存在的情況(參照圖2)×:非屬上述「○」的情況(1) Regarding the positional deviation of the largest protrusion and the presence or absence of the protrusions in the plural: ○: The maximum protrusion is located within a range of ±10% of the electrode length (L) from the center C of the electrode portion toward the longitudinal direction of the electrode, and the protrusion There are no more than two cases (see Figure 2) ×: Non-existent "○"
(2)關於對電極側面的焊料層形成狀態:○:相關電極部上所形成焊料的最大突起部所在部位,將電極部上面的垂直方向之焊料層厚度(焊料高度)設為h,將距電極側面的垂直方向之焊料層厚度(左右側面屬厚度不同的情況,便指從厚度較大之側面的厚度)設為d時,屬於h>d的情況(參照圖3)×:上述h與d係h≦d的情況(2) The state of forming the solder layer on the side surface of the counter electrode: ○: the portion where the largest protrusion of the solder formed on the electrode portion is located, and the thickness of the solder layer (solder height) in the vertical direction on the electrode portion is h, and the distance is When the thickness of the solder layer in the vertical direction of the side surface of the electrode (when the thickness of the left and right side surfaces is different, the thickness from the side surface having a larger thickness) is d, it is a case where h>d (refer to FIG. 3) ×: the above h and d system h≦d
使用焦點深度儀(KEYENCE(股)製),就焊料預塗基板的各電極部上所形成焊料層高度,就每一基板施行20處測定(測定位置係電極部中心),並計算出其平均值(平均焊料高度)、與其標準差(焊料高度的標準差)。Using a depth of focus meter (manufactured by KEYENCE Co., Ltd.), the height of the solder layer formed on each electrode portion of the solder pre-coated substrate was measured at 20 points (measuring the position of the electrode portion of the position), and the average was calculated. Value (average solder height), standard deviation (standard deviation of solder height).
以上,針對本發明的焊料預塗基板、組裝基板及焊料預塗方法進行詳細說明,惟本發明的範圍並不僅侷限於該等之說明,在不損及本發明主旨的範疇內,可進行適當變更或改善。The solder pre-coated substrate, the assembled substrate, and the solder pre-coating method of the present invention are described in detail above, but the scope of the present invention is not limited to the above description, and may be appropriately carried out without departing from the gist of the present invention. Change or improve.
1‧‧‧基板1‧‧‧Substrate
2‧‧‧絕緣膜2‧‧‧Insulation film
2’‧‧‧開口部2’‧‧‧ Opening
3‧‧‧電極部3‧‧‧Electrode
3a、3b‧‧‧電極部3a, 3b‧‧‧electrode
4‧‧‧焊料4‧‧‧ solder
圖1為本發明焊料預塗基板一實施形態,除所預塗焊料之外的示意圖,其中,(a)係概略俯視圖,(b)係其x-x線剖視圖,(c)係其y-y線剖視圖。BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view showing an embodiment of a solder pre-coated substrate of the present invention, except for pre-coated solder, wherein (a) is a schematic plan view, (b) is a cross-sectional view taken along line x-x, and (c) is a y- y line cutaway view.
圖2為實施例的焊料預塗基板之焊料形狀評估基準說明圖,將電極部沿長邊方向切剖時(從電極部側面側觀看時)的焊料概略剖視圖。FIG. 2 is a schematic view showing a solder shape evaluation standard of the solder pre-coated substrate of the embodiment, and a schematic cross-sectional view of the solder when the electrode portion is cut along the longitudinal direction (when viewed from the side surface side of the electrode portion).
圖3為實施例中,焊料預塗基板的焊料形狀評估基準說明圖,就在電極部上所形成焊料的最大突起部所在部位,朝電極部長邊方向進行垂直切剖時的焊料概略剖視圖。3 is a view for explaining a solder shape evaluation standard of the solder pre-coated substrate in the embodiment, and a schematic cross-sectional view of the solder when the portion of the largest protrusion of the solder formed on the electrode portion is vertically cut in the direction of the electrode.
圖4為焊料4的最大突起部位置,在各電極部3a、3b間呈不同的習知問題點說明圖,將2個電極部3a、3b沿長邊方向切剖時的焊料4概略剖視圖(a)、(b)。4 is a view showing a position of a maximum projection of the solder 4, and a description of a conventional problem between the electrode portions 3a and 3b, and a schematic cross-sectional view of the solder 4 when the two electrode portions 3a and 3b are cut along the longitudinal direction ( a), (b).
圖5為在單一個電極部3內將複數個形成焊料4之突起部的習知問題點說明圖,將電極部3沿長邊方向切剖時的焊料4概略剖視圖。FIG. 5 is a view for explaining a conventional problem in which a plurality of projections forming the solder 4 are formed in a single electrode portion 3, and a schematic cross-sectional view of the solder 4 when the electrode portion 3 is cut along the longitudinal direction.
圖6為對電極側面的焊料層形成較優先,導致電極部3上面所形成焊料量變少的習知問題點說明圖,將電極部3朝長邊方向垂直切剖時的焊料4概略剖視圖。FIG. 6 is a view for explaining a conventional problem in which the formation of the solder layer on the side surface of the electrode is prioritized, and the amount of solder formed on the surface of the electrode portion 3 is reduced, and the solder 4 is a schematic cross-sectional view when the electrode portion 3 is vertically cut in the longitudinal direction.
1‧‧‧基板1‧‧‧Substrate
2‧‧‧絕緣膜2‧‧‧Insulation film
2’‧‧‧開口部2’‧‧‧ Opening
3‧‧‧電極部3‧‧‧Electrode
Claims (3)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2007/067765 WO2009034628A1 (en) | 2007-09-12 | 2007-09-12 | Solder precoated substrate, mounting substrate, and solder precoating method |
Publications (2)
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TW200913833A TW200913833A (en) | 2009-03-16 |
TWI479967B true TWI479967B (en) | 2015-04-01 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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TW097121380A TWI479967B (en) | 2007-09-12 | 2008-06-09 | Solder precoating method |
Country Status (5)
Country | Link |
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JP (1) | JPWO2009034628A1 (en) |
KR (1) | KR100931508B1 (en) |
CN (1) | CN101681891A (en) |
TW (1) | TWI479967B (en) |
WO (1) | WO2009034628A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5807145B2 (en) * | 2010-05-20 | 2015-11-10 | パナソニックIpマネジメント株式会社 | Mounting structure |
JP5960633B2 (en) | 2013-03-22 | 2016-08-02 | ルネサスエレクトロニクス株式会社 | Semiconductor device manufacturing method and semiconductor device |
JP2014195124A (en) * | 2014-06-30 | 2014-10-09 | Dainippon Printing Co Ltd | Manufacturing method of component incorporated wiring board |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002050857A (en) * | 2000-07-31 | 2002-02-15 | Kyocera Corp | Connecting structure of electronic part and circuit board |
TW519861B (en) * | 2001-06-21 | 2003-02-01 | Shinko Electric Ind Co | Packaging substrate for electronic elements and electronic device having packaged structure |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2867969B2 (en) * | 1996-07-12 | 1999-03-10 | 日本電気株式会社 | Manufacturing method of printed wiring board |
JP2001135667A (en) * | 1999-08-26 | 2001-05-18 | Seiko Epson Corp | Method of forming bump, mold to be used therein, semiconductor device, its manufacturing method, circuit board and electronic apparatus |
JP4769022B2 (en) * | 2005-06-07 | 2011-09-07 | 京セラSlcテクノロジー株式会社 | Wiring board and manufacturing method thereof |
JP2007073617A (en) * | 2005-09-05 | 2007-03-22 | Tamura Seisakusho Co Ltd | Electrode structure, substrate for packaging, projection electrode, and manufacturing method thereof |
-
2007
- 2007-09-12 CN CN200780053397A patent/CN101681891A/en active Pending
- 2007-09-12 WO PCT/JP2007/067765 patent/WO2009034628A1/en active Application Filing
- 2007-09-12 KR KR1020077025595A patent/KR100931508B1/en active IP Right Grant
- 2007-09-12 JP JP2007549029A patent/JPWO2009034628A1/en active Pending
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2008
- 2008-06-09 TW TW097121380A patent/TWI479967B/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002050857A (en) * | 2000-07-31 | 2002-02-15 | Kyocera Corp | Connecting structure of electronic part and circuit board |
TW519861B (en) * | 2001-06-21 | 2003-02-01 | Shinko Electric Ind Co | Packaging substrate for electronic elements and electronic device having packaged structure |
Also Published As
Publication number | Publication date |
---|---|
WO2009034628A1 (en) | 2009-03-19 |
KR20080094753A (en) | 2008-10-24 |
TW200913833A (en) | 2009-03-16 |
JPWO2009034628A1 (en) | 2010-12-16 |
KR100931508B1 (en) | 2009-12-15 |
CN101681891A (en) | 2010-03-24 |
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