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TWI447880B - 堆疊型半導體封裝、其形成方法以及包含該封裝的電子系統 - Google Patents

堆疊型半導體封裝、其形成方法以及包含該封裝的電子系統 Download PDF

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Publication number
TWI447880B
TWI447880B TW097133275A TW97133275A TWI447880B TW I447880 B TWI447880 B TW I447880B TW 097133275 A TW097133275 A TW 097133275A TW 97133275 A TW97133275 A TW 97133275A TW I447880 B TWI447880 B TW I447880B
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TW
Taiwan
Prior art keywords
printed circuit
circuit board
wafer
resin compound
package
Prior art date
Application number
TW097133275A
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English (en)
Other versions
TW200919684A (en
Inventor
Tae-Hun Kim
Original Assignee
Samsung Electronics Co Ltd
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Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of TW200919684A publication Critical patent/TW200919684A/zh
Application granted granted Critical
Publication of TWI447880B publication Critical patent/TWI447880B/zh

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Description

堆疊型半導體封裝、其形成方法以及包含該封裝的電子系統
本發明一般發明性概念是關於半導體封裝、其形成方法以及包含該封裝的電子系統，且更具體而言是關於堆疊型半導體封裝、其形成方法以及包含該封裝的電子系統。
為擴展容量及功能，半導體封裝之整合密度在晶圓狀態下逐漸增加，且兩個或兩個以上半導體晶片或半導體封裝整合為一者的半導體封裝已普及。擴展晶圓狀態下之半導體裝置之容量及功能需要晶圓製造過程中之相當多的設備投資及成本，且有許多可能在過程期間引起之問題急待解決。
然而，在半導體晶片完全製造之後，將兩個或兩個以上半導體晶片或者兩個或兩個以上半導體封裝整合為一者可在半導體封裝之組裝過程中完成，而未解決以上問題。而且，與擴展晶圓狀態下之容量及功能之方法相比，該方法可以低設備投資及成本達成，且因此對諸如系統內封裝(System In Package，SIP)、多晶片封裝(Multi Chip Package，MCP)及封裝上封裝(Package On Package，POP)之整合型半導體封裝的研究在半導體裝置製造領域積極發展。
本發明一般發明性概念提供一種堆疊型半導體封裝，其能夠將下部半導體封裝電連接至上部半導體封裝，具有 高插針數以改良堆疊之整合密度，且防止當相鄰焊球彼此接觸時引起之橋缺陷及非濕缺陷(nonwet defect)，所述非濕缺陷引起上部焊球不與下部半導體封裝接觸，本發明一般發明性概念亦提供形成所述堆疊型半導體封裝之方法及包含所述堆疊型半導體封裝之電子系統。
本發明一般發明性概念之額外態樣及實用性將在隨後描述中部分陳述，且將藉由描述內容而部分地顯而易見，或可藉由實踐一般發明性概念而習得。
一般發明性概念之上述及/或其它態樣可藉由提供堆疊型半導體封裝而達成，所述堆疊型半導體封裝包含下部印刷電路板，所述下部印刷電路板之上部表面上具有多個互連件及多個用於連接之球焊盤(ball land)。電連接至所述多個互連件且依次堆疊之一或多個第一晶片設置於所述下部印刷電路板上。下部模製樹脂化合物設置於所述下部印刷電路板上以覆蓋所述第一晶片。設置穿過所述下部模製樹脂化合物而與所述用於連接之球焊盤接觸的連接導體。上部印刷電路板設置於所述下部模製樹脂化合物上，所述上部印刷電路板包含與所述連接導體之上部表面接觸之下部焊墊。電連接至所述上部印刷電路板且依次堆疊之一或多個第二晶片設置在所述上部印刷電路板上。設置覆蓋所述具有第二晶片之上部印刷電路板的上部模製樹脂化合物。
所述下部印刷電路板、所述第一晶片及所述下部模製樹脂化合物可構成下部晶片封裝，且所述上部印刷電路 板、所述第二晶片及所述上部模製樹脂化合物可構成上部晶片封裝。
一或多個中間晶片封裝可更包含於所述下部晶片封裝與所述上部晶片封裝之間，其中所述中間晶片封裝可經由中間連接導體電連接至所述上部晶片封裝。
電極可設置在所述下部印刷電路板下方。
所述晶片可在線結合結構或倒裝晶片(flip-chip)結構中連接至所述印刷電路板。
所述下部模製樹脂化合物可具有平面上部表面。
所述下部模製樹脂化合物可具有帶有階梯差異之上部表面，且下部模製樹脂化合物之對應於所述第一晶片之上部區域可具有高於其它區域之上部表面。
所述模製樹脂化合物可包含環氧樹脂模製化合物。
所述連接導體可為包含錫(Sn)之材料。
所述方法包含準備下部印刷電路板，所述下部印刷電路板之上部表面上包含多個互連件及多個球焊盤。在所述下部印刷電路板上安裝一或多個第一晶片，所述第一晶片電連接至所述多個互連件且依次堆疊。在所述下部印刷電路板上形成下部模製樹脂化合物以覆蓋所述第一晶片，其中所述下部模製樹脂化合物形成為具有暴露所述用於連接之球焊盤的通孔。將下方形成有焊球的上部晶片封裝對準，使得所述焊球分別對應於下部模製樹脂化合物之通孔。回焊所述焊球，從而形成填充所述通孔之連接導體。
形成下部模製樹脂化合物可包含覆蓋具有插針之模 具，所述插針與所述具有第一晶片之下部印刷電路板上之用於連接的球焊盤接觸。隨後，可將熔化之下部模製樹脂化合物注射至所述模具之一側中。所述熔化之下部模製樹脂化合物可在相反方向上流動，其中注射所述熔化之下部模製樹脂化合物以填充所述下部印刷電路板與所述模具之間的空間，並硬化所述熔化之下部模製樹脂化合物。可移除所述模具以形成分別暴露所述用於連接之球焊盤之通孔。
形成所述上部晶片封裝可包含準備包含下部焊墊之上部印刷電路板。隨後，可在所述上部印刷電路板上形成一或多個第二晶片，所述第二晶片電連接至所述上部印刷電路板且依次堆疊，且可形成覆蓋所述具有第二晶片之上部印刷電路板的上部模製樹脂化合物。可形成分別對應於所述下部焊墊之焊球。
所述下部印刷電路板、所述第一晶片及所述下部模製樹脂化合物可構成下部晶片封裝。
所述方法可更包含使用中間連接導體在所述下部晶片封裝與所述上部晶片封裝之間堆疊一或多個中間晶片封裝。
可在形成所述下部模製樹脂化合物之後在所述下部印刷電路板下方形成電極。
所述第一晶片可形成為將在線結合結構或倒裝晶片結構中連接至所述下部印刷電路板之互連件。
所述下部模製樹脂化合物可形成為具有平面上部表 面。
所述下部模製樹脂化合物可形成為具有帶有階梯差異之上部表面，且下部模製樹脂化合物之對應於第一晶片之上部區域可形成為具有高於其它區域之上部表面。
所述模製樹脂化合物可包含環氧樹脂模製化合物。
所述連接導體可由包含Sn之材料形成。
一般發明性概念之上述及/或其它態樣及實用性亦可藉由提供一種電子系統而達成，所述電子系統包含處理器及執行與所述處理器之資料通信的輸入/輸出單元及一或多個堆疊型半導體封裝，所述堆疊型半導體封裝包含下部印刷電路板，所述下部印刷電路板之上部表面上具有多個互連件及多個用於連接之球焊盤。電連接至所述多個互連件且依次堆疊之一或多個第一晶片設置在所述下部印刷電路板上。下部模製樹脂化合物設置於所述下部印刷電路板上以覆蓋所述第一晶片。設置穿過所述下部模製樹脂化合物而與所述用於連接之球焊盤接觸的連接導體。上部印刷電路板設置於所述下部模製樹脂化合物上，所述上部印刷電路板包含與所述連接導體之上部表面接觸之下部焊墊。電連接至所述上部印刷電路板且依次堆疊之一或多個第二晶片設置在所述上部印刷電路板上。設置覆蓋所述具有第二晶片之上部印刷電路板的上部模製樹脂化合物。
所述下部印刷電路板、所述第一晶片及所述下部模製樹脂化合物可構成下部晶片封裝，且所述上部印刷電路板、所述第二晶片及所述上部模製樹脂化合物可構成上部 晶片封裝。
一或多個中間晶片封裝可更包含於所述下部晶片封裝與所述上部晶片封裝之間，其中所述中間晶片封裝可經由中間連接導體電連接至所述上部晶片封裝。
所述下部晶片封裝可為邏輯封裝，且所述中間晶片封裝及所述上部晶片封裝可為記憶體封裝。
可更包含板，所述處理器及所述堆疊型半導體封裝安裝在所述板上。
可更包含電極，所述電極設置在所述下部印刷電路板下方，其中所述下部印刷電路板可經由所述電極電連接至所述板。
一般發明性概念之上述及/或其它態樣及實用性亦可藉由提供一種記憶體模組而達成，所述記憶體模組包含：板主體，其包含位於一側之多個耳片(tab)；以及堆疊型半導體封裝，其以兩個或兩個以上行之陣列安裝於所述板主體上。此處，每一所述堆疊型半導體封裝包含下部印刷電路板，所述下部印刷電路板之上部表面上具有多個互連件及多個用於連接之球焊盤。電連接至所述多個互連件且依次堆疊之一或多個第一晶片設置在所述下部印刷電路板上。下部模製樹脂化合物設置於所述下部印刷電路板上以覆蓋所述第一晶片。設置穿過所述下部模製樹脂化合物而與所述用於連接之球焊盤接觸的連接導體。上部印刷電路板設置於所述下部模製樹脂化合物上，所述上部印刷電路板包含與所述連接導體之上部表面接觸之下部焊墊。電連 接至所述上部印刷電路板且依次堆疊之一或多個第二晶片設置在所述上部印刷電路板上。設置覆蓋所述具有第二晶片之上部印刷電路板的上部模製樹脂化合物。
可更包含離散裝置，所述離散裝置設置於所述板主體上且與所述堆疊型半導體封裝間隔開。
所述離散裝置可包含選自由暫存器、電容器、電感器、電阻器、可程式化裝置及非揮發性記憶體裝置組成之群的至少一者。
一般發明性概念之上述及/或其它態樣及實用性亦可藉由提供一種堆疊型半導體封裝而達成，所述堆疊型半導體封裝包含：多個彼此堆疊之晶片封裝；在所述多個晶片封裝中之一者上的多個球焊盤及對應於所述球焊盤之通孔；以及在所述多個晶片封裝中之另一者上之多個焊球，其對應於所述一個晶片封裝上之所述通孔，其中所述對應之焊球與通孔彼此契合，從而形成連接導體。
所述連接導體可藉由回焊所述焊球以填充所述通孔而形成。
一般發明性概念之上述及/或其它態樣及實用性亦可藉由提供一種形成堆疊型半導體封裝之方法而達成，所述方法包含：在晶片封裝上形成多個球焊盤及對應於所述球焊盤之通孔；在另一晶片封裝上形成多個焊球，所述焊球對應於所述一個晶片封裝上之所述通孔；將所述晶片封裝之所述通孔與所述另一晶片封裝之所述對應焊球彼此契合；以及回焊所述焊球以填充所述對應通孔而形成連接導 體。
下文中現在將參看附圖更完全地描述本發明一般發明性概念，附圖中說明一般發明性概念之例示性實施例。然而此一般發明性概念可以不同形式實施，且不應解釋為限於本文陳述之例示性實施例。確切而言，提供此等例示性實施例以使得本揭露內容將詳盡且完整，且將一般發明性概念之範疇完全傳達至熟習此項技術者。圖中可能而為了清楚起見而將層及區域之厚度誇大。而且，當將一層稱為在另一層或基板“上”時，該層可直接形成於另一層或基板上，或第三層可插入於其間。
現將詳細參考本發明一般發明性概念之實施例，附圖中說明實施例之實例，其中相同參考標號始終指代相同元件。下文描述實施例以便藉由參看圖式來解釋本發明一般發明性概念。
圖1是說明根據本發明一般發明性概念之例示性實施例之堆疊型半導體封裝之下部印刷電路板的平面圖，且圖2是說明根據本發明一般發明性概念之例示性實施例之形成堆疊型半導體封裝的方法中用於形成下部模製樹脂化合物之模具的透視圖。而且，圖3A至圖3E是沿圖1之線I-I'截取之橫截面圖，其說明根據本發明一般發明性概念之例示性實施例之形成堆疊型半導體封裝的方法。
參看圖1、圖2及圖3A，根據本發明一般發明性概念之例示性實施例之形成堆疊型半導體封裝的方法包含準備 下部印刷電路板100，所述下部印刷電路板100之上部表面上包含多個互連件100a及多個用於連接的球焊盤(ball land)100b。下部印刷電路板100可更包含位於下部表面上之下部焊墊100c。一或多個依次堆疊之第一晶片105安裝於下部印刷電路板100之上部表面上。第一晶片105之背側表面可藉由黏合劑106與下部印刷電路板100之上部表面接觸。繼而，第一晶片105之焊墊可經由導線107電連接至形成於下部印刷電路板100上之多個互連件100a。或者，第一晶片105可在倒裝晶片(flip-chip)結構中電連接至下部印刷電路板100。
圖2中說明之具有多個插針P1之模具M1覆蓋於具有第一晶片之下部印刷電路板100上。可製造具有多個插針P1之模具M1，從而使得用於連接之球焊盤100b與插針P1對準。因此，插針P1可分別與下部印刷電路板100的用於連接之球焊盤100b接觸。當從平面圖觀看時，插針P1可具有圓形、橢圓形、矩形、六邊形或菱形形狀。而且，當從橫截面圖觀看時，插針P1可具有矩形或倒梯形之形狀。圖3說明圓柱形插針P1作為本發明一般發明性概念之例示性實施例。模具M1之板在插針P1之間可具有平面表面或凹入區域。
參看圖1、圖2及圖3B，可將熔化之下部模製樹脂化合物110注射至模具M1之一側內。熔化之下部模製樹脂化合物110可包含環氧樹脂模製化合物或液態環氧樹脂。熔化之下部模製樹脂化合物110可在相反方向上流動，其 中注射熔化之下部模製樹脂化合物110以填充下部印刷電路板100與模具M1之間的空間。此處，空氣可經由通風口排出。熔化之下部模製樹脂化合物110填充插針P1之間的每個空白空間。
參看圖1及圖3C，可硬化熔化之下部模製樹脂化合物110，從而形成硬的下部模製樹脂化合物110'。可移除具有插針P1之模具M1。因此，可形成通孔100h，所述通孔100h穿過下部模製樹脂化合物110'，並暴露下部印刷電路板100之每一用於連接之球焊盤100b。可依據插針P1之形狀而確定通孔110h之形狀。下部模製樹脂化合物110'可形成為具有平面上部表面。或者，當模具M1具有凹入區域時，下部模製樹脂化合物110'之上部表面可形成為具有階梯差異。特定而言，下部模製樹脂化合物110'之對應於第一晶片105的上部區域可形成為具有高於其它區域之上部表面。
電極E1可形成於下部印刷電路板100之下部焊墊100c上。電極E1可由焊球形成。下部印刷電路板100、第一晶片105以及下部模製樹脂化合物110'可構成下部晶片封裝PK1。
參看圖1及圖3D，下方附接有上部焊球125之上部晶片封裝PK2對準於下部模製樹脂化合物110'上，使得焊球125分別對應於通孔110h。上部晶片封裝PK2之形成可包含準備上部印刷電路板111，上部印刷電路板111包含下部焊墊111c及互連件111a。繼而，可在上部印刷電路板 111上形成一或多個第二晶片115，第二晶片115電連接至上部印刷電路板111且依次堆疊。
第二晶片115之背側表面可經由黏合劑116與上部印刷電路板111之上部表面接觸。隨後，第二晶片115之焊墊可經由導線117電連接至形成於上部印刷電路板111上之多個互連件111a。或者，第二晶片115可在倒裝晶片結構中電連接至上部印刷電路板111。可形成上部模製樹脂化合物120，上部模製樹脂化合物120覆蓋具有第二晶片115之上部印刷電路板111。可形成分別與下部焊墊111c接觸之上部焊球125。上部焊球125可由含有錫(Sn)之材料形成。
參看圖1及圖3E，可回焊上部焊球125，從而形成填充通孔110h之連接導體125'。下部晶片封裝PK1及上部晶片封裝PK2藉由連接導體125'彼此電連接，從而可形成具有封裝上封裝(Package On Package，POP)結構之堆疊型半導體封裝。上部晶片封裝PK2可取決於上部焊球125之量而與下部晶片封裝PK1之下部模製樹脂化合物110'之上部表面直接接觸。或者，當上部焊球之量足以填充通孔110h並保持時，上部晶片封裝PK2可設置為與下部模製樹脂化合物110'之上部表面間隔開。
如圖4A所說明，本發明一般發明性概念之例示性實施例可更包含使用連接導體125"在下部晶片封裝PK1與上部晶片封裝PK2之間堆疊一或多個中間晶片封裝PK1.5。
另外，如圖4B所說明，在本發明一般發明性概念之例示性實施例中，第一晶片105'可在倒裝晶片結構中電連接至印刷電路板100。此外，填充通孔110'之連接導體125"'之橫截面可形成為倒梯形形狀。
如上所述，本實施例具有一結構，其中下部晶片封裝PK1之下部模製樹脂化合物110'覆蓋下部印刷電路板100而非用於連接之球焊盤100b之區域，且如圖4B所說明，側澆口轉移模具方法可應用於本實施例。因此，在本發明一般發明性概念中可克服習知頂部澆口模具方法之問題，其中僅將模製樹脂化合物塗覆至晶片區域，即，空氣通風口設計之限制。
而且，當上部晶片封裝PK2堆疊於下部晶片封裝PK1上時，上部晶片封裝PK2之上部焊球125安裝於下部晶片封裝PK1之通孔110h上，從而可防止由對準不良引起之堆疊缺陷。而且，上部焊球125經回焊而填充通孔110h，且上部晶片封裝PK2及下部晶片封裝PK1藉由連接導體125'而結合，從而可防止習知技術中由焊球引起之球橋及接縫斷裂缺陷。
此外，當下部印刷電路板100變薄以便減小POP厚度時，在習知技術中，模製樹脂化合物僅覆蓋下部晶片封裝之中心部分，且因此由於組裝及測試過程中之彎曲測試期間之應力，在模製樹脂化合物之邊緣區域處發生圖案斷裂現象。然而，在本實施例中，由於整個下部印刷電路板100均由模製樹脂化合物110'覆蓋，因此可實現對彎曲測試期 間引起之應力之抵抗。因此，下部印刷電路板100之薄厚度可實施具有薄輪廓之POP結構。
圖5是根據本發明一般發明性概念之其它例示性實施例之形成堆疊型半導體封裝的方法中用於形成下部模製樹脂化合物之模具的透視圖。而且，圖6A至圖6E是沿圖1之線I-I'截取之橫截面圖，其說明根據本發明一般發明性概念之其它例示性實施例之形成堆疊型半導體封裝的方法。
參看圖1、圖5及圖6A，根據本發明一般發明性概念之例示性實施例之形成堆疊型半導體封裝的方法包含準備下部印刷電路板200，下部印刷電路板200之上部表面上具有多個互連件200a及多個用於連接的球焊盤200b。下部印刷電路板200可更包含位於下部表面上之下部焊墊200c。一或多個依次堆疊之第一晶片205安裝於下部印刷電路板200之上部表面上。第一晶片205可在倒裝晶片結構中電連接至形成於下部印刷電路板200上之多個互連件200a。或者，如圖3A所說明，第一晶片205之焊墊可經由導線電連接至形成於下部印刷電路板200上之多個互連件200a。
圖5中說明之具有多個插針P2之模具M2覆蓋於具有第一晶片205之下部印刷電路板200上。可製造具有多個插針P2之模具M2，從而使得下部印刷電路板200之用於連接之球焊盤200b與插針P2對準。因此，插針P2可分別與下部印刷電路板200的用於連接之球焊盤200b接觸。 當自平面圖觀看時，插針P2可具有圓形、橢圓形、矩形、 六邊形或菱形形狀。而且，當自橫截面圖觀看時，插針P2可具有矩形或倒梯形之形狀。圖5說明圓柱形插針P2作為本發明一般發明性概念之例示性實施例。模具M2之板可在插針P2之間具有凹入區域R。或者，模具M2之板可具有平面表面。在本例示性實施例中，將模具M2之板製造為在插針P2之間具有凹入區域R，且如圖6所說明，凹入區域R可對準於第一晶片205上。
參看圖1、圖5及圖6B，可將熔化之下部模製樹脂化合物210注射至模具M2之一側內。熔化之下部模製樹脂化合物210可包含環氧樹脂模製化合物或液態環氧樹脂。熔化之下部模製樹脂化合物210可在相反方向上流動，其中注射熔化下部模製樹脂化合物210以填充下部印刷電路板200與模具M2之間的空間。此處，空氣可經由通風口排出。熔化之下部模製樹脂化合物210填充插針P2與凹入區域R之間的每個空白空間。
參看圖1、圖6B及圖6C，可硬化熔化之下部模製樹脂化合物210，從而形成硬的下部模製樹脂化合物210'。可移除具有插針P2及凹入區域R之模具M2。因此，可形成穿過下部模製樹脂化合物210'並暴露下部印刷電路板200之每一用於連接之球焊盤200b的通孔210h。可依據插針P2之形狀而確定通孔210h之形狀。下部模製樹脂化合物210'之上部表面可形成為藉由模具M2之凹入區域R而具有階梯差異。特定而言，下部模製樹脂化合物210'之對應於第一晶片205的上部區域210r可形成為具有高於其它 區域之上部表面。
電極E2可形成為與下部印刷電路板200之下部焊墊200c接觸。電極E2可由焊球形成。下部印刷電路板200、第一晶片205以及下部模製樹脂化合物210'可構成下部晶片封裝PK3。
參看圖1及圖6D，下方安裝有上部焊球125之上部晶片封裝PK2的焊球125可對準，從而分別對應於下部晶片封裝PK3之通孔210h。上部晶片封裝PK2之形成可包含準備上部印刷電路板111，上部印刷電路板111包含下部焊墊111c及互連件111a。繼而，可在上部印刷電路板111上形成一或多個第二晶片115，第二晶片115電連接至上部印刷電路板111且依次堆疊。
第二晶片115之背側表面可經由黏合劑116與上部印刷電路板111之上部表面接觸。隨後，第二晶片115之焊墊可經由導線117電連接至形成於上部印刷電路板111上之多個互連件111a。或者，第二晶片115可在倒裝晶片結構中電連接至上部印刷電路板111。可形成覆蓋具有第二晶片115之上部印刷電路板111的上部模製樹脂化合物120。上部焊球125可分別形成於下部焊墊111c上。上部焊球125可由含有Sn之材料形成。
參看圖1及圖6E，上部焊球125可回焊以形成填充通孔210h之連接導體225'。可形成具有POP結構之堆疊型半導體封裝，其中下部晶片封裝PK3及上部晶片封裝PK2藉由連接導體225'彼此電連接。上部晶片封裝PK2可取決 於上部焊球125之量而與下部晶片封裝PK3之下部模製樹脂化合物210'之上部表面直接接觸。或者，當上部焊球125之量足以填充通孔210h並因此保持時，上部晶片封裝PK2可設置為與下部模製樹脂化合物210'之上部表面間隔開。
如上所述，本實施例具有一結構，其中下部晶片封裝PK3之下部模製樹脂化合物210'覆蓋下部印刷電路板200而非用於連接之球焊盤200b之區域，且如圖6B所說明，側澆口轉移模具方法可應用於本實施例。因此，在本發明中可克服習知頂部澆口模具方法之問題，其中僅將模製樹脂化合物塗覆至晶片區域，即，空氣通風口設計之限制。
而且，當上部晶片封裝PK2堆疊於下部晶片封裝PK3上時，上部晶片封裝PK2之上部焊球125安裝於下部晶片封裝PK3之通孔210h上，從而可防止由對準不良引起之堆疊缺陷。而且，上部焊球125經回焊以填充通孔210h，且上部晶片封裝PK2及下部晶片封裝PK1藉由連接導體225'而結合，從而可防止習知技術中由焊球引起之球橋及接縫斷裂缺陷。
此外，當下部印刷電路板200變薄以便減小POP厚度時，在習知技術中，模製樹脂化合物僅覆蓋下部晶片封裝之中心部分，且因此由於組裝及測試過程中之彎曲測試期間之應力而在模製樹脂化合物之邊緣區域處發生圖案斷裂現象。然而，在本實施例中，由於整個下部印刷電路板200均由模製樹脂化合物210'覆蓋，因此可實現對彎曲測試期間引起之應力之抵抗。因此，下部印刷電路板200之薄厚 度實施具有薄輪廓之POP結構。
再次參看圖1及圖3E，下文將描述根據本發明一般發明性概念之例示性實施例之堆疊型半導體封裝。
參看圖1及3E，根據本發明一般發明性概念之例示性實施例之堆疊型半導體封裝包含下部印刷電路板100，下部印刷電路板100之上部表面上具有多個互連件100a及多個用於連接之球焊盤100b。下部印刷電路板100可更包含位於其下部表面上之下部焊墊100c。一或多個依次堆疊之第一晶片105設置於下部印刷電路板100上。第一晶片105之背側表面可經由黏合劑106與下部印刷電路板100之上部表面接觸。繼而，第一晶片105之焊墊可經由導線107電連接至設置於下部印刷電路板100上之多個互連件100a。或者，第一晶片105可在倒裝晶片結構中電連接至下部印刷電路板100。
下部模製樹脂化合物110'設置於下部印刷電路板100上並覆蓋第一晶片105。下部模製樹脂化合物110'可包含環氧樹脂模製化合物。下部模製樹脂化合物110'可包含平面上部表面。或者，下部模製樹脂化合物110'之上部表面可具有階梯差異。特定而言，下部模製樹脂化合物110'之對應於第一晶片105之上部區域可形成為具有高於其它區域之上部表面。
可設置穿過下部模製樹脂化合物110'並與用於連接之球焊盤110b接觸的連接導體125'。設置連接導體125'以填充通孔110h，通孔110h穿過下部模製樹脂化合物110'並 暴露用於連接之球焊盤110b。當自平面圖觀看時，連接導體125'可具有圓形、橢圓形、矩形、六邊形或菱形形狀。而且，連接導體125'可具有矩形或倒梯形之形狀。連接導體125'可為含有Sn之材料。
電極E1可設置為與下部印刷電路板100之下部焊墊100c接觸。電極E1可具有焊球結構。下部印刷電路板100、第一晶片105以及下部模製樹脂化合物110'可構成下部晶片封裝PK1。
與連接導體125'之上部表面接觸之上部晶片封裝PK2設置於下部晶片封裝PK1上。上部晶片封裝PK2可包含具有下部焊墊111c及互連件111a之上部印刷電路板111。連接導體125'可與上部晶片封裝PK2之下部焊墊111c直接接觸。
電連接至上部印刷電路板111且依次堆疊之一或多個第二晶片115可設置於上部印刷電路板111上。第二晶片115之背側表面可經由黏合劑116與上部印刷電路板111之上部表面接觸。隨後，第二晶片115之焊墊可經由導線117電連接至形成於上部印刷電路板111上之多個互連件111a。或者，第二晶片115可在倒裝晶片結構中電連接至上部印刷電路板111。可設置覆蓋具有第二晶片115之上部印刷電路板111的上部模製樹脂化合物120。
可形成具有POP結構之堆疊型半導體封裝，其中下部晶片封裝PK1及上部晶片封裝PK2藉由連接導體125'彼此電連接。上部晶片封裝PK2可與下部晶片封裝PK1之下 部模製樹脂化合物110'之上部表面直接接觸。或者，上部晶片封裝PK2可設置為與下部模製樹脂化合物110'之上部表面間隔開。
如圖4A所說明，在本發明一般發明性概念之例示性實施例中，可藉由中間連接導體125"在下部晶片封裝PK1與上部晶片封裝PK2之間電連接及堆疊一或多個中間晶片封裝PK1.5。
另外，如圖4B所說明，在本發明一般發明性概念之例示性實施例中，第一晶片105'可在倒裝晶片結構中電連接至印刷電路板100。此外，填充通孔110'之連接導體125"'之橫截面可具有倒梯形形狀。
再次參看圖1及圖6E，下文將描述根據本發明一般發明性概念之其它例示性實施例之堆疊型半導體封裝。
參看圖1及圖6E，根據本發明一般發明性概念之例示性實施例之堆疊型半導體封裝包含下部印刷電路板200，下部印刷電路板200之上部表面上具有多個互連件200a及多個用於連接的球焊盤200b。下部印刷電路板200可更包含位於其下部表面上之下部焊墊200c。一或多個依次堆疊之第一晶片205可設置於下部印刷電路板200上。第一晶片205之焊墊可在倒裝晶片結構中電連接至設置於下部印刷電路板200上之多個互連件200a。或者，如圖3E所說明，第一晶片205之焊墊可經由導線電連接至設置於下部印刷電路板200上之多個互連件200a。
下部模製樹脂化合物210'可設置於下部印刷電路板 200上以覆蓋第一晶片205。下部模製樹脂化合物210'可包含環氧樹脂模製化合物。下部模製樹脂化合物210'之上部表面可具有階梯差異。特定而言，下部模製樹脂化合物210'之對應於第一晶片205之上部區域210r可具有高於其它區域之上部表面。或者，下部模製樹脂化合物210'可具有平面上部表面。
設置穿過下部模製樹脂化合物210'與用於連接之球焊盤200b接觸的連接導體225'。可設置連接導體225'以填充通孔210h，通孔210h穿過下部模製樹脂化合物210'並暴露用於連接之球焊盤200b。連接導體225'可向上延伸。當自平面圖觀看時，連接導體225'可具有圓形、橢圓形、矩形、六邊形或菱形形狀。而且，連接導體225'可具有矩形或倒梯形之形狀。連接導體225'可由含有Sn之材料形成。
電極E2可設置為與下部印刷電路板200之下部焊墊200c接觸。電極E2可具有焊球結構。下部印刷電路板200、第一晶片205以及下部模製樹脂化合物210'可構成下部晶片封裝PK3。
與連接導體225'之上部表面接觸之上部晶片封裝PK2可設置於下部晶片封裝PK3上。上部晶片封裝PK2可包含具有下部焊墊111c及互連件111a之上部印刷電路板111。連接導體225'可與上部晶片封裝PK2之下部焊墊111c直接接觸。
可在上部印刷電路板111上設置一或多個第二晶片115，所述第二晶片115電連接至上部印刷電路板111且依 次堆疊於上部印刷電路板111上。第二晶片115之背側表面可經由黏合劑116與上部印刷電路板111之上部表面接觸。隨後，第二晶片115之焊墊可經由導線117電連接至形成於上部印刷電路板111上之多個互連件111a。或者，第二晶片115可在倒裝晶片結構中電連接至上部印刷電路板111。可設置覆蓋具有第二晶片115之上部印刷電路板111的上部模製樹脂化合物120。
可形成具有POP結構之堆疊型半導體封裝，其中下部晶片封裝PK3及上部晶片封裝PK2藉由連接導體225'彼此電連接。上部晶片封裝PK2可與下部晶片封裝PK3之下部模製樹脂化合物210'之上部表面直接接觸，或者，上部晶片封裝PK2可設置為與下部模製樹脂化合物210'之上部表面間隔開。
可藉由中間連接導體將一或多個中間晶片封裝(未圖示)彼此電連接並堆疊於下部晶片封裝PK3與上部晶片封裝PK2之間。
圖7是說明根據本發明一般發明性概念之例示性實施例之包含堆疊型半導體封裝之電子系統的示意性框圖。
參看圖7，電子系統300包含一或多個堆疊型半導體封裝303及連接至堆疊型半導體封裝303之處理器305。此處，堆疊型半導體封裝303可包含參看圖1、圖3E、圖4A、圖4B及圖6E描述之堆疊型半導體封裝。舉例而言，如圖4A所說明，下部晶片封裝PK1、中間晶片封裝PK1.5及上部晶片封裝PK2可經由連接導體125'及125"彼此電連 接。下部晶片封裝PK1可為邏輯封裝，且中間晶片封裝PK1.5及上部晶片封裝PK2可為記憶體封裝。
電子系統300可對應於筆記型電腦之一部分、數位相機、MP3或蜂巢式電話。在此情況下，處理器305及堆疊型半導體封裝303可安裝於一板上，且堆疊型半導體封裝303可充當資料儲存媒介以執行處理器305。
電子系統300可經由輸入/輸出(input/output，I/O)單元307與諸如個人電腦或電腦網路之其它電子系統交換資料。輸入/輸出單元307可以電腦之外圍匯流排線、高速數位傳輸線或無線傳輸/接收天線提供資料。處理器305與堆疊型半導體封裝303之間的資料通信以及處理器305與輸入/輸出單元307之間的資料通信可使用一般匯流排架構來建立。
圖8是說明記憶體模組之示意圖，其中根據本發明一般發明性概念安裝堆疊型半導體封裝。
參看圖8，記憶體模組包含板主體11，板主體11包含多個耳片13及堆疊型半導體封裝15，堆疊型半導體封裝15以兩個或兩個以上行之陣列安裝於板主體11上。此處，堆疊型半導體封裝303可包含參看圖1、圖3E、圖4A、圖4B及圖6E描述之堆疊型半導體封裝。舉例而言，如圖4A所說明，下部晶片封裝PK1、中間晶片封裝PK1.5及上部晶片封裝PK2經由連接導體125'及125"彼此電連接。下部晶片封裝PK1可為邏輯封裝，且中間晶片封裝PK1.5及上部晶片封裝PK2可為記憶體封裝。
離散裝置17可安裝於板主體11上。離散裝置17可包含選自由暫存器、電容器、電感器、電阻器、可程式化裝置及非揮發性記憶體裝置組成之群中的至少一者。
該記憶體模組可修改為諸如個人電腦、系統伺服器及通信裝置之多個電子系統的資料儲存裝置。記憶體模組可經由安裝於板主體11上之耳片13電連接至外部連接器。
圖9是說明根據本發明一般發明性概念之形成堆疊型半導體封裝之方法的流程圖。參看圖9，在操作S910中，在一晶片封裝上形成球焊盤及對應於球焊盤之通孔。在操作S920中，在另一晶片封裝上形成焊球，所述焊球對應於所述一個晶片封裝上之通孔。在操作S930中，所述晶片封裝之通孔及所述另一晶片封裝之對應焊球彼此契合。在操作S940中，回焊用於填充對應通孔之焊球以形成連接導體。
根據本實施例，下部晶片封裝之下部模製樹脂化合物覆蓋下部印刷電路板而非用於連接之球焊盤之區域，且因此，側澆口轉移模具方法可應用於本發明模製方法。因此，克服習知頂部澆口模具方法之問題，其中僅將模製樹脂化合物塗覆至晶片區域，即，空氣通風口設計之限制。
而且，當上部晶片封裝堆疊於下部晶片封裝上時，上部晶片封裝之焊球安裝於下部晶片封裝之通孔上，從而可防止由對準不良引起之堆疊缺陷。此外，焊球經回焊以填充通孔，且上部晶片封裝及下部晶片封裝藉由連接導體而結合，從而可防止習知技術中由焊球引起之球橋及接縫缺 陷。
另外，當下部印刷電路板變薄以便減小POP厚度時，在習知技術中，模製樹脂化合物僅覆蓋下部晶片封裝之中心部分，且因此由於組裝及測試過程中之彎曲測試期間之應力而在模製樹脂化合物之邊緣區域處發生圖案斷裂現象。然而，在本發明一般發明性概念之各種實施例中，由於整個下部印刷電路板均由模製樹脂化合物覆蓋，因此可獲得對彎曲測試期間引起之應力之抵抗。因此，下部印刷電路板之薄厚度可實施具有薄輪廓之POP結構。
本文已揭露本發明一般發明性概念之例示性實施例，且儘管採用特定術語，但所述特定術語僅在一般的描述性意義上使用及解釋，而並非出於限制目的。因此，熟習此項技術者將瞭解，在不偏離如以下申請專利範圍陳述之本發明一般發明性概念之精神及範疇的情況下，可做出形式及細節上的各種改變。
11‧‧‧板主體
13‧‧‧耳片
15‧‧‧堆疊型半導體封裝
17‧‧‧離散裝置
100、200‧‧‧下部印刷電路板
100a、200a‧‧‧互連件
100b、200b‧‧‧球焊盤
100c、200c‧‧‧下部焊墊
105、105'、205‧‧‧第一晶片
106‧‧‧黏合劑
107‧‧‧導線
110、110'、210、210'‧‧‧下部模製樹脂化合物
110h、210h‧‧‧通孔
111‧‧‧上部印刷電路板
111a‧‧‧互連件
111c‧‧‧下部焊墊
115‧‧‧第二晶片
116‧‧‧黏合劑
117‧‧‧導線
120‧‧‧上部模製樹脂化合物
125‧‧‧上部焊球
125'、125"、125"'‧‧‧連接導體
210r‧‧‧上部區域
225'‧‧‧連接導體
300‧‧‧電子系統
303‧‧‧堆疊型半導體封裝
305‧‧‧處理器
307‧‧‧輸入/輸出單元
E1、E2‧‧‧電極
I-I'‧‧‧截取線
M1、M2‧‧‧模具
P1、P2‧‧‧插針
PK1、PK3‧‧‧下部晶片封裝
PK1.5‧‧‧中間晶片封裝
PK2‧‧‧上部晶片封裝
R‧‧‧凹入區域
S910-S940‧‧‧堆疊型半導體封裝形成方法的操作步驟
藉由下文結合附圖做出之實施例描述中將明瞭且更容易瞭解本發明一般發明性概念之此等及/或其它態樣及實用性，附圖中：圖1是說明根據本發明一般發明性概念之例示性實施例之堆疊型半導體封裝的平面圖。
圖2是說明根據本發明一般發明性概念之例示性實施例之形成堆疊型半導體封裝的方法中用於形成下部模製樹脂化合物之模具的透視圖。
圖3A至圖3E是沿圖1之線I-I'截取之橫截面圖，其說明根據本發明一般發明性概念之例示性實施例之形成堆疊型半導體封裝的方法。
圖4A是說明根據本發明一般發明性概念之其它例示性實施例之形成堆疊型半導體封裝之方法的橫截面圖。
圖4B是說明根據本發明一般發明性概念之其它例示性實施例之形成堆疊型半導體封裝之方法的橫截面圖。
圖5是根據本發明一般發明性概念之其它例示性實施例之形成堆疊型半導體封裝的方法中用於形成下部模製樹脂化合物之模具的透視圖。
圖6A至圖6E是沿圖1之線I-I'截取之橫截面圖，其說明根據本發明一般發明性概念之其它例示性實施例之形成堆疊型半導體封裝的方法。
圖7是說明根據本發明一般發明性概念之例示性實施例之包含堆疊型半導體封裝之電子系統的示意性框圖。
圖8是說明根據本發明一般發明性概念之上面安裝有堆疊型半導體封裝之記憶體模組的示意圖。
圖9是說明根據本發明一般發明性概念之形成堆疊型半導體封裝之方法的流程圖。
100、200‧‧‧下部印刷電路板
100b、200b‧‧‧球焊盤
I-I'‧‧‧截取線

Claims (32)

  1. 一種堆疊型半導體封裝，包括：下部印刷電路板，其上部表面上具有多個互連件及多個用於連接之球焊盤；一或多個第一晶片，其在所述下部印刷電路板上電連接至所述多個互連件且依次堆疊；下部模製樹脂化合物，其設置於所述下部印刷電路板上以覆蓋所述第一晶片；連接導體，其穿過所述下部模製樹脂化合物而與所述用於連接之球焊盤接觸；上部印刷電路板，其包含與所述連接導體之上部表面接觸之下部焊墊，且位於所述下部模製樹脂化合物上；一或多個第二晶片，其位於所述上部印刷電路板上，電連接至所述上部印刷電路板且依次堆疊；以及上部模製樹脂化合物，其覆蓋具有所述第二晶片之所述上部印刷電路板，其中每一所述連接導體被形成為倒梯形形狀。
  2. 如申請專利範圍第1項所述之堆疊型半導體封裝，其中所述下部印刷電路板、所述第一晶片及所述下部模製樹脂化合物構成下部晶片封裝，且所述上部印刷電路板、所述第二晶片及所述上部模製樹脂化合物構成上部晶片封裝。
  3. 如申請專利範圍第2項所述之堆疊型半導體封裝， 更包括：一或多個中間晶片封裝，其位於所述下部晶片封裝與所述上部晶片封裝之間，其中所述中間晶片封裝經由中間連接導體電連接至所述上部晶片封裝。
  4. 如申請專利範圍第1項所述之堆疊型半導體封裝，更包括：電極，其設置在所述下部印刷電路板下方。
  5. 如申請專利範圍第1項所述之堆疊型半導體封裝，其中所述晶片在倒裝晶片結構中連接至所述印刷電路板。
  6. 如申請專利範圍第1項所述之堆疊型半導體封裝，其中所述下部模製樹脂化合物具有平面上部表面。
  7. 如申請專利範圍第1項所述之堆疊型半導體封裝，其中所述下部模製樹脂化合物具有帶有階梯差異之上部表面，且所述下部模製樹脂化合物之對應於所述第一晶片之上部區域可具有高於其它區域之上部表面。
  8. 如申請專利範圍第1項所述之堆疊型半導體封裝，其中所述模製樹脂化合物包含環氧樹脂模製化合物。
  9. 如申請專利範圍第1項所述之堆疊型半導體封裝，其中所述連接導體為包含錫(Sn)之材料。
  10. 一種形成堆疊型半導體封裝之方法，所述方法包括：準備下部印刷電路板，其上部表面上包含多個互連件及多個用於連接之球焊盤；在所述下部印刷電路板上安裝一或多個第一晶 片，所述第一晶片電連接至所述多個互連件且依次堆疊；在所述下部印刷電路板上形成下部模製樹脂化合物以覆蓋所述第一晶片，其中所述下部模製樹脂化合物形成為具有暴露所述用於連接之球焊盤的通孔；對準下方安裝有焊球的上部晶片封裝，使得所述焊球分別對應於所述下部模製樹脂化合物之所述通孔；以及回焊所述焊球以形成填充所述通孔之連接導體，其中每一所述連接導體被形成為倒梯形形狀。
  11. 如申請專利範圍第10項所述之形成堆疊型半導體封裝之方法，其中形成所述下部模製樹脂化合物包括：覆蓋具有插針之模具，所述插針與具有所述第一晶片之所述下部印刷電路板上之所述用於連接之球焊盤接觸；將熔化之下部模製樹脂化合物注射至所述模具之一側中；在相反方向上流動所述熔化下部模製樹脂化合物，其中注射所述熔化之下部模製樹脂化合物以填充所述下部印刷電路板與所述模具之間的空間；硬化所述熔化之下部模製樹脂化合物；以及移除所述模具以形成分別暴露所述用於連接之球焊盤之通孔。
  12. 如申請專利範圍第10項所述之形成堆疊型半導體 封裝之方法，其中形成所述上部晶片封裝包括：準備包含下部焊墊之上部印刷電路板；在所述上部印刷電路板上形成一或多個第二晶片，所述第二晶片電連接至所述上部印刷電路板且依次堆疊；形成上部模製樹脂化合物，其覆蓋具有所述第二晶片之所述上部印刷電路板；以及形成分別對應於所述下部焊墊之焊球。
  13. 如申請專利範圍第12項所述之形成堆疊型半導體封裝之方法，其中所述下部印刷電路板、所述第一晶片及所述下部模製樹脂化合物構成下部晶片封裝。
  14. 如申請專利範圍第13項所述之形成堆疊型半導體封裝之方法，更包括使用中間連接導體在所述下部晶片封裝與所述上部晶片封裝之間堆疊一或多個中間晶片封裝。
  15. 如申請專利範圍第10項所述之形成堆疊型半導體封裝之方法，更包括：在形成所述下部模製樹脂化合物之後，在所述下部印刷電路板下方形成電極。
  16. 如申請專利範圍第10項所述之形成堆疊型半導體封裝之方法，其中將所述第一晶片形成為將在線結合結構或倒裝晶片結構中連接至所述下部印刷電路板之所述互連件。
  17. 如申請專利範圍第10項所述之形成堆疊型半導體封裝之方法，其中將所述下部模製樹脂化合物形成為具有 平面上部表面。
  18. 如申請專利範圍第10項所述之形成堆疊型半導體封裝之方法，其中將所述下部模製樹脂化合物形成為具有帶有階梯差異之上部表面，且將對應於所述第一晶片之所述下部模製樹脂化合物之上部區域形成為具有高於其它區域之上部表面。
  19. 如申請專利範圍第10項所述之形成堆疊型半導體封裝之方法，其中所述模製樹脂化合物包含環氧樹脂模製化合物。
  20. 如申請專利範圍第10項所述之形成堆疊型半導體封裝之方法，其中所述連接導體由包含錫(Sn)之材料形成。
  21. 一種電子系統，其包含處理器及執行與所述處理器之資料通信的輸入/輸出單元及一或多個堆疊型半導體封裝，所述堆疊型半導體封裝包括：下部印刷電路板，其上部表面上具有多個互連件及多個用於連接之球焊盤；一或多個第一晶片，其位於所述下部印刷電路板上，電連接至所述多個互連件且依次堆疊；下部模製樹脂化合物，其設置於所述下部印刷電路板上以覆蓋所述第一晶片；連接導體，其穿過所述下部模製樹脂化合物而與所述用於連接之球焊盤接觸；上部印刷電路板，其包含與所述連接導體之上部表 面接觸之下部焊墊且位於所述下部模製樹脂化合物上；一或多個第二晶片，其位於所述上部印刷電路板上，電連接至所述上部印刷電路板且依次堆疊；以及上部模製樹脂化合物，其覆蓋具有所述第二晶片之所述上部印刷電路板，其中每一所述連接導體被形成為倒梯形形狀。
  22. 如申請專利範圍第21項所述之電子系統，其中所述下部印刷電路板、所述第一晶片及所述下部模製樹脂化合物構成下部晶片封裝，且所述上部印刷電路板、所述第二晶片及所述上部模製樹脂化合物構成上部晶片封裝。
  23. 如申請專利範圍第22項所述之電子系統，更包括：一或多個中間晶片封裝，其位於所述下部晶片封裝與所述上部晶片封裝之間，其中所述中間晶片封裝經由中間連接導體電連接至所述上部晶片封裝。
  24. 如申請專利範圍第23項所述之電子系統，其中所述下部晶片封裝為邏輯封裝，且所述中間晶片封裝及所述上部晶片封裝為記憶體封裝。
  25. 如申請專利範圍第21項所述之電子系統，更包括：板，其上面安裝有所述處理器及所述堆疊型半導體封裝。
  26. 如申請專利範圍第25項所述之電子系統，更包括：電極，其設置在所述下部印刷電路板下方，其中所述下部印刷電路板經由所述電極電連接至所述板。
  27. 一種記憶體模組，包括： 板主體，其包含位於一側之多個耳片；以及堆疊型半導體封裝，其以兩個或兩個以上行之陣列安裝於所述板主體上，每一所述堆疊型半導體封裝包括：下部印刷電路板，其上部表面上具有多個互連件及多個用於連接之球焊盤；一或多個第一晶片，其位於所述下部印刷電路板上，電連接至所述多個互連件且依次堆疊；下部模製樹脂化合物，其設置於所述下部印刷電路板上以覆蓋所述第一晶片；連接導體，其穿過所述下部模製樹脂化合物而與所述用於連接之球焊盤接觸；上部印刷電路板，其包含與所述連接導體之上部表面接觸之下部焊墊且位於所述下部模製樹脂化合物上；一或多個第二晶片，其位於所述上部印刷電路板上，電連接至所述上部印刷電路板且依次堆疊；以及上部模製樹脂化合物，其覆蓋具有所述第二晶片之所述上部印刷電路板，其中每一所述連接導體被形成為倒梯形形狀。
  28. 如申請專利範圍第27項所述之記憶體模組，更包括：離散裝置，其設置於所述板主體上而與所述堆疊型半導體封裝間隔開。
  29. 如申請專利範圍第28項所述之記憶體模組，其中 所述離散裝置包括：選自由暫存器、電容器、電感器、電阻器、可程式化裝置及非揮發性記憶體裝置組成之群的至少一者。
  30. 一種堆疊型半導體封裝，包括：多個彼此堆疊之晶片封裝；位於所述多個晶片封裝中之一者上的多個球焊盤及對應於所述球焊盤之通孔；以及位於所述多個晶片封裝中之另一者上之多個焊球，所述焊球對應於所述一個晶片封裝上之所述通孔；其中所述對應之焊球與通孔彼此契合從而形成連接導體，且其中每一所述連接導體被形成為倒梯形形狀。
  31. 如申請專利範圍第30項所述之堆疊型半導體封裝，其中所述連接導體是藉由回焊所述焊球以填充所述通孔而形成。
  32. 一種形成堆疊型半導體封裝之方法，所述方法包括：在晶片封裝上形成多個球焊盤及對應於所述球焊盤之通孔；在另一晶片封裝上形成多個焊球，所述焊球對應於所述一個晶片封裝上之所述通孔；將所述晶片封裝之所述通孔與所述另一晶片封裝之所述對應焊球彼此契合；以及回焊所述焊球以填充所述對應通孔而形成連接導 體，其中每一所述連接導體被形成為倒梯形形狀。
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