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TWI221638B - Group III nitride semiconductor crystal, production method thereof and group III nitride semiconductor epitaxial wafer - Google Patents

Group III nitride semiconductor crystal, production method thereof and group III nitride semiconductor epitaxial wafer Download PDF

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Publication number
TWI221638B
TWI221638B TW92103031A TW92103031A TWI221638B TW I221638 B TWI221638 B TW I221638B TW 92103031 A TW92103031 A TW 92103031A TW 92103031 A TW92103031 A TW 92103031A TW I221638 B TWI221638 B TW I221638B
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Taiwan
Prior art keywords
nitride semiconductor
group iii
group
iii nitride
substrate
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TW92103031A
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Chinese (zh)
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TW200307313A (en
Inventor
Hisayuki Miki
Tetsuo Sakurai
Mineo Okuyama
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Showa Denko Kk
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Publication of TWI221638B publication Critical patent/TWI221638B/en

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Abstract

A simple method applies high quality group III nitride semiconductor crystal growth on the substrate. Applying group III material with the ratio of V/III down to 1,000 (including the ratio of V/III is 0) on the heated substrate for forming group III nitride semiconductor (InGaAlN represent the group III nitride semiconductor). Therefore, the vapor phase growth of the group III nitride semiconductor crystal applied with using group III material and nitrogen material on the said substrate.

Description

1221638 玖、發明說明 (發明說明應敘明:發明所屬之技術領域、先前技術、內容、實施方式及圖式簡單說明) [發明所屬之技術領域] 本發明係關於發光二極體(LED)、雷射二極體(LD )、電子 裝置等之製作上所使用之結晶性良好的第I〗〗族氮化物半 導體(以下,第III族氮化物半導體以InGaA1N表示之)結 晶及其製造方法。尤其是,關於適合用以使結晶性良好之 第ΠI族氮化物半導體結晶在藍寶石基板上進行磊晶成長 之第I I I族氮化物半導體結晶之製造方法。 [先前技術] 第ΠΙ族氮化物半導體因具有相當於可見光至紫外光區 域之能量直接轉移型的帶狀間隙而可實施高效率發光,故 被應用於LED及LD之製品化上。又,鋁氮化鎵(AlGaN)及 氮化鎵(G aN )之異質連接界面上,會發現第I I I族氮化物半 導體特有之壓電效應所導致之2次元電子層等,使電子裝 置獲得傳統之第I I I -第V族化合物半導體無法得到之特性 的位勢。 然而,第Π I族氮化物半導體在單結晶之育成溫度會有 達到2000氣壓之氮解離壓力,故單結晶之育成十分困難, 想要將第Π I族氮化物半導體之單結晶基板和其他第I I I -第V族化合物半導體一樣應用爲磊晶成長用基板,以現狀 而言,有其實質上之困難。因此,磊晶成長用基板會使用 由藍寶石(A 1 2 0 3 )單結晶及碳化矽(S i C )單結晶等異種材質 -6 - 1221638 所構成之基板。 這些異種基板、及在其上進行磊晶成長之第I I I族氮化 物半導體結晶間,會存在相當大之晶格失配。例如,藍寶 石(A 1 2 0 3 )及氮化鎵(GaN)之間存在16%、SiC及氮化鎵之間 則存在6%之晶格失配。一般而言,存在此種較大之晶格失 配時,在基板上實施結晶之直接磊晶成長會較爲困難,即 使可成長,亦無法獲得結晶性良好之結晶。因此,有機金 屬化學汽相成長(MOCVD )法在藍寶石單結晶基板及S i C單結 晶基板上實施第I I I族氮化物半導體結晶之磊晶成長時, 如日本特許第3 026 08 7號公報及日本特開平4 - 297023號公 報所不,一般會使用下述方法,先在基板上層疊由氮化銘 (A1N)或AlGaN所構成之被稱爲低溫緩衝層之層,然後在其 上以高溫實施第I I I族氮化物半導體結晶之磊晶成長。 又,除了利用上述低溫緩衝層之成長方法以外,尙有如 P. Kung,e t a 1 . , Applied Physics Letters, M_( 1 9 9 5 ), 29 5 8 .及日本特開平 9- 6 447 7等所示,在基板上形成在 900°C至1 200°C程度之高溫溫度範圍內成長之A1N層,然後 在其上實施氮化鎵之成長的方法。 [發明內容] 使用藍寶石當做基板時,大致可以下述方式形成上述低 溫緩衝層。 首先,在M0CVD法之成長裝置內將藍寶石基板加熱至 1 000 °C〜1 200 °C之高溫,除去表面之氧化膜等。其後,降 低成長裝置之溫度,在4 0 0〜6 0 0 °C程度之溫度,對基板上 -7- 1221638 以V / I I I比爲3 Ο Ο 0〜1 Ο Ο Ο 0同時供應有機金屬原料及氮源 ,層疊低溫緩衝層。此時,V / I I I比係指,以MOCVD法實 施第I I I -第V族化合物半導體結晶之成長時,流通於反應 爐之含有第III族元素之分子的莫耳數、及含有第V族元 素之分子的莫耳數之比率。例如,使用TMGa及氨實施氮化 鎵之成長時,流通於反應爐內之TMG a的莫耳數及氨之莫耳 數之比。其後,停止供應有機金屬原料,再度提高成長裝 置之溫度,對低溫緩衝層實施被稱爲晶化之熱處理,然後 ,再實施目的之第I I I族氮化物半導體結晶的磊晶成長。 低溫緩衝層之層疊溫度4 0 0 °C〜6 0 0 °C下,當做原料使用 之有機金屬原料及氮源一尤其是當做氮源使用之氨的熱分 解會不夠充份。因此,如以此低溫實施層疊的話,低溫緩 衝層內會含有許多缺陷。又,因在低溫下使原料進行反應 ,原料之有機金屬的烷基、及未分解之氮源之間會產生聚 合反應,故低溫緩衝層之結晶中亦含有許多此種反應物等 之雜質。 爲了消除這些缺陷及雜質,會對低溫緩衝層實施被稱爲 晶化之熱處理的步驟。緩衝層之晶化步驟,係對含有許多 雜質及缺陷之低溫緩衝層,以接近第II I族氮化物半導體 結晶之磊晶成長溫度的高溫實施熱處理,除去這些雜質及 缺陷。 如以上所示,使用於低溫緩衝層之成長方法,必須將基 板溫度降低爲熱淸洗溫度之1 2 0 0 °C至使緩衝層成長之溫度 5〇0°C附近,接著,在相對較短之時間內,使溫度從5 00 t - 8 - 1221638 附近上昇至實施退火之1 〇 〇 〇 °c附近的溫度區域。此時,一 般而言,以冷卻爲目的之溫度變動較需較長的時間,而快 速使溫度上昇則需要較多之能量。 又,因爲必須使基板承受如上所示之各種溫度變化,基 板會出現反翹。又,基板有時更會因爲反翹而裂開或產生 裂紋。又,基板之反翹亦會對其上成長之結晶層產生影響 ,尤其是製作LED構造時,基板面內會出現發光波長及發 光強度不均一的情形。 又,相對於上述使用低溫緩衝層之成長方法,亦有人提 出在基板上形成在900 °c至1 2 00°C程度之高溫的溫度範圍 下成長之A1N,然後再在其上實施氮化鎵之成長的方法(例 如,Ρ· K u n g , et al. , Applied Physics Letters, 6 6 ( 1 9 9 5 ), 2 9 5 8 ·等)。在前面之例中,記載著利用此方法可製作(〇 〇 〇 2 ) 面之X射線搖擺曲線爲3 0 a r c s e c之非常良好的結晶。然而 ,依據我們針對此手法進行試驗的結果,發現以此手法製 作之氮化鎵結晶膜係柱性極高之結晶,結晶內含有許多晶 粒間界。此種結晶從基板朝向表面產生之貫通移位的密度 相當高。因此,製作發光元件及電子裝置等之元件構造時 亦無獲得良好特性。 又,使用同樣在高溫下製作之A1N層的成長方法,在日 本特開平9-64477中亦有陳述。該文獻中,期望製作之第 I I I族氮化物半導體結晶爲結晶性良好之單結晶。而我們 在經過重複實驗後,發現該文陳述之使用良好單結晶A 1 N 膜之成長方法,和上述文獻記載方法相同,製作元件構造 -9- 1221638 時無法成長具有良好特性之結晶。因爲將結晶性良好之單 結晶層當做緩衝層使用,而在其上實施第I I I族氮化物半 導體之成長時’成長初期附著之原子無法順利遷移,而不 易獲得2次元之成長。 如上所示’因爲製作元件時無法獲得具有充份結晶性之 第I I I族氮化物半導體結晶,故使用高溫下成長之A丨N緩 衝層的第Π I族氮化物半導體結晶之成長方法,以目前而 言並不普遍。 本發明提供可以溫度變化較少之步驟來形成高品質之第 I I I族氮化物半導體結晶的第I I I族氮化物半導體結晶製 造方法’可用以取代必須設定許多溫度區域之使用低溫緩 衝層的方法、及製作之結晶有品質問題之使用高溫A丨N層 的方法。尤其是,提供可在藍寶石基板上實施高品質第I I I 族氮化物半導體結晶之磊晶成長的第Π I族氮化物半導體 結晶製造方法。又,本發明可提供利用前述第丨丨丨族氮化 物半導體結晶之製造方法所製造之高品質第I I I族氮化物 半導體結晶、以及使用該第I I I族氮化物半導體結晶之第 111族氮化物半導體磊晶晶圓。 本發明係 (1 )具有:對經過加熱之基板上,供應V / I I I比爲1 0 0 0 以下(含V / I 11比爲〇時)之第111族原料,形成第π I族 氮化物半導體(以下,第I I I族氮化物半導體以I n G a A 1 N表 示之)之第1步驟;以及其後使用第I I I族原料及氮原料, 在該基板上實施第I I I族氮化物半導體結晶之汽相成長的 -10- 1221638 第2步驟;之第I I I族氮化物半導體結晶之製造方法。 (2)前述基板使用藍寶石(Al2〇3)之如上述(1)之第In族 氮化物半導體結晶之製造方法。 (3 )前述第1步驟提供之第π〗族原料至少含有a丨之如 上述(1 )或(2 )之第I I I族氮化物半導體結晶之製造方法。 (4 )則述第2步驟中,在基板上實施汽相成長之第I〗丨族 氮化物半導體結晶係由GaN所構成之如上述(1 )至(3 )之其 中任一項之第I I I族氮化物半導體結晶之製造方法。 (5)前述第1步驟或第2步驟之至少一方,會以有機金屬 化學汽相成長法(MOCVD法)實施汽相成長之如上述(丨)至(4) 之其中任一項之第I I I族氮化物半導體結晶之製造方法。 (6 )前述第2步驟之氮原料係使用氨(NH3)之如上述(1 )至 (5 )之其中任一項之第〗ί丨族氮化物半導體結晶之製造方法 〇 (7 )前述第1步驟形成之第π丨族氮化物半導體係島狀結 晶塊之如上述(1 )至(6 )之其中任一項之第I I I族氮化物半 導體結晶之製造方法。 (8 )前述第1步驟形成之第π ][族氮化物半導體係柱狀結 晶之如上述(1 )至(7 )之其中任一項之第I I I族氮化物半導 體結晶之製造方法。 (9 )前述柱狀結晶之側面係以大致垂直於基板面之方式附 著於基板上之如上述(8 )之第I I I族氮化物半導體結晶之製 造方法。 又,本發明係 -11- 1221638 (1 Ο )在經過加熱之基板上製做第1第I I I族氮化物半導 體,並在其上製作第2第I I I族氮化物半導體結晶之第I I I 族氮化物半導體結品之製造方法,其特徵爲··第1第I I I 族氮化物半導體爲柱狀結晶或島狀結晶之集合體。 (1 1 )前述柱狀結晶之側面係以大致垂直於基板面之方式 附著於基板上之如上述(1 0 )之第I I I族氮化物半導體結晶 之製造方法。 又,本發明係 (1 2 )以如上述(1 )至(1 1 )之方法製造之第I I I族氮化物半 導體結晶。 又,本發明係 (1 3 )在如上述(1 2 )之第I I I族氮化物半導體結晶上更進 一步形成弟III族氣化物半導體結晶層之第III族氮化物 半導體嘉晶晶圓。 [實施方式] 本發明之第I I I族氮化物半導體結晶之製造方法,係具 有:對經過加熱之基板上,以V / I I I比爲1 ο ο 0以下(含V / I I I 比爲0時)提供弟I I I族原料’形成第I I I族氮化物半導體 之桌1步驟;以及再使用第III族原料及氮原料,在該基 板上實施第I I I族氮化物半導體結晶之汽相成長之第2步 驟。利用具有上述第1、第2步驟之第I I I族氮化物半導 體結晶之製造方法,可在基板上形成結晶性良好之第ill 族氮化物半導體結晶。又,本發明中之第111族氮化物半 導體係以InGaAIN表不之。 -12- 1221638 在V/I II比爲1 000以下之低V/Ι II比的條件下製作之第 I I I族氮化物半導體結晶,結晶中之第V族元素及第III 族元素之化學計量比(化學計量化)不會爲1 ·· 1,第I π族 元素應會過剩而形成金屬過剩。此種第111族氮化物半導 體結晶層中,過剩之第111族元素會以金屬結晶或液滴之 形態出現。因此,在其上實施第Π I族氮化物半導體結晶 之成長時,成長初期之遷移會以良好效率進行,而可實現 橫向之2次元成長。然而,其詳細機構卻不明。 爲使獲得良好之第11 I族氮化物半導體的成長,最好爲 以較小V / I I I比製作之A1N膜,其在日本特開平9 - 64477 亦曾論述。然而,該文獻中,係希望製作之第I I I族氮化 物半導體結晶爲結晶性良好之單結晶。經過重複實驗及解 析,發現將柱狀結晶或島狀結晶之集合體當做緩衝層,其 機能較單結晶膜爲佳。因爲金屬晶及液滴會進入存在於由 柱狀結晶或島狀結晶所構成之層中的晶粒間界,而更易產 生金屬過剩之結晶。然而,詳細情形卻不明。 因爲此方法之溫度昇降小於傳統上使用低溫緩衝層之方 法,處理過程會較短,電力消耗量亦較少。利用此方式, 可縮短製造處理過程並實現低成本化。又,因溫度變化較 小,故可將基板之反翹抑制於最小,而使元件特性具有良 好之均一性。又,和到目前爲止被公開之使用高溫下成長 之A 1 N層的成長方法相比,可製作具有良好元件特性之結 晶。 本發明之基板可使用玻璃、SiC、Si、GaAs、及藍寶石等 -13 - 1221638 。本發明中之前述基板以藍寶石(ai2o3)爲最佳。基板若使 用藍寶石,則具有以低價獲得局品質基板之優點。 藍寶石基板之面方位方面,可使用m面、3面、或C面 等,然而,其中以c面((0001)面)爲佳,又,基板表面 之垂直軸應從<000 1 >方向朝特定方向傾斜。又,本發明使 用之基板,若在第1步驟前實施如有機洗淨及蝕刻之前處 理,則可使基板表面之狀態保持一定之狀態而更佳。 本發明中,在第1步驟提供之第I I I族原料可以使用三 甲基鋁、三乙基鋁、第三丁基鋁、三甲基鎵、三乙基鎵、 第三丁基鎵、三甲基銦、三乙基銦、第三丁基銦、及茂基 銦等。又,如三甲基鋁、三乙基鋁、第三丁基鋁等之第ΙΠ 族原料若含有A 1,則因含鋁之氮化物的分解溫度較高,在 高溫下不易發生分解及昇華,而具有結晶容易在基板上成 長之效果,故特別良好。 又,本發明之第1步驟中,會和第I I I族原料同時提供 氣、院基胺類、聯胺類等之第V族原料,形成第I I I族氮 化物半導體。本發明中,在第1步驟中提供第111族原料 時之V/III比爲1000以下。又,500以下更佳,100以下 最好。以此方式設定V / I I I比,具有更易產生金屬過剩之 化合物半導體結晶的效果。 本發明中,V /111比亦可爲〇,亦即,第V族原料之供給 量爲0。然而,此時即使刻意使提供之第V族原料爲〇,附 著於反應爐之壁面、天花板、及感受器等之附著物的分解 而產生之氮’亦會形成第I I I族氮化物半導體。此時,必 -14- 1221638 須適度地控制附著於反應爐之壁面、天花板、及感受器等 之附著物的組成及量。具體而言,就是調整結束成長後之 反應爐的烘焙時間及溫度、或停止其本身。又,使用低溫 緩衝法之成長上之一般技術〜被稱爲熱洗淨之步驟,調整 時間及溫度、停止其本身。 以實例來進行說明的話,在前一次之成長後不實施烘焙 ,而在 6 0 0 °C實施1 0分鐘之熱洗淨後,在第1步驟以 1 000°C使只含有金屬之化合物流過基板,然後,在第2步 驟實施結晶成長,可製作良好之第I I I族氮化物半導體結 晶。 又,第1步驟之V / I I I比爲〇而仍可獲得良好第111族 氮化物半導體結晶之條件之一,就是使用N2做爲載體氣體 ,將在約1 00 0 °C之溫度下由N2之少許分解所產生的氮(N) 原子當做氮源使用。 本發明之第1步驟中,環境氣體可以使用氫、稀有氣體 、及氮等之單獨氣體、或混合氣體。如上面所述,使用氮 當做環境氣體時,有時氮氣亦會具有原料氣體之機能。 又,執行第1步驟時之環境壓力可以爲1 000〜lx 105Pa 。以lx 105Pa以下爲佳,最好爲lx l〇4Pa以下。第1步驟 之壓力較低的話,製作之金屬過剩的第Π I族氮化物半導 體層之表面會較爲平坦,而具有在其上成長之第2第III 族氮化物半.導體層的表面會較爲平坦化之效果。 又,本發明中,對於實施第1步驟時之基板溫度、及實 施第2步驟時之基板溫度並無特別規定,然而,實施第1 - 15 - 1221638 步驟時之基板溫度應等於或高於實施第2步驟時之基板溫 度。若以等於或高於實施第2步驟時之基板溫度來實施第 1步驟,則可有效地分解第Π I族原料氣體之有機金屬化 合物分子,而具有形成之結晶內不會混入未分解之烷基等 所導致之雜質的優點。 本發明之第1步驟所形成之第Π I族氮化物半導體係島 狀結晶塊。亦即,係由寬度爲1 nm至5 00nm、高度爲5nm 至1 00nm程度之島狀粒子塊密集而成之島狀結晶塊的集合 。使第I I I族氮化物成爲島狀結晶,因結晶層會產生很多 晶粒間界,而容易使金屬晶及液滴殘留於該部位,應可進 一步獲得金屬過剩層之機能的效果。又,構造上,島狀結 晶之分布不必太密,從結晶塊及結晶塊之間可看到基板表 面亦可。此時,因表面上混合存在著結晶成長速度不同之 區域,可利用選擇成長之效果來降低貫通移位之密度,故 可製作良好之結晶。 或者,使本發明第1步驟形成之第I I I族氮化物半導體 成爲柱狀結晶。亦即,由寬度爲O.lnm至100nm、高度爲l〇nm 至5 00nm程度之柱狀粒子集合而成之柱狀結晶。使第Hi 族氮化物成爲柱狀結晶,因結晶層會產生很多晶粒間界, 而容易使金屬結晶及液滴殘留於該部位,應可進一步獲得 金屬過剩層之機能的效果。 又’本發明之第2步驟中,係使用第I I I族原料及氮原 料,在第1步驟中形成第I I I族氮化物之基板上,實施第 I I I族氮化物半導體結.晶之汽相成長。若成長之第I I I族 -16- 1221638 氮化物半導體結晶爲GaN,爲了在第I I I族氮化物半導體 內可以容易進行2次元成長,GaN最好爲可以很容易即形 成平坦之結晶膜。一旦利用GaN製作具良好平坦性之結晶 膜,則在其上製作使用各種不同組成之第Π I族氮化物半 導體結晶層之半導體裝置就十分容易。 本發明之第1步驟、第2步驟、或雙方之步驟的汽相成 長法,可以使用有機金屬化學汽相成長法(MOCVD法)或氣 相磊晶法(VPE法)。其中,MOCVD法因可調節第I I I族原料 之分解速度及成長速度適中等理由而較佳。又,利用MOCVD 法時,可以不必從反應爐內取出平坦化基板之情形下,製 作具有良好結晶特性之各種元件構造。 第2步驟中以MOCVD法實施第I I I族氮化物半導體結晶 之成長時,基板溫度應爲 9 50°C至1 200 °C,環境壓力應爲 1 OOOPa 至 1 X 1 〇5Pa。 又,第2步驟中所使用之氮原料,因氨(NH3)爲氣體而較 容易處理,且因市場十分流通且價格便宜而較爲適當。第 I I I族原料可使用三甲基鋁、三乙基鋁、第三丁基鋁、三 甲基鎵、三乙基鎵、第三丁基鎵、三甲基銦、三乙基銦、 第三丁基銦、及茂基銦等。又,第2步驟中之第III族氮 化物半導體結晶成長時之V / I I I比應爲500〜20000。 本發明中,係利用具有上述第1、第2步驟之第I I I族 氮化物半導體結晶之製造方法,可以短時間、省電力之處 理過程在基板上形成高均一性、及良好結晶性之第I I I族 氮化物半導體結晶。因此,在上述第Π丨族氮化物半導體 -17- 1221638 結晶之上’進一步形成第111族氮化物半導體結晶層,即 可製作具有用以製作發光二極體、雷射二極體、或電子裝 置等所使用之疊層構造的第丨Z I族氮化物半導體磊晶晶圓 〇 [實施方式] 以下’係依據本發明實施例進行具體說明。 (實施例1 ) 說明本發明之氮化鎵系化合物半導體結晶的製造方法。 本實施例1中’係對藍寶石基板上實施使含有莫耳比爲1 : 2 之二甲基銘(TMA1)蒸氣及三甲基鎵(TMGa)蒸氣之混合氣體 、以及曰有氣(NH3)之氣體流過的第1步驟,並實施使TMGa 及氨流過並使氮化鎵成長而在藍寶石基板上製作由氮化鎵 結晶所構成之G a N層的第2步驟。第1步驟之條件的v /丨j j 比爲約8 5。 利用MOCVD法依下述步驟製作上述含GaN層之材料。 首先,在導入藍寶石基板前,在含氨及氫之氣體中加熱 ,針對同一裝置之前一次成長時附著於反應爐內部之附著 物實施氮化’使其更不容易分解。等反應爐降至室溫後, 將藍寶石基板導入設置於感應加熱式加熱器之RF線圈內的 石英製反應爐中。將藍寶石基板置於經過氮氣置換之圓形 箱中,並載置於加熱用之碳製感受器上。導入材料後,流 通氮氣,實施反應爐內之淸洗。 使氮氣流通約1 0分鐘後,啓動感應加熱式加熱器,以大 約1 0分鐘之時間將基板溫度加溫至1 1 7 0 °C。使基扳溫度保 - 1 8 - 1221638 持1 1 7 0 °C之情形下,在氫氣及氮氣流通之情形下放置9分 鐘,實施基板表面之熱洗淨。 熱洗淨期間,使氫載體氣體流通於連結至反應爐之裝有 原料三甲基鎵(TMG a )之容器(起泡器)及裝有原料三甲基鋁 (TMA 1 )之容器(起泡器)的配管內,開始產生氣泡。各起泡 器之溫度利用以調整溫度爲目的之恒溫槽調整成一定。利 用起泡產生之TMGa及TMA1蒸氣,至成長步驟開始爲止’ 會保持和載體氣體同時在除害裝置之配管內流通,並通過 除害裝置排出系統外。 結束熱洗淨後,切換氮載體氣體之閥門,對反應爐內提 供之氣體只剩下氫。 切換載體氣體後,將基板之溫度降至1150 °C。確認溫度 爲安定之1 1 5 0 °C後,切換氨配管之閥門,開始將氨流通至 爐內。其次,同時切換TMGa及TMA1之配管的閥門,對反 應爐內供應含有TMGa及TMA1之蒸氣的氣體,開始實施使 第I I I族氮化物半導體附著於藍寶石基板上之第1步驟。 供應之TMGa及TMA1的混合比,利用設置於氣泡用配管之 流量調節器將莫耳比率調節成2 : 1,並將氨之量調節成 V / I I I 比爲 8 5。 實施6分鐘之處理後,同時切換TMGa及TMA1之配管的 閥門,停止對反應爐內供應含有TMGa及TMA1之蒸氣的氣 體。接著,亦停止供應氨,並保持3分鐘。 3分鐘之退火後,切換氨氣配管之閥門,再度對爐內開 始供應氨氣。 -19 - 1221638 讓氨流通4分鐘。此期間,調節TMG a配管之流量調整器 的流量。4分鐘後,切換TMGa之閥門,開始對爐內供應TMG a ,而開始GaN之成長。 經過約1小時之上述GaN層的成長後,切換TMGa配管之 閥門,結束對反應爐之原料供應,停止成長。 結束GaN層之成長後,停止對感應加熱式加熱器之通電 ,以20分鐘之時間讓基板溫度降至室溫。降溫中,反應爐 內之環境和成長中相同,係由氨、氮、及氫所構成,然而 ,確認基板之溫度降至3 00 °C後,停止氨及氫之供應。其後 ,在氮氣流通之情形下使基板溫度降至室溫,將材料取出 置於大氣下。 利用以上之步驟,在藍寶石基板上形成具有柱狀構造之 金屬過剩之第I I I族氮化物半導體層,在其上以無摻雜方 式形成2//m膜厚之GaN層,製成材料。取出之基板會呈現 略帶金屬般之黑色,代表形成於和基板之界面上的第ill 族氮化物半導體層係金屬過剩之正規組成。成長面則爲鏡 面。 其次’對利用上述方法成長之無摻雜GaN層實施X射線 搖擺曲線(X R C )測量。測量上,係使用c u /3線X射線產生 源做爲光源,對對稱面(〇 〇 〇 2 )面及非對稱面(1 〇 - 1 2 )面實施 測量。一般而言,氮化鎵系化合物半導體時,(00 〇 2 )面之 XRC光譜半帶寬係結晶之平坦性(嵌鑲性)的指標,(1 〇 _丨2 ) 面Z X R C光g普半帶寬則係移位密度(扭轉)之指標。 測量結果’以本發明之方法製作之無摻雜G a N層,(0 0 0 2 ) -20- 1221638 面之半帶寬爲230秒,(10-12)面之半帶寬爲350秒。 又,以一般之原子力顯微鏡(AFM)觀察上述GaN層之最上 面。結果,表面上未發現成長坑,而觀察到具有良好表面 幾何形狀之表面。 以穿透式電子顯微鏡(TEM )觀察本材料之剖面’藍寶石基 板及氮化鎵層之界面上,觀察到具有大致垂直基板面之多 數晶粒間界的A 1 N膜。膜厚約爲6 0 n m程度’晶粒間界及晶 粒間界之距離爲5nm至50nm。此層應爲縱長型柱狀結晶之 集合體所構成之層。實施元素分析,此膜含有20%程度之Ga 〇 (實施例2) 實施例2之步驟大致和實施例1相同,只將第1步驟之 第I I I族氮化物半導體之成長改爲2分鐘而已,以此不同 條件進行實驗。此時取出之晶圓的表面亦爲鏡面。顏色則 爲無色透明。 以穿透式電子顯微鏡(TEM )觀察本材料之剖面,藍寶石基 板及氮化鎵層之界面,確認存在島狀之A 1 N結晶塊。元素 分析上,此結晶塊含有1 5%程度之Ga。 實施本實驗處理過程相同之成長至一半,在氮化鎵層成 長前停止處理過程並從成長爐中取出,製作材料,以原子 力顯微鏡(AFM )觀察此表面之表面幾何形狀,藍寶石表面上 ,從上方觀看時,分散著略帶弧形之六角形狀且剖面爲梯 形之形狀的氮化鋁結晶塊。 (實施例3) - 2 1 - 1221638 本實施例3則未實施前一實驗後、實施成長前之烘焙, 即將藍寶石基板導入反應爐,第1步驟係使含有三甲基鋁 (TMA1 )蒸氣之氣體流通,第2步驟則係使TMGa及氨流通並 實施氮化鎵之成長,在藍寶石基板上製作由氮化鎵結晶所 構成之G aN層。本實施例中雖然企圖使v / I I I比爲〇,然 而’因爲附著於反應爐之壁面及附著於天花板之附著物的 分解等,而對基板上供應少量N原子。 利用MOCVD法依據下述步驟製作上述含GaN層之材料。 首先,將藍寶石基板導入設於感應加熱式加熱器之RF線 圈中之石英製反應爐內。將藍寶石基板置於經過氮氣置換 之球形箱中並載置於加熱用之碳製感應器上。導入材料後 ,使氮氣流通以淨化反應爐內。 實施1 0分鐘之氮氣流通後,啓動感應加熱式加熱器,以 10分鐘時間將基板溫度昇高至600°C。使基板溫度保持爲 600t,使氫氣流通並放置9分鐘。 此期間,氫載體氣體流通於連結至反應爐之裝有原料三 甲基鎵 (TMGa)之容器(起泡器)及裝有原料三甲基鋁(TMAI ) 之容器(起泡器)的配管內,開始產生氣泡。各起泡器之溫 度利用以調整溫度爲目的之恒溫槽調整成一定。利用起泡 產生之TMGa及TMA1蒸氣,至成長步驟開始爲止,會保持 和載體氣體同時在除害裝置之配管內流通,並通過除害裝 置排至系統外。 其後,關閉氮載體氣體之閥門,開始對反應爐內供應氫 氣。 - 22- 1221638 切換載體氣體後,將基板溫度昇高至1 1 5 0 °C。確認溫度 爲安定之1 1 5 0 °C後,切換TMA 1配管之閥門,對反應爐內供 應含有TMA1蒸氣之氣體。此時,利用附著於反應爐之壁面 及天花板之附著物的分解,應可同時對基板供應TMA 1及少 量之N。 實施9分鐘之處理後,同時切換TMA 1配管之閥門,停止 對反應爐內供應含TMA 1蒸氣之氣體,保持此狀態3分鐘。 實施3分鐘之退火後,切換氨氣配管之閥門,開始對爐 內供應氨氣。 保持此狀態下,實施4分鐘之氨流通。此期間,調節TMGa 配管之流量調整器的流量。4分鐘後,切換TMG a之閥門開 始對爐內供應TMGa,使GaN開始成長。 實施大約1小時間之GaN層的成長後,切換TMGa配管之 閥門,結束對反應爐提供原料,停止成長。 結束G a N層之成長後,停止對感應加熱式加熱器之通電 ,以2 0分鐘讓基板溫度降至室溫。降溫時,反應爐內之環 境和成長中相同之由氨、氮、及氫所構成,確認基板溫度 降至3 0 0 °C後,停止供應氨及氫。其後,在氮氣流通之狀態 下δ襄基板溫度降至室溫’將材料取出置於大氣下。 利用以上之步驟,以第1步驟在藍寶石基板上形成具有 柱狀構造之金屬過剩之第I I I族氮化物半導體層,在其上 以無摻雜方式形成2 // m膜厚之GaN層’製成材料。取出之 基板和實施例1相同,會略帶金屬般之黑色,代表形成於 和基板之界囬上的第I I I族氣化物半導體係金屬過乘|j之正 -23 - 1221638 規組成。成長面則爲鏡面。 其次,對利用上述方法成長之無摻雜G a N層實施XRC測 量。測量上,係使用Cu々線X射線產生源做爲光源,對對 稱面(0002 )面及非對稱面(1 〇 _ 1 2 )面實施測量。測量結果, 以本發明之方法製作之無摻雜GaN層,( 0002)面之半帶寬 爲2 00秒,(10-12)面之半帶寬爲3 3 0秒。 又’以一般之原子力顯微鏡(AFM)觀察上述GaN層之最上 面。結果,表面上未發現成長坑,而觀察到具有良好表面 幾何形狀之表面。 以穿透式電子顯微鏡(TEM )觀察本材料之剖面,藍寶石基 板及氮化鎵層之界面上,觀察到具有大致垂直基板面之多 數晶粒間界的A 1 N膜。膜厚約爲20ηπι程度,晶粒間界及晶 粒間界之距離爲l〇nm至50nm。此層應爲縱長型柱狀結晶 之集合體所構成之層。實施元素分析,此膜含有5 %程度之 G a 〇 (實施例4) 本實施例4之第1步驟,係對藍寶石基板上實施含有莫 耳比爲2:1之三甲基鋁(TMA1)蒸氣及三甲基銦(ΤΜΙ η)蒸氣 之混合氣體、以及以氮做爲載體氣體之流通處理,第2步 驟則使TMG a及氨流過並使氮化鎵成長而在藍寶石基板上製 作由氮化鎵結晶所構成之G a N層。第1步驟中,載體氣體 之氮氣有少許會分解’應可提供少量之氮原子。 利甩MOCVD法依下述步驟製作上述含GaN層之材料。 首先,在導入藍寶石基板前,在含氨及氫之氣體中加熱 -24- 1221638 ,針對同一裝置之前一次成長時附著於反應爐內部之附著 物實施氮化,使其.不會分解。等反應爐降至室溫’接著, 將藍寶石基板導入設置於感應加熱式加熱器之RF線圈內的 石英製反應爐中。將藍寶石基板置於經過氮氣置換之圓形 箱中,並載置於加熱用之碳製感受器上。導入材料後,流 通氮氣,實施反應爐內之淸洗。 使氮氣流通約1 〇分鐘後’啓動感應加熱式加熱器,以大 約1 0分鐘之時間將基板溫度加溫至1 1 7 0 °C。使基板溫度保 持1170°C之情形下,在氫氣流通之情形下放置9分鐘,實 洗基板表面之熱洗淨。 熱洗淨期間,使氫載體氣體流通於連結至反應爐之裝有 原料三甲基鎵(TMGa)之容器(起泡器)、裝有原料三甲基鋁 (TMA1 )之容器(起泡器)、以及三甲基銦(TMIn)之容器(起泡 器)的配管內,開始產生氣泡。各起泡器之溫度利用以調整 溫度爲目的之恒溫槽調整成一定。利用起泡產生之TMGa、 TMA1、及TMIn蒸氣,至成長步驟開始爲止,會保持和載體 氣體同時在除害裝置之配管內流通,並通過除害裝置排出 系統外。 結束熱洗淨後’關閉氫載體氣體之閥門並打開氮氣之供 應閥門,改成對反應爐內供應氮氣。 切換載體氣體後,將基板之溫度降至丨丨5 〇。(:。確認溫度 爲安定之1 1 5 0 °C後,同時切換ΤΜ I η及TM A 1配管之閥門, 對反應爐內供應含有TMIn及TMA1蒸氣之氣體,開始實施 使第I I I族氮化物半導體附著於藍寶石基板上之第1步驟 -25- 1221638 。供應之TMln及TMA1的混合比,利用設置於氣泡用配管 之流量調節器將莫耳比率調節成1 : 2。 實施6分鐘之處理後,同時切換TMln及TMA1配管之閥 門,停止對反應爐內供應含有TMln及TMA1蒸氣之氣體, 保持此狀態3分鐘。 3分鐘之退火後,切換氨氣配管之閥門,開始對爐內供 應氨氣。 讓氨流通4分鐘。此期間,調節TMG a配管之流量調整器 的流量。4分鐘後,切換TMGa之閥門,開始對爐內供應TMG a ,而開始G a N之成長。 經過約1小時之上述GaN層之成長後,切換TMGa配管之 閥門,結束對反應爐之原料供應,停止成長。 結束GaN層之成長後,停止對感應加熱式加熱器之通電 ,以2 0分鐘之時間讓基板溫度降至室溫。降溫中,反應爐 內之環境和成長中相同,係由氨、氮、及氫所構成,然而 ,確認基板之溫度降至300°C後,停止氨及氫之供應。其後 ,在氮氣流通之情形下使基板溫度降至室溫,將材料取出 置於大氣下。 利用以上之步驟,在藍寶石基板上形成具有柱狀構造之 金屬過剩之第I I I族氮化物半導體層,在其上以無摻雜方 式形成2 // m慎厚之G aN層’製成材料。取出之基板爲無色 透明。成長面則爲鏡面。 其次,對利用上述方法成長之無摻雜GaN層實施XRC測 量。測量上,係使用Cu广線X射線產生源做爲光源,對對 -26 - 1221638 稱面( 0 002 )面及非對稱面(10-12)面實施測量。測量結果, 以本發明之方法製作之無摻雜GaN層,(00 02 )面之半帶寬 爲350秒,(10-12)面之半帶寬爲400秒。 又,以一般之原子力顯微鏡(AFM)觀察上述GaN層之最上 面。結果,表面上未發現成長坑,而觀察到具有良好表面 幾何形狀之表面。 以穿透式電子顯微鏡(TEM )觀察本材料之剖面,藍寶石基 板及氮化鎵層之界面上,觀察到具有大致垂直基板面之多 數晶粒間界的A 1 I nN膜。膜厚約爲1 〇nm程度,晶粒間界及 晶粒間界之距離爲5 nm至5 Onm。此層應爲縱長型柱狀結晶 之集合體所構成之層。 (實施例5) 本實施例5中,係針對使用本發明之第I I I族氮化物半 導體結晶之製造方法來製造氮化鎵系化合物半導體發光元 件之製造方法進行說明。 本實施例5中,係以和實施例3相同之條件製作平坦之 低S i摻雜GaN結晶,並在其上形成第I I I族氮化物半導體 結晶層,最後,製成如第1圖所示半導體發光元件用之具 有磊晶層構造的磊晶晶圓。亦即,磊晶晶圓之構造上,在 具有c面之藍寶石基板9上,以和實施例3相同之成長方 法形成具有柱狀構造之金屬過剩之A 1 N層8後,從基板側 依序疊層具有lx 1017cm·3電子濃度之2//m低Si摻雜GaN 層7、具有1 X丨019 c m ·3電子濃度之1 . 8 # m高S i摻雜G a N 層6、具有lx 1017cnT3電子濃度之100人的In。包 -27- 1221638 覆層5、GaN勢疊層至GaN勢疊層之層厚爲7〇A之6層GaN 勢暨層3、由層厚爲20A之5層非摻雜Ino^Ga^N井層4 所構成之多量子井構造20、30A之非摻雜AlQ2Ga〇.8N擴散 防止層2、以及具有8x 1017cm·3正孔濃度之的Mg 摻雜GaN層1。 又,第2圖係本實施例5製作之半導體發光元件之電極 構造的平面圖。 利用M0CVD法依下述步驟製作具有上述半導體發光元件 構造之嘉晶層的晶圓。 至在藍寶石基板上形成具有柱狀構造之A1N層8爲止, 使用和實施例3相同之步驟。 在藍寶石基板上形成具有柱狀構造之A 1 N層8後,持續 使氨流通,並調節TMGa配管之流量調整器的流量。又,開 始在配管內流通Si2H6。至低Si摻雜之GaN層開始成長爲 止之期間,使S i 2H6和載體氣體同時流通於除害裝置之配 管,並通過除害裝置排出系統外。其後,切換TMGa及Si 2H6 之閥門,開始對爐內供應TMGa及Si 2H6,開始低摻雜之GaN 的成長,實施大約1小時15分鐘之上述GaN層的成長。SiH4 之流通量需事先進行檢討,將低S i摻雜G a N層之電子濃度 調整爲 lx l〇17cnr3。 如此,可形成具有2 // m之膜厚的低S i摻雜G a N層7。 又,在此低S !摻雜G aN層7上,實施高S i摻雜之η型 GaN層6之成長。低Si摻雜之GaN層成長後,對爐內供應 之TMGa及Si 2H6停止供應1分鐘。此期間,改變Si 2H6之 1221638 流通量。流通量已事先進行檢討,將高Si摻雜GaN層之電 子濃度調整爲lx 1〇 19 cm·3。氨則保持原來流量持續供應至 爐內。 在停止1分鐘後,再度供應TMGa及Si2H6,實施1小時 之成長。利用此操作,可形成具有1 · 8 μ m膜厚之高S i摻 雜GaN層。 高Si摻雜GaN層6成長後,切換TMGa及Si 2H6之閥門 ’停止對爐內供應原料。在維持氨流通之情形下,切換閥 門’將載體氣體從氫更改成氮。其後,將基板之溫度從1 1 60 °C 降至 800°C。 在等待爐內溫度變動的期間,變更S i 2H6之供應量。流 通量已事先進行檢討,將Si摻雜InGaN包覆層之電子濃度 調整爲lx 1017 cm·3。以原有之流量持續對爐內供應氨。 預先讓載體氣體流通至三甲基銦(TM In)及三乙基鎵(TEG a) 之起泡器。Si 2H6氣體、以及利用起泡產生之ΤΜΙ η及TEG a 蒸氣,至開始包覆層之成長步驟爲止,會和載體氣體同時 流通於除害裝置之配管內,並通過除害裝置排出系統外。 其後,等待爐內之狀態呈現安定後,同時切換ΤΜΙ η、TEG a 、及S i 2H6之閥門,開始對爐內供應這些原料。持續供應 約10分鐘,形成100A膜厚之Si摻雜In。」G a。. 9N包覆層5 ο 其後,切換TMIn、TEGa、及Sl2H6之閥門,停止這些原 料之供應。 其次,利用由GaN構成之勢疊層3及由IllQ 2GaQ.sN構成 -29- 1221638 之井層4來製作多量子井構造20。多量子井構造之製作上 ,係在Si摻雜In^GauN包覆層5上先形成GaN勢疊層3 ,然後在此GaN勢疊層上形成Ino^GauN井層4。重複實 施此構造之5次疊層後,在第5之InuGa^N井層上,形 成第6之GaN勢疊層,使其具有多量子井構造20之兩側係 由GaN勢疊層3所構成之構造。 亦即,結束S i摻雜InQ. iGao.pN包覆層之成長後,停止30 秒,在維持基板溫度、爐內壓力、以及載體氣體之流量及 種類的狀態下,切換TEGa之閥門,對爐內供應TEGa。實 施7分鐘之TEGa供應後,再度切換閥門停止供應TEGa, 結束GaN勢疊層之成長。利用此方式,形成具有70A之膜 厚的GaN勢疊層3。1221638 发明 Description of the invention (the description of the invention should state: the technical field to which the invention belongs, the prior art, the content, the embodiments, and the drawings) [the technical field to which the invention belongs] The present invention relates to light emitting diodes (LEDs), Crystals of Group I〗 nitride semiconductors (hereinafter, Group III nitride semiconductors represented by InGaA1N) with good crystallinity used in the manufacture of laser diodes (LDs), electronic devices, and the like, and methods for manufacturing the same. In particular, the present invention relates to a method for producing a group III nitride semiconductor crystal suitable for epitaxial growth of a group III nitride semiconductor crystal having good crystallinity on a sapphire substrate. [Prior art] Since a group III nitride semiconductor has a band gap equivalent to a direct energy transfer type in the visible to ultraviolet region, it can perform high-efficiency light emission, and is therefore used in the production of LEDs and LDs. In addition, at the heterojunction interface of aluminum gallium nitride (AlGaN) and gallium nitride (G aN), a two-dimensional electron layer caused by the piezoelectric effect peculiar to the Group III nitride semiconductor will be found, which will make electronic devices traditional. The potential of the III-V compound semiconductor which cannot be obtained. However, the growth temperature of a group III nitride semiconductor at a single crystal will have a nitrogen dissociation pressure of 2000 atmospheres, so the growth of a single crystal is very difficult. I want to combine a single crystal substrate of a group III nitride semiconductor with other III-V compound semiconductors are similarly used as substrates for epitaxial growth, and in the current situation, there are substantial difficulties. Therefore, a substrate made of heterogeneous materials such as sapphire (A 1 2 0 3) and silicon carbide (S i C) single crystal is used as the substrate for epitaxial growth. Between these heterogeneous substrates and the Group I I I nitride semiconductor crystals on which epitaxial growth is performed, considerable lattice mismatches may exist. For example, 16% between sapphire (A 1 2 0 3) and gallium nitride (GaN), and 6% lattice mismatch between SiC and gallium nitride. In general, when there is such a large lattice mismatch, it is difficult to perform direct epitaxial growth of crystals on a substrate, and even if it can grow, crystals with good crystallinity cannot be obtained. Therefore, when the organometallic chemical vapor phase growth (MOCVD) method is used to perform epitaxial growth of a group III nitride semiconductor crystal on a sapphire single crystal substrate and a Si c single crystal substrate, such as Japanese Patent No. 3 026 08 7 and According to Japanese Patent Application Laid-Open No. 4-297023, the following method is generally used. First, a layer called a low-temperature buffer layer made of nitride nitride (A1N) or AlGaN is laminated on a substrate, and then a high temperature is applied thereon. The epitaxial growth of the Group III nitride semiconductor crystal is performed. In addition to the above-mentioned method for growing the low-temperature buffer layer, there are such methods as P. Kung, eta 1., Applied Physics Letters, M_ (1 9 9 5), 29 5 8. It is shown that an A1N layer grown in a high-temperature temperature range of about 900 ° C to 1 200 ° C is formed on a substrate, and then a method of growing gallium nitride is performed thereon. [Summary of the Invention] When sapphire is used as a substrate, the above-mentioned low-temperature buffer layer can be formed roughly as follows. First, the sapphire substrate is heated to a high temperature of 1 000 ° C to 1 200 ° C in a growth device of the MOCVD method, and the surface oxide film is removed. After that, the temperature of the growing device is lowered, and at a temperature of about 400 to 6 0 ° C, the organic metal is supplied to the substrate at a temperature of -7-1221638 at a V / III ratio of 3 Ο Ο 0 to 1 〇 0 Raw material and nitrogen source, laminated low temperature buffer layer. At this time, the V / III ratio refers to the number of moles of the molecules containing Group III elements flowing through the reaction furnace and the content of Group V elements when the growth of Group III-V compound semiconductor crystals is performed by the MOCVD method. The mole ratio of the numerator. For example, when the growth of gallium nitride is performed using TMGa and ammonia, the ratio of the molar number of TMG a flowing in the reactor to the molar number of ammonia. Thereafter, the supply of the organometallic raw materials was stopped, the temperature of the growth device was raised again, and a low-temperature buffer layer was subjected to a heat treatment called crystallization, and then the intended epitaxial growth of the Group I I I nitride semiconductor crystal was performed. At a stacking temperature of low temperature buffer layer of 400 ° C ~ 600 ° C, the thermal decomposition of organometallic materials and nitrogen sources used as raw materials, especially ammonia used as a nitrogen source, is insufficient. Therefore, if lamination is performed at such a low temperature, many defects are contained in the low-temperature buffer layer. In addition, since the raw materials are reacted at a low temperature, a polymerization reaction occurs between the organometallic alkyl group of the raw materials and the undecomposed nitrogen source, so the crystals of the low-temperature buffer layer also contain many impurities such as these reactants. In order to eliminate these defects and impurities, a low-temperature buffer layer is subjected to a heat treatment step called crystallization. The crystallization step of the buffer layer is to perform a heat treatment on the low-temperature buffer layer containing many impurities and defects at a temperature close to the epitaxial growth temperature of the Group II I nitride semiconductor crystal to remove these impurities and defects. As shown above, the growth method used for the low-temperature buffer layer must reduce the substrate temperature to about 120 ° C from the hot scrubbing temperature to around 50000 ° C, which is the temperature at which the buffer layer grows. In a short period of time, the temperature was raised from around 500 t-8-1221638 to a temperature range around 1000 ° c where annealing was performed. At this time, in general, it takes longer to change the temperature for cooling purposes, and it takes more energy to increase the temperature quickly. In addition, since the substrate must be subjected to various temperature changes as shown above, the substrate is warped. In addition, the substrate may be cracked or cracked due to reverse warping. In addition, the reverse warping of the substrate will also affect the crystal layer grown on it, especially when the LED structure is manufactured, the luminous wavelength and light intensity will not be uniform in the substrate surface. In addition, compared to the above-mentioned growth method using a low-temperature buffer layer, it has also been proposed to form A1N grown on a substrate in a high-temperature temperature range of about 900 ° C to 1200 ° C, and then implement gallium nitride thereon. Methods of growth (for example, P. Kung, et al., Applied Physics Letters, 6 6 (19 9 5), 2 9 5 8 ·, etc.). In the foregoing example, it is described that a very good crystal whose X-ray rocking curve of the (00 〇 2) plane is 30 a r c s e c can be produced by this method. However, according to the results of our experiments on this method, it was found that the gallium nitride crystal film produced by this method is a crystal with extremely high columnarity, and the crystal contains many grain boundaries. The density of this type of through-displacement of crystals from the substrate toward the surface is quite high. Therefore, good characteristics are not obtained even in the production of element structures such as light-emitting elements and electronic devices. A method of growing an A1N layer similarly made at a high temperature is also described in Japanese Patent Application Laid-Open No. 9-64477. In this document, it is desired that the Group I I I nitride semiconductor crystal produced is a single crystal with good crystallinity. However, after repeated experiments, we found that the growth method described in this article using a good single crystal A 1 N film is the same as the method described in the above literature. When making the element structure -9-1221638, crystals with good characteristics cannot be grown. Because a single crystal layer with good crystallinity is used as a buffer layer, and the growth of a group I I I nitride semiconductor is performed thereon, the atoms attached at the initial stage of growth cannot smoothly migrate, and it is difficult to obtain a two-dimensional growth. As shown above, because a Group III nitride semiconductor crystal with sufficient crystallinity cannot be obtained when manufacturing a device, a method for growing a Group III nitride semiconductor crystal using an A 丨 N buffer layer grown at a high temperature is currently used. It is not universal. The present invention provides a method for manufacturing a Group III nitride semiconductor crystal which can form a high-quality Group III nitride semiconductor crystal with a small number of temperature changes, and can be used instead of a method using a low-temperature buffer layer that must set many temperature regions, and A method using a high-temperature A 丨 N layer for the produced crystal with quality problems. In particular, a method for manufacturing a group III nitride semiconductor crystal capable of performing epitaxial growth of a group IIII nitride semiconductor crystal with high quality on a sapphire substrate is provided. In addition, the present invention can provide a high-quality Group III nitride semiconductor crystal manufactured by the aforementioned method for manufacturing a Group III nitride semiconductor crystal, and a Group 111 nitride semiconductor using the Group III nitride semiconductor crystal. Epicrystalline wafer. The present invention (1) comprises: supplying a Group 111 raw material having a V / III ratio of 100% or less (including when the V / I 11 ratio is 0) to a heated substrate to form a group π I nitride The first step of a semiconductor (hereinafter, a Group III nitride semiconductor is represented by I n G a A 1 N); and thereafter, using a Group III raw material and a nitrogen raw material, a Group III nitride semiconductor crystal is implemented on the substrate. -10- 1221638 second step of vapor phase growth; manufacturing method of group III nitride semiconductor crystal. (2) The method for producing a Group In nitride semiconductor crystal of sapphire (Al203) as described in (1) above using the aforementioned substrate. (3) The manufacturing method of the group π group raw material provided in the aforementioned first step containing at least a 丨 as described in (1) or (2) above group I I I nitride semiconductor crystal. (4) In the second step described above, the first nitride semiconductor crystal system of group I in which vapor phase growth is performed on the substrate is composed of GaN, and the third one of any one of (1) to (3) above. Manufacturing method of group nitride semiconductor crystal. (5) At least one of the first step or the second step will implement vapor phase growth as described in any one of the above (丨) to (4) by the organometallic chemical vapor phase growth method (MOCVD method). Manufacturing method of group nitride semiconductor crystal. (6) The nitrogen raw material in the second step described above is a method for producing a nitride semiconductor crystal of the first group using ammonia (NH3) as described in any one of the above (1) to (5). (7) The aforementioned first A method for manufacturing a group III nitride semiconductor crystal of the group π 丨 nitride semiconductor-based island-shaped crystal block formed in one step as described in any one of (1) to (6) above. (8) A manufacturing method of the group π] [group nitride semiconductor-based columnar crystal formed in the first step described above, as described in any one of the above (1) to (7), a group Ⅰ nitride semiconductor crystal. (9) The method of manufacturing a group I I I nitride semiconductor crystal as described in (8) above on the substrate side surface of the columnar crystal is substantially perpendicular to the substrate surface. In addition, the present invention is 11-1212638 (10) to produce a Group III nitride semiconductor on a heated substrate, and to produce a Group III nitride on the second Group III nitride semiconductor crystal thereon. The method for manufacturing a semiconductor junction product is characterized in that the first group III nitride semiconductor is an aggregate of columnar crystals or island crystals. (1 1) The side surface of the columnar crystal is a manufacturing method of the group I I I nitride semiconductor crystal as described in (1 0) above, which is attached to the substrate approximately perpendicular to the substrate surface. The present invention is (1 2) a group I I I nitride semiconductor crystal produced by the methods (1) to (1 1) described above. In addition, the present invention (1 3) is a Group III nitride semiconductor Jiajing wafer in which the group III nitride semiconductor crystal layer is further formed on the Group I I I nitride semiconductor crystal as described in (12) above. [Embodiment] The method for producing a group III nitride semiconductor crystal of the present invention includes: providing a heated substrate with a V / III ratio of 1 ο ο or less (including when the V / III ratio is 0) The first step of forming a group III nitride semiconductor is the first step of forming a group III nitride semiconductor; and the second step of vapor phase growth of the group III nitride semiconductor crystal is performed on the substrate by using the group III raw material and the nitrogen raw material. By using the manufacturing method of the Group I I I nitride semiconductor crystal having the above-mentioned first and second steps, a Group Ill nitride semiconductor crystal with good crystallinity can be formed on the substrate. In addition, the group 111 nitride semiconductor system in the present invention is represented by InGaAIN. -12- 1221638 Group III nitride semiconductor crystals produced under the condition that the V / I II ratio is lower than 1 000, and the V / I II ratio, the stoichiometric ratio of the Group V element and the Group III element in the crystal (Stoichiometry) It will not be 1 ·· 1, and the Group π element should be excessive to form a metal excess. In such a group 111 nitride semiconductor crystal layer, an excessive group 111 element appears in the form of metal crystals or droplets. Therefore, when the growth of a Group I nitride semiconductor crystal is performed thereon, migration at the initial stage of growth is performed with good efficiency, and horizontal two-dimensional growth can be realized. However, its detailed structure is unknown. In order to obtain good growth of the Group I nitride semiconductor, it is best to use an A1N film made with a smaller V / I I I ratio, which is also discussed in Japanese Patent Application Laid-Open No. 9-64477. However, in this document, the Group I I I nitride semiconductor crystal is desired to be a single crystal with good crystallinity. After repeated experiments and analysis, it was found that the aggregate of columnar crystals or island crystals was used as a buffer layer, and its function was better than that of a single crystal film. Because metal crystals and droplets enter the grain boundaries existing in a layer composed of columnar crystals or island crystals, it is easier to produce excessive metal crystals. However, details are unknown. Because the temperature rise and fall of this method is smaller than the traditional method using a low temperature buffer layer, the processing process will be shorter and the power consumption will be less. This method can shorten the manufacturing process and reduce costs. In addition, since the temperature change is small, the warpage of the substrate can be suppressed to a minimum, and the uniformity of the device characteristics can be made good. Furthermore, compared with the growth method of the A 1 N layer which has been disclosed so far using high temperature growth, a crystal having good device characteristics can be produced. As the substrate of the present invention, glass, SiC, Si, GaAs, and sapphire can be used. The aforementioned substrate in the present invention is preferably sapphire (ai2o3). The use of sapphire as the substrate has the advantage of obtaining a local-quality substrate at a low price. For the orientation of the sapphire substrate, m-plane, 3-plane, or C-plane can be used. However, among them, the c-plane ((0001) plane) is preferred, and the vertical axis of the substrate surface should be from < 000 1 > The direction is inclined in a specific direction. In addition, if the substrate used in the present invention is processed before the first step such as organic cleaning and etching, the state of the surface of the substrate can be maintained in a certain state, which is more preferable. In the present invention, as the Group III raw material provided in the first step, trimethylaluminum, triethylaluminum, third butylaluminum, trimethylgallium, triethylgallium, third butylgallium, trimethyl Indium, triethylindium, third butylindium, and metallocene indium. In addition, if the group III raw materials such as trimethylaluminum, triethylaluminum, and third butylaluminum contain A1, the decomposition temperature of aluminum-containing nitrides is high, so decomposition and sublimation are unlikely to occur at high temperatures. , And has the effect that the crystal is easy to grow on the substrate, so it is particularly good. In the first step of the present invention, a Group V raw material such as gas, amines, and hydrazines is supplied together with the Group I I I raw materials to form a Group I I I nitride semiconductor. In the present invention, the V / III ratio when the Group 111 raw material is supplied in the first step is 1,000 or less. It is more preferably 500 or less, and most preferably 100 or less. Setting the V / I I I ratio in this way has the effect of more easily crystallizing compound semiconductors with excessive metal. In the present invention, the V / 111 ratio may also be 0, that is, the supply amount of the Group V raw material is 0. However, at this time, even if the supplied Group V raw material is intentionally set to zero, nitrogen 'generated from the decomposition of adherents on the wall surface, ceiling, and susceptor of the reaction furnace will form a Group I I I nitride semiconductor. At this time, it is necessary to properly control the composition and amount of attachments attached to the wall surface, ceiling, and susceptor of the reaction furnace. Specifically, it is to adjust the baking time and temperature of the reactor after the growth is completed, or to stop itself. In addition, the general technique of growth using a low-temperature buffer method is a process called hot washing, which adjusts time and temperature and stops itself. To illustrate with an example, the baking is not performed after the previous growth, but the thermal washing at 10 ° C for 10 minutes is performed, and the compound containing only metal is flowed at 1 ° C at the first step. After passing through the substrate, crystal growth is performed in the second step, and a good Group III nitride semiconductor crystal can be produced. In addition, one of the conditions for obtaining a good Group 111 nitride semiconductor crystal with a V / III ratio of 0 in the first step is to use N2 as a carrier gas, which will be converted from N2 at a temperature of about 1000 ° C. Nitrogen (N) atoms produced by a small amount of decomposition are used as a nitrogen source. In the first step of the present invention, as the ambient gas, a single gas such as hydrogen, a rare gas, and nitrogen, or a mixed gas can be used. As mentioned above, when nitrogen is used as the ambient gas, nitrogen sometimes has the function of a source gas. In addition, the environmental pressure when performing the first step may be 1 000 to 1 x 105 Pa. It is preferably lx 105Pa or less, and most preferably lx 104Pa or less. If the pressure in the first step is low, the surface of the group III nitride semiconductor layer with excess metal will be flat, and there will be a group III nitride semi-conductor grown on it. The surface of the conductor layer will More flattening effect. In the present invention, there is no particular requirement on the substrate temperature during the first step and the substrate temperature during the second step. However, the substrate temperature during the steps 1-15-1221638 should be equal to or higher than The substrate temperature at the second step. If the first step is performed at a temperature equal to or higher than the substrate temperature when the second step is performed, the organic metal compound molecules of the group Π I source gas can be effectively decomposed, and the undecomposed alkane will not be mixed into the formed crystal. Advantages of impurities caused by radicals. The group III nitride semiconductor semiconductor island-shaped crystal block formed in the first step of the present invention. That is, it is a collection of island-shaped crystal blocks formed by dense clusters of island-shaped particle blocks having a width of 1 nm to 500 nm and a height of about 5 nm to 100 nm. In order to make the group I I I nitride into island-like crystals, many crystal grain boundaries will be generated in the crystal layer, and metal crystals and liquid droplets will easily remain in this part. The effect of the function of the metal excess layer should be further obtained. In addition, structurally, the distribution of island crystals need not be too dense, and the surface of the substrate may be seen from the crystal block and the crystal block. At this time, since regions having different crystal growth rates are mixed on the surface, the effect of selective growth can be used to reduce the density of through displacement, so good crystals can be produced. Alternatively, the group I I I nitride semiconductor formed in the first step of the present invention is made into a columnar crystal. That is, a columnar crystal is formed by assembling columnar particles having a width of 0.1 nm to 100 nm and a height of approximately 10 nm to 500 nm. When the group Hi nitride is made into columnar crystals, many crystal grain boundaries are generated in the crystal layer, and metal crystals and liquid droplets are liable to remain in this part. The effect of the function of the metal excess layer should be further obtained. In the second step of the present invention, a group I I I nitride and a nitrogen raw material are used. In the first step, a group I I I nitride is formed on a substrate, and a group I I nitride semiconductor semiconductor crystal is grown. If the grown Group I I I -16-1221638 nitride semiconductor is crystallized into GaN, in order to facilitate two-dimensional growth in the Group I I I nitride semiconductor, it is preferable that GaN is formed so as to form a flat crystalline film easily. Once a crystalline film having good flatness is formed using GaN, it is very easy to fabricate a semiconductor device using a group III nitride semiconductor crystal layer with various compositions thereon. In the vapor phase growth method of the first step, the second step, or both steps of the present invention, an organometallic chemical vapor phase growth method (MOCVD method) or a gas phase epitaxy method (VPE method) can be used. Among them, the MOCVD method is preferable because it can adjust the decomposition speed and growth speed of Group I I I raw materials to be moderate. In addition, when the MOCVD method is used, various element structures having good crystal characteristics can be produced without removing the planarized substrate from the reaction furnace. In the second step, when the growth of a group I I nitride semiconductor crystal is performed by the MOCVD method, the substrate temperature should be 9 50 ° C to 1 200 ° C, and the ambient pressure should be 1 OOOPa to 1 X 105 Pa. In addition, the nitrogen raw material used in the second step is easier to handle because ammonia (NH3) is a gas, and it is suitable because the market is very popular and inexpensive. For Group III raw materials, trimethylaluminum, triethylaluminum, third butylaluminum, trimethylgallium, triethylgallium, third butylgallium, trimethylindium, triethylindium, third Butyl indium, and indenocene. The V / I I I ratio during the growth of the Group III nitride semiconductor crystal in the second step should be 500 to 20,000. In the present invention, a method for manufacturing a Group III nitride semiconductor crystal having the above-mentioned first and second steps is used, which can form a high-uniformity and good crystallinity III on a substrate in a short time and power-saving processing process. Group nitride semiconductor crystals. Therefore, by further forming a group 111 nitride semiconductor crystal layer on top of the above-mentioned group III nitride semiconductor-17-1212638 crystal, it is possible to fabricate a layer having a light emitting diode, a laser diode, or an electron. A group ZI nitride semiconductor epitaxial wafer with a stacked structure used in a device or the like. [Embodiment] The following description will be specifically described in accordance with an embodiment of the present invention. (Example 1) A method for manufacturing a gallium nitride-based compound semiconductor crystal according to the present invention will be described. In the first embodiment, a mixed gas containing dimethyl methacrylate (TMA1) vapor and trimethylgallium (TMGa) vapor with a molar ratio of 1: 2 is implemented on a sapphire substrate, and NH3 is used. In the first step of flowing gas, a second step of forming a GaN layer made of gallium nitride crystal on a sapphire substrate is performed by flowing TMGa and ammonia and growing gallium nitride. The v / | j j ratio of the condition of the first step is about 8 5. The MOCVD method is used to fabricate the GaN-containing layer. First, before the sapphire substrate is introduced, it is heated in a gas containing ammonia and hydrogen. Nitriding is performed on the deposits that were attached to the inside of the reactor during the previous growth of the same device to make it more difficult to decompose. After the reaction furnace was cooled to room temperature, the sapphire substrate was introduced into a quartz reaction furnace installed in an RF coil of an induction heating heater. The sapphire substrate was placed in a circular box replaced with nitrogen and placed on a carbon susceptor for heating. After the material was introduced, nitrogen was flowed through, and rinsing was performed in the reaction furnace. After allowing nitrogen to flow for about 10 minutes, the induction heating heater was started, and the substrate temperature was heated to 1 170 ° C for about 10 minutes. Keep the substrate temperature-1 8-1221638 at 1 170 ° C, and place the substrate for 9 minutes with hydrogen and nitrogen flowing, and perform thermal cleaning of the substrate surface. During the thermal cleaning, a hydrogen carrier gas was circulated in the container (bubble) containing the raw material trimethylgallium (TMG a) and the container (containing the raw material trimethylaluminum (TMA 1)) connected to the reaction furnace (from Bubbles in the piping). The temperature of each bubbler was adjusted to a constant value using a constant temperature bath for temperature adjustment. By using the TMGa and TMA1 vapor generated by the foaming, until the start of the growth step ', the carrier gas is kept flowing in the pipe of the detoxification device at the same time, and is discharged out of the system through the detoxification device. After the thermal washing is completed, the valve of the nitrogen carrier gas is switched, and only hydrogen left in the gas supplied in the reaction furnace. After switching the carrier gas, the temperature of the substrate was reduced to 1150 ° C. After confirming that the temperature is stable at 150 ° C, switch the valve of the ammonia piping to start circulating ammonia into the furnace. Next, the valves of the piping of TMGa and TMA1 are switched at the same time, and the gas containing TMGa and TMA1 vapor is supplied to the reaction furnace, and the first step of attaching the group I I I nitride semiconductor to the sapphire substrate is started. The mixing ratio of the supplied TMGa and TMA1 was adjusted to a 2: 1 ratio using a flow regulator installed in a bubble pipe, and the amount of ammonia was adjusted to a V / I I I ratio of 8 5. After carrying out the treatment for 6 minutes, the valves of the pipes of TMGa and TMA1 were switched at the same time, and the supply of gas containing the vapors of TMGa and TMA1 to the reaction furnace was stopped. Subsequently, the ammonia supply was also stopped and kept for 3 minutes. After annealing for 3 minutes, the valve of the ammonia gas piping was switched, and ammonia gas was supplied to the furnace again. -19-1221638 Allow ammonia to circulate for 4 minutes. During this period, adjust the flow rate of the flow regulator of the TMG a pipe. After 4 minutes, the valve of TMGa was switched to start supplying TMG a to the furnace and start the growth of GaN. After the growth of the GaN layer described above for about one hour, the valve of the TMGa piping was switched, the supply of raw materials to the reactor was stopped, and the growth was stopped. After the growth of the GaN layer is finished, the power to the induction heating heater is stopped, and the substrate temperature is reduced to room temperature in 20 minutes. During the cooling, the environment in the reactor is the same as that in the growth, and it is composed of ammonia, nitrogen, and hydrogen. However, after confirming that the temperature of the substrate has dropped to 300 ° C, stop supplying ammonia and hydrogen. After that, the temperature of the substrate was lowered to room temperature with nitrogen flowing, and the material was taken out and placed in the atmosphere. By the above steps, a Group I I I nitride semiconductor layer having a columnar structure with excess metal is formed on a sapphire substrate, and a 2 // m film thickness GaN layer is formed thereon in an undoped manner to make a material. The removed substrate will show a slightly metallic black, representing the normal composition of excess metal in the Group ill nitride semiconductor layer system formed on the interface with the substrate. The growth surface is a mirror surface. Secondly, the X-ray rocking curve (X R C) measurement is performed on the undoped GaN layer grown by the above method. In the measurement, a c u / 3-line X-ray generation source is used as the light source, and the measurement is performed on the symmetry plane (00 〇 2) plane and the asymmetric plane (100-12) plane. In general, in the case of a gallium nitride-based compound semiconductor, the half-bandwidth of the XRC spectrum of the (00 〇2) plane is an index of the flatness (embedding) of the crystal, and the half-bandwidth of the (1 〇_ 丨 2) plane ZXRC light g It is an indicator of displacement density (twisting). Measurement result 'The undoped GaN layer produced by the method of the present invention has a half bandwidth of the (0 0 0 2) -20-1212638 plane of 230 seconds and a half bandwidth of the (10-12) plane of 350 seconds. The uppermost surface of the GaN layer was observed with a general atomic force microscope (AFM). As a result, no growth pits were found on the surface, and a surface with a good surface geometry was observed. A transmission electron microscope (TEM) was used to observe the cross section of this material's interface between the sapphire substrate and the gallium nitride layer, and an A 1 N film having a plurality of grain boundaries approximately perpendicular to the substrate surface was observed. The film thickness is about 60 nm. The grain boundaries and the distance between the grain boundaries are 5 nm to 50 nm. This layer should be a layer composed of aggregates of vertically long columnar crystals. Elemental analysis was performed. This film contains Ga at about 20%. (Example 2) The steps of Example 2 are roughly the same as those of Example 1. Only the growth of the Group III nitride semiconductor in the first step is changed to 2 minutes. Experiments were performed under these different conditions. The surface of the wafer taken out at this time is also a mirror surface. The color is colorless and transparent. A transmission electron microscope (TEM) was used to observe the cross section of the material, the interface between the sapphire substrate and the gallium nitride layer, and confirm the existence of island-shaped A 1 N crystal blocks. Elementally, this crystal block contains about 15% Ga. The same process was performed to grow to half, the process was stopped before the growth of the gallium nitride layer and taken out from the growth furnace to make materials, and the surface geometry of this surface was observed by atomic force microscope (AFM). When viewed from above, there are slightly curved hexagonal aluminum nitride crystal blocks with trapezoidal cross-sections. (Example 3)-2 1-1221638 In this example 3, the baking after the previous experiment and before the growth is not performed, that is, the sapphire substrate is introduced into the reaction furnace. The first step is to use the trimethyl aluminum (TMA1) vapor containing Gas flow, the second step is to circulate TMGa and ammonia and perform gallium nitride growth, and a G aN layer composed of gallium nitride crystals is fabricated on a sapphire substrate. In this embodiment, although the v / I I I ratio is attempted to be 0, a small amount of N atoms are supplied to the substrate due to the decomposition of the attachments attached to the wall surface of the reaction furnace and the ceiling. The MOCVD method is used to fabricate the GaN-containing layer according to the following steps. First, a sapphire substrate was introduced into a quartz furnace in an RF coil of an induction heating heater. The sapphire substrate was placed in a spherical box replaced with nitrogen and placed on a carbon sensor for heating. After the material is introduced, nitrogen is circulated to purify the inside of the reaction furnace. After 10 minutes of nitrogen flow, the induction heating heater was started to raise the substrate temperature to 600 ° C in 10 minutes. The substrate temperature was maintained at 600 t, and hydrogen gas was allowed to flow and left for 9 minutes. During this period, the hydrogen carrier gas circulated through the pipes of the container (bubble) containing the raw material trimethylgallium (TMGa) and the container (bubble) containing the raw material trimethylaluminum (TMAI) connected to the reaction furnace. Within, bubbles started to form. The temperature of each bubbler was adjusted to a constant value using a constant temperature bath for temperature adjustment. By using the TMGa and TMA1 vapors generated by the foaming, until the start of the growth step, the carrier gas and the carrier gas are kept circulating in the piping of the detoxification device and discharged to the system through the detoxification device. Thereafter, the valve of the nitrogen carrier gas was closed, and the supply of hydrogen gas to the reaction furnace was started. -22- 1221638 After changing the carrier gas, raise the substrate temperature to 1 150 ° C. After confirming that the temperature is 1150 ° C, switch the valve of TMA 1 piping to supply gas containing TMA1 vapor to the reactor. At this time, it should be possible to supply TMA 1 and a small amount of N to the substrate at the same time by the decomposition of the attachments attached to the wall surface of the reaction furnace and the ceiling. After carrying out the treatment for 9 minutes, the valve of the TMA 1 piping was switched at the same time, and the supply of gas containing TMA 1 vapor to the reaction furnace was stopped, and this state was maintained for 3 minutes. After annealing for 3 minutes, the valve of the ammonia gas piping was switched to start supplying ammonia gas to the furnace. In this state, ammonia flow was performed for 4 minutes. During this period, adjust the flow rate of the flow regulator of the TMGa piping. After 4 minutes, the valve of TMG a was switched and TMGa was supplied to the furnace, so that GaN began to grow. After the growth of the GaN layer is performed for about one hour, the valve of the TMGa piping is switched, the supply of raw materials to the reactor is stopped, and the growth is stopped. After the growth of the G a N layer is completed, the energization of the induction heating heater is stopped, and the substrate temperature is reduced to room temperature in 20 minutes. When the temperature is lowered, the environment in the reactor is the same as that in the growing environment, and it is composed of ammonia, nitrogen, and hydrogen. After confirming that the substrate temperature has dropped to 300 ° C, stop supplying ammonia and hydrogen. Thereafter, the temperature of the δ-substrate is lowered to room temperature 'under a state of nitrogen flow, and the material is taken out and placed in the atmosphere. Using the above steps, in the first step, a Group III nitride semiconductor layer having a columnar structure with excess metal is formed on a sapphire substrate, and a GaN layer with a thickness of 2 // m is formed thereon in an undoped manner.成 材料。 into materials. The removed substrate is the same as in Example 1, and it will be slightly metallic black, representing the group I I I gas semiconductor semiconductor metal formed on the boundary between the substrate and the substrate. The growing surface is a mirror surface. Secondly, XRC measurement was performed on the undoped GaN layer grown by the above method. In the measurement, a Cu 々 X-ray generation source is used as the light source, and the measurement is performed on a symmetrical plane (0002) plane and an asymmetric plane (10 _ 12) plane. As a result of the measurement, the half bandwidth of the (0002) plane of the undoped GaN layer produced by the method of the present invention is 200 seconds, and the half bandwidth of the (10-12) plane is 330 seconds. The uppermost surface of the GaN layer was observed with a general atomic force microscope (AFM). As a result, no growth pits were found on the surface, and a surface with a good surface geometry was observed. A transmission electron microscope (TEM) was used to observe the cross section of this material. On the interface between the sapphire substrate and the gallium nitride layer, an A 1 N film with a plurality of grain boundaries approximately perpendicular to the substrate surface was observed. The film thickness is about 20 ηm, and the distance between grain boundaries and grain boundaries is 10 nm to 50 nm. This layer should be a layer composed of aggregates of longitudinal columnar crystals. Elemental analysis was performed, and this film contained about 5% of G a 〇 (Example 4) The first step of this Example 4 was to implement trimethylaluminum (TMA1) with a molar ratio of 2: 1 on the sapphire substrate. A mixed gas of vapor and trimethylindium (TMI η) vapor, and a flow process of nitrogen as a carrier gas, the second step is to make TMG a and ammonia flow through and grow gallium nitride on the sapphire substrate. G a N layer composed of gallium nitride crystal. In the first step, the nitrogen of the carrier gas will be slightly decomposed ', which should provide a small amount of nitrogen atoms. The MOCVD method is used to fabricate the GaN-containing layer according to the following steps. First, before introducing the sapphire substrate, heat in -24-1221638 in a gas containing ammonia and hydrogen. Nitriding is performed on the attachments that were attached to the inside of the reactor during the previous growth of the same device, so that they will not decompose. Wait for the reaction furnace to cool down to room temperature ', and then introduce the sapphire substrate into a quartz reaction furnace provided in the RF coil of the induction heating heater. The sapphire substrate was placed in a circular box replaced with nitrogen and placed on a carbon susceptor for heating. After the material was introduced, nitrogen was flowed through, and rinsing was performed in the reaction furnace. After the nitrogen gas was allowed to flow for about 10 minutes, the induction heating heater was started, and the substrate temperature was heated to 110 ° C for about 10 minutes. When the substrate temperature was maintained at 1170 ° C, it was left to stand for 9 minutes under a hydrogen gas flow, and the substrate surface was cleaned by thermal cleaning. During the thermal cleaning, a hydrogen carrier gas was circulated in a container (bubble) containing raw material trimethylgallium (TMGa) connected to the reaction furnace, and a container (bubble generator) containing raw material trimethylaluminum (TMA1). ), And the piping of the container (bubble generator) of trimethylindium (TMIn), bubbles started to form. The temperature of each bubbler was adjusted to a constant value using a constant temperature bath for temperature adjustment. Using the TMGa, TMA1, and TMIn vapors generated by the foaming, until the start of the growth step, the carrier gas is kept flowing in the pipe of the detoxification device at the same time, and is discharged out of the system through the detoxification device. After the thermal cleaning is completed, the valve of the hydrogen carrier gas is closed and the supply valve of the nitrogen gas is opened, and the nitrogen gas is supplied to the reaction furnace. After the carrier gas is switched, the temperature of the substrate is reduced to 5o. (:. After confirming that the temperature is 1150 ° C, switch the valves of TM I η and TM A 1 at the same time, supply the gas containing TMIn and TMA1 vapor to the reactor, and start the implementation of Group III nitrides. Step 1 of attaching a semiconductor to a sapphire substrate-25-1221638. The mixing ratio of the supplied TMln and TMA1 is adjusted to 1: 2 by a flow regulator installed in a bubble pipe. After 6 minutes of treatment At the same time, switch the valves of TMln and TMA1 piping, stop supplying gas containing TMln and TMA1 vapor to the reactor, and maintain this state for 3 minutes. After annealing for 3 minutes, switch the valve of ammonia piping to start supplying ammonia to the furnace Allow ammonia to flow for 4 minutes. During this period, adjust the flow rate of the flow regulator of the TMG a piping. After 4 minutes, switch the valve of TMGa to start supplying TMG a to the furnace and start the growth of G a N. After about 1 hour After the growth of the above GaN layer, the valve of the TMGa piping is switched, the supply of raw materials to the reaction furnace is stopped, and the growth is stopped. After the growth of the GaN layer is stopped, the power to the induction heating heater is stopped. The time allowed the substrate temperature to drop to room temperature. During the cooling, the environment in the reactor is the same as that in the growth, and it is composed of ammonia, nitrogen, and hydrogen. However, after confirming that the substrate temperature has dropped to 300 ° C, stop ammonia and Supply of hydrogen. Thereafter, the temperature of the substrate was lowered to room temperature under the condition of nitrogen flow, and the material was taken out and placed in the atmosphere. Using the above steps, a Group III metal excess having a columnar structure was formed on the sapphire substrate. A nitride semiconductor layer is formed on it with a non-doped 2 // m layer of G aN, which is made of material. The substrate taken out is colorless and transparent. The growth surface is a mirror surface. Second, the growth using the above method The XRC measurement is performed on the undoped GaN layer. In the measurement, a Cu wide-line X-ray generation source is used as the light source, and the measurement is performed on the -26-1221638 scale (0 002) plane and the asymmetric plane (10-12) plane. As a result of the measurement, the half-bandwidth of the (00 02) plane is 350 seconds and the half-bandwidth of the (10-12) plane is 400 seconds. The general atomic force microscope ( (AFM) Observe the top of the GaN layer. As a result, no growth pits were found on the surface, but a surface with a good surface geometry was observed. The cross section of this material was observed with a transmission electron microscope (TEM), and at the interface between the sapphire substrate and the gallium nitride layer, it was observed that A 1 I nN film with most grain boundaries on the vertical substrate surface. The film thickness is about 10 nm, and the grain boundary and the distance between grain boundaries are 5 nm to 5 Onm. This layer should be a longitudinal type Layer composed of an aggregate of columnar crystals. (Embodiment 5) This embodiment 5 is directed to the production of a gallium nitride-based compound semiconductor light-emitting device using the method for producing a Group III nitride semiconductor crystal of the present invention. The method is explained. In this fifth embodiment, a flat low Si-doped GaN crystal was fabricated under the same conditions as in the third embodiment, and a group III nitride semiconductor crystal layer was formed thereon. Finally, it was fabricated as shown in FIG. 1 An epitaxial wafer having an epitaxial layer structure is used for a semiconductor light emitting element. That is, in the structure of the epitaxial wafer, on the sapphire substrate 9 having the c-plane, the A 1 N layer 8 having a columnar structure with excess metal is formed by the same growth method as in Example 3, and then the substrate is moved from the substrate side. The sequential stack has a 2 // m low Si-doped GaN layer with an electron concentration of lx 1017 cm · 3, a 1. 8 # m high Si-doped G a N layer with an electron concentration of 1 X 019 cm · 3, 6, 100 human In with lx 1017cnT3 electron concentration. Package-27-1212638 Cladding layer 5, GaN potential stack to GaN potential stack, 6 layers of GaN potential and layer 3 of 70A, and 5 layers of 20A undoped Ino ^ Ga ^ N Multi-quantum well structure 20 and 30A composed of well layer 4 are non-doped AlQ2Ga0.8N diffusion prevention layer 2, and Mg-doped GaN layer 1 having a positive hole concentration of 8x 1017 cm · 3. Fig. 2 is a plan view of the electrode structure of the semiconductor light-emitting element produced in the fifth embodiment. A MOCVD method is used to produce a wafer having a Jiajing layer of the semiconductor light emitting device structure according to the following steps. Until the A1N layer 8 having a columnar structure is formed on the sapphire substrate, the same procedure as in Example 3 is used. After the A 1 N layer 8 having a columnar structure was formed on the sapphire substrate, ammonia was continuously circulated and the flow rate of the flow rate regulator of the TMGa pipe was adjusted. In addition, Si2H6 began to flow through the piping. During the period from when the low Si-doped GaN layer begins to grow, Si 2H6 and the carrier gas are simultaneously circulated in the pipe of the detoxification device and discharged out of the system through the detoxification device. After that, the valves of TMGa and Si 2H6 were switched, and TMGa and Si 2H6 were supplied to the furnace to start the growth of the low-doped GaN. The growth of the GaN layer was performed for about 1 hour and 15 minutes. The SiH4 flux needs to be reviewed in advance, and the electron concentration of the low Si-doped G a N layer is adjusted to lx 1017cnr3. In this way, a low Si-doped G a N layer 7 having a film thickness of 2 // m can be formed. Furthermore, on this low S! Doped G aN layer 7, growth of a high Si-doped n-type GaN layer 6 is performed. After the growth of the low Si-doped GaN layer, the supply of TMGa and Si 2H6 in the furnace was stopped for 1 minute. During this period, the 1221638 flux of Si 2H6 was changed. The throughput has been reviewed in advance, and the electron concentration of the high Si-doped GaN layer was adjusted to lx 1019 cm · 3. Ammonia is continuously supplied into the furnace at the original flow rate. After stopping for 1 minute, TMGa and Si2H6 were supplied again, and growth was performed for 1 hour. With this operation, a high Si-doped GaN layer having a film thickness of 1.8 μm can be formed. After the high Si-doped GaN layer 6 grows, the valves of TMGa and Si 2H6 are switched 'and the supply of raw materials to the furnace is stopped. With the ammonia flow maintained, the switching valve 'changes the carrier gas from hydrogen to nitrogen. Thereafter, the temperature of the substrate was reduced from 1 1 60 ° C to 800 ° C. While waiting for the temperature change in the furnace, change the supply of Si 2H6. The flux has been reviewed in advance, and the electron concentration of the Si-doped InGaN cladding layer was adjusted to lx 1017 cm · 3. Continuous supply of ammonia into the furnace at the original flow rate. Carrier gas was passed to the bubblers of trimethylindium (TM In) and triethylgallium (TEG a) in advance. The Si 2H6 gas and the TMI η and TEG a vapors generated by the foaming will be circulated in the piping of the detoxification device and the carrier gas at the same time until the growth step of the coating layer is started, and will be discharged from the system through the detoxification device. After that, after waiting for the state of the furnace to stabilize, the valves of TIM η, TEG a, and Si 2H6 were switched at the same time to start supplying these materials to the furnace. The supply was continued for about 10 minutes to form a 100-A-thick Si-doped In. "G a. 9N coating 5 ο After that, the valves of TMIn, TEGa, and Sl2H6 are switched to stop the supply of these materials. Next, a multi-quantum well structure 20 was fabricated using a potential stack 3 made of GaN and a well layer 4 made of IllQ 2GaQ.sN -29-1221638. In the fabrication of the multi-quantum well structure, a GaN potential stack 3 is first formed on the Si-doped In ^ GauN cladding layer 5, and then an Ino ^ GauN well layer 4 is formed on the GaN potential stack. After repeating the stacking of this structure five times, a sixth GaN potential stack is formed on the fifth InuGa ^ N well layer, so that both sides of the multi-quantum well structure 20 are formed by the GaN potential stack 3 The structure of the composition. That is, after ending the growth of the Si-doped InQ.iGao.pN cladding layer, stop for 30 seconds, and while maintaining the substrate temperature, the furnace pressure, and the flow rate and type of the carrier gas, switch the TEGa valve. TEGa is supplied in the furnace. After implementing TEGa supply for 7 minutes, the valve was switched again to stop supplying TEGa, and the growth of the GaN potential stack was ended. In this manner, a GaN potential stack 3 having a film thickness of 70A is formed.

GaN勢疊層之成長期間,將除害設備之配管內流通之TM In 的流量,調節爲包覆層成長時之2倍的莫耳流量。 結束GaN勢疊層之成長後,停止第I I I族原料供應30秒 鐘後,在維持基板溫度、爐內壓力、以及載體氣體之流量 及種類的狀態下,切換TEGa及TMIn之閥門,對爐內供應 TEGa及TMIn。實施2分鐘之TEGa及TMIn之供應後,再度 切換閥門,停止TEGa及TMIn之供應,結束InQ.2GaQ.8N井 層之成長。利用此方式,形成具有20A之膜厚的In(K2GaQ.8N 井層4。During the growth of the GaN potential stack, the flow rate of TM In flowing through the piping of the detoxification equipment was adjusted to twice the Moire flow rate when the cladding layer was grown. After the growth of the GaN potential stack is completed, after stopping the supply of Group III raw materials for 30 seconds, the TEGa and TMIn valves are switched while the substrate temperature, the furnace pressure, and the carrier gas flow rate and type are maintained, and the furnace Supply TEGa and TMIn. After implementing the supply of TEGa and TMIn for 2 minutes, the valves were switched again to stop the supply of TEGa and TMIn, and the growth of the InQ.2GaQ.8N well layer was ended. In this way, an In (K2GaQ.8N well layer 4 having a film thickness of 20A was formed.

結束InQ.2Ga().8N井層之成長後,第III族原料之供應停 止3 0秒鐘,維持基板溫度、爐內壓力、以及載體氣體之流 量及種類的狀態下,開始對爐內供應TEGa,再度實施GaN - 30- 1221638 勢疊層之成長。 此種步驟重複5次,製作5層之G a N勢疊層及5層之 In^GauN井層。又,在最後之InG.2GaG.8N井層上形成GaN 勢疊層。 在此以GaN勢疊層結束之多量子井構造20上’製作非ί參 雜之Al^Ga^N擴散防止層2。 預先讓載體氣體流通至三甲基鋁(TM A 1 )之起泡器。利用 起泡產生之TMA1蒸氣,至開始擴散防止層之成長步驟爲止 ,會和載體氣體同時流通於除害裝置之配管內,並通過除 害裝置排出系統外。 等待爐內壓力呈現安定後,切換TEGa及TMA1之閥門, 開始對爐內供應這些原料。其後,實施大約3分鐘之成長 後,停止供應TEGa及TMA1,停止非摻雜之Al^Ga^N擴 散防止層之成長。利用此方式,形成3 0 A之膜厚的非摻雜 之AluGa^N擴散防止層2。 在此非摻雜之Al^Ga^N擴散防止層上,製作Mg摻雜之 G a N 層 1 〇 停止TEGa及TMA1之供應,結束非摻雜之Al。jGa^N擴 散防止層之成長後,以2分鐘時間將基板溫度昇高至 1 06 (TC。又,將載體氣體變更爲氫。 又,預先讓載體氣體流通於雙茂基鎂(C p 2 M g )之起泡器。 利用起泡產生之Cp2Mg蒸氣,至Mg摻雜GaN層之成長步驟 開始爲止,和載體氣體同時流通於除害裝置之配管內,並 通過除害裝置排至系統外。 -31 - 1221638 變更溫度及壓力,等爐內之壓力呈現安定後,切換TMGa 及Cp2Mg之閥門,開始對爐內供應這些原料。Cp2Mg之流通 量已事先檢討,將Mg摻雜GaN包覆層之正孔濃度調整爲8 X 1 0 17 c m _3。其後,實施大約6分鐘之成長後,停止供應TMG a 及Cp2Mg,停止Mg摻雜GaN層之成長。利用此方式,形成 之膜厚的Mg摻雜GaN層1。 結束Mg摻雜GaN層之成長後,停止對感應加熱式加熱器 之通電,以2 0分鐘之時間讓基板溫度降至室溫。從成長溫 度降至300 °C之降溫中,只以氮構成反應爐內之載體氣體, 以容量而言,會使1%之NH3流通。其後,確認基板溫度爲 3 00 °C時,停止NH3之流通,環境氣體只有氮。確認基板溫 度降至室溫,將晶圓取出置於大氣下。 利用如以上之步驟,可製作半導體發光元件用之具有磊 晶層構造的磊晶晶圓。此時,Mg摻雜GaN層即使未實施以 P型載體活化爲目的之退火處理亦爲P型。 其次,使用在上述藍寶石基板上疊層磊晶層構造之磊晶 晶圓,製作半導體發光元件之一種的發光二極體。 對製作之晶圓,以眾所皆知之微影照相術在Mg摻雜GaN 層之表面1 4上,從表面側開始依序形成具有鈦、鋁、金之 疊層構造的P電極焊墊1 2、及和其接合且只以a u構成之 透光性P電極1 3,製成p側電極。 然後,對晶圓實施乾蝕刻,使形成高S!摻雜GaN層之η 側電極的部份1 1外露,在外露部份上製作由N i、A 1、T i 、A u之4層所構成的η電極1 0。利用以上作業,可在晶圓 -32- 1221638 上製作具有第2圖所示之形狀的電極。 針對以此方式形成P側及η側電極之晶圓,實施藍寶石 基板背面之硏削、硏磨,使其成爲鏡面狀之表面。其後, 將該晶圓切割成3 5 0 // m四方之正方形晶片,以電極朝上之 方式將其載置於引線框架上,以金線連結至引線框架而形 成發光元件。 以上述方式製作之發光二極體的p側及η側之電極間流 過順向電流時,電流20mA時之順向電壓爲3 . 0V。又,透 過p側之透光性電極觀察發光時,發光波長爲47Onm,發 光輸出爲6cd。此種發光二極體之特性,在以製成之晶圓 全面所製作的發光二極體幾乎沒有誤差。 [發明之效果] 使用本發明之第II I族氮化物半導體結晶之製造方法, 因可減少溫度之昇降,故可縮短處理過程之必要時間,且 電力消耗量亦較小。因此,可縮短製造處理過程,實現低 成本化。又,因溫度之變化較小,可將基板之反翹抑制於 最小,亦具有良好之結晶特性的均一性。 結果,使用本發明之第II I族氮化物半導體結晶之製造 方法製造使用氮化鎵系化合物半導體之半導體發光元件, 可製造高亮度且晶圓面內具有均一特性之發光二極體。 又,利用本發明記載方法,柱性及移位密度都會小於傳 統上使用高溫成長之A 1 N的方法,且可獲得在其上製作之 元件構造具有良好元件特性之結晶。 [圖式簡單說明] -33- 1221638 第1圖係本發明實施例5半導體發光元件用之具有磊晶 層構造之磊晶晶圓的剖面模式圖。 第2圖係本發明實施例5半導體發光元件之電極構造的 平面圖。 [元件符號之說明] 1 Mg摻雜GaN層 2 非摻雜之A 1 o^GauN擴散防止層 3 GaN勢疊層 4 In〇 2Ga〇 gN 井層 5 In0.iGa0.9N 包覆層 6 高S i摻雜G aN層 7 低S i摻雜〇 aN層 8 金屬過剩之 A 1 N層 9 藍寶石基板 10 η電極 11 局S i彳爹雑 GaN層之η側電極部份 12 P電極焊墊 13 透光性P電 ,極 14 M g摻雜G a N層之表面 20 多量子井構造After the growth of the InQ.2Ga (). 8N well layer is completed, the supply of Group III materials is stopped for 30 seconds, and the supply to the furnace is started while maintaining the substrate temperature, the pressure in the furnace, and the flow rate and type of the carrier gas. TEGa, once again implements the growth of GaN-30-1221638 potential stack. This step was repeated 5 times to make 5 layers of G a N potential stacks and 5 layers of In ^ GauN well layers. In addition, a GaN potential stack is formed on the last InG.2GaG.8N well layer. On this multi-quantum well structure 20 ending with a GaN potential stack, a non-doped Al ^ Ga ^ N diffusion preventing layer 2 is fabricated. The carrier gas was previously passed to a bubbler of trimethylaluminum (TM A 1). The TMA1 vapor generated by foaming will be circulated with the carrier gas in the piping of the detoxification device at the same time as the growth step of the diffusion prevention layer, and will be discharged out of the system through the detoxification device. After waiting for the pressure in the furnace to stabilize, switch the valves of TEGa and TMA1 to start supplying these materials to the furnace. Thereafter, after the growth was performed for about 3 minutes, the supply of TEGa and TMA1 was stopped, and the growth of the non-doped Al ^ Ga ^ N diffusion prevention layer was stopped. In this way, an undoped AluGa ^ N diffusion prevention layer 2 having a film thickness of 30 A is formed. On this non-doped Al ^ Ga ^ N diffusion prevention layer, a Mg-doped G a N layer 10 is produced. The supply of TEGa and TMA1 is stopped, and the undoped Al is ended. After the growth of the jGa ^ N diffusion preventing layer, the substrate temperature was increased to 106 ° C in 2 minutes. The carrier gas was changed to hydrogen. In addition, the carrier gas was passed through the biscene-based magnesium (C p 2 M in advance). g) Bubbler. Use the Cp2Mg vapor generated by the bubble until the growth step of the Mg-doped GaN layer, and the carrier gas is circulated in the pipe of the detoxification device at the same time, and discharged through the detoxification device to the system. -31-1221638 After changing the temperature and pressure, after the pressure in the furnace has stabilized, switch the valves of TMGa and Cp2Mg to start supplying these materials to the furnace. The circulation of Cp2Mg has been reviewed in advance. Mg-doped GaN coatings The positive hole concentration was adjusted to 8 X 1 0 17 cm _3. After the growth was performed for about 6 minutes, the supply of TMG a and Cp2Mg was stopped, and the growth of the Mg-doped GaN layer was stopped. In this way, the film thickness of Mg was formed. Doped GaN layer 1. After the growth of the Mg-doped GaN layer is completed, the energization of the induction heating heater is stopped, and the substrate temperature is reduced to room temperature in 20 minutes. The growth temperature is reduced to 300 ° C. In the reactor, only nitrogen is used as the carrier in the reaction furnace. The gas, in terms of capacity, circulates 1% NH3. After that, when the substrate temperature is 300 ° C, stop the NH3 circulation, and the ambient gas is only nitrogen. Confirm that the substrate temperature has dropped to room temperature, and take out the wafer. Place in the atmosphere. Using the above steps, an epitaxial wafer with an epitaxial layer structure for semiconductor light-emitting devices can be fabricated. At this time, the Mg-doped GaN layer is not annealed for the purpose of activating the P-type carrier. It is also a P-type. Next, an epitaxial wafer with an epitaxial layer structure laminated on the sapphire substrate is used to produce a light-emitting diode, which is a type of semiconductor light-emitting element. On the surface 14 of the Mg-doped GaN layer, the P electrode pads 12 having a layered structure of titanium, aluminum, and gold are sequentially formed on the surface 14 of the Mg-doped GaN layer. The transmissive P electrode 1 3 is made into a p-side electrode. Then, the wafer is dry-etched so that the portion 1 1 forming the η-side electrode of the high S! Doped GaN layer is exposed. Η electrode 10 composed of four layers of Ni, A1, Ti, and Au. Utilizing the above The wafer can be fabricated on Wafer-32-1221638 with the shape shown in Figure 2. For wafers with P-side and η-side electrodes formed in this way, the back surface of the sapphire substrate can be machined and honed to It becomes a mirror-like surface. After that, the wafer is cut into 3 5 0 // m square wafers, which are placed on the lead frame with the electrodes facing up, and connected to the lead frame with gold wires. 0V。 When a forward current flows between the p-side and η-side electrodes of the light-emitting diode fabricated as described above, the forward voltage at a current of 20 mA is 3.0 V. In addition, when light emission was observed through a translucent electrode on the p side, the light emission wavelength was 47 nm and the light output was 6 cd. The characteristics of such light-emitting diodes are almost free from errors in the light-emitting diodes produced on the entire wafer. [Effects of the Invention] The manufacturing method of the Group II I nitride semiconductor crystal of the present invention can reduce the temperature rise and fall, thereby shortening the necessary time for the processing process, and the power consumption is small. Therefore, the manufacturing process can be shortened, and the cost can be reduced. In addition, since the change in temperature is small, the warpage of the substrate can be suppressed to a minimum, and the uniformity of the crystal characteristics is also good. As a result, a semiconductor light-emitting device using a gallium nitride-based compound semiconductor can be manufactured by using the method for manufacturing a Group II I nitride semiconductor crystal of the present invention, and a light-emitting diode with high brightness and uniform characteristics in the wafer surface can be manufactured. In addition, with the method described in the present invention, both the columnarity and the shift density are smaller than those of the conventional method using A 1 N grown at a high temperature, and a crystal with good element characteristics of the element structure manufactured thereon can be obtained. [Brief description of drawings] -33- 1221638 Fig. 1 is a schematic cross-sectional view of an epitaxial wafer having an epitaxial layer structure for a semiconductor light emitting device according to Embodiment 5 of the present invention. Fig. 2 is a plan view of an electrode structure of a semiconductor light emitting device according to a fifth embodiment of the present invention. [Explanation of Element Symbols] 1 Mg-doped GaN layer 2 Non-doped A 1 o ^ GauN diffusion prevention layer 3 GaN potential stack 4 In〇2Ga〇gN well layer 5 In0.iGa0.9N cladding layer 6 high S i doped G aN layer 7 low S i doped 〇aN layer 8 metal excess A 1 N layer 9 sapphire substrate 10 η electrode 11 round S π side electrode portion of GaN layer 12 P electrode pad 13 Light-transmitting P-electrode, 14 M g-doped G a N layer on the surface, more than 20 quantum well structures

-34--34-

Claims (1)

12216381221638 拾、"申請專利範圍/ 第92 1 03 03 1號「第III族氮化物半導體結晶之製造方法、 第III族氮化物半導體磊晶晶圓」專利案 (93年6月14日修正) 1 · 一種第ΠI族氮化物半導體結晶之製造方法,其係在經加 熱基板上製造作爲緩衝層之第III族氮化物半導體結晶 之方法,其中係包括在基板上使用作爲原料氣體之V族 元素與III族元素之比(V/III比)爲1000以下(含ν/ΙΙΙ比 爲0時)以形成第III族氮化物半導體(以下,第III族氮 化物半導體以InG a A1N表示)之第1步驟;以及,其後在 其上使用第111族原料及氮原料,使第I π族氮化物半導 體結晶汽相成長之第2步驟。 2·如申請專利範圍第!項之第in族氮化物半導體結晶之製 造方法,其中前述基板係使用藍寶石(Al2〇3)。 3·如申請專利範圔第〗項之第ΠΙ族氮化物半導體結晶之製 造方法’其中前述第1步驟供應之第Π][族原料係至少 含有A1。 4.如申請專利範圍第1項之第ΠΙ族氮化物半導體結晶之製 造方法’其中前述第2步驟中,在基板上實施汽相成長 之第ΠΙ族氮化物半導體結晶係GaN。 5·如申請專利範圍第1項之第m族氮化物半導體結晶之製 造方法,其中前述第2步驟中,氮原料使用氨(NH3)。 6 ·如申請專利範圍第1至5項中任一項之第n i族氮化物半 導體結晶之製造方法,其中前述第1步驟或第2步驟之 - 1 - 1221638 至少一方,係以有機金屬化學汽相成長法(mocvd法)實 施汽相成長。 7.如申請專利範圍第〗項之第ΠΙ族氮化物半導體結晶之製 造方法,其中前述第〗步驟形成之第ΠΙ族氮化物半導 體爲島狀結晶塊。 8·如申請專利範圍第丨項之第Π][族氮化物半導體結晶之製 造方法,其中前述第1步驟形成之第III族氮化物半導 體爲柱狀結晶。 9.如申請專利範圍第8項之第ΠΙ族氮化物半導體結晶之製 造方法,其中前述柱狀結晶係以其側面大致垂直於基板 面之方式附著於基板上。 10·—種第III族氮化物半導體結晶之製造方法,其係在經加 熱基板上製造作爲緩衝層之第III族氮化物半導體結晶 之方法,其包括在經加熱之基板上形成柱狀結晶或島狀 結晶之集合體的第1步驟之第III族氮化物半導體,及 在其上使用第III族原料及氮原料以形成第2步驟之第III 族氮化物半導體結晶。 11·如申請專利範圍第1〇項之第ΠΙ族氮化物半導體結晶之 製造方法,其中前述柱狀結晶係以其側面大致垂直於基 板面之方式附著於基板上。 12·—種第III族氮化物半導體磊晶晶圓,其特徵爲在基板上 含有柱狀結晶或島狀結晶之集合體的第ΙΠ族氮化物半導 體作爲緩衝層。 13.如申請專利範圍第12項之第III族氮化物半導體磊晶晶 1221638 圓’其中柱狀結晶係寬爲O.lnm〜lOOnm之$b圍內’局爲 ΙΟηη〜500nm之範圍內。 14.如申請專利範圍第12項之第III族氮化物半導體磊晶晶 圓,其中島狀結晶係寬爲lnm〜500nm之範圍內,高爲5nm 〜lOOnm之範圍內。&Quot; Scope of patent application / No. 92 1 03 03 1 "Patent for manufacturing a III-nitride semiconductor crystal, a III-nitride semiconductor epitaxial wafer" patent (as amended on June 14, 1993) 1 A method for manufacturing a group III nitride semiconductor crystal, which is a method for manufacturing a group III nitride semiconductor crystal as a buffer layer on a heated substrate, which includes using a group V element as a source gas on the substrate and Group III element ratio (V / III ratio) is 1000 or less (including when ν / ΙΙΙΙ ratio is 0) to form Group 1 nitride semiconductor (hereinafter, Group III nitride semiconductor is represented by InG a A1N) Step; and a second step of subsequently growing a group I π nitride semiconductor crystal vapor phase using a group 111 raw material and a nitrogen raw material thereon. 2 · If the scope of patent application is the first! In the method for producing a group in nitride semiconductor crystal according to the item, the substrate is made of sapphire (Al203). 3. A method for manufacturing a group III nitride semiconductor crystal according to item 圔 of the patent application, wherein the group Π] [group raw material supplied in the first step contains at least A1. 4. A method for manufacturing a group III nitride semiconductor crystal according to item 1 of the scope of the patent application, wherein in the aforementioned second step, the group III nitride semiconductor crystal system GaN is vapor-grown on a substrate. 5. The method for manufacturing a group m nitride semiconductor crystal according to item 1 of the application, wherein in the aforementioned second step, ammonia (NH3) is used as a nitrogen raw material. 6 · The method for manufacturing a group ni nitride semiconductor crystal according to any one of claims 1 to 5, wherein at least one of the foregoing first step or second step-1-2121638 is an organic metal chemical vapor The phase growth method (mocvd method) implements vapor phase growth. 7. The method for manufacturing a group III nitride semiconductor crystal according to the scope of the patent application, wherein the group III nitride semiconductor formed in the foregoing step is an island-shaped crystal block. 8. The method for manufacturing a group III nitride semiconductor crystal according to the scope of the patent application, wherein the group III nitride semiconductor formed in the first step is a columnar crystal. 9. The method for manufacturing a Group III nitride semiconductor crystal according to item 8 of the application, wherein the columnar crystal is attached to the substrate such that its side surface is substantially perpendicular to the substrate surface. 10 · —A method for manufacturing a group III nitride semiconductor crystal, which is a method for manufacturing a group III nitride semiconductor crystal as a buffer layer on a heated substrate, which comprises forming columnar crystals on the heated substrate or The group III nitride semiconductor in the first step of the aggregate of island-shaped crystals, and a group III raw material and a nitrogen source used thereon to form the group III nitride semiconductor crystal in the second step. 11. The method for manufacturing a group III nitride semiconductor crystal according to item 10 of the application, wherein the columnar crystal is attached to the substrate such that its side surface is substantially perpendicular to the substrate surface. 12. A group III nitride semiconductor epitaxial wafer, characterized in that a group Ill nitride semiconductor containing an aggregate of columnar crystals or island crystals on a substrate is used as a buffer layer. 13. For example, the Group III nitride semiconductor epitaxial crystal 1221638 of the scope of the application for a patent, wherein the columnar crystal system is within the range of 0.1b to 500nm in the range of 0.1b to 100nm. 14. For example, the group III nitride semiconductor epitaxial circle of the scope of the patent application, wherein the island-like crystal system has a width in the range of 1 nm to 500 nm and a height in the range of 5 nm to 100 nm. -3--3-
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