1271531 九、發明說明： 【發明所屬之技術領域】 更特別有關 本發明係有關於一種測試機台之改機程序 於一種積體電路測試機台之改機程序。 【先前技術】 半導體製程主要可分為晶圓處理（Wafer Fa ；；ΓΖ(τ?Τ # ^(Packaging)' ^ ^ ^—-- 用以，"積寻製知’丨中該晶圓針測製程與測試製程係 功能之完整性。之电性功能，以確保積體電路1271531 IX. Description of the invention: [Technical field to which the invention pertains] More particularly related to the present invention relates to a modification procedure of a test machine to a machine change program of an integrated circuit test machine. [Prior Art] The semiconductor process can be mainly divided into wafer processing (Wafer Fa;; ΓΖ(τ?Τ # ^(Packaging)' ^ ^ ^--- for, " 积寻知知'丨中 wafer Needle test process and test process system integrity. Electrical function to ensure integrated circuit
傳統上，當半導體測試I 時’負責測試機台的操作人體電路晶片 恶如·晶片型號、接腳數等，至其 ^ 模組如：測試基板、測★式 j、八g至 適合的測试 機二，#、1 1 “ π Λ /、測試機模具等，用以改裝測試 Κ能夠對待測積體電路晶片進行測試。 然而’在進行改機程库士 口/ 裝了 X、商人Μ、丨ρ π，标作人貝係可能因誤找或誤 於、、Ρ彳ΙΑ π 6 Ρ 於利忒機台上，而造成積體電路晶片 私中知壞，嚴重者’甚至會造成測試機台本身受損。 有鑑於此，本發明提 括拉雜+物t ， 1，、了一種積體電路測試機台之改機 私序用以改善誤改測兮嬙Α α丄 之問題。 w栈Ό所造成的積體電路或機台損壞 【發明内容] 本發明之一目的尤认 ;k供一種積體電路測試機台之改機 01030-TW/ASEK-1378 1271531 程序’其可改善誤改測試機么自^、A丄 之問題。 Ό &成的積體電路或機台損壞 為達上述目的，本發明 機程序，其應用在需要更換測!體電路測試機台之改 路的測試機台上，該改機程序以測試不同類型積體電 識碼之測試模組至該測試機：二：列步驟.安裝具有辨 電路之貨。代瑪 σ、υ试機體上；輸入待測積體 之識別碼1及根據該輸彳已被安伽 測積體電路。再者，上'二:挺組是否能夠用以測試該待 當安壯# ;L 1斷步驟另可包含下列兩步驟： 電路時，則啟動一測試程式=用以測試該待測積體 測試；以及當安裝於該測試機==:11積體電路進行 試該待測積體電路時，則產生—警告的：一能夠 於本發明之改機程序中， 模組其辨識碼係可藉由i ° 代碼的各種測試 (Barcode Tag) ^ # ^ -射頻讀取器或…"不，以及該測試機體係可設有 試機r德木，.，、項取态，使得該測試模組裝設於該測 該=骑 碼可由該射頻或條碼讀取器讀取"妾著， 路之貨。代：會依據所讀取的識別碼及所輸入的待測積體電 吩心；Ν品代碼，判斷奘协 該待測積體電路；！^改Μ的測試模組是否能夠用以測試 的積體電路或機台二裏之；題先前技術中誤改測試㈣^ 另外’根據本承：明少々丨 X 機程序中，該判斷步驟係可藉由 01030-TW/ASEK-1378 1271531 „ 一安裝於該測試機體内的判斷程式達成。 、 為了讓本發明之上述和其他目的、特徵、和優點能更明 顯’下文特舉本發明實施例，並配合所附圖示，作詳細說明 如下。 【實施方式】 現請參考第1圖，其係為應用本發明改機程序的一積體 電路測試機台1 00之示意圖。該積體電路測試機台丨〇〇主要 _ 包含一積體電路測試機102 ( IC tester)以及一操作器1〇4 (handler)，其中該測試機102具有一測試頭（testhead)1〇6, * 且係藉由一纜線1〇8與該測試頭1〇6電氣連接。 X貝]式頭1 〇 6上係裝设有一測試基板11 〇與複數個測試 座112 ’用以裝載並電氣連接至複數個待測積體電路（未顯示） 之接腳。該操作器104上係裝設有測試機模具（未顯示），用 以將複數個待測積體電路由一裝載區域（未顯示）載送至該 測減基板11G之測試座112上，並且當測試完成後，再將該 _積體電路載送至一卸載區域（未顯示）。該測試;f幾1 〇2之操作 係依據-測試程式114而進行，且係經由該測試帛1〇6電性 連接至該測試基板11〇上之測試座112，以對該測試座⑴上 之待測積體電路進行測試。 名^體弘路測試機台1〇〇係適用於多組測試基板11〇(圖 中僅顯示其中一組）、多組測試座ιΐ2(圖中僅顯示其中一組） 及夕、且別，式機极具。该些測試基才反丄i 〇、測試座⑴及測試機 模謝依據不同型態的待測積體電路如：晶片型號、接腳 等不同心擇性地被安裳至該測試頭1⑽與該操作器1 01030-TW/ASEK-1378 7 1271531 上另外，未被裝設至該積體電路測試機台丨00上的測試基 板、测試座112及測試機模具係可集中置放於一處如：一 模具管理室做管理。 根據本發明之改機程序，該積體電路測試機台⑽所適 組測試基板11G、每—組測試座112及每—組測試機 '八係預先植入有或貼有一晶片或標籤，用以表示其本身 的一專有識別碼，其中該晶片或標籤係可藉由任何能夠 二：、識別訊號者實現，如：藉由無線射頻身份辨識標籤 :Tag)或條碼標籤（Barcode Tag)實現。又，該測試 :广與該操作器104係至少設有一讀取機（未顯示），如: t::買取機或一條碼讀取器，用以讀取已安裂在該測試頭 模作器1G4上的測試基板11G、測試座112與測試機 U6、用°別碼。另外，該操作11 1G4上係安裝有-判斷程式 u判斷衫於該測試頭1()6與該操作器⑽上的測試 基板110、測試座丨i 2盥測 、 積體電路。 肩餘具疋否適合用以測試該待測 弟2圖係為應用於該積體電路測試機台100上之本發Traditionally, when the semiconductor test I is responsible for the test machine's operation of the human body circuit chip such as the chip type, the number of pins, etc., to its ^ module such as: test substrate, test ★ j, eight g to the appropriate test Test machine two, #, 1 1 " π Λ /, test machine mold, etc., used to modify the test Κ can be tested on the test body circuit chip. However, 'the machine is changed to the machine / installed X, businessman Μ , 丨ρ π, the standard for people may be misunderstood or misunderstood, Ρ彳ΙΑ π 6 Ρ on the platform, resulting in the integrity of the integrated circuit chip, serious cases may even cause testing The machine itself is damaged. In view of this, the present invention proposes a pull-and-consistency t, 1, and a modified circuit of the integrated circuit test machine to improve the problem of tampering. Damage to the integrated circuit or machine caused by stacking [Inventive content] One of the objects of the present invention is particularly recognized; k for an integrated circuit test machine to change the machine 01030-TW/ASEK-1378 1271531 program 'which can improve the error Change the test machine from the problem of ^, A丄. Ό & into the integrated circuit or machine damage to For the above purpose, the machine program of the present invention is applied to a test machine that needs to replace a modified circuit test machine, and the test program is to test a test module of different types of integrated electrical code to the test machine. : 2: column step. Install the goods with the identification circuit. On behalf of the Sigma, υ test the body; input the identification code 1 of the integrated body to be tested and according to the input 彳 has been measured by the Anga circuit. Again, on ' Second: whether the group can be used to test the pending stability; the L 1 break step can also include the following two steps: When the circuit is started, a test program is started = to test the integrated test to be tested; and when installed in The test machine ==: 11 integrated circuit to test the integrated circuit to be tested, then generate - warning: one can be in the modification program of the invention, the module identification code can be encoded by the i ° code Various tests (Barcode Tag) ^ # ^ - RF reader or ... " No, and the test machine system can be equipped with test machine r Demu, .,, item take state, so that the test die assembly is set in Measure the = riding code can be read by the RF or bar code reader "squatting, the goods of the road. Generation: will According to the read identification code and the input electrical conductor to be tested; the product code, determine the integrated circuit to be tested; whether the modified test module can be used to test the integrated circuit Or the machine is in the second; the problem is wrongly tested in the previous technology (4) ^ In addition, according to the original: Ming Shaohao X machine program, the judgment step can be installed by 01030-TW/ASEK-1378 1271531 „ The judgment program in the test machine is reached. The above and other objects, features, and advantages of the present invention will become more apparent from the description of the appended claims. [Embodiment] Referring now to Figure 1, there is shown a schematic diagram of an integrated circuit test machine 100 using the modified program of the present invention. The integrated circuit test machine 丨〇〇 main _ includes an integrated circuit tester 102 (IC tester) and an operator 1 〇 4 (handler), wherein the test machine 102 has a test head (test head) 1 〇 6 , * and is electrically connected to the test head 1 〇 6 by a cable 1 〇 8. The X-headed head 1 〇 6 is provided with a test substrate 11 〇 and a plurality of test sockets 112 ′ for loading and electrically connecting to a plurality of pins of the integrated circuit to be tested (not shown). The operator 104 is provided with a test machine mold (not shown) for carrying a plurality of integrated circuit to be tested by a loading area (not shown) to the test socket 112 of the measuring substrate 11G, and When the test is completed, the _ integrator circuit is carried to an unloading area (not shown). The test is performed according to the test program 114, and is electrically connected to the test socket 112 on the test substrate 11 via the test 〇1〇6 to be used on the test socket (1). The integrated circuit to be tested is tested. The name of the body Hong Road test machine 1 is suitable for multiple sets of test substrates 11 〇 (only one of which is shown in the figure), multiple sets of test ΐ ΐ 2 (only one of which is shown in the figure) and evening, and The machine is very versatile. The test bases are 丄 〇, test stand (1) and test machine die thanks to different types of integrated circuit to be tested, such as: chip type, pin, etc. are carefully selected to the test head 1 (10) and In addition, the test substrate, the test stand 112 and the test machine mold that are not mounted on the integrated circuit test machine 丨00 can be centrally placed on the operator 1 01030-TW/ASEK-1378 7 1271531. Such as: a mold management room to do management. According to the modification program of the present invention, the integrated circuit test machine (10) is provided with a test substrate 11G, a test set 112, and a test machine of each group. The eight systems are pre-implanted or labeled with a wafer or a label. To indicate its own unique identification code, wherein the chip or label can be implemented by any one of the two: identifying the signal, such as: by radio frequency identification tag: Tag) or bar code tag (Barcode Tag) . Moreover, the test: the operator 104 is provided with at least one reader (not shown), such as: t:: a purchaser or a code reader for reading the tester that has been cracked in the test head. The test substrate 11G on the 1G4, the test socket 112, and the test machine U6 are separated by a code. In addition, the operation 11 1G4 is equipped with a - determination program u to determine the test substrate 1 on the test head 1 () 6 and the operator (10), the test block 盥i 2 test, and the integrated circuit. Whether the shoulder rest is suitable for testing the to-be-tested 2 image is applied to the integrated circuit test machine 100
的改機程序流程圖。為、音姑 X 第丨圖做參考。為…明本發明之改機程序，請配合 日、：=當=積體電路測試機台1〇〇欲測試一批積體電路 才 刼作人貝係會根據該批積體電路之 或1C型號，找出可 ^ ^ ασ代碼 了用m嫌積體電路之測試模組（即該 土 0、該測試座112與該測試機模具），並將該等 測減模組安裝至該積體電路測試機台_之測試機體（即該 01030-TW/ASEK-1378 1271531 測試頭106或該操作器104)上，如步驟20〇所示。 當該等測試模組安裝至該測試機體後 ： 铋制十。（未顯不），將該批積體電路 二代碼（或1 C型號）等，輸入至該測試機^:貝;如： 式（：該判斷程式116)中，如步驟21。所示體内的-判斷程 當完成上述之輸入步驟後，安裝在 器係會讀取該等測試模組之識並y機體上的讀取 由該判斷程式（即該判斷程式116)接收，：：-取的識別碼 社# 如步騾220所示。 接者，該判斷程式（即該判斷程式U 的待測積體電路之相關次 ，、g根據所輪入 於該測試機體上之9所接收的識別瑪，去判斷安裝 依據預先建立好的—對照二於此步驟中，該判斷程式係可 用模組識別碼的對昭表:4各種積體電路與其各別適 否適-測試該 該批程該等測試模組能夠―試 測試程式（即該㈣程以測試該批待測積體電路之 該批待測積體電路進行賢)及如步驟240所示’以開始對 等測試模組不能夠：：反之’當該判斷程式判斷出該 警告訊號，以：1=;試該批待測積體電路時，則產生-也^ ^ ^ "Μ刼作人員其所安裝的測試模組並不」τ 狄 σ V驟250所示，且無法啟動 路之測試程式（即該測試程式114)。 Μ體電 應了解到，太路日日 之換機程序係可應用在任何需要更換^ 01030-TW/ASEK-1378 1271531 測試模組以測試不同類型積體電路的測試機△上，例 用在測製程中之晶圓測試機台上，使_試心: 測…：操作器或測試頭）可主動判斷 二 測試杈組如：一朴：目,1丰r ,、 又衣的 'θ 制卡（im)beeal*d)是否適合用以測試Μ 測的晶圓，藉以避免誤改曰圄制1她二 式奴待 問題發生。冑免Ή測试機台所造成的晶圓損壞之 雖然本發明已以前述實施例揭示，然其並非用以 發明，任何熟習此技藝者’在不脫離本發明之精神和範圍内 參當可作各種之更動與修改，因此本發明之保護範圍當視 之申凊專利範圍所界定者為準。 、 【圖式簡單說明】 弟1圖係為應用本發明改機程序的一積體電路測試穿 之示意圖。 第2圖係為應用於第1圖積體電路測試機台上之本發明的 改機程序流程圖。 m 【圖號說明】 100 積體電路測試機台 102 積體電路測試機 104 操作器 106 測試頭 108 纜線 110 測試基板 112 測試座 114 測試程式 116 判斷程式 200 > 210 、 220 、 230 、 240 、 250 步驟 01030-TW/ASEK-1378 10Change the program flow chart. For the reference to the sound, the second map. For the modification program of the invention, please cooperate with the day::===Integral circuit test machine 1〇〇To test a batch of integrated circuits, the system will be based on the batch circuit or 1C Model, find the test module that can use ^^ασ code to use the m-integrated circuit (ie, the soil 0, the test socket 112 and the test machine mold), and install the measurement and reduction modules to the integrated body The test machine body of the circuit test machine (ie, the 01030-TW/ASEK-1378 1271531 test head 106 or the operator 104) is as shown in step 20A. After the test modules are installed in the test body: 铋10. (not shown), the batch circuit 2 code (or 1 C model), etc., is input to the test machine ^: Bay; as in the formula (: the judgment program 116), as in step 21. The internal body-determination process is completed after the input step is completed, the installation system reads the knowledge of the test modules, and the reading on the y body is received by the determination program (ie, the determination program 116). ::-Get the identification code agency # as shown in step 220. In addition, the judging program (that is, the correlation time of the integrated circuit to be tested of the judging program U, g, according to the identification horse received by the 9 on the test body, to determine the installation according to the pre-established - In the second step, the judgment program is a pair of module identification codes: 4 various integrated circuits and their respective suitability-testing the test modules, the test modules can test the program (ie, the test program) (4) The test is to test the batch of the circuit to be tested of the batch of the circuit to be tested, and as shown in step 240, to start the peer test module cannot:: otherwise, when the judgment program determines the warning The signal is: 1=; when the batch is to be tested, the test module is generated - also ^ ^ ^ " the test module installed by the staff is not "τ Di Di σ V step 250, and Unable to start the test program for the road (ie the test program 114). The body should know that the daily change program of the road can be applied to any test that needs to be replaced ^ 01030-TW/ASEK-1378 1271531 test module The test machine △ of different types of integrated circuits is used in the measurement process. On the round test machine, let _ try: test...: operator or test head) can actively judge the second test group such as: one Park: mesh, one Feng r, and the clothing 'θ card (im)beeal *d) Whether it is suitable for testing the wafers to be tested, in order to avoid mis-changing the system. The present invention has been disclosed in the foregoing embodiments, but it is not intended to be invented, and any person skilled in the art can participate in the invention without departing from the spirit and scope of the invention. Various changes and modifications are intended to be included in the scope of the invention as defined by the scope of the claims. [Simple description of the drawing] The brother 1 is a schematic diagram of an integrated circuit test wear using the modified program of the present invention. Fig. 2 is a flow chart showing the modification procedure of the present invention applied to the integrated circuit test machine of Fig. 1. m [Description of the number] 100 Integrated circuit test machine 102 Integrated circuit tester 104 Operator 106 Test head 108 Cable 110 Test substrate 112 Test stand 114 Test program 116 Judge program 200 > 210 , 220 , 230 , 240 , 250 steps 01030-TW/ASEK-1378 10