TW201706452A - Method of using chemical etching method for peeling growth substrate - Google Patents

Abstract

A method of using a chemical etching method for peeling the growth substrate is provided. A semiconductor-based dielectric pattern layer is etched to form a cavity structure, so an etchant can enter the cavity structure, in order to achieve peeling the growth substrate.

Description

Method for stripping growth substrate by chemical etching

The present invention relates to the field of semiconductor illumination, and more particularly to a method of stripping a growth substrate by chemical etching.

As a new high-efficiency solid-state light source, semiconductor lighting has the advantages of long life, energy saving, environmental protection and safety, and its application field is rapidly expanding. The core of semiconductor illumination is a light-emitting diode (LED). In terms of structure, the LED is composed of a III-V compound such as gallium arsenide (GaAs), gallium phosphide (GaP), gallium arsenide (GaAsP), and nitrogen. A PN junction formed by a semiconductor such as gallium (GaN). In order to increase the luminous efficiency of the LED, an active region of a quantum well is generally added between the N-type layer and the P-type layer of the PN junction. Therefore, most of the LEDs are sequentially grown on the substrate in the order of the N-type layer, the active region, and the P-type layer by means of epitaxy. Since there are no inexpensive GaN homogeneous substrates, GaN-based LEDs are usually grown on Si, SiC, and sapphire (mainly Al2O3) substrates, with sapphire substrates being the most widely used growth substrates.

After growing the GaN crystal material and the epitaxial structure on the sapphire substrate, it is usually necessary to peel the substrate. At present, the substrate is mainly stripped by laser. The laser stripping is to focus the high-energy laser on the interface between the substrate and the epitaxial layer, and the epitaxial buffer layer is instantaneously melted by laser spot-by-point scanning, thereby peeling off the substrate and the epitaxial layer. However, there are many drawbacks to laser lift-off, such as damage to the epitaxial layer, and it is also difficult to achieve very uniform peeling. This ultimately leads to defects such as leakage and low yield in devices fabricated by laser stripping.

In view of the above-discussed shortcomings of the prior art, it is an object of the present invention to provide a method of stripping a growth substrate by chemical etching for solving various disadvantages in the prior art growth substrate peeling technique. The invention has two main applications: one can be used to prepare a self-supporting III-V nitride substrate, the specific process is to grow a relatively thick III on a heterogeneous substrate (also known as a growth substrate). a V nitride epitaxial layer, which is then stripped off by the method of the present invention, the thickness of the III-V nitride epitaxial layer being greater than the thickness capable of supporting itself, forming a self-supporting III-V nitride substrate Another application of the invention is that it can be used to transfer the epitaxial layer structure of a relatively thin device from a growth substrate to other so-called support substrates. Therefore, the contents of the present invention will be described from the following two aspects.

One aspect of the present invention provides a method of stripping a growth substrate by a chemical etching method, and preparing a self-supporting III-V nitride substrate by the method of stripping a growth substrate, comprising at least:

1) providing a growth substrate;

2) depositing a III-V nitride epitaxial buffer layer on the growth substrate;

3) depositing a semiconductor dielectric layer on the epitaxial buffer layer;

4) patterning the semiconductor dielectric layer, that is, removing a portion of the semiconductor dielectric layer, so that the removed portion and the remaining portion are spaced apart to form a periodic or non-periodic pattern, while the portion where the dielectric layer is removed is exposed. The surface of the epitaxial buffer layer, the portion from which the dielectric layer is removed and the epitaxial buffer layer is exposed is referred to as a growth window;

5) performing epitaxial transition layer deposition on a surface of the dielectric layer pattern exposing the epitaxial buffer layer, the epitaxial transition layer having a thickness greater than a height of the semiconductor medium, the epitaxial transition layer completely covering the semiconductor dielectric layer, the epitaxial transition The layer has a flat upper surface;

6) depositing a certain thickness of the group III-V nitride on the epitaxial transition layer;

7) etching the semiconductor dielectric pattern layer formed between the growth substrate and the epitaxial transition layer formed in step 4) using a chemical agent capable of etching only the semiconductor dielectric material to form a void structure between the growth substrate and the epitaxial transition layer ;

8) using a chemical agent capable of etching the epitaxial buffer layer formed in step 2), and causing such a chemical agent to enter the void structure formed in step 7), etching away the epitaxial buffer layer formed in step 2), allowing growth to grow. An epitaxial transition layer over the substrate is separated from the growth substrate along with a III-V nitride having a certain thickness to complete the lift-off of the growth substrate to form a self-supporting III-V nitride substrate.

Another aspect of the present invention provides a method for stripping a growth substrate by a chemical etching method, and transferring the epitaxial structure of the device from the growth substrate to another support substrate by the method of stripping the growth substrate includes at least:

1) providing a growth substrate;

2) depositing a III-V nitride epitaxial buffer layer on the growth substrate;

3) depositing a semiconductor dielectric layer on the epitaxial buffer layer;

4) patterning the semiconductor dielectric layer, that is, removing a portion of the semiconductor dielectric layer, so that the removed portion and the remaining portion are spaced apart to form a periodic or non-periodic pattern, while the portion where the dielectric layer is removed is exposed. The surface of the epitaxial buffer layer, the portion from which the dielectric layer is removed and the epitaxial buffer layer is exposed is referred to as a growth window;

5) performing epitaxial transition layer deposition on a surface of the dielectric layer pattern exposing the epitaxial buffer layer, the epitaxial transition layer having a thickness greater than a height of the semiconductor medium, the epitaxial transition layer completely covering the semiconductor dielectric layer, the epitaxial transition The layer has a flat upper surface;

6) epitaxial structure of the light emitting diode device formed by epitaxially growing the n-type epitaxial layer, the multi-quantum well light-emitting layer, and the p-type epitaxial layer on the epitaxial transition layer;

7) bonding the substrate having the epitaxial structure together with the growth substrate to another support substrate such that the surface of the epitaxial structure of the device and the surface of the support substrate are closely bonded together;

8) etching away the semiconductor dielectric pattern layer formed between the growth substrate and the epitaxial transition layer formed in step 4) using a chemical agent capable of etching only the semiconductor dielectric material to form a void structure between the growth substrate and the epitaxial transition layer ;

9) using a chemical agent capable of etching the epitaxial buffer layer formed in step 2), and causing such a chemical agent to enter the void structure formed in step 8), etching away the epitaxial buffer layer formed in step 2), allowing growth to grow. The epitaxial transition layer over the substrate is separated from the growth substrate along with the epitaxial structure of the device to complete the lift-off of the growth substrate, transferring the epitaxial structure of the light-emitting diode device to the support substrate.

The device structure fabrication technique is completed on the epitaxial structure layer on the stripped support substrate.

As described above, the present invention provides a method of stripping a substrate by a chemical etching method, the main feature of which is to first etch the dielectric layer with an etching solution, thereby forming a void at the original dielectric layer, and then enabling etching of the epitaxial buffer layer. The etching solution enters the void structure and etches away the epitaxial buffer layer, successfully peeling off the growth substrate.

The preparation method of the invention has simple technology and is advantageous for reducing manufacturing cost and is suitable for industrial production.

As a preferred embodiment of the method for stripping a substrate by a chemical etching method of the present invention, the material of the growth substrate is Al2O3, and may be other semiconductor materials such as Si or SiC.

As a preferred embodiment of the method for peeling a growth substrate by a chemical etching method of the present invention, the thickness of the epitaxial buffer layer is preferably from 100 to 500 angstroms, more preferably from 200 to 400 angstroms. An excessively thin epitaxial buffer layer cannot meet the nucleation requirements required for subsequent epitaxial growth, resulting in a decrease in the growth quality of the epitaxial layer; an excessively thick epitaxial buffer layer may cause insufficient recrystallization in the subsequent temperature rise process, affecting the quality of the epitaxial layer. An excessively thick epitaxial buffer layer also affects the light extraction efficiency of LEDs fabricated on such substrates.

As a preferred embodiment of the method for peeling off a substrate by a method of chemical etching according to the present invention, the epitaxial buffer layer is any amorphous or polycrystalline material capable of forming a hexagonal symmetric crystal by annealing and recrystallization, more preferably selected from: AlxGa1-xN prepared by metal organic chemical vapor deposition method, 0≤X≤0.5, preferably 0≤X≤0.2, prepared at a temperature range of 450-700 ° C, preferably 500-600 ° C; using metal organic compounds chemical vapor phase The AlN prepared by the deposition method has a temperature range of 700 to 1000 ° C; an AlN layer prepared by a sputtering method, the crystal orientation of the AlN layer is (0001) orientation; BN; or ZnO. The preparation method of the above epitaxial buffer layer is known to those skilled in the art and will not be described herein. Since the preparation temperature of the transition layer is low, the required thickness is small, and the production cost can be effectively reduced while ensuring nucleation growth of the subsequent light-emitting epitaxial structure (especially GaN-based light-emitting epitaxial structure). Compared with the low-temperature AlxGa1-xN layer, the AlN layer prepared by sputtering has the advantages of high thickness controllability, high crystal orientation, and nucleation of luminescent epitaxial structures (especially GaN-based luminescent epitaxial structures). Growing.

As a preferred embodiment of the method for peeling a growth substrate by a chemical etching method of the present invention, the semiconductor dielectric layer is at least one of SiO2, SiONx, or SiNx, and may be plasma enhanced chemical vapor deposition (PECVD) or the like. The film formation method is formed, and the semiconductor dielectric layer is more preferably SiO2, which is formed by SiCH4 and N2O in a plasma reaction environment at a temperature range of 250-350 ° C using PECVD.

As a preferred embodiment of the method for peeling a growth substrate by a chemical etching method of the present invention, the thickness of the semiconductor dielectric layer is preferably 0.5 to 2 μm.

As a preferred embodiment of the method for stripping a growth substrate by a method of chemical etching according to the present invention, the semiconductor dielectric layer is composed of a growth window from which the dielectric layer is removed and a remaining dielectric layer after patterning, and the growth window forms a so-called Concave hole. In the present invention, the portion from which the dielectric layer is removed and the epitaxial buffer layer is exposed is referred to as a growth window.

As a preferred embodiment of the method for peeling the growth substrate by the method of chemical etching of the present invention, the shape of the growth window is not limited, and may be circular or square or hexagonal, and the size of the growth window is preferably 0.1 to At 15 microns, the spacing between the growth windows is preferably 0.1 to 25 microns.

As a preferred embodiment of the method for peeling a growth substrate by a chemical etching method of the present invention, the shape of the growth window may also be a strip structure, and the width of the strip growth window is preferably 0.1 to 15 μm, between the strip growth windows. The pitch is preferably from 0.1 to 25 microns.

As a preferred embodiment of the method for peeling a growth substrate by a method of chemical etching according to the present invention, the support substrate for bonding the epitaxial structure layer may be a Cu-based electrode having good electrical and thermal conductivity according to the function of the device. The substrate, which may also be other semiconductor substrates, such as Si and GaAs substrates, may also be a thermally conductive ceramic substrate.

As a preferred embodiment of the method for stripping a growth substrate by a method of chemical etching according to the present invention, the bonding technique may be any conventional bonding technology in the semiconductor industry, and may be preferably used if necessary according to device function requirements. Metal bonding such as Au-Au bonding or AuSn, and organic binder bonding if conductivity is not required.

As a preferred embodiment of the method for peeling a growth substrate by a method of chemical etching according to the present invention, the semiconductor dielectric layer is connected in a whole piece or forms a continuous strip, so that the solution can be extended to completely etch away the semiconductor dielectric layer. A void structure is formed between the growth substrate and the epitaxial layer.

The chemical reagents or etching solutions and etching techniques used in the present invention which are capable of etching the semiconductor dielectric layer are well known in the semiconductor industry and will not be described herein. For example, the ratio of HF solution or HF to HNO3 may be preferably 1: 1 mixed solution.

The chemical reagents or etching solutions and etching techniques which can be used in the present invention to etch the epitaxial buffer layer are well known in the semiconductor industry, and will not be described herein. For example, a KOH solution having a molar concentration of 10 mol/L can be preferably used. The etching temperature is preferably 100 °C.

Example

The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily understand the other advantages and effects of the present invention from the disclosure. The present invention may be embodied or applied in various other specific embodiments, and various modifications and changes can be made without departing from the spirit and scope of the invention.

Please refer to Figures 1 to 10b. It should be noted that the illustrations provided in the present embodiment merely illustrate the basic concept of the present invention in a schematic manner, and only show the components of the present invention in relation to the present invention, rather than the number, shape, and size of the components in actual implementation. The manufacturing method and technology are limited, and the type, quantity and proportion of each component in actual implementation may be a random change, and the component layout type may also be more complicated. The technical conditions involved in the embodiments can be reasonably changed and achieve the effects disclosed by the present invention.

Example 1

As shown in FIG. 1 to FIG. 10b, the embodiment provides a method for peeling a growth substrate by chemical etching, comprising the following steps:

1. Formation of an epitaxial buffer layer. As shown in FIG. 1, in the present embodiment, the growth substrate 101 is a commercially available flat sheet type Al2O3 substrate having a surface crystal orientation (0001) having an atomic level flatness and a substrate size of 2 inch. In this embodiment, a no-clean substrate was used, which was used without additional cleaning. The substrate is placed on a graphite tray having a SiC protective layer and fed into a metal organic chemical vapor deposition (MOCVD) reaction chamber; the substrate is heated to 1100 ° C under a hydrogen atmosphere, and maintained at this temperature for 10 Minutes; then reduce the substrate temperature to 550 ° C, and simultaneously introduce ammonia gas, trimethyl aluminum (TMAl) and trimethyl gallium (TMGa) into the reaction chamber, wherein the standard flow rate of ammonia gas is 56 liters / minute, TMAl The molar flow rates of TMGa and TMGa were 3.25 x 10-5 and 2.47 x 10-4 mol/min, respectively, the pressure in the reaction chamber was 500 torr, and the pass time was 215 seconds. As shown in FIG. 2, the thickness of the AlxGa1-xN epitaxial buffer layer formed on the growth substrate 101 under the above conditions was 300 angstroms, where x = 0.2.

2. As shown in FIG. 3, after the growth of the buffer layer 102 is completed, a SiO2 layer 103 is formed on the surface of the buffer layer 102 by plasma enhanced chemical vapor deposition (PECVD) to a thickness of 1 μm. The temperature in the PECVD reaction chamber was 350 ° C, the pressure was 1 torr (one standard atmospheric pressure was 760 torr), the flow rates of SiH4 and N2O were 10 sccm (standard cc / min) and 300 sccm, respectively, and the RF power of the plasma was 30 W.

3. Formation of a geometric pattern of the dielectric layer. As shown in FIG. 4 to FIG. 7b, the pattern formed is a periodically arranged SiO2 recessed hole arranged in a hexagonal close-packed structure with a period of 10 μm, a SiO2 recessed hole having a circular shape, a bottom width of 3 μm, and a pitch of 7 μm. .

Specifically, the geometric patterning of the dielectric layer includes the following steps:

a, as shown in FIG. 4 to FIG. 5b, first, a 1 μm photoresist layer 104 is coated on the surface of the SiO2 layer 103, and the photoresist layer 104 is formed into a lithography arranged in a hexagonal close-packed manner by an exposure technique. The recessed holes 105 have a hexagonal close-packing period of 10 μm, and the photoresist cylinder has a diameter of 3 μm and a pitch of 7 μm.

b. As shown in FIG. 6, the plurality of photoresist recesses are then reflowed into holes having a certain slope by a heating reflow technique, wherein the reflow temperature is 128 degrees Celsius and the reflow time is 60 seconds.

c, as shown in FIGS. 7a and 7b, after which the photoresist pattern is transferred to the SiO2 layer 103 by inductively coupled plasma etching (ICP) to form a plurality of SiO2 recesses, and each SiO2 recess is exposed. The transition layer 102 is used for epitaxial growth of subsequent GaN epitaxial materials. The technical conditions of the above ICP etching are: the etching gas is CHF3 (trifluoromethane), the standard flow rate is 100 ml/min; the upper electrode power of the ICP is 1000 W, and the power of the lower electrode is 50 W. The cleaning technical conditions are as follows: using acetone, cleaning the residual photoresist on the surface of the above SiO2, and then washing away the surface of the SiO2 and other contaminants on the surface of the exposed transition layer with dilute hydrochloric acid, and then directly used for epitaxial growth of GaN. .

4. Formation of epitaxial structure layers. As shown in FIGS. 8a, 8b, an epitaxial transition layer is epitaxially grown on the exposed buffer layer surface by an MOCVD device, the epitaxial transition layer completely covering the semiconductor dielectric bumps and completely filling the space between the semiconductor dielectric bumps, the epitaxy The transition layer has a flat upper surface. The substrate structure prepared in the above step is placed on a graphite tray having a SiC protective layer and sent to a metal organic chemical vapor deposition (MOCVD) reaction chamber in which a buffer layer exposed at the SiO2 recess is provided. The surface can act as a buffer layer. Under the protection of NH3, the temperature of the reaction chamber is directly raised to 1100 ° C, and a GaN undoped layer transition layer with a thickness of 2 μm is epitaxially grown. The NH 3 flow rate is 25 standard liters per minute, TMGa. The flow rate was 4 x 10-5 mol/min and the growth pressure was 400 Torr.

After the epitaxial transition layer growth is completed, the epitaxial active layer is grown by directly growing on the surface of the epitaxial transition layer by MOCVD without interrupting growth, and the epitaxial active layer contains at least an n-type doped epitaxial layer. a layer, a p-doped epitaxial layer, and a light-emitting layer, wherein the n-type epitaxial layer and the p-type epitaxial layer are located on both sides of the light-emitting layer.

The main growth conditions of each layer of the epitaxial active layer are as follows:

a, growing Si-doped n-type GaN layer, NH3 flow rate is 25 standard liters / minute, TMGa flow rate is 4 × 10-3 moles / minute, doping SiH4 flow rate from 2 × 10-7 moles / minute, the reaction chamber The temperature is 1,100 ° C, the pressure is 400 Torr, and the thickness of the n-type GaN layer is 3 μm;

b, growing a Si-doped n-type AlGaN intercalation layer, a growth temperature of 1050 ° C, a growth time of 10 min, a pressure of 400 Torr, a thickness of 0.1 micron;

c. growing multiple quantum well layer light-emitting layer: the multiple quantum well layer comprises ten sequentially overlapping quantum well structures, which are sequentially overlapped by an InxGa1-xN (x=0.2) well layer and a GaN barrier layer Growing up. The growth temperature of the InxGa1-xN well layer is 780 ° C, the pressure is 300 Torr, and the thickness is 2.5 nm; the growth temperature of the GaN barrier layer is between 950 ° C, the pressure is between 400 Torr, and the thickness is 12 nm;

d, growing Mg-doped p-type AlGaN layer, growth temperature is 1000 ° C, NH3 flow rate is 41 standard liter / minute, TMGa flow rate is 1.1 × 10 -4 mole / minute, TMAl flow rate is 6.2 × 10-5 mole / minute , Cp2Mg flow rate is 7.5 × 10-7 mol / min, the reaction chamber pressure is 500 Torr, the growth thickness is 50 nm;

e, growth of Mg-doped p-type GaN layer: temperature dropped to 950 ° C, TMGa flow rate of 1 × 10-4 mol / min, Cp2Mg flow rate of 4.5 × 10-6 mol / min, reaction chamber pressure of 500 Torr, growth thickness 600 nanometers;

f. Grinding the Mg-doped InGaN layer, the temperature is lowered to 650 ° C, the NH 3 flow rate is 40 standard liter / minute, the TEGa flow rate is 1.5 × 10 -5 mol / min, the TMIn flow rate is 3 × 10 -5 mol / min, Cp2Mg The flow rate is 3.2×10-6 mol/min, the reaction chamber pressure is 500 Torr, and the growth thickness is 5 nm;

g, annealing treatment, and finally the temperature was lowered to 800 ° C, the total flow rate of N2 was 80 standard liter / minute, the reaction chamber pressure was 200 Torr, and the activation time was 10 minutes.

5. After the growth of the entire epitaxial structure is completed, the temperature of the MOCVD reaction chamber is lowered to room temperature, and then the sample is taken out from the MOCVD reaction chamber, and the epitaxial structure can be transferred to the support substrate along with the growth substrate. The support substrate used in this embodiment is Si (001), and the bonding technique used is Au-Au bonding technology. First, it is necessary to vapor-deposit 1 μm of metal Au on the surface of the epitaxial layer and the surface of the Si support substrate, respectively. Bonding the layers, and then bonding the surfaces of the two together, the bonding can be completed by holding at 280 ° C, 5 Kg for 10 minutes.

6, the formation of voids. As shown in Figures 9a and 9b, the semiconductor dielectric layer is etched away with an HF acid solution. Since the semiconductor dielectric layer is connected in a single piece, the solution can be extended to completely etch away the semiconductor dielectric layer, thereby forming the epitaxial structure and the growth substrate. A void structure is formed between them.

7. The growth substrate is peeled off. The sample having the void structure described above is placed in a high temperature KOH etching solution at 100 ° C, and the molar concentration of KOH is 10 mol / liter, and the KOH solution enters between the epitaxial structure and the growth substrate. The void structure erodes the epitaxial buffer layer and the etching time is 3 minutes, and the chemical peeling of the growth is successfully achieved.

8. A device technique for completing an epitaxial structure of a device over a Si substrate.

Example 2

As shown in FIG. 1 to FIG. 10b, the present embodiment provides a method for stripping a substrate by chemical etching. The basic steps are as in Embodiment 1, except that the second step is: patterning the semiconductor dielectric layer. 103 is a periodically spaced SiO2 line having a line bottom width of 7 μm and a pitch of 3 μm.

The above-described embodiments are merely illustrative of the principles of the invention and its effects, and are not intended to limit the invention. Modifications or variations of the above-described embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, all equivalent modifications or changes made by those skilled in the art without departing from the spirit and scope of the invention will be covered by the appended claims.

101‧‧‧ growth substrate
102‧‧‧ Epitaxial buffer layer
103‧‧‧Semiconductor dielectric layer
104‧‧‧Photoresist layer
105‧‧‧ spaced photoresist patterns
106‧‧‧Striped photoresist pattern with slope
107‧‧‧ spaced semiconductor dielectric patterns
108‧‧‧Extensive structural layer
109‧‧‧ hollow
110‧‧‧Support substrate

1 and 2 are respectively schematic structural views showing steps 1) and 2) of a method for peeling a substrate by a chemical etching method according to the present invention.

3 is a schematic view showing the structure of the method 3) of the method for peeling off a substrate by a chemical etching method of the present invention.

4, FIG. 5a, FIG. 5b, FIG. 6, FIG. 7a, and FIG. 7b are respectively schematic structural diagrams showing the step 4) of the method for peeling off the substrate by the method of chemical etching according to the present invention.

8a and 8b are respectively schematic structural views showing steps 5) and 6) of the method for peeling off a substrate by a method of chemical etching according to the present invention.

9a and 9b are respectively schematic structural views showing a step 7) of a method for stripping a substrate by a method of chemical etching according to the present invention.

10a and 10b are respectively schematic structural views showing a step 8) of a method for stripping a substrate by a chemical etching method according to the present invention.

101‧‧‧ growth substrate

108‧‧‧Extensive structural layer

Claims (14)

A method for stripping a growth substrate by a chemical etching method, manufacturing a self-supporting III-V nitride substrate by the method of stripping a growth substrate, characterized in that: 1) providing a growth substrate; 2) Depositing a III-V nitride epitaxial buffer layer on the growth substrate; 3) depositing a semiconductor dielectric layer on the epitaxial buffer layer; 4) patterning the semiconductor dielectric layer, that is, removing a portion of the semiconductor dielectric layer, The removed portion and the remaining portion are spaced apart to form a periodic or non-periodic pattern, while a portion of the dielectric layer is removed to expose a portion of the surface of the epitaxial buffer layer, the dielectric layer is removed, and the epitaxial buffer layer is exposed. The portion is referred to as a growth window; 5) epitaxial transition layer deposition is performed on the surface of the dielectric layer pattern exposing the epitaxial buffer layer, the thickness of the epitaxial transition layer being greater than the height of the semiconductor medium, and the epitaxial transition layer is completely covered a semiconductor dielectric layer having a flat upper surface; 6) depositing a certain thickness of III-V nitride on the epitaxial transition layer; 7) using only The chemical agent etching the semiconductor dielectric material etches away the semiconductor dielectric pattern layer formed between the growth substrate and the epitaxial transition layer formed in step 4) to form a void structure between the growth substrate and the epitaxial transition layer; 2) The chemical agent of the epitaxial buffer layer formed in the process, and such a chemical agent is introduced into the void structure formed in the step 7), the epitaxial buffer layer formed in the step 2) is etched away, and the epitaxial growth layer grown on the growth substrate is grown. The transition layer is separated from the growth substrate along with a III-V nitride having a certain thickness to complete the lift-off of the growth substrate to form a self-supporting III-V nitride substrate. A method of stripping a growth substrate by a chemical etching method, wherein an epitaxial structure of a device grown on a growth substrate is peeled off from a growth substrate by the method of stripping a growth substrate, characterized in that: 1) providing a Growing a substrate; 2) depositing a III-V nitride epitaxial buffer layer on the growth substrate; 3) depositing a semiconductor dielectric layer on the epitaxial buffer layer; 4) patterning the semiconductor dielectric layer, that is, Removing a portion of the semiconductor dielectric layer such that the removed portion and the remaining portion are spaced apart to form a periodic or non-periodic pattern, while a portion of the dielectric layer is removed to expose a portion of the surface of the epitaxial buffer layer, and the dielectric layer is removed. And exposing a portion of the epitaxial buffer layer to be referred to as a growth window; 5) performing epitaxial transition layer deposition on a surface of the dielectric layer pattern exposing the epitaxial buffer layer, the epitaxial transition layer having a thickness greater than a height of the semiconductor medium The epitaxial transition layer completely covers the semiconductor dielectric layer, the epitaxial transition layer has a flat upper surface; 6) epitaxially growing on the epitaxial transition layer An epitaxial structure of a light-emitting diode composed of an n-type epitaxial layer, a multi-quantum well light-emitting layer, and a p-type epitaxial layer; 7) bonding the epitaxial structure together with a growth substrate to another support substrate such that The surface of the epitaxial structure of the device and the surface of the support substrate are closely bonded together; 8) etching the growth substrate and the epitaxial transition formed in step 4) using a chemical agent that can only etch the semiconductor dielectric material a semiconductor dielectric pattern layer between the layers to form a void structure between the growth substrate and the epitaxial transition layer; 9) using a chemical agent capable of etching the epitaxial buffer layer formed in step 2), and bringing such a chemical reagent into the step The void structure formed in 8) etches away the epitaxial buffer layer formed in step 2), so that the epitaxial structure grown on the growth substrate is separated from the growth substrate together with the support substrate to complete the stripping of the growth substrate And transferring the device epitaxial structure formed in step 6) onto the support substrate. A method of peeling a growth substrate by chemical etching as described in claim 1 or 2, wherein the material of the substrate is Al2O3 or SiC semiconductor material. A method for peeling a growth substrate by chemical etching as described in claim 1 or 2, wherein the nitride epitaxial buffer layer is a group III-V nitride, which is MOCVD or a halogenated gas. It is deposited by phase epitaxy (HVPE) or PVD method, preferably having a thickness between 5 and 1000 angstroms. A method for peeling a growth substrate by chemical etching as described in claim 1 or 2, wherein the semiconductor dielectric layer is one or more of SiO2, SiN, or SiONx, and is plasma-treated. It is deposited by enhanced chemical vapor deposition (PECVD), PVD or electron beam evaporation methods, preferably having a thickness between 0.01 and 5 microns. A method of peeling a growth substrate by chemical etching as described in claim 1 or 2, wherein the patterning the semiconductor dielectric layer comprises at least the following steps: a) forming a surface of the dielectric layer a photoresist layer, the photoresist layer is formed into a photoresist pattern by an exposure technique; b) the photoresist pattern is transferred to the dielectric layer by dry etching or wet etching, and the dielectric layer is etched away Part of the nitride buffered surface is completely exposed to form a growth window for the subsequent growth of the epitaxial transition layer, and the remaining dielectric layer forms a patterned dielectric pickle film that prevents epitaxial growth; c) removing the photoresist block Residual. A method for stripping a growth substrate by chemical etching as described in claim 1 or 2, wherein the epitaxial transition layer is deposited by MOCVD or halogenated vapor phase epitaxy (HVPE) or PVD method. On the substrate of the window and the patterned medium pickle layer, the thickness of the epitaxial transition layer is greater than the thickness of the dielectric pickle layer. A method for peeling a growth substrate by chemical etching as described in claim 1, characterized in that a certain thickness of a group III-V nitride is deposited on the epitaxial transition layer by MOCVD or halogenated vapor phase epitaxy. A (HVPE) or PVD method is deposited over the epitaxial transition layer. A method for peeling a growth substrate by chemical etching as described in claim 2, wherein the epitaxial structure layer of the light emitting diode device comprises at least n-type GaN, InGaN multiple quantum well (MQW) The luminescent layer, with p-type GaN, is deposited on the epitaxial transition layer by MOCVD. A method of peeling a growth substrate by chemical etching as described in claim 2, wherein the support substrate is a Cu-based substrate, or may be another semiconductor substrate such as Si and GaAs. The bottom may also be a ceramic substrate with good thermal conductivity. A method for peeling a growth substrate by chemical etching as described in claim 2, wherein the bonding technique is preferably Au-Au bonding or AuSn metal bonding, and organic binder bonding is also selected. . A method for peeling a growth substrate by chemical etching as described in claim 1 or 2, wherein the chemical agent capable of etching only the semiconductor dielectric material may be an HF solution or a mixture of HF and a chemical reagent. . The method for peeling a growth substrate by chemical etching as described in claim 1 or 2, wherein the chemical agent capable of etching the buffer layer may be a KOH solution or a NaOH solution. Or a mixed solution of H2SO4 and H2PO4, or a solution capable of etching nitrides. A method of peeling a growth substrate by chemical etching as described in claim 1 or 2, wherein the etching step is first performed on a growth substrate by a method of etching only a chemical agent of the semiconductor dielectric material. a semiconductor dielectric pattern layer between the epitaxial transition layer, a void structure formed between the growth substrate and the epitaxial transition layer, and then a chemical agent capable of etching the epitaxial buffer layer enters the void structure to etch away the epitaxial layer buffer The layer completes the peeling of the growth substrate.