TW201344666A - Driving apparatus, driving apparatus operating method, and self-judgement slew rate enhancing amplifier - Google Patents

Abstract

A driving apparatus applied in a liquid crystal display is disclosed. The driving apparatus at least includes a first latch, a second latch, an output buffer, and a slew rate enhancing module. The first latch is used to store a second data signal. The second latch is used to store a first data signal. The first data signal is previous to the second data signal. The slew rate enhancing module is used to compare the first data signal and the second data signal to generate a compared result, and correspondingly output a control signal to the output buffer according to the compared result to control a driving capability of the output buffer.

Description

Driving device, driving device operating method and self-determining voltage conversion rate enhancement amplifier

The present invention relates to a liquid crystal display, and more particularly to a driving device, a driving device operating method and a self-determining voltage conversion rate enhancing amplifier applied to a liquid crystal display.

In recent years, as the technology related to image display has been continuously developed, various new types of display devices appearing on the market have gradually replaced the conventional cathode ray tube (CRT) display. Among them, liquid crystal display (LCD) has become a mainstream in the display market because it has the advantages of power saving and no space occupation, and is widely loved by ordinary consumers.

Generally, a driving circuit in a liquid crystal display includes a timing controller (TCON), a source driver, and a gate driver. The timing controller is a control IC for generating and outputting control timings for controlling timing of the source driver and the gate driver of the liquid crystal display panel.

Please refer to FIG. 1. FIG. 1 is a schematic diagram of a conventional source driver. As shown in FIG. 1, the source driver 1 includes first latches 10a and 10b, second latches 12a and 12b, electric shifters 14a and 14b, N-type digital analog converter 16a, and P-type analog conversion. The switch 16b, the exchange switch 18, the output buffers 19a and 19b, and the output contact pads 20a and 20b. After the timing controller (not shown) transmits the digital input data to the source driver 1, the digital input data is sequentially stored in the first latches 10a and 10b corresponding to the first channel and the second channel, respectively. When the STB signal is received, the digital input data will be stored to the second latches 12a and 12b, respectively. Then, the low-voltage digital input data will be converted into high-voltage digital input data by the electric displacement converters 14a and 14b, respectively, and the N-type digital analog converter 16a and the P-type digital analog converter 16b After the digital input data is converted into the analog input data, the analog voltage is selectively transmitted to the output buffer 19a or 19b by the switch switch 18, and the analog voltage is output to the display panel through the output contact pads 20a and 20b, respectively. Show) to drive the pixels on the display panel.

It should be noted that since the slew rate is defined as the amplitude of the voltage rise/fall in 1 microsecond, in the case of a square wave, the output voltage rises from the valley to the peak or from the peak to the valley. The length of conversion required depends on the output current and the magnitude of the output voltage between the peaks and valleys. Whenever the digital input data input from the timing controller to the source driver 1 is changed, the analog voltage output from the source driver 1 to the display panel is also correspondingly changed. Different output voltage differences cause the output conversion time to also be changed. different. This will result in inconsistent voltage conversion rates, which will affect the charging and discharging time of the panel pixels and limit the reaction time, which seriously affects the display quality of the display panel. Therefore, the above phenomenon needs to be improved.

Therefore, the present invention provides a driving device, a driving device operating method, and a self-determining voltage conversion rate enhancing amplifier applied to a liquid crystal display to solve the above problems.

A particular embodiment of the invention is a drive device. In this embodiment, the driving device is applied to a liquid crystal display. The driving device comprises at least a first latch, a second latch, an output buffer and a voltage conversion rate enhancement module. The first latch is configured to store a second data signal. The second latch is coupled to the first latch for storing a first data signal, wherein the first data signal is before the second data signal. The voltage conversion rate (slew rate) enhancement module is coupled to the first latch, the second latch, and the output buffer, respectively, for comparing the first data signal with the second data signal to generate a comparison result, and according to The comparison result correspondingly outputs a control signal to the output buffer to control the magnitude of the driving current of one of the output buffers.

In one embodiment, the voltage conversion rate enhancement module includes a comparison unit and an electrical displacement unit. The comparison unit has two inputs and one output. The two input terminals are respectively coupled to the first latch and the second latch and receive the first data signal and the second data signal. The comparing unit compares the first data signal with the second data signal to generate a comparison result and outputs it by the output terminal. The electric displacement unit is coupled to the output end of the comparison unit and the output buffer for converting the low voltage comparison result into a high voltage control signal and outputting to the output buffer.

In one embodiment, the comparison unit is an exclusive-OR gate (XOR gate).

In one embodiment, the electrical displacement converter is coupled to the second latch for converting the first data signal and the second data signal from a low voltage to a high voltage, respectively. The digital analog converter is coupled to the electric displacement converter for converting the first data signal and the second data signal from the digital voltage to the analog voltage, respectively.

In one embodiment, the digital analog converter is an N-type digital analog converter or a P-type digital analog converter for outputting a negative analog voltage or a positive analog voltage.

In an embodiment, the driving device further includes an exchange switch coupled between the digital analog converter and the output buffer to selectively transmit the negative analog voltage or the positive analog voltage output by the digital analog converter to Output buffer.

Another embodiment of the present invention is a method of operating a drive unit. In this embodiment, the driving device operating method is used to operate a driving device applied to a liquid crystal display. The driving device comprises at least a first latch, a second latch and an output buffer. The method includes the following steps: (a) storing a second data signal in the first latch; (b) storing a first data signal in the second latch, wherein the first data signal is in the second data signal (c) comparing the first data signal with the second data signal to generate a comparison result; (d) correspondingly outputting a control signal to the output buffer according to the comparison result to control the driving current of one of the output buffers .

Another embodiment in accordance with the present invention is a self-judgement slew rate enhancing amplifier. The self-determination voltage conversion rate enhancement amplifier is applied to a driving device of a liquid crystal display. The driving device comprises at least a first latch, a second latch and an output buffer. The self-determining voltage conversion rate enhancement amplifier includes two inputs, a comparison unit and an output. The two input terminals are respectively coupled to the first latch and the second latch and receive a first data signal and a second data signal from the first latch and the second latch respectively. The comparison unit is coupled to the two input ends for comparing the first data signal with the second data signal to generate a comparison result. The output end is coupled to the comparison unit for outputting the comparison result.

Compared with the prior art, the driving device, the driving device operating method and the self-determining voltage conversion rate enhancing amplifier according to the present invention are generated by comparing the current data and the previous data stored in the first latch and the second latch, respectively. The result is compared and the magnitude of the drive current of the output buffer is controlled correspondingly according to the comparison result. With proper design, the voltage conversion can be adjusted to the same speed in all different situations, so that the voltage slew rate of the source driver can be maintained to ensure the display quality of the display panel.

The advantages and spirit of the present invention will be further understood from the following detailed description of the invention.

A particular embodiment of the invention is a drive device. In this embodiment, the driving device may be a source driver applied to the liquid crystal display, but is not limited thereto. Please refer to FIG. 2. FIG. 2 is a functional block diagram of the driving apparatus of this embodiment.

As shown in FIG. 2, the driving device 3 includes first latches 30a and 30b, second latches 32a and 32b, electric shifters 34a and 34b, an N-type analog converter 36a, and a P-type analog converter. 36b, switching switch 38, output buffers 39a and 39b, output contact pads 40a and 40b, and voltage conversion rate enhancement modules E1 and E2. The voltage conversion rate enhancement module E1 includes a comparison unit C1 and an electrical displacement unit LS1. The voltage conversion rate enhancement module E2 includes a comparison unit C2 and an electrical displacement unit LS2. In fact, the comparison units C1 and C2 may be exclusive-OR gates (XOR gates), but are not limited thereto.

The first latch 30a, the second latch 32a, the electric displacement converter 34a, and the N-type digital analog converter 36a belong to a first channel; the first latch 30b and the second latch 32b, the electric displacement converter 34b and the P-type digital analog converter 36b belong to the second channel. Wherein, the first channel and the second channel are channels adjacent to each other.

The first latch 30a is coupled to the second latch 32a; the second latch 32a is coupled to the electrical displacement converter 34a; the electrical displacement converter 34a is coupled to the N-type digital analog converter 36a; the N-type digital analog converter 36a is coupled to the switch switch 38; the switch switch 38 is coupled to the output buffers 39a and 39b; and the output buffer 39a is coupled to the output contact pad 40a. The comparison unit C1 of the voltage conversion rate enhancement module E1 has two input terminals T1, T2 and an output terminal T3, wherein the two input terminals T1, T2 are respectively coupled to the first latch 30a and the second latch 32a, and the output The terminal T3 is coupled to the electric displacement to the unit LS1. The electric displacement unit LS1 is coupled to the output buffer 39a.

The first latch 30b is coupled to the second latch 32b; the second latch 32b is coupled to the electrical displacement converter 34b; the electrical displacement converter 34b is coupled to the P-type digital analog converter 36b; and the P-type digital analog converter 36b is coupled to the switch switch 38; the switch switch 38 is coupled to the output buffers 39a and 39b; and the output buffer 39b is coupled to the output contact pad 40b. The comparison unit C2 of the voltage conversion rate enhancement module E2 has two input terminals T4 and T5 and an output terminal T6. The two input terminals T4 and T5 are respectively coupled to the first latch 30b and the second latch 32b, and the output is output. The terminal T6 is coupled to the electric displacement unit LS2. The electric displacement unit LS2 is coupled to the output buffer 39b.

In this embodiment, after the timing controller (not shown) transmits the digital input data to the source driver 3, the digital input data is sequentially stored in the first lock corresponding to the first channel and the second channel, respectively. The registers 30a and 30b. When the STB signal is received, the digital input data will be stored to the second latches 32a and 32b, respectively. Then, the low-voltage digital input data will be converted into high-voltage digital input data by the electric displacement converters 34a and 34b, respectively, and the N-type digital analog converter 36a and the P-type digital analog converter 36b respectively After the digital input data (voltage) is converted into analog input data (voltage), the analog voltage is selectively transmitted from the switch switch 38 to the output buffer 39a or 39b, respectively, and the analog voltage is transmitted through the output contact pads 40a and 40b, respectively. Output to the display panel (not shown) to drive the pixels on the display panel.

It is assumed that the data signals stored in the first latch 30a and the second latch 32a corresponding to the first channel are the first data signal and the second data signal, respectively, and the first data signal is before the second data signal. That is to say, if the second data signal is the current data, the first data signal is the previous data signal.

It should be noted that the two input terminals T1 and T2 of the comparison unit C1 of the voltage conversion rate increasing module E1 will receive the first data signal and the second data signal from the first latch 30a and the second latch 32a, respectively. After that, the comparison unit C1 compares the first data signal with the second data signal to generate a comparison result CR1, and the output terminal T3 outputs the comparison result CR1 to the electric displacement unit LS1. In fact, the comparison unit C1 can subtract the first data signal from the second data signal to obtain the comparison result CR1, but is not limited thereto.

For example, if the first data signal (previous data signal) stored in the first latch 30a is 0000_0000 and the second data signal (current data signal) stored in the second latch 32a is 1111_0000, the comparison unit C1 After subtracting the first data signal (previous data signal) from the second data signal (current data signal), the comparison result CR1 of 1111_0000 is obtained.

When the electric displacement unit LS1 receives the comparison result CR1 from the comparison unit C1, the electric displacement unit LS1 converts the low voltage comparison result CR1 to the high voltage control signal CS1, and outputs the control signal CS1 to The output buffer 39a controls the magnitude of the drive current of the output buffer 39a. For example, if the comparison result CR1 is 0, it means that the second data signal (current data signal) is consistent with the first data signal (previous data signal), so it is not necessary to increase or decrease the driving current of the output buffer 39a. The voltage conversion rate is kept consistent.

Similarly, it is assumed that the data signals stored in the first latch 30b and the second latch 32b corresponding to the second channel are the third data signal and the fourth data signal, respectively, and the third data signal is in the fourth data. Before the signal, that is, if the fourth data signal is the current data, the third data signal is the previous data signal. The two input terminals T4 and T5 of the comparison unit C2 of the voltage conversion rate enhancement module E2 will receive the third data signal and the fourth data signal from the first latch 30b and the second latch 32b, respectively, by the comparison unit. C2 compares the third data signal with the fourth data signal to generate a comparison result CR2, and outputs the comparison result CR2 to the electric displacement to the unit LS2 by the output terminal T6. In fact, the comparison unit C2 can subtract the third data signal from the fourth data signal to obtain the comparison result CR2, but is not limited thereto. After the electric displacement unit LS2 receives the comparison result CR2 from the comparison unit C2, the electric displacement unit LS2 converts the low voltage comparison result CR2 into the high voltage control signal CS2, and outputs the control signal CS2 to The output buffer 39b controls the magnitude of the drive current of the output buffer 39b.

Please refer to FIG. 3. FIG. 3 illustrates an embodiment of a voltage conversion rate enhancement circuit. As shown in FIG. 3, the voltage conversion rate enhancement circuit includes P-type transistor switches MP1 to MP10, N-type transistor switches MN1 to MN10, input terminals INN, INP, and an output terminal OUT. After the compared voltage signal is input to the voltage conversion rate increasing circuit, the voltage conversion rate increasing circuit controls the magnitude of the driving current according to the corresponding voltage signal to increase the voltage conversion rate. When the output voltage is large between the peak and the valley, the voltage conversion rate enhancement circuit can reduce the conversion time required for the output voltage to rise from the valley to the peak or from the peak to the valley. The conversion rate can be consistent under different conditions without fluctuations.

Another embodiment in accordance with the present invention is a self-judgement slew rate enhancing amplifier. In this embodiment, the self-determination voltage conversion rate enhancement amplifier is applied to a driving device of a liquid crystal display. The driving device comprises at least a first latch, a second latch and an output buffer. The self-determining voltage conversion rate enhancement amplifier includes two inputs, a comparison unit and an output. The two input terminals are respectively coupled to the first latch and the second latch and receive a first data signal and a second data signal from the first latch and the second latch respectively. The comparison unit is coupled to the two input ends for comparing the first data signal with the second data signal to generate a comparison result. The output end is coupled to the comparison unit for outputting the comparison result. Since the self-determination voltage conversion rate enhancement amplifier of this embodiment has been described in detail in the foregoing embodiments, it will not be further described herein.

Another embodiment of the present invention is a method of operating a drive unit. In this embodiment, the driving device operating method is used to operate a driving device applied to a liquid crystal display. The driving device comprises at least a first latch, a second latch and an output buffer. Please refer to FIG. 4. FIG. 4 is a flow chart showing the operation method of the driving device of this embodiment.

As shown in FIG. 4, in step S10, the method stores a second data signal in the first latch. In step S12, the method stores a first data signal in the second latch, wherein the first data signal is before the second data signal. In step S14, the method converts the first data signal from a low voltage to a high voltage. In step S16, the method converts the first data signal from a digital voltage to an analog voltage (which may be a negative analog voltage or a positive analog voltage). In step S18, the method selectively transmits a negative analog voltage or a positive analog voltage to the output buffer. In fact, step S14 also converts the second data signal from a low voltage to a high voltage. Step S16 also converts the second data signal from a digital voltage to an analog voltage (which may be a negative analog voltage or a positive analog voltage).

In step S20, the method compares the first data signal with the second data signal to generate a comparison result. In step S22, the method correspondingly outputs a control signal to the output buffer according to the comparison result to control the magnitude of the driving current of one of the output buffers. In fact, step S22 converts the low voltage comparison result into a high voltage control signal and outputs it to the output buffer.

Compared with the prior art, the driving device, the driving device operating method and the self-determining voltage conversion rate enhancing amplifier according to the present invention are generated by comparing the current data and the previous data stored in the first latch and the second latch, respectively. The result is compared and the magnitude of the drive current of the output buffer is controlled correspondingly according to the comparison result. With proper design, the voltage conversion can be adjusted to the same speed in all different situations, so that the voltage conversion rate of the source driver can be maintained to ensure the display quality of the display panel.

The features and spirit of the present invention will be more apparent from the detailed description of the preferred embodiments. On the contrary, the intention is to cover various modifications and equivalents within the scope of the invention as claimed.

S10~S22. . . Process step

1. . . Source driver

10a, 10b, 30a, 30b. . . First latch

3. . . Drive unit

12a, 12b, 32a, 32b. . . Second latch

14a, 14b, 34a, 34b. . . Electric displacement converter

16a, 36a. . . N-type digital analog converter

16b, 36b. . . P-type digital analog converter

18, 38. . . Switch switcher

19a, 19b, 39a, 39b. . . Output buffer

20a, 20b, 40a, 40b. . . Output contact pad

E1, E2. . . Voltage conversion rate enhancement module

C1, C2. . . Comparison unit

LS1, LS2. . . Electric displacement unit

T1, T2, T4, T5. . . Input

T3, T6. . . Output

CR1, CR2. . . Comparing results

CS1, CS2. . . Control signal

MP1~MP10. . . P type transistor switch

MN1~MN10. . . N type transistor switch

INN, INP. . . Input

OUT. . . Output

FIG. 1 is a schematic diagram showing a conventional source driver.

2 is a functional block diagram of a driving device in accordance with an embodiment of the present invention.

FIG. 3 illustrates an embodiment of a voltage conversion rate enhancement circuit.

4 is a flow chart showing a method of operating a driving device in accordance with another embodiment of the present invention.

3. . . Drive unit

30a, 30b. . . First latch

32a, 32b. . . Second latch

34a, 34b. . . Electric displacement converter

36a. . . N-type digital analog converter

36b. . . P-type digital analog converter

38. . . Switch switcher

39a, 39b. . . Output buffer

40a, 40b. . . Output contact pad

E1, E2. . . Voltage conversion rate enhancement module

C1, C2. . . Comparison unit

LS1, LS2. . . Electric displacement unit

T1, T2, T4, T5. . . Input

T3, T6. . . Output

CR1, CR2. . . Comparing results

CS1, CS2. . . Control signal

Claims (14)

A driving device is applied to a liquid crystal display, the driving device includes at least: a first latch for storing a second data signal; a second latch coupled to the first latch, Storing a first data signal, wherein the first data signal is before the second data signal; an output buffer; and a voltage slew rate enhancement module coupled to the first latch The second latch and the output buffer are configured to compare the first data signal with the second data signal to generate a comparison result, and correspondingly output a control signal to the output buffer according to the comparison result. To control the magnitude of the drive current of one of the output buffers. The driving device of claim 1, wherein the voltage conversion rate enhancement module comprises: a comparison unit having two input ends and an output end, wherein the two input terminals are respectively coupled to the first latch and The second latch receives the first data signal and the second data signal, and the comparing unit compares the first data signal with the second data signal to generate the comparison result and outputs the output end; and an electric The output of the comparison unit and the output buffer are configured to convert the comparison result of the low voltage to the high voltage control signal and output the control signal to the output buffer. The driving device of claim 2, wherein the comparing unit is an exclusive-OR gate (XOR gate). The driving device of claim 1, further comprising: an electric displacement switch coupled to the second latch for respectively converting the first data signal and the second data signal from a low voltage And a digital analog converter coupled to the electrical displacement converter for respectively converting the first data signal and the second data signal from a digital voltage to an analog voltage. The driving device of claim 4, wherein the digital analog converter is an N-type digital analog converter or a P-type digital analog converter for outputting a negative analog voltage or a positive analog voltage. The driving device of claim 5, further comprising: an exchange switch coupled between the digital analog converter and the output buffer for selectively outputting the digital analog converter The negative analog voltage or the positive analog voltage is delivered to the output buffer. A driving device operating method for operating a driving device applied to a liquid crystal display, the driving device comprising at least a first latch, a second latch and an output buffer, the method comprising at least the following steps (a) storing a second data signal in the first latch; (b) storing a first data signal in the second latch, wherein the first data signal is before the second data signal; (c) comparing the first data signal with the second data signal to generate a comparison result; and (d) correspondingly outputting a control signal to the output buffer according to the comparison result to control one of the output buffers The magnitude of the drive current. The driving device operating method according to claim 7, wherein the step (d) converts the comparison result of the low voltage to the high voltage control signal and outputs the control signal to the output buffer. The method for operating a driving device according to claim 7, further comprising the steps of: (e) converting the first data signal and the second data signal from a low voltage to a high voltage; and (f) respectively The first data signal and the second data signal are converted from a digital voltage to an analog voltage. The driving device operating method according to claim 9, wherein the step (f) outputs a negative analog voltage or a positive analog voltage. The method of operating a driving device according to claim 10, further comprising the step of: (g) selectively transmitting the negative analog voltage or the positive analog voltage outputted in the step (f) to the output buffer. A self-judgement slew rate enhancing amplifier is applied to a driving device of a liquid crystal display, and the driving device comprises at least a first latch, a second latch and a An output buffer, the self-determination voltage conversion rate enhancement amplifier includes: two input ends respectively coupled to the first latch and the second latch and respectively from the first latch and the second latch Receiving a first data signal and a second data signal; a comparison unit coupled to the two input terminals for comparing the first data signal with the second data signal to generate a comparison result; and an output terminal coupled The comparison unit is connected to output the comparison result. The self-determination voltage conversion rate enhancement amplifier according to claim 12, wherein the driving device further comprises an electric displacement unit, wherein the electric displacement unit is coupled to the output end and the output buffer for lowering The comparison result of the voltage is correspondingly converted into the high voltage control signal and output to the output buffer. The self-determination voltage conversion rate enhancement amplifier according to claim 12, wherein the comparison unit is an exclusive-OR gate (XOR gate).