SU397942A1 - - Google Patents

Description

FUNCTIONAL CONVERTER OF FREQUENCY IN CODE

one

The invention relates to measuring and computing. The converter can be used as a stand-alone device for obtaining a digital code, proportional to the square of the input frequency, and as a functional converter when entering information from frequency sensors into a digital computer.

Functional frequency converters to code are known that contain a pulse counter, a reference frequency generator, AND gates, a control trigger, and a code rewriting circuit.

The proposed device differs from the known ones in that it contains an adder and a delay element, the input of which is connected to the input of the converter and to the first inputs of the two AND logic gates, the second inputs of which are connected respectively to the zero and single outputs of the control trigger. The output of the first " AND " logic element is connected to a single installation input of a control trigger, a zero installation clock of which is connected to the output of the reference frequency generator and the bus for setting the pulse counter to zero. The counter input is connected to the output of the second AND gate, and the bit outputs are connected to potential inputs of a code rewrite circuit, one of the potential inputs of which is connected to a single control trigger output, a pulse input to the output of the delayer element, and the circuit outputs to the totalizer inputs.

Such a construction of the device allows to increase its speed.

The block diagram of the device shown in the drawing.

0 The device contains logic elements AND (pulse potential coincidence circuits) 1, 2, pulse counter 3, code rewriting circuit 4, reference frequency generator 5, adder 6, control trigger 7, element

5 delays 8.

The input frequency bus is connected to the input of the delay element 8 and to the pulse inputs of the matching circuits 1, 2. The potential input of the latter is connected to the zero output.

0 control trigger 7, in which a single setup input is connected to the output of this coincidence circuit. The zero installation input of the trigger 7 is connected to the output of the reference frequency generator 5 and the installation bus

5 to zero of the pulse counter 3, whose input is connected to the output of the coincidence circuit 1. The outputs of the trigger counter of the pulse counter 3 are connected to the potential inputs of the code 4 census scheme, one of the potential inputs of which is connected to the single output of the control trigger and the potential input of the coincidence circuit 1 In addition, the pulse input of the code census circuit is connected to the output of delay element 8, and the outputs of the code transfer circuit are connected to the inputs of the adder 6. With the arrival of the first pulse of the input frequency / X iB time interval, the trigger is systematic way goes into a single state, thereby permitting the passage of pulses of the input frequency of the input pulse counter 3 and smoking - to the input of the control latch. Thus, the codes of the pulse counter and the control trigger (the code of which is transferred to the low-order bit of the adder) after the arrival of the first pulse are equal to one, after the arrival of the second pulse - three, after the arrival of the third pulse - five, and so on. pulse code takes the value of 2n-1. It is known that the square of any number n can be represented as follows: 1 + 3 + 5 + ... + (2 / g-3) + (2n-1). That is, in order to obtain a code proportional to the square of the frequency, it is necessary for each input frequency pulse delayed by the time required for the transient to end in the counter, to enter the control trigger and pulse counter code into the adder. Then at the end of the period T0, the number 2- {To-fx) - 1 appears in the pulse counter and the control trigger, and in the adder - dd - / 7 f g J5 Y - V 01 x} - f2 / LP. Invention Functionalizer frequencies into a code containing a pulse counter, a reference frequency generator, logical gates, a control trigger, and a code rewriting scheme, characterized in that, in order to improve speed, it contains an adder and a delay element whose input is connected to the converter input and to the first inputs of two logical elements "And, the second inputs which are connected respectively to the zero and single outputs of the control trigger, the output of the first logic element I is connected to the single-set control trigger input, the zero-setting input of which is connected to the output of the reference frequency generator and the zero pulse counter which input is connected to the output the second logic element "And, and the bit outputs of the counter are connected to the potential inputs of the code census scheme, one of the potential inputs of which is connected to the single output trigger The control circuit, the pulse input of the code census circuit is connected to the output of the delay element, and the circuit outputs are connected to the inputs of the adder.