SU496570A1 - Integrator - Google Patents

Description

(54) INTEGRATOR

The invention relates to automation and computing and can be applied in specialized computing devices for processing chromatographic analysis data. A known integrator contains pulse counters, a control trigger, logic gates AND and OR, an input signal sensor connected via the first voltage-frequency converter to the first input of the first element AND, a correction signal sensor connected via the second voltage-frequency converter to the first input the second element And, the second inputs of both elements And connected to the outputs of the level selector, the inputs of which are connected to the inputs of the sensors. The circuit of the invention is to improve speed to simplify the device. This goal is achieved by the fact that two devices are introduced into the known device: a single-oscillator, the input of one of which is: one with the output of the first voltage-frequency converter j and i is the same input of the second output element, J output output through the second one-shot the first input} element OR, connected by the second BXOAoit with the output of the second converter, eg nf-: n-frequency, with the output of the first one-vibrator and the output of the element OR connected; With the corresponding trigger inputs up; control, connected to the output of the third input of the first element I, the output of which is connected to the input of the counter .; The drawing shows a block diagram of the integrator. The integrator contains an input signal sensor 1 and a sensor for the correction signal of the well-i left line 2, the outputs of which are connected to the inputs of voltage-to converters; frequency 3 and 4, the outputs of the converters: and 4 are connected to the input of the element And 5, which is connected to the input of one-shot. p. 6, the output of the one-shot b is connected to. the first input of the element OR 7, the second | input of which is connected, to the output of the converter 4. The output of the element OR 7; Connected to the single input of the control trigger 8, connected by a single output - I to the input of the element AND 9. The output of the element And 9 is connected to the input of the counter pulses 10. Zero input of the trigger 8 through the one-shot 11 to the output of the converter 3 and the input of the element And 9.

The outputs of the level selector 12, connected to the inputs to sensors 1 and 2, are connected to the inputs of the elements 5 and 9,

The integrator works as follows. In the initial state, the counter 1 is reset,. The trigger 8 is in a single 10 state, allowing the passage of pulses from the output of the converter 3 to the input of the counter 10 through the element 9.

The level selector 12 (threshold device iCTBo) at the moment when the function exceeds a certain set value allows the arrival of pulses from the outputs of converters 3 and 4, respectively, to the input of counter 1O and one-shot input 6,

When a signal appears at the output of sensor 2 sig-20 to correct the zero line of the pulse integrator from the output of converter 4, through the element OR 7 it flips the trigger 8 into | zero state, prohibiting the passage of i pulses to the input of counter 10. The return of trigger 25 to the initial state can only occur from a pulse from the output of converter 3, since the input signal is always greater than or equal to the value of the correction signal.30

The impulse, actions from the output of the converter, 3 after the flip-flop of the trigger 8 by the pulse from the output of the converter 4, returns the trigger 8 to its initial state with some delay (due to the one-shot 11), thereby again allowing the impulses from the output of the converter 9 at the input I of the counter 1O. Thus, the number of pulses arrives at the input of the counter U, which is the portional area of the integrable function i, but with allowance for the correction, that is, the true value of the integral of the continuous function. ;

At coincidence in time the pulse with i outputs of converters 3 and 4 is moment; matches are highlighted by elements And 5, a. Then, a single vibrator 6 (the delay time of which is longer than the delay time of the single vibrator 11) generates a pulse which, through the OR element 7, fixes the trigger 8 in the zero state, ensuring the elimination of random failures in its operation. The delay time of one-shot 6, 11 is chosen to be less than the minimum pulse-following period at the output of converter 3.

Claims (1)

Invention Formula An integrator containing a pulse counter, a control trigger, logic gates AND and OR, an input signal sensor connected via the first voltage-frequency converter to the first input of the first AND element, a correction signal sensor connected through the second voltage-frequency converter to the first the input of the second element And, and the second inputs of both elements And connected to the outputs of the level selector, the inputs of which are connected to the inputs of the sensors, characterized in that, in order to improve speed and simplify the device, Two single-oscillators are additionally introduced into it, the input of one of which is connected to the output of the first voltage-frequency converter and the third input of the second element I, below. The output via the second one-vibrator to the first input of the OR element connected by the second input to the output of the second voltage-frequency converter, the output of the first single-vibration and the output of the OR element connected to the corresponding control trigger inputs connected to the third input of the first element AND, the output which is connected to the input of the counter.