SU1442927A1 - Digital periodometer - Google Patents

Description

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This invention relates to a measurement technique and is intended to measure a period.

The purpose of the invention is to increase the interference.

FIG. 1 shows a block diagram of a digital periodoner 5 in FIG. 2 - time diagrams illustrating his work.

The digital periodometer (Fig. 1) contains a source of voltage reference 1, a level 2 comparator, an integrator 3 with a reset input 4, a level 5 comparator, triggers 6-8, a generator of 9 reference frequency pulses, -key 10 and 11, a result counter 12, .

In the device, its input is connected to the input of the integrator 3 and the second input of the comparator 2, the first input of which is connected to the output of the source 1 of the reference voltage, and the output is connected to the first input of the first trigger 6, the output of the integrator 3 is connected to the second input trigger b, the output of which is connected to control input 4 of the reset. The counting inputs of the trigger 7 and 8 are connected respectively to the direct and inverse outputs of the trigger 6, and the outputs of the trigger 7 and 8 are connected to control the inputs of the keys Yu and 11 connected between the outputs of the reference frequency generator 9 and the counter input 12 of the result,

Qi4) the periodometer operates in the following way.

In the initial state, the voltage at the output of the integrator 3 is equal to zero at the output of the comparator 5 rf low level. The reference voltage source 1 generates a voltage U ,, a level 2 comparator at the moments of transition of the signal U through the level Ho generates square pulses (Fig. 26). At the time t, the output signal of the level 2 comparator tilts trigger 6, integration of the signal under study V (Fig. 2c). At time t1, the voltage at the output of the level 5 comparator takes a high level (Fig. 2d). Integration ceases at time tj. When integrator 3 returns to its original state, and trigger 6, which is controlled by the level 5 comparator, also returns to its original state. In-time moment t occurs

the next tilting stage1) The start of trigger 6 according to the signal from the comparator 2 level, the next cycle of operation of the integrator will begin, which ends at time t. At the outputs of the flip-flops 7 and B, controlled by the antiphase outputs of the flip-flop 6, rectangular pulses are formed (Fig. 2e, e) shifted along the fronts relative to each other by integration intervals. A weighting function determining the pulse frequency of the result counter at various times.

time interval

tf t, represented in FIG. 2j, it is formed using triggers 7 and 8 and keys 10 and 11.

The reference frequency generator 9 generates at both outputs pulses of frequency ffl, and the sequence at the second output is shifted relative to the sequence at the first output by half a period of the next

Dovani L

2f,

As a result,

one closed key, the filling frequency is equal to fg 5 with two 2fo "During the conversion time (time interval t - t,). the N code is entered into the counter.

N „(f ,, - f,) 4-2fo (t - tj) +

fo (te - t)

or

N 2fo (t 3- t) - 2fo (t 4 tj) + + 2fo (tc - 14) 2fo (ts - t

 2fo-T,

In the proposed periodometer due to integration, the interference, the average value of which during the time integrated I is zero, is not. change the duration of the intervals t - - t to te - t, i.e. there is an exception to the effect of such interference on the measurement result.

The device has a conversion time (1.2-1.5) T.

Claims (1)

Invention Formula A digital periodometer containing a series-connected reference voltage source, a first level comparator, and a first trigger connected in series relfiepaTop the reference frequency pulses, the first key and the result counter, the second input of the first level comparator is connected to the digital periodometer input, characterized in that, in order to increase the noise immunity, an integrator, a second level comparator, two triggers and a second key, the input of the integrator are entered into it connected to the second input of the first comparator, the integrator output through the second level comparator connected to the second input of the first but C.  t. G,. and  l "I and F J t, t3 which is connected to the integrator and from the trigger, output with a control input the first key, the inverse output of the first trigger is connected to the input of the third trigger, the output of which is connected to the control input of the second key, the output of which is connected to the input of the result counter, the second output of the reference frequency generator, is connected to the input of the second key. h -.t i4 €