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SG11201705180VA - Data reading method and apparatus - Google Patents

Data reading method and apparatus

Info

Publication number
SG11201705180VA
SG11201705180VA SG11201705180VA SG11201705180VA SG11201705180VA SG 11201705180V A SG11201705180V A SG 11201705180VA SG 11201705180V A SG11201705180V A SG 11201705180VA SG 11201705180V A SG11201705180V A SG 11201705180VA SG 11201705180V A SG11201705180V A SG 11201705180VA
Authority
SG
Singapore
Prior art keywords
data reading
reading method
data
reading
Prior art date
Application number
SG11201705180VA
Other languages
English (en)
Inventor
Jianhua Zhou
Yan Li
Po Zhang
Fei Wang
Original Assignee
Huawei Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Tech Co Ltd filed Critical Huawei Tech Co Ltd
Publication of SG11201705180VA publication Critical patent/SG11201705180VA/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1032Reliability improvement, data loss prevention, degraded operation etc
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25Using a specific main memory architecture
    • G06F2212/251Local memory within processor subsystem
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60Details of cache memory
    • G06F2212/602Details relating to cache prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7203Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
SG11201705180VA 2014-12-24 2015-12-16 Data reading method and apparatus SG11201705180VA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410817949.0A CN104503707B (zh) 2014-12-24 2014-12-24 读取数据的方法以及装置
PCT/CN2015/097586 WO2016101828A1 (fr) 2014-12-24 2015-12-16 Procédé et dispositif de lecture de données

Publications (1)

Publication Number Publication Date
SG11201705180VA true SG11201705180VA (en) 2017-07-28

Family

ID=52945108

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201705180VA SG11201705180VA (en) 2014-12-24 2015-12-16 Data reading method and apparatus

Country Status (8)

Country Link
US (1) US10261906B2 (fr)
EP (2) EP3229126B1 (fr)
JP (1) JP6399720B2 (fr)
CN (1) CN104503707B (fr)
AU (1) AU2015371849B2 (fr)
CA (1) CA2971913C (fr)
SG (1) SG11201705180VA (fr)
WO (1) WO2016101828A1 (fr)

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CN107807786B (zh) * 2016-09-08 2021-09-07 宏碁股份有限公司 存储装置及其资料映射方法
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CN107247636B (zh) * 2017-06-06 2020-05-26 苏州浪潮智能科技有限公司 一种固态硬盘中数据重建优化的方法及装置
CN107707628B (zh) * 2017-09-06 2020-06-02 华为技术有限公司 用于传输数据处理请求的方法和装置
CN109558386A (zh) * 2018-11-26 2019-04-02 北京微播视界科技有限公司 一种客户端数据的缓存方法、装置、设备和介质
CN109739570B (zh) * 2018-12-24 2022-04-08 新华三技术有限公司 一种数据读取方法、服务器控制设备、服务器及计算机可读存储介质
CN109947469B (zh) * 2019-03-08 2021-09-17 广州安加互联科技有限公司 地址划分方法、装置及计算机可读存储介质
CN112289352B (zh) * 2019-07-25 2023-10-03 上海磁宇信息科技有限公司 具有ecc功能的mram系统及其操作方法
CN110569329B (zh) * 2019-10-28 2022-08-02 深圳市商汤科技有限公司 数据处理方法及装置、电子设备和存储介质
CN111506261B (zh) * 2020-03-24 2024-05-03 平安国际智慧城市科技股份有限公司 基于双缓存区的缓存方法、装置、设备及存储介质
CN111522506B (zh) * 2020-04-03 2022-08-02 杭州迪普信息技术有限公司 一种数据读取的方法及装置
CN113496745B (zh) * 2020-04-03 2024-03-08 澜起科技股份有限公司 用于修复存储模块缺陷的装置和方法以及存储器系统
CN111459893B (zh) * 2020-04-03 2023-08-22 北京字节跳动网络技术有限公司 文件处理方法、装置和电子设备
CN112559387B (zh) * 2020-12-23 2023-05-02 湖南国科微电子股份有限公司 一种读请求处理方法、装置、设备及介质
CN112783802B (zh) * 2021-01-29 2022-11-01 山东华芯半导体有限公司 一种ssd中优化读干扰处理的方法
CN115509828A (zh) * 2021-06-22 2022-12-23 华为技术有限公司 一种数据处理方法及相关装置
CN113342697B (zh) * 2021-07-19 2022-08-26 英韧科技(上海)有限公司 闪存转换层仿真测试系统及方法
CN114063917B (zh) * 2021-11-11 2024-01-30 天津兆讯电子技术有限公司 快速读取程序数据的方法和微控制器

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CN104503707B (zh) * 2014-12-24 2018-03-06 华为技术有限公司 读取数据的方法以及装置

Also Published As

Publication number Publication date
EP3229126B1 (fr) 2019-02-20
EP3229126A1 (fr) 2017-10-11
CN104503707B (zh) 2018-03-06
EP3584706B1 (fr) 2021-11-10
WO2016101828A1 (fr) 2016-06-30
JP2018506109A (ja) 2018-03-01
CN104503707A (zh) 2015-04-08
US10261906B2 (en) 2019-04-16
CA2971913C (fr) 2019-04-23
JP6399720B2 (ja) 2018-10-03
EP3229126A4 (fr) 2017-11-29
EP3584706A1 (fr) 2019-12-25
CA2971913A1 (fr) 2016-06-30
AU2015371849A1 (en) 2017-07-27
US20170286306A1 (en) 2017-10-05
AU2015371849B2 (en) 2018-11-29

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