SE9203016D0 - Signalbehandlingssystem med delat dataminne - Google Patents
Signalbehandlingssystem med delat dataminneInfo
- Publication number
- SE9203016D0 SE9203016D0 SE9203016A SE9203016A SE9203016D0 SE 9203016 D0 SE9203016 D0 SE 9203016D0 SE 9203016 A SE9203016 A SE 9203016A SE 9203016 A SE9203016 A SE 9203016A SE 9203016 D0 SE9203016 D0 SE 9203016D0
- Authority
- SE
- Sweden
- Prior art keywords
- processing system
- signal processing
- control processor
- bus
- delated
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
- G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
- G06F13/1663—Access to shared memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Software Systems (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Information Transfer Systems (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9203016A SE9203016L (sv) | 1992-10-14 | 1992-10-14 | Signalbehandlingssystem med delat dataminne |
EP93923104A EP0616710A1 (en) | 1992-10-14 | 1993-10-14 | Signal handling system with a shared data memory |
PCT/SE1993/000840 WO1994009437A1 (en) | 1992-10-14 | 1993-10-14 | Signal handling system with a shared data memory |
AU52900/93A AU5290093A (en) | 1992-10-14 | 1993-10-14 | Signal handling system with a shared data memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9203016A SE9203016L (sv) | 1992-10-14 | 1992-10-14 | Signalbehandlingssystem med delat dataminne |
Publications (2)
Publication Number | Publication Date |
---|---|
SE9203016D0 true SE9203016D0 (sv) | 1992-10-14 |
SE9203016L SE9203016L (sv) | 1994-04-15 |
Family
ID=20387474
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9203016A SE9203016L (sv) | 1992-10-14 | 1992-10-14 | Signalbehandlingssystem med delat dataminne |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0616710A1 (sv) |
AU (1) | AU5290093A (sv) |
SE (1) | SE9203016L (sv) |
WO (1) | WO1994009437A1 (sv) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2283596B (en) * | 1993-11-01 | 1998-07-01 | Ericsson Ge Mobile Communicat | Multiprocessor data memory sharing |
GB9418753D0 (en) * | 1994-09-16 | 1994-11-02 | Ionica L3 Limited | Process circuitry |
US6691216B2 (en) * | 2000-11-08 | 2004-02-10 | Texas Instruments Incorporated | Shared program memory for use in multicore DSP devices |
GB0031763D0 (en) * | 2000-12-29 | 2001-02-07 | Mitel Semiconductor Ltd | Arbiter for a queue management system |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2462745B1 (fr) * | 1979-07-30 | 1986-01-03 | Jeumont Schneider | Dispositif de partage temporel de l'acces a une memoire connectee a un bus unique entre un calculateur central et une pluralite de calculateurs peripheriques |
JPS56140459A (en) * | 1980-04-04 | 1981-11-02 | Hitachi Ltd | Data processing system |
US4504906A (en) * | 1982-11-30 | 1985-03-12 | Anritsu Electric Company Limited | Multiprocessor system |
US5067071A (en) * | 1985-02-27 | 1991-11-19 | Encore Computer Corporation | Multiprocessor computer system employing a plurality of tightly coupled processors with interrupt vector bus |
-
1992
- 1992-10-14 SE SE9203016A patent/SE9203016L/sv not_active Application Discontinuation
-
1993
- 1993-10-14 EP EP93923104A patent/EP0616710A1/en not_active Withdrawn
- 1993-10-14 AU AU52900/93A patent/AU5290093A/en not_active Abandoned
- 1993-10-14 WO PCT/SE1993/000840 patent/WO1994009437A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
SE9203016L (sv) | 1994-04-15 |
AU5290093A (en) | 1994-05-09 |
EP0616710A1 (en) | 1994-09-28 |
WO1994009437A1 (en) | 1994-04-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NAV | Patent application has lapsed |
Ref document number: 9203016-2 |