RU2644627C2 - Manufacturing method of semiconductor structure - Google Patents
Manufacturing method of semiconductor structure Download PDFInfo
- Publication number
- RU2644627C2 RU2644627C2 RU2016106484A RU2016106484A RU2644627C2 RU 2644627 C2 RU2644627 C2 RU 2644627C2 RU 2016106484 A RU2016106484 A RU 2016106484A RU 2016106484 A RU2016106484 A RU 2016106484A RU 2644627 C2 RU2644627 C2 RU 2644627C2
- Authority
- RU
- Russia
- Prior art keywords
- semiconductor structure
- manufacturing
- sicl
- temperature
- silicon
- Prior art date
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000000034 method Methods 0.000 claims abstract description 10
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 9
- 239000010703 silicon Substances 0.000 claims abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 5
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 5
- 239000001257 hydrogen Substances 0.000 claims abstract description 5
- 229910003902 SiCl 4 Inorganic materials 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 2
- 229910003910 SiCl4 Inorganic materials 0.000 abstract 1
- 230000005611 electricity Effects 0.000 abstract 1
- FDNAPBUWERUEDA-UHFFFAOYSA-N silicon tetrachloride Chemical compound Cl[Si](Cl)(Cl)Cl FDNAPBUWERUEDA-UHFFFAOYSA-N 0.000 abstract 1
- 239000000126 substance Substances 0.000 abstract 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- -1 silicon ions Chemical class 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
Abstract
Description
Изобретение относится к области технологии производства полупроводниковых приборов, в частности к технологии изготовления полупроводниковых структур с пониженной дефектностью.The invention relates to the field of production technology of semiconductor devices, in particular to a technology for manufacturing semiconductor structures with reduced defectiveness.
Известен способ формирования пленки полупроводникового материала [Пат. 5290712 США МКИ H01L 21/20] с большими размерами зерен и контролируемым положением их границ. Для этого поликремниевую пленку кремния Si* наносят на подложку из диоксида кремния SiO2 и путем имплантации ионов кремния Si+ превращают Si* - слой в аморфную по всей поверхности, за исключением небольших областей. Последующая термообработка при температуре, не превышающей точку плавления аморфного кремния, приводит к возникновению центров кристаллизации в этих небольших областях, где и происходит фазовый переход с образованием кристаллического кремния. В таких структурах из-за сильной разупорядоченности структур образуются дефекты, ухудшающие параметры пленок.A known method of forming a film of a semiconductor material [US Pat. 5290712 USA MKI H01L 21/20] with large grain sizes and a controlled position of their boundaries. To do this, a polysilicon silicon film Si * is deposited on a silicon dioxide SiO 2 substrate and, by implanting silicon ions Si +, the Si * layer is transformed into an amorphous layer over the entire surface, except for small areas. Subsequent heat treatment at a temperature not exceeding the melting point of amorphous silicon leads to the appearance of crystallization centers in these small regions, where a phase transition occurs with the formation of crystalline silicon. In such structures, due to the strong disordering of the structures, defects are formed that worsen the parameters of the films.
Известен способ выращивания пленок, содержащих кремний [Пат. 5284789 США МКИ H01L 21/00] в технологии транзисторов. Подложки загружают в реактор на держателе с электронагревом, выполняют откачку, подают соответствующие рабочие газы и проводят осаждение при температуре подложки 230-270°С и плотности ВЧ - мощности 60-100 мВт/см2.A known method of growing films containing silicon [US Pat. 5284789 USA MKI H01L 21/00] in transistor technology. The substrates are loaded into the reactor on an electrically heated holder, pumped out, the corresponding working gases are supplied, and deposition is carried out at a substrate temperature of 230-270 ° C and an RF density of 60-100 mW / cm 2 .
Недостатками способа являются:The disadvantages of the method are:
- высокая дефектность;- high defectiveness;
- низкая технологичность;- low manufacturability;
- высокие значения токов утечек.- high leakage currents.
Задача, решаемая изобретением: снижение дефектности, обеспечение технологичности, улучшение параметров, повышение надежности и увеличение процента выхода годных.The problem solved by the invention: reducing defects, ensuring manufacturability, improving parameters, improving reliability and increasing the percentage of yield.
Задача решается выращиванием эпитаксиального слоя кремния в процессе водородного восстановления SiCl4, со скоростью 0,7 мкм/мин, при температуре 1200°С с последующим легированием Ge до концентрации 1020-1021 см-3.The problem is solved by growing an epitaxial silicon layer in the process of hydrogen reduction of SiCl 4 , at a speed of 0.7 μm / min, at a temperature of 1200 ° C, followed by doping of Ge to a concentration of 10 20 -10 21 cm -3 .
Технология способа состоит в следующем: на кремниевой подложке n-типа проводимости выращивали, осаждением из паровой фазы в процессе водородного восстановления SiCl4, слой кремния. Мольная доля SiCl4 в Н2 составляла 1,5%, линейная скорость газовой смеси в ректоре составляла 5 см/с, температура выращивания 1200°С, скорость роста 0,7 мкм/мин. Затем структуры легировались Ge до концентрации 1020-1021 см-3. При этом происходит компенсация деформации решетки, обусловленной введением примесей фосфора. Далее формировали активные области полупроводниковых приборов по стандартной технологии.The technology of the method is as follows: on a silicon substrate of n-type conductivity was grown, by deposition from the vapor phase in the process of hydrogen reduction of SiCl 4 , a layer of silicon. The molar fraction of SiCl 4 in H 2 was 1.5%, the linear velocity of the gas mixture in the reactor was 5 cm / s, the growth temperature was 1200 ° C, and the growth rate was 0.7 μm / min. Then the structures were doped with Ge to a concentration of 10 20 -10 21 cm -3 . In this case, compensation of the lattice deformation due to the introduction of phosphorus impurities occurs. Next, active regions of semiconductor devices were formed using standard technology.
По предлагаемому способу были изготовлены и исследованы полупроводниковые структуры. Результаты исследований представлены в таблице.According to the proposed method, semiconductor structures were manufactured and investigated. The research results are presented in the table.
Экспериментальные исследования показали, что выход годных структур на партии пластин, сформированных в оптимальном режиме, увеличился на 15,4%.Experimental studies have shown that the yield of suitable structures on a batch of plates formed in the optimal mode increased by 15.4%.
Технический результат: снижение дефектности, обеспечение технологичности, улучшение параметров, повышение надежности и увеличение процента выхода годных.EFFECT: reduced defectiveness, ensuring manufacturability, improved parameters, increased reliability and increased yield.
Стабильность параметров во всем эксплуатационном интервале температур была нормальной и соответствовала требованиям.The stability of the parameters over the entire operating temperature range was normal and consistent with the requirements.
Предложенный способ изготовления полупроводникового прибора путем формирования эпитаксиального слоя кремния в процессе водородного восстановления SiCl4 со скоростью 0,7 мкм/мин, при температуре 1200°С с последующим легированием Ge до концентрации 1020-1021 см-3 позволяет повысить процент выхода годных структур и улучшить их надежность.The proposed method of manufacturing a semiconductor device by forming an epitaxial layer of silicon in the process of hydrogen reduction of SiCl 4 at a speed of 0.7 μm / min, at a temperature of 1200 ° C, followed by doping of Ge to a concentration of 10 20 -10 21 cm -3 allows to increase the yield of suitable structures and improve their reliability.
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RU2016106484A RU2644627C2 (en) | 2016-02-24 | 2016-02-24 | Manufacturing method of semiconductor structure |
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RU2016106484A RU2644627C2 (en) | 2016-02-24 | 2016-02-24 | Manufacturing method of semiconductor structure |
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RU2644627C2 true RU2644627C2 (en) | 2018-02-13 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
RU2822539C1 (en) * | 2024-02-16 | 2024-07-08 | Акционерное общество "Научно-производственное предприятие "Исток" имени А.И. Шокина" | Method of producing epitaxial silicon structure |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
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US4910163A (en) * | 1988-06-09 | 1990-03-20 | University Of Connecticut | Method for low temperature growth of silicon epitaxial layers using chemical vapor deposition system |
US6936530B1 (en) * | 2004-02-05 | 2005-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Deposition method for Si-Ge epi layer on different intermediate substrates |
US20060073679A1 (en) * | 2004-10-06 | 2006-04-06 | Airaksinen Veli M | CVD doped structures |
US20100120235A1 (en) * | 2008-11-13 | 2010-05-13 | Applied Materials, Inc. | Methods for forming silicon germanium layers |
RU2010146169A (en) * | 2008-04-15 | 2012-05-20 | СИЛИКА ТЕК, ЭлЭлСи (US) | DEVICE FOR PLASMA DEPOSITION FROM VAPOR PHASE AND METHOD FOR PRODUCING MULTI-TRANSITION SILICON THIN-FILMED MODULES AND SOLAR ELEMENT PANELS |
US8613984B2 (en) * | 2008-06-30 | 2013-12-24 | Mohd Aslami | Plasma vapor deposition system and method for making multi-junction silicon thin film solar cell modules and panels |
-
2016
- 2016-02-24 RU RU2016106484A patent/RU2644627C2/en not_active IP Right Cessation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4910163A (en) * | 1988-06-09 | 1990-03-20 | University Of Connecticut | Method for low temperature growth of silicon epitaxial layers using chemical vapor deposition system |
US6936530B1 (en) * | 2004-02-05 | 2005-08-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Deposition method for Si-Ge epi layer on different intermediate substrates |
US20060073679A1 (en) * | 2004-10-06 | 2006-04-06 | Airaksinen Veli M | CVD doped structures |
RU2010146169A (en) * | 2008-04-15 | 2012-05-20 | СИЛИКА ТЕК, ЭлЭлСи (US) | DEVICE FOR PLASMA DEPOSITION FROM VAPOR PHASE AND METHOD FOR PRODUCING MULTI-TRANSITION SILICON THIN-FILMED MODULES AND SOLAR ELEMENT PANELS |
US8613984B2 (en) * | 2008-06-30 | 2013-12-24 | Mohd Aslami | Plasma vapor deposition system and method for making multi-junction silicon thin film solar cell modules and panels |
US20100120235A1 (en) * | 2008-11-13 | 2010-05-13 | Applied Materials, Inc. | Methods for forming silicon germanium layers |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
RU2822539C1 (en) * | 2024-02-16 | 2024-07-08 | Акционерное общество "Научно-производственное предприятие "Исток" имени А.И. Шокина" | Method of producing epitaxial silicon structure |
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Effective date: 20190225 |