RU2466476C1 - Method of making semiconductor device - Google Patents

Abstract

FIELD: physics.

SUBSTANCE: in the method of making a semiconductor device, involving formation of a gate insulator, gate electrodes, a drain, a source and working regions of the semiconductor device, between a layer of amorphous silicon and a film of dielectric material used to insulate the gate, a film of amorphous silicon nitride with thickness of 45-55 nm is formed at temperature 230-370°C and rate of growth of 100 nm/min.

EFFECT: reduced leak current, which ensures technological effectiveness, improved parameters, high quality and high percentage yield.

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Description

The invention relates to the field of production technology of semiconductor devices, in particular to the technology of manufacturing thin-film semiconductor devices with reduced leakage currents.

A known method of manufacturing a thin-film transistor [Application 1276765 Japan, MKI H01L 29/78] by creating quantum-dimensional Si / Ge / Si heterostructures and then coating them with an insulating layer, the side parts of which are doped with phosphorus to reduce the series resistance, and the gate is made of polycrystalline The n-silicon layer is isolated by a SiO ₂ layer.

In such semiconductor devices, due to the difference in the crystallographic lattices of silicon and germanium, defects are formed that worsen the parameters of semiconductor devices.

A known method of manufacturing a thin film transistor [US Pat. 4990977 USA, MKI H01L 29/78] by sequentially forming a gate electrode layer, a gate dielectric, a source electrode, a semiconductor layer covering a dielectric and surrounding source strips and a drain electrode on a substrate. In this case, the channel of the thin-film transistor consists of a section between the source strips and a dielectric, where the current flows parallel to the substrate surface, and a section between the strips with current lines perpendicular to the substrate surface.

The disadvantages of this method are:

- increased leakage currents;

- the complexity of the process;

- deterioration of the parameters of the devices.

The problem solved by the invention: reducing leakage currents in semiconductor devices, providing manufacturability, improving the parameters of devices, improving quality and increasing the percentage of yield.

The problem is solved by forming an amorphous film of silicon nitride with a thickness of 45-55 nm at a substrate temperature of 230-370 ° C, with a growth rate of 100 nm / min between the layer of amorphous silicon and the film of dielectric material used to isolate the gate.

The technology of the method consists in the following: on a glass substrate, a lower film of amorphous silicon nitride is used to grow a shutter with a thickness of 245-255 nm, an upper film of amorphous silicon nitride with a thickness of 45-55 nm at a substrate temperature of 230-370 ° C, with a growth rate 100 nm / min, by the method of paraphase chemical deposition, then a film of amorphous silicon with a thickness of 280-320 nm and a film of amorphous n + silicon with a thickness of 35-45 nm are grown.

After the formation of n + films of amorphous silicon and amorphous silicon with a given pattern, the drain and source electrodes are sprayed in the form of aluminum films. Then the amorphous n + silicon film is removed between the drain and the source by plasma etching in a CF ₄ atmosphere.

The use of two films of amorphous silicon nitride leads to a decrease in gate leakage currents due to a decrease in the density of states at the interface between amorphous silicon and amorphous silicon nitride.

According to the proposed method, semiconductor devices were manufactured and investigated. The processing results are presented in table 1.

Table 1. Parameters of p / p structures made by standard technology Parameters of p / p structures made by the proposed technology Mobility, cm ² / B · s Leakage current, A Iut · 10 ¹¹ Mobility, cm ² / V · s Leakage current, A Iut · 10 ¹¹ 47 16 84 0.2 45 fifteen 81 0.15 46 eighteen 80 0.2 53 fourteen 95 0.13 52 eleven 92 0.10 57 17 99 0.18 46 13 81 0.11 49 12 86 0.1 44 19 80 0.2 49 fourteen 87 0.12 47 16 84 0.13 54 12 97 0.11 fifty 10 88 0.1

Experimental studies have shown that the yield of suitable semiconductor structures in batches formed in the optimal mode increased by 18.7%.

Effect: reducing leakage currents, ensuring manufacturability, improving parameters, increasing reliability and increasing the percentage of suitable devices.

The stability of the parameters over the entire operating temperature range was normal and consistent with the requirements.

Claims (1)

A method of manufacturing a semiconductor device, including the formation of a gate dielectric, gate electrodes, drain, source and working areas of a semiconductor device, characterized in that between the layer of amorphous silicon and the film of dielectric material used to isolate the gate, an amorphous silicon nitride film of 45-55 nm thickness is created at a temperature of 230-370 ° C with a growth rate of 100 nm / min.