RU2099785C1 - High-precision simulator of random changes of direct voltage - Google Patents

Abstract

FIELD: computer engineering, electric engineering. SUBSTANCE: device has rectangular pulse generator 1, AND gate 2, timer 3, univibrators 4, 20, 21, random number generator 5 with uniform distribution, function generator 6, digital- to-analog converter 7, commutators 8 and 9, analog memory units 10 and 13, integrator 11, output terminal 12, analog-to-digital converter 14, gate 15, reference voltage source 16, inverter 17, resistor 18, button 19. Device provides possibility to model different types of arbitrary processes of abrupt change of direct voltage using maximal number of parameters of original process in model. EFFECT: increased functional capabilities, increased precision of modeling. 4 cl, 5 dwg

Description

 The proposed device relates to computer technology and can find application in electrical engineering as a precision simulator of realizations of abruptly varying random changes in DC voltage.

 A device for determining the parameters of voltage spikes [1] containing a rectangular pulse shaper, a feedback sensor, a button, a control trigger, a single-shot, an operating mode switch, an element I.

 The disadvantages of the analog are low accuracy and narrow functionality, it is designed to simulate only surges and voltage dips of a rectangular shape.

 The closest technical solution to the proposed one is a device for simulating voltage spikes and swings with a monotonic change in parameters [2] containing a transformer, a half-wave rectifier, a resistor, a power amplifier, a scale amplifier, a code-to-analog converter, a counter, a decoder, shapers, single-vibrators, elements AND and OR, trigger, feedback sensor, frequency dividers, mode switch, indicator, button.

 The disadvantages of the prototype are low accuracy and narrow functionality, it is designed to simulate only deterministic implementations of emissions and voltage ranges.

 The technical problem solved by the invention, the expansion of the functionality of the device by obtaining the ability to simulate realizations of random voltage changes, as well as increasing its accuracy.

 The specified technical problem is solved by the fact that a rectangular pulse generator is introduced into a device for simulating voltage spikes and swings with a monotonic change in parameters, containing an And element, a digital-to-analog converter, a reference voltage source, a single-shot oscillator and a button, one of the contacts of which is connected to a zero potential bus, the output of which is connected to the first input of the And element, the second input of which is connected to the inverse output of the timer, and the output is connected to the input of the first one-shot and the clock input yes a randomly distributed random number generator, the output of which is connected to the first group of inputs of the functional converter, and the zero-setting input is combined with the integrator reset input, the second button contact, the timer start input and is connected to the unit potential bus via a resistor, the low-order group of the functional converter output is connected with a digital input of a digital-to-analog converter, the reference voltage input of which is connected to the combined outputs of the first and second switches, and the output is connected n with the information input of the first analog memory block, the control input of which is connected to the output of the third one-shot, and the output is connected to the information input of the integrator, the output of which is the information output of the simulator and connected to the information input of the second analog memory block, the output of which is connected to the information input of the analog digital converter, and the control input is connected to the output of the first converter connected to the inverse input of the second one-shot, the output of which is connected to the inverse input of the third one-shot and with the start input of an analog-to-digital converter, the digital information output of which is connected to the second group of inputs of the functional converter, the highest bit of the output of which is connected to the control input of the first switch and through the element NOT to the control input of the second switch, the information input of the first switch is connected to the output of the reference voltage source connected via an inverter to the information input of the second switch; in one embodiment, the uniformly distributed random number sensor comprises a counter, the clock input of which is a clock input of the sensor, a zero setting input, a sensor zero setting input, and the output connected to an address input of a digital memory unit, the information output of which is a sensor output; in the first embodiment, the functional converter contains a digital memory unit, the first group of bits of the address input of which is the first group of inputs of the converter, the second group of bits of the address input of the second group of inputs of the converter, and the information output is the output of the converter; in the second embodiment, the functional converter comprises a computer, the first group of bits of the input interface of which is the first group of inputs of the converter, the second group of bits of the input interface is the second group of inputs of the converter, and the output interface is the output of the converter.

 Significant differences of the proposed simulator are the new structure of the device, as well as the use of new random number sensor elements with uniform distribution in its circuit, a functional converter, the first and second analog memory blocks, an integrator, an analog-to-digital converter, a rectangular pulse generator, a timer, an inverter, elements NOT; In the proposed simulator, a series of new connections between old and introduced elements is organized. These significant differences ensure the achievement of a positive effect by expanding the functionality of the simulator by obtaining the ability to simulate various realizations of random processes of abruptly changing DC voltage with repetition in the process model of the maximum number of parameters of the original process.

 In FIG. 1 is a structural diagram of a simulator; FIG. 2 to 4 show embodiments of the schemes of the random number sensor and the functional converter, and FIG. 5 is a graph of the simulated voltage.

 The simulator (Fig. 1) contains a rectangular pulse generator (GUI) 1, the output of which is connected to the first input of the And 2 element, the second input of which is connected to the inverse output of the timer 3, and the output is connected to the input of the first one-shot 4 and the clock inputs of the sensor 5 random numbers (DSCH) with a uniform distribution, the output of which is connected to the first group of inputs of the functional converter (FP) 6, the group of low-order bits of the output of which is connected to the digital input of a digital-to-analog converter (DAC) 7, whose reference voltage input It is connected to the combined outputs of the first 8 and second 9 switches, and the output is connected to the information input of the first analog memory unit 10 (UPS), the output of which is connected to the information input of the integrator 11, the output of which is the information output of the simulator 12 and connected to the information input of the second UPS 13 the output of which is connected to the information input of the analog-to-digital converter (ADC) 14, the digital information output of which is connected to the second group of inputs of the FP 6, the highest bit of the output of which is connected to the control by the input of the first switch 8 and through the element NOT 15 with the control input of the second switch 9, the information input of the first switch 8 is connected to the output of the reference voltage source 16 (ION), connected through the inverter 17 to the information input of the second switch 9, the input for setting the zero of the frequency converter 5 is combined with the reset input of the integrator 11 and the start input of the timer 3 and through the resistor 18 is connected to the unit potential bus, and through the contacts of the button 19 with the zero potential bus, the output of the first one-shot 4 is connected to the control input of the second BP 13 and the inverted input of the second monostable multivibrator 20 whose output is connected to the trigger input of the ADC 14 and the inverted input of the third monostable multivibrator 21, whose output is connected to the control input 10 of the first UPS.

 In one embodiment, the DSCH 5 (Fig. 2) contains a counter 22, the clock input of which is the clock input of the sensor 5, the input of zeroing by the input of zeroing of the sensor 5, and the output is connected to the address input of the digital memory unit 23 (CPU), the information output of which is the output of the sensor 5.

 In the first embodiment, FP 6 (Fig. 3) contains a pulp and paper processor 24, the first group of bits of the address input of which is the first group of inputs of the converter 6, the second group of bits of the address input of the second group of inputs of the converter 6, and the information output is the output of the converter 6.

 In the second embodiment, FP 6 (Fig. 4) contains a computer 25, the first group of bits of the input interface of which is the first group of inputs of the converter 6, the second group of bits of the input interface is the second group of inputs of the converter 6, and the output interface is the output of the converter 6.

In the step of preparation of the simulator in PPI 5 23 DFS recorded sequence of binary numbers x _i, with a uniform distribution, and PPI 24 6 FP binary codes numbers z _jk, which define with the coefficient of proportionality K ₁ function F ^-1, the inverse of the derivative of the voltage U ' two-dimensional distribution function (DFS) of the level and derivative of the voltage F (U, U ') of the original process, which they want to reproduce on the simulator. DFR F of the original process can be preliminarily obtained by a statistical analyzer of the level and derivative of the voltage. The values of the function z placed in the pulp and paper mill 24 are calculated by the formula
z K ₁ U 'K ₁ F ^-1 (U, F). (one)
When you start the simulator by pressing the button 19 at the inputs of the start of the timer 3, zero the DSCH 5 and reset the integrator 11, a single voltage appears, which is accompanied by the resetting of the counter 22 of the DSCH 5, resetting the output voltage of the integrator 11 (and, accordingly, the simulator) to zero and starting timer 3.

 After releasing the button 19, the process of modeling the implementation of a constant voltage begins, which, if necessary, can be repeated. At the inverted output of timer 3, after it starts, a unit voltage appears, which is fed to the second input of element And 2, the last one starts to pass the pulses of the generator 1 to the input of the counter 22 of the frequency converter 5.

On the leading edge of the output pulse GPI 1 (at time t ₁ 0 in Fig. 5), a single vibrator 4 is started, which, with its output short pulse, writes the voltage U ₁ 0 from the output of the integrator 11 to the UPS 13. Finally, the pulse from the output of the single vibrator 4 starts the single vibrator 20, which at its output a short pulse starts the APC 14 is formed at the outlet of the last 0000 code v ₁ corresponding to zero voltage U ₁ at the output of integrator 11. Finishing, the pulse output from the monostable 20 triggers monostable 21 which at its output pulse m inscribes the corresponding voltage value from the output of the DAC 7 BPO 10 (see FIG. later).

z_11110000, пропорциональный производной

напряжения в первом такте и хранящийся в ячейке ЦБП 24 с адресом 11110000 младшие разряды кода z задают модуль производной, а старший разряд ее знак (например, 1, соответствующую положительной производной). Единичное напряжение старшего разряда выхода ФП 6 открывает первый коммутатор 8 (второй коммутатор 9 при этом закрыт нулевым напряжением с выхода элемента НЕ 15) выходное положительное напряжение ИОН 16 прикладывается к входу опорного напряжения ЦАП 7. На выходе ЦАП 7 появляется напряжение, пропорциональное производной моделируемого напряжения

где K₂ постоянный коэффициент пропорциональности.In the first clock cycle of the generator 1, the output code of the counter 22 is zero. At the same time, at the output of the pulp and paper 23, the code of the first binary number x ₁ appears from the sequence of uniformly distributed binary numbers, which is stored in the cell of block 23 with the address 00000000. Code x ₁ (for example, 1111), attached to the first group of inputs of FP 6, sets the code part address input of the pulp and paper 23 (for example, a group of high-order bits). The second part of the code (the group of the least significant bits) is set from the information output of the ADC 14; in particular, in the first cycle, this code is v ₁ 0000. As a result, a code generated from codes x ₁ and v ₁ 11110000 appears on the address input of the CPU 24 FP. The code appears on the output of the CPU 24 FP 6

z _11110000 , proportional to the derivative

voltage in the first cycle and stored in the cell of the pulp-and-paper mill 24 with the address 11110000, the least significant bits of the code z define the derivative module, and the highest digit its sign (for example, 1, corresponding to the positive derivative). The unit voltage of the senior discharge of the output of the FP 6 opens the first switch 8 (the second switch 9 is closed with a zero voltage from the output of the element NOT 15), the positive output voltage of the ION 16 is applied to the input of the reference voltage of the DAC 7. A voltage proportional to the derivative of the simulated voltage appears at the output of the DAC 7

where K _{2 is a} constant coefficient of proportionality.

, приложенное к входу интегратора 11, остается постоянным в течение всего первого такта. Напряжение на выходе интегратора (и соответственно на выходе имитатора) изменяется с производной

по линейному закону

В середине первого такта по заднему фронту импульса ГПИ 1 содержимое счетчика 22 ДСЧ 5 увеличивается на единицу и становится равным 00000001. При этом на выходе ЦБП 23 появляется код второго числа x₂, хранящегося в ячейке блока 23 с адресом 00000001. Код x₂ (например, 1100) прикладывается к группе старших разрядов адресного входа ЦБП 24 ФП 6.This voltage at the beginning of the first cycle (with a small delay after time t ₁ , due to the sum of the durations of the pulses of one-shots 4 and 20; this delay is 3-5 orders of magnitude less than the interval Δt of the duration of the pulse period of the GUI 1) fits into the first UPS 10. The output voltage of the UPS 10

applied to the input of the integrator 11 remains constant throughout the first cycle. The voltage at the output of the integrator (and accordingly at the output of the simulator) varies with the derivative

according to linear law

In the middle of the first clock trailing edge pulse GPI 1, the counter 22 is incremented by RNG unit 5 and becomes 00000001. At the output PPI code 23 appears the second number of x ₂ stored in the unit cell 23 with the address code 00000001. x ₂ (e.g. , 1100) is applied to the high order group of the address input of the pulp and paper processor 24 FP 6.

В начале второго такта в момент времени t₂ это напряжение вписывается в АБП 13 и затем преобразуется АЦП 14 в код, например, v₂ R₃U₂ 0101 (где K₃ постоянный коэффициент пропорциональности). Код v₂ прикладывается к группе младших разрядов адресного входа ЦБП 24 ФП 6.According to the formula (3), the voltage of the simulator changes during the first cycle in the time interval t ₁ t ₂ (Fig. 5). At time t _{2 the} voltage of the simulator reaches a value

At the beginning of the second clock at time t _2, this voltage fits into the UPS 13 and then the ADC 14 is converted into a code, for example, v ₂ R ₃ U ₂ 0101 (where K _{3 is a} constant proportionality coefficient). Code v _{2 is} applied to the group of the least significant bits of the address input of the CPU 24 FP 6.

, хранящийся в ячейке ЦБП 24 с адресом 11000101. Значение старшего разряда кода числа

равно, например, нулю; нулевое напряжение старшего разряда выхода ФП 6 инвертируется элементом НЕ 15 в единичное и открывает второй коммутатор 9 (первый коммутатор 8 при этом закрыт нулевым напряжением на его управляющем входе). Положительное напряжение ИОН 16 преобразуется инвертором 17 в отрицательное и, пройдя через второй коммутатор 9, поступает на вход опорного напряжения ЦАП 7. На выходе последнего появляется отрицательное напряжение, пропорциональное отрицательной производной моделируемого напряжения

Это напряжение вписывается в АБП 10 и в течение второго такта интегрируется интегратором 11 по формуле

В момент времени t₃ выходное напряжение имитатора достигает значения

и т.д.As a result, at time t ₂ of the _two codes x and v ₂ at the address input 24 PPI OP code 11000101. 6 is formed at the output 24 PPI code appears derivative

stored in the cell of the pulp and paper 24 with the address 11000101. The value of the senior digit of the code number

equals, for example, zero; the zero voltage of the senior discharge of the FP 6 output is inverted by the element NOT 15 to unity and opens the second switch 9 (the first switch 8 is thus closed by zero voltage at its control input). The positive voltage of the ION 16 is converted by the inverter 17 into negative and, passing through the second switch 9, is fed to the input of the reference voltage of the DAC 7. At the output of the latter, a negative voltage proportional to the negative derivative of the simulated voltage appears

This voltage fits into the UPS 10 and during the second cycle is integrated by the integrator 11 according to the formula

At time t _{3 the} output voltage of the simulator reaches a value

etc.

Варьируя значения коэффициентов K₁-K₃, можно устанавливать масштабы по напряжению m_U, а также производной m_U' или времени m_t моделируемого имитатором процесса изменения постоянного напряжения, задавая диапазон и скорость его изменения. Процесс-модель и процесс-оригинал напряжения с учетом этих масштабов имеют эквивалентные ДФР F(U, U'), а также одномерные функции распределения производной F(U') и ординат напряжения F(U).In the general case, in each (n + 1) th cycle, the simulation of voltage realization is carried out by a simulator according to the following algorithm:

By varying the values of the coefficients K ₁ -K ₃ , it is possible to set the scales with respect to the voltage m _U , as well as the derivative m _{U '} or time m _{t of the} process of changing the constant voltage simulated by the simulator, setting the range and speed of its change. The process model and the original process voltage, taking into account these scales, have equivalent DFRs F (U, U '), as well as one-dimensional distribution functions of the derivative F (U') and voltage ordinates F (U).

In that case, if the DFR F and the inverse function (RP) F ^-1 have an analytical expression, then it is advisable to use in the composition of FP 6 according to the second version of the computer 25 (Fig. 4) (single-chip microcomputer, personal computer) this will significantly reduce the preparation time of the simulator to work (compared with the first version of the implementation of FP 6 on pulp and paper 24). In the same case, if the F ^-1 FF can be determined only by numerical methods, it is more convenient to implement FP 6 on the CPU 24. Regarding the drawbacks of the first embodiment of FP 6, the programming time of the CPU 24 is long, it should be noted that in this case the simulator has the maximum speed (the time it _takes to obtain the derivative code z _jk at the output of FP 6 from the pulp and paper mill 24 is equal to the duration of one elementary operation) this is important if it is necessary to simulate a process accelerated or to simulate fast-flowing processes in real time. Regarding the disadvantages of the second embodiment of FP 6, the low speed of the computer 25 (to obtain the derivative code z _jk at the output of the FP 6 from the computer 25 may require 1000 element operations, since the code value is calculated each time), it is necessary to note a fundamentally higher accuracy of the calculation on the computer 25 the values of the derivative code z _jk this can achieve a higher accuracy of voltage simulation U. The implementation option for FP 6 can be selected by the user depending on the purpose of the simulator: 1) if the simulator is used as a built-in device for checking instruments or as a laboratory bench for educational purposes, the implementation option of FP 6 on the pulp and paper mill 24 is uniquely selected; 2) if, with the help of a simulator, research work is carried out and it is necessary to simulate processes with different DFS F, then a computer 25 is also unambiguously entered into FP 6.

 Timer 3 is used in the simulator circuit if it is necessary to simulate the implementation of a voltage of a given duration. If the simulation needs to be continued for an indefinitely long time, then the And 2 element and the timer 3 in the simulator circuit may not be used, or the mode of operation of the timer 3 is set at which its output voltage does not drop to zero. It should also be noted that if it is not necessary to simulate a strictly repeated realization of the voltage, starting from zero voltage, then you should not press button 19, then the simulator performs stochastic DC voltage simulation from an arbitrary moment that corresponds to the moment the simulator circuit is connected to the source nutrition.

 The advantages of the proposed simulator in comparison with the known ones are wider functionality due to the possibility of simulating various realizations of random processes of abruptly changing DC voltage with repetition in the process model of the maximum number of parameters of the original process while improving simulation accuracy. The voltage realizations simulated by the simulator allow one to study the effect of random fluctuations, surges and voltage dips on various electrical equipment, technological processes, and human vision; to study the quality of work and conduct metrological verification of statistical analyzers of fluctuations, surges and voltage dips; to investigate the behavior of various gyroscopic systems installed on objects swaying according to a given law (the deck of the vessel, the platform of the tank, etc.) by supplying simulated voltage to the drives of the simulators of these systems, etc. The simulator is implemented on a microelectronic basis for its manufacture a small amount (15-16) of widespread integrated circuits is required.

Claims (4)

 1. A precision simulator of realizations of random changes in DC voltage, containing the And element, a digital-to-analog converter, a reference voltage source, first and second switches, a first third one-shot, a resistor, a button, characterized in that a random number sensor with uniform distribution is additionally introduced into it, functional converter, first and second analog memory blocks, integrator, analog-to-digital converter, element NOT, inverter, timer, square-wave pulse generator, output It is connected to the first input of the And element, the second input of which is connected to the inverse output of the timer, and the output is connected to the input of the first one-shot and the clock input of the random number generator with uniform distribution, the output of which is connected to the first group of inputs of the functional converter, and the zero-setting input is combined with the integrator reset input and the timer start input and through the resistor are connected to the unit potential bus, and through the contacts of the button with the zero potential bus, the group of low-order bits of the output is functionally of the first converter is connected to the digital input of the digital-analog converter, the reference voltage input of which is connected to the combined outputs of the first and second switches, and the output is connected to the information input of the first analog memory block, the control input of which is connected to the output of the third one-shot, and the output is connected to the information input of the integrator, the output of which is the information output of the simulator and is connected to the information input of the second analog memory block, the output of which is connected to the info the input of the analog-to-digital converter, and the control input is connected to the output of the first one-shot connected to the inverse input of the second one-shot, the output of which is connected to the inverse input of the third one-shot and to the start input of the analog-to-digital converter, the digital information output of which is connected to the second group of inputs of the functional a converter, the highest output bit of which is connected to the control input of the first switch and through the element NOT to the control input of the second switch, the information input of the first switch is connected to the output of the reference voltage source connected through an inverter to the information input of the second switch.  2. The simulator according to claim 1, characterized in that, in one embodiment, the random number sensor with a uniform distribution contains a counter, the clock input of which is the clock input of the sensor, the zero setting input, the sensor zero setting input, and the output connected to the address input of the digital memory unit whose information output is the output of the sensor.  3. The simulator according to claim 1, characterized in that in the first embodiment, the functional converter comprises a digital memory unit, the first group of bits of the address input of which is the first group of inputs of the converter, the second group of bits of the address input of the second group of inputs of the converter, and the information output is the output of the converter .  4. The simulator according to claim 1, characterized in that in the second embodiment, the functional converter comprises a computer, the first group of bits of the input interface of which is the first group of inputs of the converter, the second group of bits of the input interface is the second group of inputs of the converter, and the output interface is the output of the converter.

Images