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KR960002833A - 반도체 소자의 고전압용 트랜지스터 및 그 제조방법 - Google Patents

반도체 소자의 고전압용 트랜지스터 및 그 제조방법 Download PDF

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Publication number
KR960002833A
KR960002833A KR1019940013501A KR19940013501A KR960002833A KR 960002833 A KR960002833 A KR 960002833A KR 1019940013501 A KR1019940013501 A KR 1019940013501A KR 19940013501 A KR19940013501 A KR 19940013501A KR 960002833 A KR960002833 A KR 960002833A
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KR
South Korea
Prior art keywords
oxide film
field oxide
high voltage
manufacturing
semiconductor device
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Application number
KR1019940013501A
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English (en)
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KR0149527B1 (ko
Inventor
안병진
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940013501A priority Critical patent/KR0149527B1/ko
Priority to US08/478,753 priority patent/US5563080A/en
Priority to JP7143043A priority patent/JP2619340B2/ja
Priority to DE19521469A priority patent/DE19521469B4/de
Publication of KR960002833A publication Critical patent/KR960002833A/ko
Priority to US08/678,374 priority patent/US5652458A/en
Application granted granted Critical
Publication of KR0149527B1 publication Critical patent/KR0149527B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/143—Shadow masking

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

본 발명은 반도체 소자의 트랜지스터 및 그 제조방법에 관한 것으로, DRAM에서의 부트스트랩 회로(bootstrap circuit) 및 플래쉬(flash)EEPROM등에서 고전압 VLSI 공정을 실현하기 위하여, LOCOS 분리공정으로 형성된 필드 산화막을 이용한 자기정렬 습식식각(slef-aligned wet etch)공정으로 기판을 식각한 후, 그 식각된 부분에 고전압 소자를 형성하므로써 채널 스톱(channel stop)영역과 드레인 영역간이 접촉을 방지하면서 소자의 집적도를 향상시킬 수 있는 반도체 소자의 고전압을 트랜지스터 및 그 제조방법에 관한 것이다.

Description

반도체 소자의 고전압용 트랜지스터 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3A도는 내지 제3G도는 본 발명의 의한 고전압용 트랜지스터를 제조하는 단계를 도시한 소자의 단면도,
제4도는 본 발명의 고전압용 트랜지스터의 레이아웃도.

Claims (2)

  1. 실리콘 기판(1)상에 형성된 필드 산화막(16)과, 상기 필드 산화막(16)보다 깊게 식각된 실리콘 기판(11)상에 형성되는 게이트 산화막(18A) 및 게이트 전극(19A)과 상기 게이트 산화막(18A) 및 게이트 전극(19A) 양측부의 실리콘 기판(11) 내부로 형성되는 소오스 및 드레인 영역(21)과, 상기 필드 산화막(16) 하부에 형성되는 채널 스톱 영역(15)과, 상기 채널 스톱영역(15)과 상기 소오스 및 드레인 영역(21)간의 실리콘 기판(11)상에 형성되되 상기 필드 산화막(16)의 버즈 비크(16A) 하부에 형성되는 산화막(18B) 및, 상기 산화막(18B)상에 형성되되 상기 필드 산화막(16)의 버즈 비크(16A) 하부에 형성되는 폴리실리콘 스페이서(19B)로 구성되는 것을 특징으로 하는 반도체 소자의 고전압용 트랜지스터.
  2. 반도체 소자의 고전압용 트랜지스터 제조방법에 있어서, 하부에 채널 스톱영역(15)이 형성된 필드 산화막(16)을 이용한 자기정렬 습식식가공정으로 실리콘 기판(11)을 소정깊이 식각하여 홈(17)을 형성하는 단계와, 상기 단계로부터 전체구조 상부에 산화막과 폴리실론층을 순차적으로 형성한 후 게이트 전극용 마스크를 사용하여 게이트 전극(19A) 및 게이트 산화막(18A)을 형성하며, 이와 동시에 필드 산화막(16)의 버즈 비크(16A) 하부에 폴리실리콘 스페이서(19B) 및 산화막(18B)이 형성되는 단계와, 상기 단계로부터 불순물 주입공정으로 소오스 및 드레인 영역(21)을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 고전압용 트랜지스터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임
KR1019940013501A 1994-06-15 1994-06-15 반도체 소자의 고전압용 트랜지스터 및 그 제조방법 KR0149527B1 (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1019940013501A KR0149527B1 (ko) 1994-06-15 1994-06-15 반도체 소자의 고전압용 트랜지스터 및 그 제조방법
US08/478,753 US5563080A (en) 1994-06-15 1995-06-07 Method of manufacturing a high voltage transistor in a semiconductor device
JP7143043A JP2619340B2 (ja) 1994-06-15 1995-06-09 半導体素子の高電圧トランジスタ構造及びその製造方法
DE19521469A DE19521469B4 (de) 1994-06-15 1995-06-13 Hochspannungstransistorstruktur für eine Halbleitervorrichtung sowie Verfahren zu deren Herstellung
US08/678,374 US5652458A (en) 1994-06-15 1996-07-02 Structure of a high voltage transistor in a semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940013501A KR0149527B1 (ko) 1994-06-15 1994-06-15 반도체 소자의 고전압용 트랜지스터 및 그 제조방법

Publications (2)

Publication Number Publication Date
KR960002833A true KR960002833A (ko) 1996-01-26
KR0149527B1 KR0149527B1 (ko) 1998-10-01

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Country Link
US (2) US5563080A (ko)
JP (1) JP2619340B2 (ko)
KR (1) KR0149527B1 (ko)
DE (1) DE19521469B4 (ko)

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Also Published As

Publication number Publication date
US5563080A (en) 1996-10-08
KR0149527B1 (ko) 1998-10-01
JP2619340B2 (ja) 1997-06-11
DE19521469B4 (de) 2007-05-31
JPH08162630A (ja) 1996-06-21
DE19521469A1 (de) 1995-12-21
US5652458A (en) 1997-07-29

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