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KR920020594A - Ldd 트랜지스터의 구조 및 제조방법 - Google Patents

Ldd 트랜지스터의 구조 및 제조방법 Download PDF

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Publication number
KR920020594A
KR920020594A KR1019910005714A KR910005714A KR920020594A KR 920020594 A KR920020594 A KR 920020594A KR 1019910005714 A KR1019910005714 A KR 1019910005714A KR 910005714 A KR910005714 A KR 910005714A KR 920020594 A KR920020594 A KR 920020594A
Authority
KR
South Korea
Prior art keywords
low concentration
drain region
concentration source
polysilicon
gate
Prior art date
Application number
KR1019910005714A
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English (en)
Inventor
황이연
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019910005714A priority Critical patent/KR920020594A/ko
Priority to TW081102330A priority patent/TW268136B/zh
Priority to DE4211999A priority patent/DE4211999C2/de
Priority to JP4116768A priority patent/JP2547690B2/ja
Publication of KR920020594A publication Critical patent/KR920020594A/ko

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7836Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a significant overlap between the lightly doped extension and the gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음

Description

LDD 트랜지스터의 구조 및 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명의 제조공정 단면도.

Claims (2)

  1. 게이트 측벽 스페이서를 갖는 LDD 구조의 트랜지스터에 있어서, 저농도 소오스/드레인 영역중 상기 게이트 측벽 스페이서 바로 밑 부분에 상기 저농도 소오스/드레인 영역과 다른형의 불순물 층을 형성하는 것을 특징으로 하는 LDD 트랜지스터의 구조.
  2. 기판에 게이트를 형성하고 기판과 다른형의 저농도 이온을 주입하여 저농도 소오스/드레인 영역을 형성하는 스텝, 기판과 동형의 불순물이 도우프된 폴리실리콘을 증착하고 에치를 실시하여 게이트 측면 폴리실리콘을 형성 하는 스텝, 어닐링 공정을 실시하여 상기 게이트 측벽 폴리실리콘의 불순물을 상기 저농도 소오스/드레인 영역에 확산시켜 게이트 측벽 폴리실리콘 바로 밑에 소오스/드레인 영역과 다른형의 불순물층을 형성하는 단계, 기판과 다른형의 고농도 이온을 주입하여 고농도 소오스/드레인 영역을 형성하는 단계가 차례로 포함됨을 특징으로 하는 LDD 트랜지스터의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019910005714A 1991-04-10 1991-04-10 Ldd 트랜지스터의 구조 및 제조방법 KR920020594A (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019910005714A KR920020594A (ko) 1991-04-10 1991-04-10 Ldd 트랜지스터의 구조 및 제조방법
TW081102330A TW268136B (ko) 1991-04-10 1992-03-26
DE4211999A DE4211999C2 (de) 1991-04-10 1992-04-09 LDD-Transistor und Verfahren zu dessen Herstellung
JP4116768A JP2547690B2 (ja) 1991-04-10 1992-04-10 Lddトランジスタの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910005714A KR920020594A (ko) 1991-04-10 1991-04-10 Ldd 트랜지스터의 구조 및 제조방법

Publications (1)

Publication Number Publication Date
KR920020594A true KR920020594A (ko) 1992-11-21

Family

ID=19313084

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910005714A KR920020594A (ko) 1991-04-10 1991-04-10 Ldd 트랜지스터의 구조 및 제조방법

Country Status (4)

Country Link
JP (1) JP2547690B2 (ko)
KR (1) KR920020594A (ko)
DE (1) DE4211999C2 (ko)
TW (1) TW268136B (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5518945A (en) * 1995-05-05 1996-05-21 International Business Machines Corporation Method of making a diffused lightly doped drain device with built in etch stop
US6339005B1 (en) * 1999-10-22 2002-01-15 International Business Machines Corporation Disposable spacer for symmetric and asymmetric Schottky contact to SOI MOSFET
US7732285B2 (en) * 2007-03-28 2010-06-08 Intel Corporation Semiconductor device having self-aligned epitaxial source and drain extensions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6143477A (ja) * 1984-08-08 1986-03-03 Hitachi Ltd Mosトランジスタの製造方法
JPH06105715B2 (ja) * 1985-03-20 1994-12-21 株式会社日立製作所 半導体集積回路装置の製造方法
JPH01309376A (ja) * 1988-06-07 1989-12-13 Mitsubishi Electric Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JP2547690B2 (ja) 1996-10-23
JPH0629308A (ja) 1994-02-04
DE4211999A1 (de) 1992-10-15
DE4211999C2 (de) 1999-06-10
TW268136B (ko) 1996-01-11

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