KR20210058536A - Manufacturing method of display apparatus and display apparatus manufactured by that method - Google Patents

Abstract

The present invention relates to a manufacturing method of a display device and a display device manufactured thereby, to which technology of separating each RGB chip formed on a wafer through etching, technology of transcribing each RGB chip separated to a carrier substrate, technology of selectively transcribing some of each RGB chip transcribed to the carrier substrate to a sacrificial layer carrier substrate, and technology of sequentially transcribing each RGB chip transcribed on the sacrificial layer carrier substrate to a display panel are applied. The manufacturing method of a display device according to an embodiment of the present invention comprises: a chip formation step of forming on a wafer a plurality of chips and a protective layer which makes the chips passive; an etching step of etching the protective layer for each chip on the wafer; a carrier substrate attachment step of attaching to a carrier substrate a chip array etched and arranged in a matrix on the wafer; a wafer removal step of removing the wafer from the chip array; a sacrificial layer carrier substrate formation step of forming a sacrificial layer carrier substrate including a patterned sacrificial layer material layer; a sacrificial layer carrier substrate transcription step of transcribing at least one chip array attached to the carrier substrate to the sacrificial layer carrier substrate; and a display panel transcription step of removing the patterned sacrificial layer material layer to sequentially transcribe the chip array transcribed to the sacrificial layer carrier substrate to the display panel. According to the present invention, a micro-LED-based display device can be rapidly manufactured and an error in transcription can be minimized.

Description

TECHNICAL FIELD [0001] A method for manufacturing a display device and a display device manufactured by the method TECHNICAL FIELD

The present invention is a technology for separating each RGB chip formed on a wafer through etching, a technology for transferring each separated RGB chip to a carrier substrate, and selectively transferring some of each RGB chip transferred to a carrier substrate to a sacrificial layer carrier substrate. The present invention relates to a method and an apparatus for manufacturing a display device to which a technique for sequentially transferring RGB chips transferred to a sacrificial layer carrier substrate to a display panel is applied.

A light emitting diode (LED) is one of light emitting devices that emit light when current is applied. Light-emitting diodes have excellent energy saving effects because they can emit light with high efficiency at a low voltage.

Recently, the problem of luminance of light-emitting diodes has been greatly improved, and thus, it has been applied to various devices such as backlight units, electronic signs, displays, and home appliances of a liquid crystal display device.

The size of a micro light emitting diode (μ-LED) is very small, ranging from 1 to 100 μm, and approximately 25 million or more pixels are required to implement a 40-inch display device.

Therefore, there is a problem in that it takes at least one month in time by a simple pick & place method to make one 40-inch display device.

Existing micro light-emitting diodes (μ-LEDs) are manufactured in plural on a sapphire substrate, and then, by a mechanical transfer method, pick & place, the micro light-emitting diodes are one by one on a glass or flexible substrate. Is transferred.

Since the micro light emitting diodes are picked up one by one and transferred, it is referred to as a 1:1 pick-and-place transfer method.

However, since the size of the micro light emitting diode chip manufactured on the sapphire substrate is small and thin, the chip is damaged, the transfer fails, or the chip is aligned during the pick and place transfer process of transferring the micro light emitting diode chips one by one. There are problems such as failure of alignment or the occurrence of a tilt of the chip.

In addition, there is a problem that the time required for the transfer process takes too long.

Republic of Korea Patent Publication 10-2019-0096256

The present invention is a technology for separating each RGB chip formed on a wafer through etching and transferring each separated RGB chip to a carrier substrate, and selectively transferring some of each RGB chip transferred to the carrier substrate to the sacrificial layer carrier substrate And, to provide a method of manufacturing a display device capable of sequentially transferring each of the RGB chips transferred to the sacrificial layer carrier substrate to the display panel.

In addition, when each RGB chip is separated from the wafer to the carrier substrate in matrix units, EPI is prevented from damage due to laser heat during the dicing process, and the net die is reduced to increase the production efficiency of LED chips. And it is intended to provide a method of separating an RGB chip through a laser lift off (LLO) process.

In addition, it is intended to provide a method of manufacturing a display device capable of rapidly manufacturing a micro LED-based display device and minimizing transfer errors.

In addition, an object of the present invention is to provide a method for manufacturing a display device capable of manufacturing a display device having a variety of sizes and pitches between pixels.

In addition, an object of the present invention is to provide a method of manufacturing a display device capable of using a wafer having as many RGB pixels as possible on a limited area regardless of the resolution of the display device.

In addition, it is intended to provide a method of manufacturing a display device capable of rapidly manufacturing a large-area display device.

The problem to be solved of the present invention is not limited to the problems mentioned above, and other problems that are not mentioned can be clearly understood by those of ordinary skill in the technical field to which the present invention belongs from the following description. will be.

A method of manufacturing a display device according to an embodiment of the present invention includes a chip forming step of forming a protective layer for passivating a plurality of chips and a plurality of chips on a wafer; Etching the protective layer for each chip on the wafer; Attaching a chip array etched on the wafer and arranged in a matrix to a carrier substrate; A wafer removal step of removing the wafer from the chip array; Forming a sacrificial layer carrier substrate comprising a patterned sacrificial layer material layer; A sacrificial layer carrier substrate transferring step of transferring at least one chip array attached to the carrier substrate to the sacrificial layer carrier substrate; And a display panel transfer step of sequentially transferring the chip array transferred to the sacrificial layer carrier substrate to a display panel by removing the patterned sacrificial layer material layer.

Here, in the wafer removal step, the wafer may be removed from the chip array through a laser lift off (LLO) process.

Here, the wafer may be any one of sapphire (Al2O3), silicon, gallium arsenide (GaAs), gallium nitride (GaN), and zinc nitride (ZnN).

Here, a pitch between two adjacent sacrificial layer material layers of the sacrificial layer carrier substrate may be k (k = positive integer) times a pitch of two adjacent pads of the display panel.

Here, the step of forming the sacrificial layer carrier substrate may include coating a material layer of the sacrificial layer on the substrate, a coating step; And forming the patterned sacrificial layer material layer by patterning the sacrificial layer material layer.

Here, the substrate is made of any one of glass, quartz, artificial quartz, and metal, and the sacrificial layer material layer is a photoresist (PR), and the It may be composed of any one of a photoresist and an adhesive, and the photoresist and an ultraviolet adhesive.

Here, in the step of transferring the sacrificial layer carrier substrate, some chips from the chip array attached to the carrier substrate are selectively transferred to the sacrificial layer carrier substrate, and the selected some chips are patterned from the chip array attached to the carrier substrate. It may be a chip in contact with the sacrificial layer material layer.

Here, in the transferring of the display panel, the chip array may be separated from the sacrificial layer carrier substrate by removing the patterned sacrificial layer material layer using a chemical material.

Here, the transferring of the display panel may include applying a solder paste to a plurality of pads of the display panel; And a soldering step of contacting and soldering the pads of the chip array transferred to the sacrificial layer carrier substrate to the applied solder paste.

In addition, the display device according to the present invention can be manufactured by the above-described manufacturing method of the display device.

According to the configuration of the present invention described above, some of the chips transferred to the carrier substrate can be selectively transferred to the sacrificial layer carrier substrate, and the chips transferred to the sacrificial layer carrier substrate can be sequentially and quickly and accurately transferred to the display panel. There is this.

In addition, in the process of separating the RGB chips formed on the wafer in matrix units, instead of using the conventional laser dicing process, the etching process is used to prevent EPI damage due to the heat of the laser and sawing (mechanical die). In the process, the dicing area due to the thickness of the saw blade is large, which can reduce the net die, and prevents the decrease in the light efficiency and increase in defects of the micro LED due to particle contamination generated in the dicing process in advance. Bring effect.

In addition, the manufacturing method of the display device according to the embodiment can quickly transfer a plurality of selected light emitting devices to the display panel at one time without controlling the micro-class light emitting devices one by one, significantly reducing the manufacturing cost and time of the display device. There is an advantage to be able to.

In addition, there is an advantage of being able to manufacture a display device having various sizes and various pitches between sub-pixels.

In addition, since each wafer in which as many RGB chips are formed on a limited area irrespective of the resolution of the display device is used, it is possible to reduce the cost of manufacturing a wafer and does not require a process of forming a color conversion layer.

In addition, when manufacturing a large-area display device, there is an advantage in that the transfer method can be rapidly manufactured by changing the position and repeatedly executing the transfer method.

1 is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present invention.
2 is a diagram of RGB chips formed on each wafer according to an embodiment of the present invention.
3 is a process chart of growing each RGB Epi on each wafer according to an embodiment of the present invention.
4 is a process diagram of etching RGB chips formed on each wafer according to an embodiment of the present invention in units of one chip.
5 is a process diagram of transferring the etched RGB chip of FIG. 4 from a wafer to a first carrier substrate, and FIG. 6 is a process diagram of removing the wafer by an LLO technique.
6 is a process diagram of removing a wafer by an LLO technique.
7A to 7C are process diagrams for explaining the step (S150) of preparing the sacrificial layer carrier substrate shown in FIG. 1.
8 to 10 are exemplary diagrams for explaining a process of selectively transferring the chip array shown in FIG. 1 from a carrier substrate to a sacrificial layer carrier substrate.
11, in the same process as in FIGS. 8 to 10, some G LED chips 100G of the G LED chip array formed on the second carrier substrate 210R are selectively transferred to the second sacrificial layer carrier substrate 220G. It is a drawing showing what has been transferred.
12, in the same process as in FIGS. 8 to 10, some B LED chips 100B of the B LED chip array formed on the third carrier substrate 210B are selectively transferred to the third sacrificial layer carrier substrate 220G. It is a drawing showing what has been transferred.
13 to 14 are exemplary diagrams of a process in which a subpixel CSP array is secondaryly transferred from a sacrificial layer carrier substrate to a display panel.
15 to 16 are other exemplary diagrams of a process of secondary transfer of a subpixel CSP array from a sacrificial layer carrier substrate to a display panel.
17 to 18 are still other exemplary diagrams of a process of secondary transfer of a sub-pixel CSP array from a sacrificial layer carrier substrate to a display panel.

In the description of the embodiment, in the case of being described as being formed on the “top (top) or bottom (bottom)” of each component, the top (top) or bottom (bottom) of the two components directly contact each other Or one or more other constituent elements disposed between the two constituent elements.

In addition, when expressed as "upper (upper) or lower (lower)", the meaning of not only an upward direction but also a downward direction based on one component may be included.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not fully reflect the actual size.

The LED chip, CSP, LED pixel CSP, and LED sub-pixel CSP used in the present invention may be defined as follows.

CSP (Chip Scale Package) refers to a single chip package with a semiconductor/package area ratio of 80% or more as a package that has recently attracted much attention in the development of a single chip package.

LED pixel CSP refers to a single package in which one LED pixel is CSP packaged with Red LED, Green LED, and Blue LED as one pixel unit.

LED sub-pixel CSP refers to a single package in which each of the red LED, green LED, and blue LED is used as one sub-pixel unit and CSP is packaged in one LED sub-pixel unit.

The light-emitting body formed on the wafer may be defined as an LED chip.

1 is a flowchart illustrating a method of manufacturing a display device according to an embodiment of the present invention.

Referring to FIG. 1, in the method of manufacturing a display device according to an embodiment of the present invention, the step of forming a plurality of RGB chips on each wafer (S110). Etching (S120), attaching a chip array of each wafer separated in units of RGB chips to a carrier substrate (S130), removing the wafer by a laser lift off (LLO) process (S140) , Preparing a sacrificial layer carrier substrate (S150), selectively transferring the RGB chip array from the carrier substrate to the sacrificial layer carrier substrate (S160), expanding the area of the RGB chips selectively transferred to the sacrificial layer carrier substrate Forming an RGB sub-pixel CSP and extending the pad of each RGB sub-pixel CSP (S170) Step of sequentially transferring the RGB sub-pixel CSP array selectively transferred to the sacrificial layer carrier substrate to the display panel (S180) and the sacrificial layer And removing the carrier substrate (S190).

Steps S110, S120, S130, S140, S150, S160 and S170, S180, and S190 will be described in detail below with reference to the accompanying drawings.

2 is a diagram of RGB chips formed on each wafer according to an embodiment of the present invention.

As shown in FIG. 2, the embodiment of the present invention describes three wafers each formed with RGB chips as an example, but is not limited thereto.

Referring to FIG. 2, a plurality of light emitting devices 11R, 11G, and 11B that emit light of the same wavelength band are formed on each wafer 10R, 10G, and 10B.

Here, the light emitting devices 11R, 11G, and 11B may be light emitting chips that emit red, green, and blue light.

The plurality of light emitting devices 11R, 11G, and 11B may be arranged at equal intervals on each of the wafers 10R, 10G, and 10B along a plurality of rows and columns.

Since the light-emitting elements 11R, 11G, and 11B disposed at equal intervals are transferred to the display panel later in the row or column direction, the manufacturing cost of the light-emitting element can be reduced by efficiently utilizing the entire area of a relatively expensive wafer.

Meanwhile, after forming a plurality of RGB chips on each of the wafers 10R, 10G, and 10B, the wafer for each RGB chip may be separated for each RGB chip through an etching process.

It is preferable that the pitch W between the RGB chips formed on each of the wafers 10R, 10G, and 10B is equal to the pitch between the sub-pixels CSP formed on the display panel or is determined as a multiple of a proportional constant of a predetermined value.

This can facilitate transfer when selectively transferring RGB chips in matrix units from the sacrificial layer carrier substrate to be described later to the display panel.

3 is a process chart of growing each RGB Epi on each wafer according to an embodiment of the present invention.

Referring to FIG. 3, epis 11R, 11G, and 11B emitting predetermined light are grown on one surface of each of three wafers 10R, 10G, and 10B.

Here, the wafers 10R, 10G, and 10B may be any one of sapphire (Al2O3), silicon, gallium arsenide (GaAs), gallium nitride (GaN), and zinc nitride (ZnN). However, the present invention is not limited thereto, and any substrate that can be used as a wafer may be used.

Protection by forming pads 14r, 14g, 14b on each of the grown epis 11R, 11G, 11B, and passivating the epis 11R, 11G, 11B and pads 14r, 14g, 14b A layer 13 is formed.

Here, the pads 14r, 14g, and 14b are not expanded and may have the size and shape of a general pad.

When forming the protective layer 13, it is preferable to form the pads 14r, 14g, and 14b so as to be exposed to the outside of the protective layer 13 in order to expand the pad area thereafter.

3 shows a cross-sectional view of the AA section and the BB section in FIG. 1, respectively, and preferably, a pair of (+) and (-) electrodes per chip are formed under the Epi layer. Of course, it can be formed up and down, and it is also possible to form it left and right if necessary.

The RGB luminous bodies formed on the wafers 10R, 10G, and 10B are in a state of being separated by chip units, and in the present invention, they are referred to as LED RGB chips, and are then transferred from the wafers 10R, 10G, and 10B to the carrier substrate. After becoming a sacrificial layer carrier substrate, each LED RGB chip secures a predetermined area while the electrode pads are extended and each single packaged state is referred to as LED CSP (Chip Scale Package). The case of packaging in units is referred to as LED pixel CSP, and the case in which RGB is packaged in units of one sub-pixel is referred to as LED sub-pixel CSP. When the R sub-pixel CSP, the G sub-pixel CSP, and the B sub-pixel CSP are arranged side by side, one LED pixel can be configured.

4 is a process diagram of etching RGB chips formed on each wafer according to an embodiment of the present invention in units of one chip.

Referring to FIG. 4, as shown in FIG. 3, a plurality of RGB chips are formed by forming epis 11R, 11G, 11B and pads 14r, 14g, 14b on a wafer, and etching each RGB chip on which the protective layer 13 is formed. Separate (100R, 100G, 100B).

Here, the etching process for each of the RGB chips 100R, 100G, and 100B may be performed by wet or dry etching, and the shape of the LED chip is defined by etching, and at this time, the wafer remains as it is.

In the following drawings, one RGB chip 100R, 100G, 100B is shown as the RGB chip 100R, 100G, 100B formed in FIG. 4, but is not limited thereto, and etching in the row and column directions in FIG. It may be an array of RGB chips 100R, 100G, and 100B.

Each of the RGB chips 100R, 100G, and 100B may have a flip chip structure that does not require a wire.

Electrical connection is possible with pads (14r, 14g, 14b) instead of wires, and each of the RGB chips (100R, 100G, 100B) emits light of various colors according to an external control signal through the pads (14r, 14g, 14b) can do.

In addition, in the present invention, each of the RGB chips 100R, 100G, and 100B may constitute a sub-pixel for each of R, G, and B to be a new concept small package manufactured in the form of CSP.

The R chip 100R, the G chip 100G, and the B chip 100B may constitute one light emitting device.

By attaching a plurality of RGB chips (100R, 100G, 100B) to the carrier substrate in row and column directions, a line process capable of transferring the chip array can be performed, and selectively transferred from the carrier substrate to the sacrificial layer carrier substrate. Then, the area of the chip array selectively transferred to the sacrificial layer carrier substrate can be expanded to form an LED sub-pixel CSP, and the sub-pixel CSP array arranged on the sacrificial layer carrier substrate by expanding the pad of the LED sub-pixel CSP will be described later. It may be sequentially transferred to the display panel to be used.

As shown in FIG. 4, a process of removing the wafer by attaching the chip arrays etched in the form of RGB chips (100R, 100G, 100B) on each wafer to a carrier substrate is performed, and thereafter, a sacrificial layer carrier substrate and a display panel from the carrier substrate. Let's look at the process of sequentially selective transfer.

The following drawings are described in terms of row (horizontal) arrangement in a chip array arranged in a matrix on the wafer of FIG. 1.

5 is a process diagram of transferring the etched RGB chip of FIG. 4 from a wafer to a first carrier substrate, and FIG. 6 is a process diagram of removing the wafer by an LLO technique.

5 and 6 are processes for removing the wafers 10R, 10G, and 10B to transfer the etched RGB chip to the display panel, and then transfer to the second carrier substrate so that the pad portion can be exposed for pad expansion. This is the process before it is done.

Referring to FIG. 5, after the RGB chips are separated in the matrix direction by etching (as shown in FIG. 4), carrier substrates 210R, 210G, and 210B are replaced with RGB chips in the opposite direction of the wafers 10R, 10G, and 10B. 100R, 100G, 100B). That is, the carrier substrates 210R, 210G, and 210B are attached to the pads 14r, 14g, and 14b of the RGB chips 100R, 100G, and 100B.

Referring to FIG. 6, when wafers 10R, 10G, and 10B are removed by a laser lift off (LLO) process in a state as shown in FIG. 5, the RGB chips 100R, 100G, and 100B may be converted to a first carrier substrate 210R, 210G, 210B) is placed in a state of being attached, and at this time, the direction of the RGB chips 100R, 100G, 100B is disposed in a state in which the light emitter is exposed in the opposite direction.

Thereafter, a process of transferring from the carrier substrates 210R, 210G, and 210B to the sacrificial layer carrier substrate is performed in order to expand the regions of the pads 14r, 14g, and 14b of the light emitter.

The carrier substrates 210R, 210G, 210B include a first carrier substrate 210R on which an R LED chip array is formed, a second carrier substrate 210G on which a G LED chip array is formed, and a third carrier substrate on which a B LED chip array is formed. (210B) may be included.

Prior to describing the process of selectively transferring the light emitter from the carrier substrates 210R, 210G, and 210B to the sacrificial layer carrier substrate, a description will be given from the step (S150) of preparing the sacrificial layer carrier substrate.

7A to 7C are process diagrams for explaining the step (S150) of preparing the sacrificial layer carrier substrate shown in FIG. 1.

Referring to FIGS. 7A to 7B, a sacrificial layer material layer 223 is formed on the substrate 221. The sacrificial layer material layer 223 may be coated by applying a sacrificial layer material on the upper surface of the substrate 221.

The substrate 221 may be made of any one of glass, quartz, synthetic quartz, and metal. The substrate 221 is preferably made of a rigid material that is not flexible as possible.

The sacrificial layer material layer 223 may be formed of any one of a photoresist PR, a photoresist and an adhesive, and a photoresist and an ultraviolet adhesive. Since the sacrificial layer material layer 223 is sensitive to photos, there is an advantage in fine patterning. In addition, since the sacrificial layer material layer 223 has a predetermined adhesive force, a light emitter to be described later can be adhered to the sacrificial layer material 223 and can be easily coated on the substrate 221.

Referring to FIG. 7C, the sacrificial layer material layer 223 is patterned to form a patterned sacrificial layer material layer 223 ′. The pitch of two adjacent patterned sacrificial layer material layers 223 ′ may correspond to a pitch between two adjacent pads of a display panel to be described later. Therefore, when patterning the sacrificial layer material layer 223, it is preferable to consider the pitch between the two pads of the display panel. For example, a pitch of two adjacent patterned sacrificial layer material layers 223 ′ may be K times the pitch between two pads of the display panel.

The sacrificial layer carrier substrate 220 may be prepared in plural. For example, a first sacrificial layer carrier substrate to which the R emitter is transferred, a second sacrificial layer carrier substrate to which the G emitter is transferred, and a third sacrificial layer carrier substrate to which the B emitter is transferred may be prepared, respectively.

8 to 10 are exemplary diagrams for explaining a process of selectively transferring the chip array shown in FIG. 1 from a carrier substrate to a sacrificial layer carrier substrate.

Referring to FIG. 8, a first carrier substrate 210R on which an R LED chip array is formed is disposed on a first sacrificial layer carrier substrate 220R. The patterned sacrificial layer material layer 223'R of the first sacrificial layer carrier substrate 220R and the R LED chip 100R are disposed to face each other.

9, the first carrier substrate 210R and the first sacrificial layer carrier substrate 220R are brought close to each other so that the R LED chip 100R and the patterned sacrificial layer material layer 223'R are in contact with each other. do. At this time, in the R LED chip array, only some of the R LED chips 100R are in contact with the patterned sacrificial layer material layer 223'R. The remaining R LED chips do not contact the patterned sacrificial layer material layer 223'R.

Referring to FIG. 10, when the first carrier substrate 210R is separated from the first sacrificial layer carrier substrate 220R, some R LEDs that have been in contact with the sacrificial layer material layer 223'R patterned in the R LED chip array Only the chip 100R is transferred to the patterned sacrificial layer material layer 223'R, and the remaining R LED chips that have not been in contact with the patterned sacrificial layer material layer 223'R in the R LED chip array are the first carrier substrate ( It is separated from the first sacrificial layer carrier substrate 220R together with the first carrier substrate 210R while being attached to the 210R).

As shown in FIG. 10, some R LED chips 100R of the R LED chip array formed on the first carrier substrate 210R are selectively transferred to the first sacrificial layer carrier substrate 220R. More specifically, when the first carrier substrate 210R is aligned with the first sacrificial layer carrier substrate 220R and contacted, the first carrier substrate 210R is separated from the first sacrificial layer carrier substrate 220R. The first and fourth R chip arrays of the first and fourth rows of the carrier substrate 210R are picked up (meaning pickup by bonding force) and transferred to the first sacrificial layer carrier substrate 220R, so that they become empty, and the R chip arrays of the first and fourth rows ( 100R-SP1 and 100R-SP4) are transferred to the first sacrificial layer carrier substrate 220R.

11, in the same process as in FIGS. 8 to 10, some G LED chips 100G of the G LED chip array formed on the second carrier substrate 210R are selectively transferred to the second sacrificial layer carrier substrate 220G. It is a drawing showing what has been transferred.

12, in the same process as in FIGS. 8 to 10, some B LED chips 100B of the B LED chip array formed on the third carrier substrate 210B are selectively transferred to the third sacrificial layer carrier substrate 220G. It is a drawing showing what has been transferred.

In this way, the step of transferring the chip array formed on the carrier substrate to the sacrificial layer carrier substrate may be referred to as'primary transfer', or may be referred to as selective transfer in the sense that it is transferred by selecting it in units of columns or rows. have.

Meanwhile, the sacrificial layer carrier substrate 220 may be a transparent material. If the sacrificial layer carrier substrate 220 is a transparent material, when transferring each chip (100R-SP1, 100R-SP2, 100R-SP3) to the white layer carrier substrate 220, position adjustment and distortion are provided externally. There is an advantage that can be adjusted or controlled through a vision system (not shown).

13 to 14 are exemplary diagrams of a process in which a subpixel CSP array is secondaryly transferred from a sacrificial layer carrier substrate to a display panel.

Referring to FIG. 13, (A) shows the pads 31-SP1, ..., 31-SP6 of the display panel 300, and (B) is a first sacrificial layer carrier substrate on the display panel 300 It shows a state in which the R sub-pixel array is secondarily transferred onto the display panel 300 by aligning 220R.

Pads 31-SP1, ..., 31-SP6 are formed in the 1st to 6th rows of the display panel 300, and solder pastes 33-SP1 and 33-SP4 are formed in the 1st and 4th rows, and the corresponding Each R subpixel CSP (100R-SP1, 100R-SP4) is transferred to the column position.

However, although it is shown that the solder paste is formed only in the first row and the fourth row on the pads of the display panel 300, the solder pastes 33-SP1, ..., 33-SP6 may be formed in all rows.

FIG. 14 is a cross-sectional view illustrating a process in which the R subpixel CSP array is transferred from the first sacrificial layer carrier substrate 220R to the display panel 300 in FIG. 13 in more detail.

Referring to FIG. 14A, a solder paste 33 is applied on a plurality of pads 31 of the display panel 300.

A TFT array substrate 400 may be disposed under the display panel 300.

Here, the solder paste 33 may be applied only on the first and fourth rows of the pads 31-SP1 and 31-SP4, but may be applied on the remaining pads.

One row of R sub-pixels CSP is selectively transferred to the first and fourth rows of pads (preferably pads arranged at intervals of the previous row + 3 rows), and then the second and third row pads between rows 1 and 4 One row of the G sub-pixel CSP and one row of the B sub-pixel CSP are sequentially transferred to (the pads arranged at intervals of the previous column + 3 columns, respectively).

The solder paste 33 may be applied on the plurality of pads 31 of the display panel 300 through various methods such as screen printing, dispensing, and jetting.

Next, referring to FIG. 14B, the R sub-pixels CSPs 100R-SP1 and 100R-SP4 attached to the first sacrificial layer carrier substrate 220R are disposed on the display panel 300, and R The pads of the sub-pixels CSPs 100R-SP1 and 100R-SP4 are brought into contact with the solder pastes 33-SP1 and 33-SP4 applied on the pads 31 of the display panel 300.

After the pad of the R sub-pixel CSP (100R-SP1, 100R-SP4) and the pad 31 of the display panel 300 are in contact with each other through the solder paste (33-SP1, 33-SP4), for example, self-alignment When a predetermined heat is applied using the paste (Self Align Paste, SAP) soldering method, some of the solder particles contained in the solder pastes (33-SP1, 33-SP4) are partially R sub-pixel CSP (100R-SP1). , 100R-SP4) and the pads 31-SP1 and 31-SP4 of the display panel 300 may be self-assembled.

Meanwhile, the thermosetting resin included in the solder paste 33 may be cured by heat.

Next, referring to FIG. 14C, when the pads of the R sub-pixels CSPs 100R-SP1 and 100R-SP4 and the pads 31-SP1 and 31-SP4 of the display panel 300 are soldered, the first 1 The sacrificial layer carrier substrate 220R is separated from the R sub-pixels CSPs 100R-SP1 and 100R-SP4.

Here, the process of separating the first sacrificial layer carrier substrate 220R from the R sub-pixel CSPs 100R-SP1 and 100R-SP4 includes the sacrificial layer material layer 223'R of the first sacrificial layer carrier substrate 220R. This can be done by removing. The sacrificial layer material layer 223'R may be removed using a chemical material. For example, it can be removed by solvents such as acetone. When the sacrificial layer material layer 223'R disposed between the first sacrificial layer carrier substrate 220R and the R sub-pixel CSPs 100R-SP1 and 100R-SP4 is removed, the first sacrificial layer carrier substrate 220R and Since a space is created between the R sub-pixels CSPs 100R-SP1 and 100R-SP4, the first sacrificial layer carrier substrate 220R and the R sub-pixels CSPs 100R-SP1 and 100R-SP4 can be easily separated from each other. . Furthermore, even if the sacrificial layer material layer 223'R is not completely removed, the sacrificial layer material layer in which soldering adhesion between the pads of the R sub-pixels CSPs 100R-SP1 and 100R-SP4 and the pads of the display panel 300 remains. Since the adhesion between the first sacrificial layer carrier substrate 220R and the R sub-pixels CSP (100R-SP1, 100R-SP4) by (223'R) is much larger than that, the first sacrificial layer carrier substrate 220R is used as an R sub It can be easily separated from the pixel CSP (100R-SP1, 100R-SP4).

15 to 16 are other exemplary diagrams of a process of secondary transfer of a subpixel CSP array from a sacrificial layer carrier substrate to a display panel.

Referring to FIG. 15, (A) shows the pads 31-SP1, ..., 31-SP6 of the display panel 300, and R subpixels in rows 1 and 4 through the processes of FIGS. 13 to 14 The array is in a transferred state, and (B) shows a state in which the second sacrificial layer carrier substrate 220G is aligned on the display panel 300 and the G sub-pixel array is secondarily transferred onto the display panel 300. will be.

Pads 31-SP1, ..., 31-SP6 are formed in the 1st to 6th rows of the display panel 300, and solder pastes 33-SP2 and 33-SP5 are formed in the 2nd and 5th rows. G sub-pixels CSPs (100G-SP1, 100G-SP4), each of which are pad-extended, are transferred to the column positions.

FIG. 16 shows a cross-sectional process in more detail illustrating a process of transferring the G sub-pixel CSP array from the second sacrificial layer carrier substrate 220G to the display panel 300 in FIG. 15.

Referring to FIG. 16A, a solder paste 33 is applied on the plurality of pads 31 of the display panel 300, and the R sub-pixel CSP array ( 100R-SP1, 100R-SP4) are located in the transferred state.

Here, the solder paste 33 may be applied only on the second and fifth rows of the pads 31-SP2 and 31-SP5, but may be applied on the remaining pads.

Next, referring to FIG. 16B, the G sub-pixel CSP (100G-SP1, 100G-SP4) attached to the second sacrificial layer carrier substrate 220G is disposed on the display panel 300, and G The pads of the sub-pixels CSPs 100G-SP1 and 100G-SP4 are brought into contact with the solder pastes 33-SP2 and 33-SP5 applied on the pads 31 of the display panel 300.

After the pad of the G sub-pixel CSP (100G-SP1, 100G-SP4) and the pad 31 of the display panel 300 are in contact with each other through the solder paste (33-SP2, 33-SP5), for example, self-alignment When a predetermined heat is applied using a paste (Self Align Paste, SAP) soldering method, the solder particles contained in the solder pastes (33-SP2, 33-SP5) become G sub-pixel CSP (100G-SP1, It may be self-assembled between the pads of 100G-SP4 and the pads 31-SP2 and 31-SP5 of the display panel 300.

Next, referring to FIG. 16C, when the pads of the G sub-pixel CSPs 100G-SP1 and 100G-SP4 and the pads 31-SP2 and 31-SP5 of the display panel 300 are soldered, the first 2 Separate the sacrificial layer carrier substrate 220G.

Here, the process of separating the second sacrificial layer carrier substrate 220G from the G sub-pixel CSP (100G-SP1, 100G-SP4) is the sacrificial layer material layer 223'G of the second sacrificial layer carrier substrate 220G. This can be done by removing. The sacrificial layer material layer 223 ′G may be removed using the chemical material described above.

17 to 18 are still other exemplary diagrams of a process of secondary transfer of a sub-pixel CSP array from a sacrificial layer carrier substrate to a display panel.

Referring to FIG. 17, (A) shows the pads 31-SP1, ..., 31-SP6 of the display panel 300, through the processes of FIGS. 13 to 14 and the processes of FIGS. 15 to 16. The R sub-pixel CSP array is transferred to columns 1 and 4, and the G sub-pixel CSP array is transferred to columns 2 and 5, and (B) aligns the third sacrificial layer carrier substrate 220B on the display panel 300. This shows a state in which the B sub-pixel CSP array is secondarily transferred onto the display panel 300.

Pads 31-SP1, ..., 31-SP6 are formed in the 1st to 6th rows of the display panel 300, and the solder pastes 33-SP3 and 33-SP6 are formed in the 3rd and 6th rows. B sub-pixels CSPs 100B-SP1 and 100B-SP4 are transferred to the column positions, respectively.

FIG. 18 is a cross-sectional view illustrating a process of transferring from the third sacrificial layer carrier substrate 220B to the display panel 300 in FIG. 17 in more detail.

Referring to (A) of FIG. 18, a solder paste 33 is applied on the plurality of pads 31 of the display panel 300, and each of the first and fourth rows, and the second and fifth rows is already in the previous step. The R sub-pixel CSP arrays 100R-SP1 and 100R-SP4 and the G sub-pixel CSP arrays 100G-SP1 and 100G-SP4 are transferred.

Next, referring to (B) of FIG. 18, the B sub-pixels CSPs 100B-SP1 and 100B-SP4 attached to the third sacrificial layer carrier substrate 220B are disposed on the display panel 300, and B The pads of the sub-pixels CSPs 100B-SP1 and 100B-SP4 are brought into contact with the solder pastes 33-SP3 and 33-SP6 applied on the pads 31 of the display panel 300.

After the pad of the B sub-pixel CSP (100B-SP1, 100B-SP4) and the pad 31 of the display panel 300 are in contact with each other through solder paste (33-SP3, 33-SP6), for example, self-alignment When a predetermined heat is applied using a paste (Self Align Paste, SAP) soldering method, solder particles contained in the solder pastes (33-SP3, 33-SP6) become B sub-pixels CSP (100B-SP1, It may be self-assembled between the pads of 100B-SP4 and the pads 31-SP3 and 31-SP6 of the display panel 300.

Next, referring to FIG. 18C, when the pads of the B sub-pixels CSPs 100B-SP1 and 100B-SP4 and the pads 31-SP3 and 31-SP6 of the display panel 300 are soldered, the first 3 Separate the sacrificial layer carrier substrate 220B.

Here, the process of separating the third sacrificial layer carrier substrate 220B from the B sub-pixel CSP (100G-SP1, 100G-SP4) is the sacrificial layer material layer 223'B of the third sacrificial layer carrier substrate 220B. This can be done by removing. The sacrificial layer material layer 223'B may be removed using a chemical material.

As described above, if the processes of FIGS. 13 to 18 are sequentially applied, the display panel 300 in which one completed RGB pixel CSP array is arranged can be manufactured. The R, G, and B chip arrays selectively transferred to the first to third sacrificial layer carrier substrates 220R, 220G, 220B can be sequentially transferred from the first row to the last row of the display panel 300.

Features, structures, effects, and the like described in the embodiments above are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment can be implemented by combining or modifying other embodiments by a person having ordinary knowledge in the field to which the embodiments belong. Therefore, contents related to such combinations and modifications should be construed as being included in the scope of the present invention.

In addition, although the embodiments have been described above, these are only examples and do not limit the present invention, and those of ordinary skill in the field to which the present invention pertains will not depart from the essential characteristics of the present embodiment. It will be appreciated that various modifications and applications that are not illustrated are possible. For example, each constituent element specifically shown in the embodiment can be modified and implemented. And differences related to these modifications and applications should be construed as being included in the scope of the present invention defined in the appended claims.

10R, 10G, 10B: Wafer
100R, 100G, 100B: Chip
210R, 210G, 210B: carrier substrate
220R, 220G, 220B: Sacrificial layer carrier substrate
300: display panel
400: TFT array substrate

Claims (10)

Forming a plurality of chips and a protective layer for passivating the plurality of chips on a wafer;
Etching the protective layer for each chip on the wafer;
Attaching a chip array etched on the wafer and arranged in a matrix to a carrier substrate;
A wafer removal step of removing the wafer from the chip array;
Forming a sacrificial layer carrier substrate comprising a patterned sacrificial layer material layer;
A sacrificial layer carrier substrate transferring step of transferring at least one chip array attached to the carrier substrate to the sacrificial layer carrier substrate; And
A display panel transfer step of sequentially transferring the chip array transferred to the sacrificial layer carrier substrate to a display panel by removing the patterned sacrificial layer material layer;
Containing, a method of manufacturing a display device.
The method of claim 1,
In the wafer removal step, the wafer is removed from the chip array through a laser lift off (LLO) process.
The method of claim 1,
The wafer is any one of sapphire (Al2O3), silicon, gallium arsenide (GaAs), gallium nitride (GaN), and zinc nitride (ZnN), a method of manufacturing a display device.
The method of claim 1,
A method of manufacturing a display device, wherein a pitch between two adjacent sacrificial layer material layers of the sacrificial layer carrier substrate is k (k = positive integer) times a pitch of two adjacent pads of the display panel.
The method of claim 1, wherein the forming of the sacrificial layer carrier substrate comprises:
A coating step of coating a sacrificial layer material layer on a substrate; And
Forming the patterned sacrificial layer material layer by patterning the sacrificial layer material layer.
The method of claim 5,
The substrate is made of any one of glass, quartz, synthetic quartz, and metal,
The sacrificial layer material layer is composed of any one of a photoresist (PR), the photoresist and the adhesive, and the photoresist and the ultraviolet adhesive.
The method of claim 1,
In the step of transferring the sacrificial layer carrier substrate, some chips from the chip array attached to the carrier substrate are selectively transferred to the sacrificial layer carrier substrate,
The selected some chips are chips in contact with the patterned sacrificial layer material layer among chip arrays attached to the carrier substrate.
The method of claim 1, wherein the transferring of the display panel comprises:
The method of manufacturing a display device, wherein the chip array is separated from the sacrificial layer carrier substrate by removing the patterned sacrificial layer material layer using a chemical material.
The method of claim 1,
The display panel transfer step,
Applying a solder paste to a plurality of pads of the display panel; And
A soldering step of contacting and soldering the pads of the chip array transferred to the sacrificial layer carrier substrate to the applied solder paste;
Containing, a method of manufacturing a display device.
A display device manufactured by the method for manufacturing a display device according to any one of claims 1 to 9.

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