KR20140127099A - Method of manufacutruing semiconductor device structure - Google Patents
Method of manufacutruing semiconductor device structure Download PDFInfo
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- KR20140127099A KR20140127099A KR1020130045689A KR20130045689A KR20140127099A KR 20140127099 A KR20140127099 A KR 20140127099A KR 1020130045689 A KR1020130045689 A KR 1020130045689A KR 20130045689 A KR20130045689 A KR 20130045689A KR 20140127099 A KR20140127099 A KR 20140127099A
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Led Device Packages (AREA)
- Led Devices (AREA)
Abstract
Description
Disclosure relates generally to a method of manufacturing a semiconductor device structure, and more particularly, to a method of manufacturing a semiconductor device structure that is simple to manufacture.
Here, the semiconductor element includes a semiconductor light emitting element (e.g., a laser diode), a semiconductor light receiving element (e.g., a photodiode), a pn junction diode electric element, a semiconductor transistor, . The III-nitride semiconductor light emitting device includes a compound semiconductor layer made of Al (x) Ga (y) In (1-xy) N (0? X? 1, 0? Y? 1, 0? X + Such as SiC, SiN, SiCN, and CN, but does not exclude the inclusion of a material or a semiconductor layer of these materials.
Herein, the background art relating to the present disclosure is provided, and these are not necessarily meant to be known arts.
FIG. 1 is a diagram showing a conventional semiconductor light emitting device. The semiconductor light emitting device includes a
2 is a diagram showing another example of a conventional semiconductor light emitting device (Flip Chip). A semiconductor light emitting device includes a substrate 100 (e.g., a sapphire substrate), a first semiconductor layer having a first conductivity An active layer 400 (e.g., InGaN / (In) GaN MQWs) that generates light through recombination of electrons and holes, a
15 is a diagram illustrating a conventional semiconductor light emitting device package or a semiconductor light emitting device structure. The semiconductor light emitting device package includes
This will be described later in the Specification for Implementation of the Invention.
SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).
According to one aspect of the present disclosure, there is provided a method of fabricating a semiconductor device structure, the method comprising: positioning a semiconductor device on a plate such that the electrode of the semiconductor device faces the plate; Fixing the position; Covering the semiconductor element with an encapsulating material; And attaching a rigid plate to the encapsulant opposite the side from which the electrode is exposed from the encapsulant.
This will be described later in the Specification for Implementation of the Invention.
1 is a view showing an example of a conventional semiconductor light emitting device (lateral chip)
2 is a view showing another example (Flip Chip) of a conventional semiconductor light emitting device,
Figure 3 shows an example of a method of manufacturing a semiconductor device structure in accordance with the present disclosure;
4 is a diagram illustrating an example of a method for manufacturing a flip chip package in accordance with the present disclosure;
5 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure,
6 is a diagram illustrating an example of a semiconductor device structure according to the present disclosure;
7 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
8 is a view showing another example of a semiconductor device structure according to the present disclosure,
9 is a diagram illustrating an example of the use of a semiconductor device structure in accordance with the present disclosure;
10 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
11 is a diagram showing another example of a semiconductor device structure according to the present disclosure,
12 shows another example of a semiconductor device structure according to the present disclosure,
13 is a diagram showing another example of a semiconductor device structure according to the present disclosure,
14 is a diagram showing another example of a semiconductor device structure according to the present disclosure,
15 is a view showing an example of a conventional semiconductor light emitting device package or a semiconductor light emitting device structure,
16 to 18 are views showing an example of a method of manufacturing the semiconductor device structure shown in FIG. 11,
19 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
20 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
Figs. 21 to 23 are views showing an example of a method of manufacturing the semiconductor device structure shown in Fig. 12,
24-27 are diagrams illustrating another example of a method of manufacturing a semiconductor device structure in accordance with the present disclosure,
28 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
29 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure,
30 is a view showing still another example of the semiconductor device structure according to the present disclosure,
31 is a view showing an example of a method of manufacturing the semiconductor device structure shown in FIG. 30,
32 is a view showing another example of a method of manufacturing the semiconductor device structure shown in FIG. 30;
33 and 34 are views showing modifications of the semiconductor device structure shown in FIG. 30,
35 and 36 are diagrams illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
Figure 37 illustrates another example of a method of fabricating a semiconductor device structure in accordance with the present disclosure;
The present disclosure will now be described in detail with reference to the accompanying drawings.
3 is a diagram showing an example of a method of manufacturing a semiconductor device structure according to the present disclosure. After a
Fig. 4 is a diagram showing an example of a method for manufacturing a flip chip package according to the present disclosure. As a
5 is a diagram showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. A plurality of
6 is a view showing an example of a semiconductor element structure according to the present disclosure, in which the
7 shows another example of a method of manufacturing a semiconductor device structure according to the present disclosure. After the
FIG. 8 is a view showing another example of the semiconductor device structure according to the present disclosure, and includes a
9A and 9B show an example of the use of the semiconductor device structure according to the present disclosure. In the
Fig. 10 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. Fig. 10 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure, A
11 shows another example of the semiconductor device structure according to the present disclosure, in which the
12 shows another example of the semiconductor element structure according to the present disclosure, in which a
13 shows another example of the semiconductor device structure according to the present disclosure, in which the
Fig. 14 is a diagram showing another example of the semiconductor element structure according to the present disclosure, in which the
16 to 18 are views showing an example of a method for manufacturing the semiconductor device structure shown in Fig. 11. In the state where the
Fig. 19 is a diagram showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. The
20 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. After forming the
21 to 23 are views showing an example of a method for manufacturing the semiconductor device structure shown in Fig. 12, unlike the method shown in Fig. 20, in which the
Figs. 24-27 show another example of a method of manufacturing a semiconductor device structure according to the present disclosure, in which the plate 1 (see Fig. 3) is removed and then the sensitizing solution 9 is applied. For example, the photosensitive liquid 9 may be made of a white PSR functioning as an insulating
Fig. 28 is a diagram showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. Prior to forming the photosensitive liquid 9 or the insulating
29 is a drawing showing another example of a method for manufacturing a semiconductor device structure according to the present disclosure, and shows a process of cutting a plurality of
30 shows another example of the semiconductor device structure according to the present disclosure, in which the
31 is a view showing an example of a method of manufacturing the semiconductor element structure shown in Fig. 30, in which the
32 is a view showing another example of a method of manufacturing the semiconductor device structure shown in FIG. 30, wherein
33 and 34 show modifications of the semiconductor device structure shown in Fig. 30. In Fig. 33, the light reflecting surface forms one inclined surface 4b1, and in Fig. 34, the light reflecting surface has two inclined surfaces 4b1 and 4b2. Although the
35 and 36 are views showing still another example of a method of manufacturing a semiconductor device structure according to the present disclosure. As shown in Fig. 35, a
37 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure, in which the warp-
Various embodiments of the present disclosure will be described below.
(1) Semiconductor device structure in which the encapsulant acts as a carrier
(2) Semiconductor device structure having an encapsulation bottom separated from a plate
(3) Semiconductor device structure in which the outer surfaces of the encapsulant, except the surface on which the electrodes of the semiconductor device are located,
(4) Semiconductor device structure in which semiconductor elements are combined using an encapsulant
(5) A method of manufacturing a semiconductor device structure, comprising the steps of: positioning a semiconductor device on a plate; positioning the electrode of the semiconductor device so as to face the plate; Covering the semiconductor element with an encapsulating material; And attaching a rigid plate to the encapsulant on the opposite side of the side from which the electrode is exposed from the encapsulant.
(6) separating the encapsulant-covered semiconductor element from the plate. ≪ RTI ID = 0.0 >
(7) separating the semiconductor element covered with the encapsulant from the plate prior to the step of attaching the semiconductor element structure
(8) applying a sensitizing solution to the side of the encapsulant from which the plate is removed to expose the electrode. ≪ RTI ID = 0.0 >
(9) A method of manufacturing a semiconductor device structure, characterized in that a rigid plate is a translucent, translucent, rigid plate side to expose light to a photosensitive liquid
(10) A method of manufacturing a semiconductor device structure characterized in that the rigid plate is translucent
(11) A method of manufacturing a semiconductor device structure characterized in that the translucent, rigid plate is glass
(12) Various combinations of the examples shown in Figs. 3-14, 16-37
The method of manufacturing a semiconductor device structure according to the present disclosure makes it possible to easily manufacture a semiconductor device structure or a package.
Also, the method of fabricating another semiconductor device structure according to the present disclosure makes it possible to fabricate a structure or package in which the encapsulant acts as a carrier.
Further, according to another method of manufacturing a semiconductor device structure according to the present disclosure, a light emitting device structure or a package in which a transparent encapsulant serves as a carrier can be manufactured.
Further, according to another method of manufacturing a semiconductor device structure according to the present disclosure, a plurality of semiconductor devices can be easily electrically connected.
Further, the method of manufacturing another semiconductor device structure according to the present disclosure makes it easy to electrically connect semiconductor devices of different structures
In addition, according to another method of manufacturing a semiconductor device structure according to the present disclosure, it is possible to form a rough surface or irregularities in an encapsulating material.
Further, according to another method of manufacturing a semiconductor device structure according to the present disclosure, it is possible to stabilize the process by using a hard (hard, undeformable, inflexible or rigid) plate.
In addition, according to the method of manufacturing another semiconductor device structure according to the present disclosure, the use of a transparent plate makes it possible to stabilize the exposure process.
Claims (4)
Positioning the semiconductor element on the plate, the method comprising: positioning the electrode of the semiconductor element toward the plate;
Covering the semiconductor element with an encapsulating material; And,
And attaching a rigid plate to the encapsulant opposite the side from which the electrode is exposed from the encapsulant.
Further comprising the step of applying a sensitizing solution on the side of the encapsulant from which the plate is removed to expose the electrode.
The rigid plate is translucent,
And exposing the photosensitive liquid by irradiating light on a translucent, rigid plate side.
The semiconductor element is a semiconductor light emitting element,
Wherein the rigid plate is translucent. ≪ RTI ID = 0.0 > 11. < / RTI >
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KR1020130045689A KR20140127099A (en) | 2013-04-24 | 2013-04-24 | Method of manufacutruing semiconductor device structure |
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KR1020130045689A KR20140127099A (en) | 2013-04-24 | 2013-04-24 | Method of manufacutruing semiconductor device structure |
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