KR20070060828A - LCD and its manufacturing method - Google Patents

Abstract

The liquid crystal display of the present invention and a method of manufacturing the same are used to form a gate electrode and a pixel electrode in one mask process using diffraction exposure, and a source / drain electrode, an active pattern, and the drain electrode and pixel electrode in another mask process. In order to simplify the manufacturing process and reduce the manufacturing cost by reducing the number of masks used in the manufacturing of the thin film transistor by forming a connecting electrode to connect the first substrate and the first substrate divided into a pixel portion and a pad portion, Providing a second substrate to be bonded; Forming a gate electrode, a gate line, and a pixel electrode on the pixel portion of the first substrate through a first mask process; Through the second mask process, a data line defining a pixel region is formed on the gate electrode of the pixel portion by substantially crossing the active pattern, the source / drain electrode, and the gate line, and electrically connecting the pixel electrode and the drain electrode. Forming a connection electrode to be connected; And forming a liquid crystal layer between the first substrate and the second substrate.

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME}

1 is an exploded perspective view schematically showing a general liquid crystal display device.

2A to 2E are cross-sectional views sequentially illustrating a manufacturing process of an array substrate in the liquid crystal display shown in FIG.

3 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

4A and 4B are cross-sectional views sequentially illustrating a manufacturing process along lines IIIa-IIIa ', IIIb-IIIb', and IIIc-IIIc 'of the array substrate shown in FIG.

5A to 5E are cross-sectional views illustrating the first mask process illustrated in FIG. 4A in detail.

6A to 6H are cross-sectional views illustrating the second mask process shown in FIG. 4B in detail.

** Explanation of symbols for main parts of drawings **

110: array substrate 116: first gate line

116P: Gate pad wiring 117: First data line

117P: Data pad wiring 118: Pixel electrode

121: gate electrode 122: first source electrode

123: drain electrode 124 ': active pattern

126P: Gate Pad Electrode 127P: Data Pad Electrode

150 ′: connecting electrode 216: second gate line

217: second data line 222: second source electrode

223: second drain electrode

The present invention relates to a liquid crystal display device and a manufacturing method thereof, and more particularly, to a liquid crystal display device and a method for manufacturing the same by reducing the number of masks to simplify the manufacturing process and improve the yield.

Recently, with increasing interest in information display and increasing demand for using a portable information carrier, a lightweight flat panel display (FPD), which replaces a conventional display device, a cathode ray tube (CRT), is used. The research and commercialization of Korea is focused on. In particular, the liquid crystal display (LCD) of the flat panel display device is an image representing the image using the optical anisotropy of the liquid crystal, is excellent in resolution, color display and image quality, and is actively applied to notebooks or desktop monitors have.

The liquid crystal display is largely composed of a color filter substrate as a first substrate, an array substrate as a second substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

In this case, a thin film transistor (TFT) is generally used as a switching element of the liquid crystal display, and an amorphous silicon thin film is used as a channel layer of the thin film transistor.

Since the manufacturing process of the liquid crystal display device basically requires a plurality of mask processes (ie, photolithography process) for fabricating an array substrate including a thin film transistor, a method of reducing the number of mask processes in terms of productivity is required. It is required.

Hereinafter, a structure of a general liquid crystal display device will be described in detail with reference to FIG. 1.

1 is an exploded perspective view schematically illustrating a general liquid crystal display.

As shown in the figure, the liquid crystal display device is largely a liquid crystal layer (liquid crystal layer) formed between the color filter substrate 5 and the array substrate 10 and the color filter substrate 5 and the array substrate 10 ( 30).

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 for implementing colors of red (R), green (G), and blue (B); A black matrix 6 that separates the sub-color filters 7 and blocks light passing through the liquid crystal layer 30, and a transparent common electrode that applies a voltage to the liquid crystal layer 30. 8)

In addition, the array substrate 10 may be arranged vertically and horizontally to define a plurality of gate lines 16 and data lines 17 and a plurality of gate lines 16 and data lines 17 that define a plurality of pixel regions P. The thin film transistor T, which is a switching element formed in the cross region, and the pixel electrode 18 formed on the pixel region P, are formed.

The color filter substrate 5 and the array substrate 10 configured as described above are joined to face each other by a sealant (not shown) formed at the outer side of the image display area to form a liquid crystal display panel. The bonding of 10 is performed through a bonding key (not shown) formed on the color filter substrate 5 or the array substrate 10.

2A to 2E are cross-sectional views sequentially illustrating a manufacturing process of an array substrate in the liquid crystal display shown in FIG. 1.

As shown in FIG. 2A, a gate electrode 21 made of a conductive metal material is formed on the substrate 10 by using a photolithography process (first mask process).

Next, as shown in FIG. 2B, the first insulating film 15A, the amorphous silicon thin film, and the n + amorphous silicon thin film are sequentially deposited on the entire surface of the substrate 10 on which the gate electrode 21 is formed. An active pattern 24 made of an amorphous silicon thin film is formed on the gate electrode 21 by selectively patterning the amorphous silicon thin film and the n + amorphous silicon thin film by using a photolithography process (second mask process).

In this case, the n + amorphous silicon thin film pattern 25 patterned in the same form as the active pattern 24 is formed on the active pattern 24.

2C, a source electrode is formed on the active pattern 24 by depositing a conductive metal material on the entire surface of the substrate 10 and then selectively patterning the same by using a photolithography process (third mask process). And the drain electrode 23 are formed. In this case, the n + amorphous silicon thin film pattern formed on the active pattern 24 has a predetermined region removed through the third mask process, thereby forming an ohmic − between the active pattern 24 and the source / drain electrodes 22 and 23. An ohmic contact layer 25 'is formed.

Next, as shown in FIG. 2D, after depositing the second insulating film 15B on the entire surface of the substrate 10 on which the source electrode 22 and the drain electrode 23 are formed, a photolithography process (fourth mask process) A portion of the second insulating layer 15B is removed to form a contact hole 40 exposing a portion of the drain electrode 23.

Finally, as shown in FIG. 2E, a transparent conductive metal material is deposited on the entire surface of the substrate 10 and then selectively patterned using a photolithography process (fifth mask process) to drain through the contact hole 40. The pixel electrode 18 electrically connected to the electrode 23 is formed.

As described above, fabrication of an array substrate including a thin film transistor requires a total of five photolithography processes to pattern a gate electrode, an active pattern, a source / drain electrode, a contact hole, a pixel electrode, and the like.

The photolithography process is a series of processes in which a pattern drawn on a mask is transferred onto a substrate on which a thin film is deposited to form a desired pattern. The photolithography process includes a plurality of processes such as photoresist coating, exposure, and development. As a result, many photolithography processes have many problems, such as lowering the production yield and increasing the probability of defects in the formed thin film transistors.

In particular, a mask designed to form a pattern is very expensive, and as the number of masks applied to the process increases, the manufacturing cost of the liquid crystal display device increases in proportion.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a liquid crystal display device having a reduced number of masks used for manufacturing a thin film transistor and a method of manufacturing the same.

Other objects and features of the present invention will be described in the configuration and claims of the invention described below.

In order to achieve the above object, the liquid crystal display of the present invention comprises a first substrate divided into a pixel portion and a pad portion; A pixel electrode formed of a pixel portion of the first substrate, a gate electrode made of a first conductive line, and a gate electrode made of a first conductive line and a second conductive layer; An active pattern formed on the gate electrode with a first insulating layer interposed therebetween; A second source electrode and a second drain electrode formed on the active pattern and formed of a first source electrode, a first drain electrode, and a fourth conductive layer; A connection electrode made of a fifth conductive film and electrically connecting the drain electrode and the pixel electrode; And a second substrate bonded to face the first substrate.

In addition, the manufacturing method of the liquid crystal display device of the present invention comprises the steps of providing a first substrate divided into a pixel portion and a pad portion and a second substrate bonded to the first substrate; Forming a gate electrode, a gate line, and a pixel electrode on the pixel portion of the first substrate through a first mask process; Through the second mask process, a data line defining a pixel region is formed on the gate electrode of the pixel portion by substantially crossing the active pattern, the source / drain electrode, and the gate line, and electrically connecting the pixel electrode and the drain electrode. Forming a connection electrode to be connected; And forming a liquid crystal layer between the first substrate and the second substrate.

Hereinafter, exemplary embodiments of a liquid crystal display and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention, and shows one pixel including a gate pad part and a data pad part.

In the actual array substrate, N gate lines and M data lines intersect and MxN pixels exist, but for simplicity, only one pixel is shown in the drawing.

As shown in the figure, a gate line 216 and a data line 217 are formed on the array substrate 110 in this embodiment to be arranged vertically and horizontally on the substrate 110 to define a pixel area. In this case, the gate line 216 shown in the drawing is a second gate line made of an opaque conductive material, and a first gate line made of a transparent conductive material is formed below the data line 217. Is a second data line made of a transparent conductive material, and a first data line made of an opaque conductive material is formed below.

A thin film transistor, which is a switching element, is formed in an intersection area of the second gate line 216 and the second data line 217, and is connected to the thin film transistor in the pixel area, so that a common color filter substrate (not shown) is formed. A pixel electrode 118 for driving a liquid crystal (not shown) is formed together with the electrode. The pixel electrode 118 is formed on the same layer as the first gate line using a transparent conductive material constituting the first gate line.

In this case, a gate pad electrode 126P and a data pad electrode 127P electrically connected to the second gate line 216 and the first data line are formed in an edge region of the array substrate 110. The scan signal and the data signal applied from the driving circuit unit (not shown) are transferred to the second gate line 216 and the first data line, respectively.

That is, the second gate line 216 and the first data line extend toward the driving circuit unit to form the gate pad wiring 116P and the data pad wiring, respectively, and the gate pad wiring 116P and the data pad wiring are respectively formed. Scanned and data signals are applied from the driving circuit unit through the gate pad electrode 126P and the data pad electrode 127P respectively disposed at the bottom and the top thereof and electrically connected to the gate pad wiring 116P and the data pad wiring, respectively. do.

In this case, the gate pad electrode 126P is formed on the same layer as the first gate line using a transparent conductive material constituting the first gate line, and the data pad electrode 127P is formed on the second data line. The transparent conductive material constituting the 217 is formed on the same layer as the second data line 217.

The thin film transistor includes a gate electrode 121 connected to a second gate line 216, a source electrode 222 connected to a second data line 217, and a drain electrode 223 connected to the pixel electrode 118. have. In this case, the source electrode 222 illustrated in the drawing is a second source electrode made of a transparent conductive material, and a first source electrode made of an opaque conductive material is formed under the source electrode, and the drain electrode 223 is transparent. A second drain electrode made of a conductive material is formed below the first drain electrode made of an opaque conductive material. In addition, the pixel electrode 118 is electrically connected to the drain electrode 223 and the plurality of connection electrodes 150 'on the upper portion of the pixel electrode 118, wherein the connection electrode 150' is capable of selectively etching a transparent conductive material. By using it, it becomes possible to form without a separate mask process.

In addition, the thin film transistor includes a first insulating film (not shown) for insulating the gate electrode 121 and the source / drain electrodes 222 and 223 and a gate voltage supplied to the gate electrode 121. And an active pattern 124 ′ forming a conductive channel between the 222 and the drain electrode 223.

The array substrate according to the present embodiment configured as described above forms the pixel electrode through the substantially same mask process in the process of forming the gate electrode and the gate line, and substantially the same mask process in the process of forming the source electrode and the drain electrode. By forming the active pattern and the connection electrode through the mask can be produced through a total of two mask processes, which will be described in detail through the manufacturing process of the following liquid crystal display device.

4A and 4B are cross-sectional views sequentially illustrating a manufacturing process of the array substrate illustrated in FIG. 3, and a process of manufacturing an array substrate of a pixel portion is shown on the left side, and an array substrate of a gate pad portion and a data pad portion is sequentially manufactured on the right side. The process to make is shown.

As shown in FIG. 4A, the gate electrode 121, the gate lines 116 and 216, and the pixel electrode 118 are formed in the pixel portion of the substrate 110 made of a transparent insulating material such as glass, and the gate pad portion is formed. The gate pad wiring 116P and the gate pad electrode 126P are formed. A gate electrode pattern 130 ′ patterned in the same manner as the gate electrode 121 is formed under the gate electrode 121. In addition, the gate lines 116 and 216 may include the first gate line 116 and the gate electrode made of the same transparent conductive material as the gate electrode pattern 130 ′, the pixel electrode 118, and the gate pad electrode 126P. And a second gate line 216 made of the same opaque conductive material as the gate pad wiring 116P.

At this time, the gate electrode 121, the gate lines 116 and 216, the pixel electrode 118, the gate pad wiring 116P and the gate pad electrode 126P are substantially the same photolithography process (first mask process). It will be formed through, which will be described in detail with reference to Figures 5a to 5e.

5A through 5E are cross-sectional views illustrating in detail a process of simultaneously forming a gate electrode, a gate line, and a pixel electrode in FIG. 4A, and sequentially illustrate a first mask process of the present embodiment.

As shown in FIG. 5A, the first conductive layer 130 and the second conductive layer 230 are sequentially deposited on the entire surface of the substrate 110.

In this case, the first conductive layer 130 may be formed of a transparent material such as indium tin oxide (ITO) or indium zinc oxide (IZO) to form a pixel electrode and a gate pad electrode. A conductive material may be used, and the second conductive layer 230 may include aluminum (Al), aluminum alloy, and tungsten to form a gate electrode, a second gate line, and a gate pad wiring. Low resistance opaque conductive materials such as W), copper (Cu), chromium (Cr), molybdenum (Mo), and the like may be used.

Thereafter, the photoresist film 170 made of a photoresist such as photoresist is formed on the entire surface of the substrate 110, and then light is selectively irradiated onto the photoresist film 170 through the diffraction mask 180 of the present embodiment.

In this case, the diffraction mask 180 used in the present embodiment is applied with a transmission region I and a slit pattern that transmit all of the irradiated light so that only a part of the light is transmitted and a portion of the slit region II and all of the irradiated light are blocked. A blocking region III is provided to block the light, and only the light passing through the diffraction mask 180 is irradiated to the photosensitive film 170.

Subsequently, after the photoresist film 170 exposed through the diffraction mask 180 is developed, as shown in FIG. 5B, light is blocked or partially blocked through the blocking region III and the slit region II. The photoresist patterns 170A to 170E having a predetermined thickness remain in the exposed region, and the photoresist layer is completely removed in the transmission region I through which all the light is transmitted, thereby exposing the surface of the second conductive layer 230.

In this case, the first photoresist pattern 170A and the second photoresist pattern 170B formed through the slit region II may include the third photoresist pattern 170C and the fifth photoresist pattern 170E formed in the blocking region III. It is formed thinner. In addition, the photoresist film is completely removed in the region where all the light is transmitted through the transmission region I. This is because a positive photoresist is used, and the present invention is not limited thereto, and a negative photoresist may be used.

Next, as shown in FIG. 5C, when the first conductive film and the second conductive film formed below are selectively removed using the photosensitive film patterns 170A to 170E formed as above as a mask, the substrate of the pixel portion may be removed. The gate electrode 121 made of the second conductive film and the pixel electrode 118 made of the first conductive film are formed at 110 and the gate line 116 made of a double layer of the first conductive film and the second conductive film. 216 is formed. In this case, the gate electrode pattern 130 ′ formed of the first conductive layer is patterned and remains under the gate electrode 121 in the same shape as the gate electrode 121, and above the pixel electrode 118. The pixel electrode pattern 230 ′ formed of the second conductive layer is patterned and remains in the same shape as the pixel electrode 118.

In addition, a gate pad electrode 126P made of the first conductive film is formed on the substrate 110 of the gate pad part, and a second conductive film pattern made of the second conductive film is formed on the gate pad electrode 126P. 230 "is patterned and remains the same as the gate pad electrode 126P.

Subsequently, when an ashing process is performed to remove a portion of the photoresist patterns 170A to 170E, as illustrated in FIG. 5D, the pixel electrode pattern 230 ′ and the second conductive layer pattern 230 ″ are removed. ), The first photoresist layer pattern 170A and the second photoresist layer pattern 170B of the slit region II to which the diffraction exposure is applied are completely removed, and thus the pixel electrode pattern 230 'and the second conductive layer are respectively removed. The surface of the pattern 230 "is exposed.

In this case, the third photoresist pattern 170D to the fifth photoresist pattern 170E may include the sixth photoresist pattern 170C ′ through which thicknesses of the first photoresist pattern 170A and the second photoresist pattern 170B are removed. The eighth photoresist pattern 170E 'remains only in a predetermined region corresponding to the blocking region III.

Subsequently, as shown in FIG. 5E, the pixel electrode pattern on the pixel electrode 118 is removed by using the remaining sixth photoresist pattern 170C 'to eighth photoresist pattern 170E' as a mask. The gate pad wiring 116P exposing a part of the gate pad electrode 126P is formed by exposing the electrode 118 to the outside and removing a part of the second conductive layer pattern.

After removing the remaining sixth photoresist pattern 170C 'through the eighth photoresist pattern 170E', as illustrated in FIG. 4B, the pixel portion of the substrate 110 may be processed in one mask process. The gate electrode 121, the gate lines 116 and 216, and the pixel electrode 118 are formed, and the gate pad wiring 116P and the gate pad electrode 126P are formed in the gate pad portion.

Next, as illustrated in FIG. 4B, an active pattern 124 ′ formed of an amorphous silicon thin film is formed on the gate electrode 121 by using a single photolithography process (second mask process), and at the same time, a third photolithography process is performed. Source electrodes 122 and 222 and drain electrodes 123 and 223 formed of a double layer of a conductive film and a fourth conductive film are formed. In this case, the drain electrodes 123 and 223 are electrically connected to the pixel electrode 118 and the connection electrode 150 ′ under the drain electrode, and a part of the source electrodes 122 and 222 is connected to the gate line 116. Data lines 117 and 217 defining pixel regions substantially intersecting with 216 are formed (see FIG. 3).

The active pattern 124 ′ is formed of an n + amorphous silicon thin film, and is patterned in the same form as the source / drain electrodes 122, 222, 123, and 223 so that a predetermined region of the active pattern 124 ′ and the source / drain electrode are disposed thereunder. An ohmic contact layer 125 ′ that ohmic-contacts the 122, 222, 123, and 223 is formed.

In addition, a data pad line 117P made of the third conductive film and a data pad electrode 127P made of the fourth conductive film are formed on the substrate 110 of the data pad part through the second mask process.

As described above, in the present embodiment, the active pattern 124 'and the source / drain electrodes 122, 222, 123, and 223 are simultaneously formed by one mask process (second mask process) using diffraction exposure. The second mask process will be described in detail.

6A through 6H are cross-sectional views illustrating in detail a process of simultaneously forming an active pattern and a source / drain electrode in FIG. 4B, and sequentially illustrate a second mask process of the present embodiment.

As shown in FIG. 6A, the gate electrode 121, the gate lines 116 and 216, the pixel electrode 118, the gate pad wiring 116P and the gate pad electrode 126P are formed on the entire surface of the substrate 110. The first photosensitive film 270 including the first insulating film 115A, the amorphous silicon thin film 124, the n + amorphous silicon thin film 125, the third conductive film 120, the fourth conductive film 220, and the photosensitive material in order. After forming the light, the first photosensitive film 270 is selectively irradiated with light through a diffraction mask 280. As the third conductive layer 120, an opaque conductive material having the same low resistance as that of the second conductive layer may be used. As the fourth conductive layer 220, the same indium tin oxide as the first conductive layer may be used. Alternatively, a transparent conductive material such as indium zinc oxide may be used.

In this case, the diffraction mask 280 used in the second mask process is applied with a transmission region I and a slit pattern for transmitting all of the irradiated light, so that only a part of the light is transmitted, and a portion of the slit region II and all the irradiated light are applied. A blocking region III for blocking light is provided, and only the light passing through the diffraction mask 280 is irradiated to the first photosensitive layer 270.

Subsequently, after the first photoresist layer 270 exposed through the diffraction mask 280 is developed, as shown in FIG. 6B, all of the light is blocked through the blocking region III and the slit region II. Photoresist patterns 270A to 270D having a predetermined thickness remain in the partially blocked region, and the first photoresist layer is completely removed in the transmissive region I through which all the light is transmitted to expose the surface of the fourth conductive layer 220. .

In this case, the first photoresist pattern 270A formed through the slit region II is thinner than the second photoresist pattern 270B to the fourth photoresist pattern 270D formed in the blocking region III. In addition, the first photoresist film is completely removed in the region where all the light is transmitted through the transmission region I. This is because a positive photoresist is used, and the present invention is not limited thereto, and a negative photoresist may be used. Do.

Next, as shown in FIG. 6C, the first insulating film, the amorphous silicon thin film, the n + amorphous silicon thin film, the third conductive film, and the fourth formed under the photosensitive film patterns 270A to 270D formed as a mask as a mask may be used. When the conductive layer is selectively removed, an active pattern 124 ′ formed of an amorphous silicon thin film is formed on the gate electrode 121 of the pixel portion, and at least one contact hole 140 exposing a portion of the pixel electrode 118. ) Is formed. In this case, an ohmic contact layer 125 'including the n + amorphous silicon thin film, a third conductive film, and a fourth conductive film is formed on the active pattern 124', the third conductive film pattern 120 ', and the fourth conductive film. The conductive film pattern 220 'is patterned and remains in the same shape as the active pattern 124'.

In addition, a data pad line 117P made of the third conductive film and a data pad electrode 127P made of the fourth conductive film are formed on the substrate 110 of the data pad part. Under the data pad line 117P, an amorphous silicon thin film pattern 124 ″ made of the amorphous silicon thin film and an n + amorphous silicon thin film pattern 125 ″ made of an n + amorphous silicon thin film are the same as the data pad wire 117P. It remains patterned in form.

Subsequently, when an ashing process of removing a portion of the photoresist patterns 270A to 270D is performed, a predetermined region, that is, a slit region to which diffraction exposure is applied, is formed on the active pattern 124 ', as shown in FIG. 6D. The first photoresist layer pattern 270A of II) is completely removed to expose the surface of the fourth conductive layer pattern 220 '.

In this case, the second photoresist pattern 270B to the fourth photoresist pattern 270D may have the fifth photoresist pattern 270B ′ through the seventh photoresist pattern 270D ′ removed by the thickness of the first photoresist pattern 270A. Therefore, only the predetermined area corresponding to the blocking area III remains.

Thereafter, as shown in FIG. 6E, the ohmic contact layer and the third upper portion of the active pattern 124 ′ are formed using the remaining fifth photoresist pattern 270B ′ to seventh photoresist pattern 270D ′ as a mask. A part of the conductive film pattern and the fourth conductive film pattern are removed. In this case, a predetermined region, that is, a channel region of the active pattern 124 'is exposed to the outside, and the third conductive layer pattern and the fourth conductive layer pattern are selectively patterned to cover the ohmic contact layer 125'. The source electrodes 122 and 222 and the drain electrodes 123 and 223 electrically connected to predetermined regions of the active pattern 124 'are formed through the via.

That is, the source electrodes 122 and 222 of the present embodiment are composed of a double layer of an opaque first source electrode 122 and a transparent second source electrode 222, and the drain electrodes 123 and 223 are opaque first drains. A double layer of the electrode 123 and the transparent second drain electrode 223 is formed.

In this case, as described above, some of the source electrodes 122 and 222 substantially cross the gate lines 116 and 216 to form data lines 117 and 217 defining pixel regions.

6F, the fifth conductive layer 150 is formed of a transparent conductive material over the entire surface of the substrate 110 on which the fifth photoresist pattern 270B ′ to the seventh photoresist pattern 270D ′ remain. do.

In this case, the fifth conductive layer 150 is a transparent material such as indium tin oxide or indium zinc oxide to form a connection electrode electrically connecting the pixel electrode 118 and the drain electrodes 123 and 223. It may include a conductive material.

In this case, when the ashing process of removing a part of the fifth photoresist pattern 270B ′ to the seventh photoresist pattern 270D ′ remaining on the substrate 110 is performed before the fifth conductive layer 150 is formed. A portion of the sixth photoresist layer pattern 270C ′ on the drain electrodes 123 and 223 is removed to electrically connect the pixel electrode 118 and the drain electrodes 123 and 223 through a process to be described later. The sixth photoresist pattern 270C ′ may have an advantage of being formed on the second drain electrode 223 from which the sixth photoresist pattern 270C ′ is removed.

Thereafter, a second photosensitive film 370 made of a photosensitive material is formed on the entire surface of the substrate 110 on which the fifth conductive film 150 is formed.

As illustrated in FIG. 6G, an ashing process of removing a portion of the second photoresist film is performed to expose the fifth conductive film 150 to the outside in a region other than the contact hole region. In this case, the eighth photoresist pattern 370 'having a portion of the thickness removed through the ashing process remains only in the upper portion of the contact hole region of the pixel portion.

In this case, the contact hole region has a relatively deeper depth than the width, and thus, in the process of removing the second photoresist layer of the other region, an eighth photoresist pattern 370 ′ partially removed is left on the contact hole region.

When only the exposed fifth conductive layer 150 is selectively removed, a connection electrode electrically connecting the drain electrodes 123 and 223 and the pixel electrode 118 to the pixel portion as shown in FIG. 6H. 150 'is formed.

In this case, the connection electrode 150 ′ is formed using a portion of the photoresist patterns 270B ′ to 270D ′ and 370 ′ for forming the source / drain electrodes 122, 222, 123, and 223 so that no additional mask process is required. There is an advantage.

In the present embodiment, an amorphous silicon thin film transistor using an amorphous silicon thin film as the channel layer is described as an example. However, the present invention is not limited thereto. do.

In addition, the present invention can be used not only in liquid crystal display devices but also in other display devices fabricated using thin film transistors, for example, organic light emitting display devices in which organic light emitting diodes (OLEDs) are connected to driving transistors. have.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

As described above, the liquid crystal display device and the method of manufacturing the same according to the present invention pattern the gate electrode, the gate line and the pixel electrode at the same time, and form the active pattern, the source electrode and the drain electrode in one mask process to manufacture the thin film transistor. By reducing the number of masks used, the manufacturing process and cost can be reduced.

In addition, the liquid crystal display according to the present invention and a method of manufacturing the same by forming a connection electrode for electrically connecting the pixel electrode and the drain electrode by using the photosensitive film pattern used when forming the source electrode and the drain electrode. The process can be omitted.

Claims (28)

Providing a first substrate divided into a pixel portion and a pad portion, and a second substrate joined to face the first substrate; Forming a gate electrode, a gate line, and a pixel electrode on the pixel portion of the first substrate through a first mask process; Through the second mask process, a data line defining a pixel region is formed on the gate electrode of the pixel portion by substantially crossing the active pattern, the source / drain electrode, and the gate line, and electrically connecting the pixel electrode and the drain electrode. Forming a connection electrode to be connected; And Forming a liquid crystal layer between the first substrate and the second substrate. The method of claim 1, wherein the forming of the gate electrode, the gate line and the pixel electrode is performed. Forming a first conductive film and a second conductive film on the first substrate; Applying a diffraction mask to form a first photoresist pattern and a second photoresist pattern having a first thickness in the first region and the second region, respectively, and a third photoresist pattern having a second thickness in the third region to the fifth region, Forming a fifth photoresist pattern; By selectively removing the first conductive film and the second conductive film by using the first photosensitive film pattern to the fifth photosensitive film pattern as a mask, a pixel electrode made of the first conductive film is formed in the first region and the third region. Forming a gate electrode formed of the second conductive film on the substrate, and forming a gate pad electrode formed of the first conductive film in the second region and the fifth region; Removing the first photoresist pattern and the second photoresist pattern, and simultaneously removing a portion of the third to fifth photoresist patterns to form a sixth to eighth photoresist pattern having a third thickness; And Using the sixth to eighth photoresist patterns as masks, the second conductive layer in the first region is removed to expose the pixel electrode surface, and the second conductive layer in the second region is removed to gate the fifth region. A method of manufacturing a liquid crystal display device comprising the step of forming a pad wiring line. The method of claim 2, further comprising forming a gate electrode pattern formed of the first conductive layer under the gate electrode and patterned in the same form as the gate electrode. . 3. The method of claim 2, further comprising forming a first gate line formed of the first conductive layer in the fourth region and forming a second gate line formed of the second conductive layer thereon. A method of manufacturing a liquid crystal display device. The liquid crystal display of claim 2, wherein the first conductive layer comprises a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Method of manufacturing the device. The method of claim 2, wherein the second conductive film is made of aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), chromium (Cr), molybdenum (molybdenum); And a low resistance opaque conductive material such as Mo). The method of claim 2, wherein the forming of the first to fifth photoresist patterns is performed. Forming a photoresist film on the second conductive film; Irradiating light to the photosensitive film through a diffraction mask provided with a first transmission region for transmitting all the light, a second transmission region for transmitting only a part of the light, and a blocking region for blocking the light; And And developing photoresist patterns on the second conductive layer by developing the photoresist film irradiated with light through the diffraction mask. 8. The method of claim 7, wherein in the case of using a positive type photosensitive film, the second transmission region of the diffraction mask is applied to the first region above the pixel region and the second region above the gate pad, and the blocking region is the gate. And a third region in which an electrode is to be formed, a fourth region in which the gate line is to be formed, and a fifth region in which the gate pad wiring is to be formed. The method of claim 7, wherein the diffraction mask has a diffraction pattern formed in a second transmissive region that transmits only a portion of light, and thus has a first thickness thinner than the second thickness in the first region above the pixel region and the second region above the gate pad. A first photosensitive film pattern and a second photosensitive film pattern are formed. The method of claim 1, wherein forming the active pattern, the source / drain electrode, and the connection electrode Forming a first insulating film, an amorphous silicon thin film, an n + amorphous silicon thin film, a first conductive film, a second conductive film, and a first photosensitive film on the first substrate; The first photoresist layer is exposed and developed through a diffraction mask to form a first photoresist layer pattern having a first thickness in the first region above the gate line, and includes second and third regions and pads on the left and right sides of the first region. Forming second to fourth photosensitive film patterns each having a second thickness in the negative fourth region; By selectively removing the first insulating film, the amorphous silicon thin film, the n + amorphous silicon thin film, the first conductive film and the second conductive film by using the first photoresist pattern to the fourth photoresist pattern as masks, the first upper portion of the gate electrode is formed. An active pattern made of the amorphous silicon thin film is formed in a region to a third region, and at least one contact hole is formed to expose a predetermined region of the pixel electrode, and the first conductive layer is formed in the fourth region of the pad portion. Forming a data pad electrode comprising a data pad line and the second conductive film; Removing the first photoresist pattern and at least a portion of the second photoresist pattern to form a fifth to seventh photoresist pattern having a third thickness; The n + amorphous silicon thin film, the first conductive film, and the second conductive film of the second region and the third region are selectively removed by using the fifth photoresist pattern to the seventh photoresist pattern as a mask to form the first conductive layer on the active pattern. Forming a source / drain electrode comprising a double layer of a film and a second conductive film; Forming a third conductive film made of a transparent conductive material on the first substrate; Forming a second photoresist film on the first substrate; Removing a portion of the second photosensitive film to expose a third conductive film in a region other than the contact hole region; And Selectively removing the exposed third conductive layer to form a connection electrode electrically connecting a portion of the exposed pixel electrode and the drain electrode to the contact hole region. . The method of claim 10, wherein the first conductive film is aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), chromium (Cr), molybdenum (molybdenum); And a low resistance opaque conductive material such as Mo). The liquid crystal display of claim 10, wherein the second conductive layer comprises a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Method of manufacturing the device. 11. The method of claim 10, wherein a portion of the source electrode forms a data line formed of a double layer of the first conductive film and the second conductive film. The method of claim 10, wherein the first photosensitive film is irradiated with light through a diffraction mask provided with a first transmission region for transmitting all the light, a second transmission region for transmitting only a part of the light and a blocking region for blocking the light. Method of manufacturing a liquid crystal display device. 15. The method of claim 14, wherein in the case of using a positive type photosensitive film, the second transmission region of the diffraction mask is applied to the first region above the gate electrode, and the blocking region is formed between the second region on the left and right of the first region. And a third region and a fourth region in which the data pad wiring is to be formed. The method of claim 14, wherein the diffraction mask has a diffraction pattern formed in a second transmissive region that transmits only a part of the light to form a first photoresist pattern having a first thickness thinner than the second thickness in the first region above the gate electrode. Method of manufacturing a liquid crystal display device, characterized in that. The method of claim 10, wherein the first region corresponds to a channel region of an active pattern, and the second and third regions correspond to a source region and a drain region of the active pattern. . 15. The method of claim 14, wherein the contact hole region is relatively deeper than the region having a different depth than the width, the eighth photoresist pattern in which a portion of the second photoresist layer is removed in the process of removing the second photoresist film remains Method of manufacturing a liquid crystal display device, characterized in that. A first substrate divided into a pixel portion and a pad portion; A pixel electrode formed of a pixel portion of the first substrate, a gate electrode made of a first conductive line, and a gate electrode made of a first conductive line and a second conductive layer; An active pattern formed on the gate electrode with a first insulating layer interposed therebetween; A second source electrode and a second drain electrode formed on the active pattern and formed of a first source electrode, a first drain electrode, and a fourth conductive layer; A connection electrode made of a fifth conductive film and electrically connecting the drain electrode and the pixel electrode; And And a second substrate bonded to the first substrate. 20. The liquid crystal display of claim 19, further comprising an ohmic contact layer formed between the active pattern and the source / drain electrode to ohmic-contact a predetermined region of the active pattern and the source / drain electrode. Device. 20. The method of claim 19, wherein the first conductive film, the fourth conductive film, and the fifth conductive film are transparent conductive materials such as indium tin oxide (ITO) or indium zinc oxide (IZO). Liquid crystal display comprising a substance. The method of claim 19, wherein the second conductive layer and the third conductive layer are formed of aluminum (Al), aluminum alloy, Al alloy, tungsten (W), copper (Cu), and chromium (Cr). And a low resistance opaque conductive material such as molybdenum (Mo). 20. The liquid crystal display device according to claim 19, further comprising a gate pad electrode formed on the pad portion of the first substrate and formed of the first conductive layer. 24. The liquid crystal display device according to claim 23, further comprising a gate pad wiring line formed in a predetermined region above the gate pad electrode and comprising the second conductive layer. 25. The liquid crystal display of claim 24, wherein the gate electrode, the gate line, the pixel electrode, the gate pad electrode, and the gate pad wiring line are formed through substantially the same mask process. 20. The liquid crystal display device according to claim 19, wherein a gate electrode pattern formed of the first conductive layer and patterned in the same shape as the gate electrode remains under the gate electrode. 20. The liquid crystal display device according to claim 19, further comprising a data pad line formed on the pad portion of the first substrate and comprising a data pad line formed of the third conductive layer and a data pad electrode formed of the fourth conductive layer. . 28. The liquid crystal display device according to claim 27, wherein the active pattern, the source / drain electrodes, the connection electrodes, the data pad wires, and the data pad electrodes are formed through substantially the same mask process.

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