KR20070017625A - Liquid crystal display and manufacturing method of the same - Google Patents

Abstract

The present invention provides a liquid crystal display and a method of manufacturing the same, which can simplify the process and secure a spatial margin of the pad area.

The liquid crystal display according to the present invention and a method of manufacturing the same are connected to an input / output terminal of each integrated circuit and supply an inspection signal to an input / output pad formed on a substrate, a signal line connected to each of the output pads, and the signal line. Providing a thin film transistor substrate including a shorting bar formed outside the scribing line, connecting the signal line and the shorting bar, and a test line formed on a plane different from at least one of the shorting bar and the signal line; Preparing a color filter substrate facing the thin film transistor substrate, bonding the thin film transistor substrate and the color filter substrate together to form a liquid crystal display panel, and inspecting whether the liquid crystal display panel is defective using the shorting bar. And crossing the liquid crystal display panel of the inspection result good judgment with the inspection line. Along the scribing line formed by the scribing direction glacial provides a method of manufacturing the liquid crystal display device comprising the steps:

Description

Liquid crystal display and its manufacturing method {LIQUID CRYSTAL DISPLAY AND MANUFACTURING METHOD OF THE SAME}

1 is an exemplary view showing an example of a region in which a driving IC is attached to one side of a conventional thin film transistor substrate by a chip on glass (COG) method.

FIG. 2 is a diagram illustrating a region in which a driving IC of a gate pad region of a liquid crystal display panel of the liquid crystal display according to the first exemplary embodiment of the present invention is mounted.

3 is a cross-sectional view taken along line II ′ of FIG. 2.

4 is a view showing a region in which a driving IC of a gate pad region of a liquid crystal display panel of a liquid crystal display according to a second exemplary embodiment of the present invention is mounted.

FIG. 5 is a cross-sectional view taken along line II-II ′ of FIG. 4.

FIG. 6 is a diagram illustrating a region in which a driving IC of a gate pad region of a liquid crystal display panel of a liquid crystal display according to a third exemplary embodiment of the present invention is mounted.

FIG. 7 is a cross-sectional view taken along line III-III ′ of FIG. 6.

FIG. 8 is a diagram illustrating a region in which a driving IC of a data pad region of a liquid crystal display panel of a liquid crystal display according to a fourth exemplary embodiment of the present invention is mounted.

9 is a cross-sectional view taken along line IV-IV 'of FIG. 8.

<Description of main parts of drawing>

124,224,324: Gate driver IC 132,232,332: Gate line

150,350: Gate input pad 152,252,352: Gate input line

162, 262, 362: Gate contact hole 164, 264, 364, 464: First inspection contact hole

166,266,366,466: Second inspection contact hole 170,270,370: Gate output pad

172,272,372 gate lower electrode 174,274,374 gate upper electrode

178,278,378,478: Inspection line 182,282,382,482: Scribing line

184a, 284a, 384a, 484a: Aude Shorting Bar 184b, 284b, 384b, 484b: Even Shorting Bar

192,292,392,492: gate insulating film 194,294,394,494 protective film

368,468: 3rd inspection contact hole 426: data drive IC

442: data line 450: data input pad

470: data output pad 474: data output upper electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display and a method for manufacturing the same, and more particularly, to a liquid crystal display and a method for manufacturing the same, which can simplify a process and secure a spatial margin of a pad area.

Liquid crystal displays display an image by adjusting the light transmittance of the liquid crystal using an electric field. To this end, a liquid crystal display includes a liquid crystal display panel comprising a thin film transistor substrate, a color filter substrate, and a liquid crystal layer formed between the two substrates bonded to each other, and supplying scan signals and image information to the liquid crystal display panel to provide a liquid crystal panel. And a driving circuit to operate.

The thin film transistor substrate includes a gate line and a data line, a thin film transistor formed of a switch element at each intersection of the gate lines and the data lines, a pixel electrode formed in a liquid crystal cell unit and connected to the thin film transistor, and coated thereon. Composed of aligned alignment films. The gate lines and the data lines receive signals from the driving circuits through the respective pad parts. The thin film transistor supplies the pixel signal supplied to the data line to the pixel electrode in response to the scan signal supplied to the gate line.

The color filter substrate includes color filters formed in units of liquid crystal cells, a black matrix for distinguishing between color filters and reflecting external light, a common electrode supplying a reference voltage to the liquid crystal cells in common, and an alignment layer applied thereon. It is composed.

1 is an exemplary view showing an example of a region in which a driving IC is attached to one side of a conventional thin film transistor substrate by a chip on glass (COG) method.

Referring to FIG. 1, an input pad 50, an output pad 70, and shorting bars 84a and 84b are formed in a pad region of a thin film transistor substrate 12 exposed by a color filter substrate (not shown). .

The input pad 50 is in contact with a thin flexible film 25 made of a polymer material to supply a control signal, a power signal, or pixel data to a driving IC (hereinafter referred to as a driving IC). In this case, the driving IC drives at least one signal line 32 of the gate line and the data line.

The output pad 70 supplies the driving signal of any one of the scan signal and the pixel signals generated by the driving IC 24 to one of the gate line and the data line.

The shorting bars 84a and 84b are formed in the pad region of the thin film transistor substrate for a signal inspection process for detecting signal lines such as short and open of the signal lines and defects of the thin film transistor after the manufacturing process. . The shorting bars 84a and 84b have a constant width with the signal line 32 by a laser trimming process prior to the attachment of the driving IC 24 in order to apply an individual driving signal to the signal line 32 after the inspection process. It is disconnected. The drive IC 24 is mounted in the disconnected area. Here, when the laser trimming process is performed, the time for producing the product is increased and thus the product yield is relatively low. In addition, in the laser trimming process, the beginning and end portions of the connecting portion of the shorting bar and the signal line are relatively larger than other portions removed by the laser. In this case, as the size of the liquid crystal display becomes smaller, the spatial margin between the pads or the signal lines is reduced, which may affect the pads or the signal lines, resulting in defects in the signal lines.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a liquid crystal display device and a method of manufacturing the same, which can simplify a process and secure a spatial margin of a pad area.

In order to achieve the above technical problem, the present invention provides an input / output terminal connected to an input / output terminal of each integrated circuit and a test signal supplied to an input / output pad formed on a substrate, a signal line connected to each of the output pads, and the signal line. Providing a thin film transistor substrate including a shorting bar formed outside the scribing line, connecting the signal line and the shorting bar, and a test line formed on a plane different from at least one of the shorting bar and the signal line; Preparing a color filter substrate facing the thin film transistor substrate, bonding the thin film transistor substrate and the color filter substrate together to form a liquid crystal display panel, and inspecting whether the liquid crystal display panel is defective using the shorting bar. And crossing the liquid crystal display panel of the inspection result good judgment with the inspection line. Is along the scribing line formed by the scribing direction glacial provides a method of manufacturing the liquid crystal display device comprising the steps:

The preparing of the thin film transistor substrate may include forming a shorting bar on the substrate, sequentially forming a gate insulating film and a protective film to cover the shorting bar, and passing the shorting bar through the gate insulating film and the protective film. And forming a test contact hole to expose the test contact hole, and forming a test line connected to the shorting bar through the test contact hole on the passivation layer.

The preparing of the thin film transistor substrate may include forming a shorting bar on the substrate, forming a gate insulating film to cover the shorting bar, forming an inspection line on the gate insulating film, and performing the inspection. Forming a protective film so as to cover the line, forming a test contact hole through the gate insulating film and the protective film to expose the shorting bar and the test line, and through the test contact hole on the protective film. And forming a connection electrode connected to the inspection line.

The preparing of the thin film transistor substrate may further include simultaneously forming an input line connecting the input pads of the integrated circuits with the shorting bar.

According to the present invention, an input / output pad connected to an input / output terminal of each integrated circuit and an input / output pad formed on a substrate, a signal line connected to each of the output pads, and a test signal are supplied to the signal line. A thin film transistor substrate including a shorting bar formed outside the line, a test line connecting the signal line and the shorting bar, and a test line formed of the same metal on the same plane as the signal line, and a connection electrode for connecting the shorting bar and the test line. Providing a color filter substrate facing the thin film transistor substrate, bonding the thin film transistor substrate and the color filter substrate together to form a liquid crystal display panel, and using the shorting bar. Inspecting whether there is a defect of the liquid crystal display panel, and determining And scribing along the scribing line formed in a direction crossing the inspection line.

The preparing of the thin film transistor substrate may include forming the shorting bar and the inspection line on the substrate, sequentially forming a gate insulating film and a protective layer to cover the shorting bar and the inspection line, and forming the gate. Forming an inspection contact hole through the insulating layer and the passivation layer to expose the shorting bar and the inspection line, and forming the connection electrode connected to the shorting bar and the inspection line through the inspection contact hole on the protective layer; Characterized in that it comprises a.

The preparing of the thin film transistor substrate may further include forming an input line connecting the input pads of the integrated circuits to the gate insulating layer.

The preparing of the thin film transistor substrate may include forming a first output lower electrode of the output pad at the same time as the test line, and an input lower electrode of the input pad and a second of the output pad on the gate insulating layer. Forming an output lower electrode, forming a passivation layer to cover the input lower electrode and the second output lower electrode, penetrating the gate insulating film and the passivation layer, and forming the first output lower electrode and the second output lower electrode. And forming a plurality of contact holes exposing an input lower electrode, an output upper electrode connected to the first and second output lower electrodes through the contact hole on the passivation layer, and an input connected to the input lower electrode. Forming an upper electrode.

According to an exemplary embodiment of the present invention, an LCD includes an input / output pad connected to an input / output terminal of each integrated circuit and formed on a substrate, a signal line connected to each of the output pads, and a test signal supplied to the signal line. A shorting bar formed outside the ice line and removed by a scribing process, and formed in a direction crossing the scribing line to connect the signal line and the shorting bar, and different from at least one of the shorting bar and the signal line; It provides a liquid crystal display device having an inspection line formed on a plane.

The shorting bar may be formed of a gate metal on the substrate, and the inspection line may be formed of a transparent conductive material on a gate insulating film and a protective film sequentially formed to cover the shorting bar.

And a test contact hole for exposing the shorting bar through the gate insulating film and the protective film so that the shorting bar and the test line are connected to each other.

The shorting bar may be removed by a scribing process and further include a connection electrode connecting the shorting bar and the inspection line.

The shorting bar is formed of a gate metal on the substrate, the inspection line is formed of a source / drain metal on a gate insulating film formed to cover the shorting bar, and the connection electrode is formed on a protective film formed to cover the inspection line. It is characterized by being formed of a transparent conductive material.

And a test contact hole through the gate insulating film and the passivation layer to expose the shorting bar and the test line so that the shorting bar, the test line and the connection electrode are connected to each other.

On the other hand, it is characterized in that it further comprises an input line formed on the same plane as the shorting bar and the same metal and connecting the input pad of each of the integrated circuit.

According to an exemplary embodiment of the present invention, an LCD includes an input / output pad connected to an input / output terminal of each integrated circuit and formed on a substrate, a signal line connected to each of the output pads, and a test signal supplied to the signal line. A shorting bar formed outside the ice line and removed by a scribing process, and connected to the signal line and the shorting bar and formed in a direction crossing the scribing line and formed of the same metal on the same plane as the signal line And a connection electrode for connecting the shorting bar and the inspection line.

The shorting bar and the inspection line may be formed of a gate metal on the substrate, and the connection electrode may be formed of a transparent conductive material on the gate insulating film and the protective layer formed to cover the inspection line.

And an input line formed on a plane different from the shorting bar and connecting the input pads of the integrated circuits.

The input pad may be connected to an input lower electrode overlapping the inspection line with the gate insulating layer interposed therebetween, a contact hole through the passivation layer to expose the input lower electrode, and a connection with the input lower electrode through the contact hole. It characterized in that it comprises an input upper electrode.

The output pad may include a first output lower electrode extending from the inspection line, a second output lower electrode extending from the signal line on the gate insulating layer formed to cover the first output lower electrode, and the gate insulating layer. And a contact hole through the passivation layer to expose the first and second output lower electrodes, and an output upper electrode connected to the first and second output lower electrodes through the contact hole.

Other objects and advantages of the present invention in addition to the above objects will become apparent from the detailed description of the following embodiments with reference to the accompanying drawings.

Hereinafter, a preferred embodiment of the present invention will be described with reference to the accompanying drawings.

Although the liquid crystal display panel substantially consists of a thin film transistor substrate and a color filter substrate, the present invention is characterized in that the connection and cutting of the output line and the shorting bar formed in the pad region are described in detail. In the drawings, other structures will be omitted and described.

FIG. 2 is a plan view illustrating a region in which a driving IC of a gate pad region of a liquid crystal display panel according to a first exemplary embodiment of the present invention is mounted, and FIG. 3 is a cross-sectional view taken along the line II ′ of FIG. 2.

2 and 3, in the gate pad region of the liquid crystal display panel, a plurality of gate input pads 150 contacting the input terminal of the gate driving IC 124 and a plurality of contacting output terminals of the gate driving IC 124 are provided. The gate output pad 170, the shorting bars 184a and 184b for inspecting the gate line 132, and the test line 178 for electrically connecting the gate lines 132 and the shorting bars 184a and 184b. It is configured to include.

The gate input pad 150 is connected to the input terminal of the gate driving IC 124 after the inspection process. The gate input pad 150 is electrically connected to a gate input pad (not shown) corresponding to the adjacent gate driving IC 124 through a gate input line 152. Here, the gate input pad 150 and the gate input line 152 are formed of a gate metal layer.

The gate output pad 170 is formed to be spaced apart from the gate input line 152 so as not to overlap the gate input line 152. The gate output pad 170 is connected to an output terminal of the gate driving IC 124 to supply a scan signal from the gate driving IC 124 to the gate line 132 of the display area. The gate output pad 170 has a lower gate portion through a gate lower electrode 172 connected to the gate line 132 after the inspection process, and a gate contact hole 162 penetrating through the gate insulating layer 192 and the passivation layer 194. A gate upper electrode 174 connected to the electrode 172 is provided. Here, the gate upper electrode 174 is formed of the same metal as the test line 178 and electrically connected to the test line 178.

The shorting bars 184a and 184b are formed of a gate metal layer and include an odd shorting bar 184b and an even shorting bar 184a spaced apart from each other in parallel with the gate input line 152. The odd shorting bar 184b is electrically connected to an odd gate line of the gate line 132, and the even shorting bar 184a is electrically connected to an even gate output line of the gate line 132. The shorting bars 184a and 184b are positioned outside the scribing line 182 of the non-display area and removed by the scribing process after the inspection process.

The inspection line 178 crosses the gate input line 152 and is formed of a transparent conductive material electrically connecting the gate line 132 and the shorting bars 184a and 184b. That is, the odd / even test line 178 is integrally formed with the gate upper electrode 174 of the gate output pad 170, and the gate lower electrode of the gate output pad 170 exposed through the gate contact hole 162 ( 172) electrically. The odd test line is connected to the exposed electrode shorting bar 184b through the first test contact hole 164 passing through the gate insulating film 192 and the passivation film 194. The even inspection line is connected to the even shorting bar 184a exposed through the second inspection contact hole 166 passing through the gate insulating layer 192 and the passivation layer 194.

As such, the shorting bars 184a and 184b are electrically connected to the gate line 132 through an inspection line 178 formed of a transparent conductive material such as ITO to prevent static electricity from being generated during the manufacturing process of the thin film transistor substrate. In addition, the disconnection failure of the gate lines 132 of the fabricated thin film transistor substrate may be easily inspected. In addition, after the inspection process is completed, the scribing line 182 is cut in the scribing process of the liquid crystal display panel to electrically disconnect the shorting bar and the inspection line 178 so that the liquid crystal display panel may operate normally. Therefore, the laser trimming process of separating the shorting bars 184a and 184b from the inspection line 178 may be omitted.

A method of manufacturing a pad region of a liquid crystal display according to a first exemplary embodiment of the present invention will be described with reference to FIG. 3. First, a gate metal pattern is formed on a substrate 112 through a deposition method such as a sputtering method. Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) are used as the gate metal layer. Subsequently, the gate metal layer is patterned by a photolithography process and an etching process using a mask, so that the shorting bars 184a and 184b, the gate input line 152 for inputting an external signal to the gate driving IC, and the gate lower electrode 172 are formed. And a gate metal pattern including the gate line 132. Here, the shorting bars 184a and 184b are formed to be located outside the scribing line 182.

Next, a gate insulating film 192 is formed on the upper surface of the gate metal pattern through a deposition method such as PECVD or sputtering. As the material of the gate insulating film 192, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is used.

A protective film 194 is then formed over the gate insulating film 192. As the material of the protective film 194, an inorganic insulating material similar to the gate insulating film 192 or an organic insulating material is used. Subsequently, contact holes 162, 164, and 166 penetrating the passivation layer 194 and the gate insulating layer 192 are formed by a photolithography process and an etching process using a mask.

Then, the transparent conductive film is formed on the protective film 194 through a deposition method such as sputtering. ITO, TO, IZO, etc. are used as a transparent conductive film. Subsequently, the transparent conductive layer is patterned through a photolithography process and an etching process using a mask to form a transparent conductive pattern including the inspection line 178 and the upper electrode 174 of the gate output pad 170. In this case, the inspection line 178 connects the shorting bar 184b, which is a gate metal layer, and the gate output pad 170.

Next, a plurality of liquid crystal display panels are formed by bonding to a separately manufactured upper substrate (not shown), and then inspecting the liquid crystal display panel. Subsequently, after the defect inspection of the gate line is completed, the plurality of liquid crystal display panels are cut by a scribing process to separate the unit liquid crystal display panels. At this time, the substrate 112 is cut along the scribing line 182 so that the shorting bar and the inspection line 178 are disconnected. Therefore, a separate laser trimming process for separating the shorting bar and the inspection line 178 may be omitted.

Although the gate pad region has been described in the present embodiment, the same may be applied to the data pad region.

FIG. 4 is a diagram illustrating a region in which a driving IC of a gate pad region of a liquid crystal display panel of the liquid crystal display according to the second exemplary embodiment of the present invention is mounted, and FIG. 5 is a cross-sectional view taken along line II-II ′ of FIG. 4. .

4 and 5, the liquid crystal display panel according to the second exemplary embodiment of the present invention is except that the inspection line is formed of a source / drain metal layer as compared to the liquid crystal display panel illustrated in FIGS. 2 and 3. With the same components. Accordingly, detailed description of the same components will be omitted and described.

The inspection line 278 is formed of a source / drain metal layer to electrically connect the gate output pad 270 and the shorting bars 284a and 284b. That is, the odd / even test line 278 exposes part and side surfaces of the plane through the gate contact hole 262 passing through the gate insulating film 292 and the protective film 294. The exposed test line 278 is connected to the gate upper electrode 274 of the gate output pad 270 through the gate contact hole 262. A portion of the plane and side surfaces of the odd inspection line 278 are exposed through the first inspection contact hole 264 passing through the gate insulating layer 292 and the passivation layer 294. The exposed electrode test line 278 is connected to the exposed electrode shorting bar 284b through the first connection electrode 275b. It is connected to the odd gate output pad 270. Part of the plane and side surfaces of the even inspection line are exposed through the second inspection contact hole 266 passing through the gate insulating layer and the passivation layer. The exposed even test line is connected to the even gate output pad 270 through the second connection electrode 275a. The inspection line 278 is formed in the transverse direction perpendicular to the gate input line 252. In this case, the inspection line 278 may be formed outside the scribing line 282 but may be formed inside the scribing line 282. When the inspection line 278 is formed inside the scribing line 282, the first and second connection electrodes 275a and 275b formed of a transparent conductive material are formed more widely. In this case, the first and second connection electrodes 275a and 275b may be wider to overlap the scribing line 282 to prevent corrosion of the source drain metal layer when cutting the substrate.

As such, the shorting bars 284a and 284b may be gated through the first and second connection electrodes 275a and 275b formed of a transparent conductive film and the inspection line 278 and the gate output pad 270 formed of a source / drain metal layer. Is electrically connected to line 232. The shorting bars 284a and 284b may be used to prevent static electricity from being generated during the manufacturing process of the thin film transistor substrate, and to easily inspect the disconnection of gate lines of the completed thin film transistor substrate. In addition, after the inspection process is completed, the scribing line 282 is cut by the scribing process so that the liquid crystal display panel can operate normally, and the shorting bars 284a and 284b and the gate line 232 are electrically connected. Disconnect it. Therefore, the laser trimming process for separating the shorting bars 284a and 284b and the inspection line 278 may be omitted.

A method of manufacturing a pad region of a liquid crystal display according to a second exemplary embodiment of the present invention will be described with reference to FIG. 5. First, a gate metal pattern is formed on a substrate 212 through a deposition method such as a sputtering method. Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) are used as the gate metal layer. Subsequently, the gate metal layer is patterned by a photolithography process and an etching process using a mask so that the shorting bars 284a and 284b, the gate input line 252 for inputting an external signal to the gate driving IC, and the gate lower electrode 272 are patterned. And a gate metal pattern including the gate line 232. Here, the shorting bars 284a and 284b are formed to be located outside the scribing line 282.

Next, a gate insulating film 292 is formed on the upper surface of the gate metal pattern through a deposition method such as PECVD or sputtering. As the material of the gate insulating film 292, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is used.

A source / drain metal pattern is then formed on the gate insulating film 292 by a mask process. Specifically, a source / drain metal layer is deposited on the gate insulating film 292 through a deposition method such as PECVD or sputtering. As the source / drain metal layer, Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) and the like are used. Subsequently, the source / drain metal layer is etched by a photolithography process using an mask and an etching process. Accordingly, a source / drain metal pattern including an inspection line 278 extending from the gate lower electrode 272 to the shorting bar 284b is formed.

A protective film 294 is then formed over the gate insulating film 292 and the source / drain metal layer. As the material of the protective film 294, an inorganic insulating material similar to the gate insulating film 292 or an organic insulating material is used. Subsequently, contact holes 262, 264, and 266 penetrating the passivation layer 294 and the gate insulating layer 292 are formed by a photolithography process and an etching process using a mask.

Then, the transparent conductive film is formed on the protective film 294 through a deposition method such as sputtering. ITO, TO, IZO, etc. are used as a transparent conductive film. Subsequently, the transparent conductive layer is patterned through a photolithography process and an etching process using a mask to form a transparent conductive pattern including the first and second connection electrodes 275a and 275b and the gate upper electrode 274.

Next, a plurality of liquid crystal display panels are formed by bonding to a separately manufactured upper substrate (not shown), and then inspecting the liquid crystal display panel. Subsequently, after the defect inspection of the gate line is completed, the plurality of liquid crystal display panels are cut by a scribing process so as to be separated into a unit liquid crystal display panel. At this time, the substrate 212 is cut along the scribing line 182 so that the shorting bars 284a and 284b and the inspection line 278 are disconnected. Therefore, a separate laser trimming process for separating the shorting bars 284a and 284b and the inspection line 278 may be omitted.

Although the gate pad region has been described in the present embodiment, the same may be applied to the data pad region.

FIG. 6 is a diagram illustrating a region in which a driving IC of a gate pad region of a liquid crystal display panel of a liquid crystal display according to a third exemplary embodiment of the present invention is mounted, and FIG. 7 is a cross-sectional view taken along line III-III ′ of FIG. 6. .

6 and 7, in the liquid crystal display panel according to the third exemplary embodiment, an inspection line is formed of a gate metal layer and a third inspection contact hole is formed in contrast to the liquid crystal display panel illustrated in FIGS. 2 and 3. And the same components except that the gate input line is formed of a source / drain metal layer. Accordingly, detailed description of the same components will be omitted and described.

The gate input pad 350 is connected to the input terminal of the gate driving IC 324 after the inspection process. The gate input pad 350 is electrically connected to a gate input pad (not shown) corresponding to the adjacent gate driving IC 324 through a gate input line 352. Here, the gate input pad 350 and the gate input line 352 are formed of a source / drain metal layer and formed on a different layer from the test line 378.

The inspection line 378 is formed of a gate metal layer to electrically connect the gate output pad 370 and the shorting bars 384a and 384b. That is, the odd / even test line 378 is formed to extend from the gate lower electrode 372 of the gate output pad 370. In addition, the odd / even test line 378 exposes a part and a side surface of the plane through the third test contact hole 368 passing through the gate insulating film and the passivation film. The odd test line is connected to the first connection electrode 375b through the third test contact hole 368 and the odd shorting bar exposed by the first test contact hole 364 through the first test electrode 375b. 384b. The even inspection line is connected to the second connection electrode 375a through the third inspection contact hole 368, and the even shorting bar exposed by the second inspection contact hole 366 through the second connection electrode 375a. 384A. The inspection line 378 is formed in a transverse direction perpendicular to the gate input line 352. In this case, the inspection line 378 may be formed outside the scribing line 382, but may be formed inside the scribing line 382. When the inspection line 378 is formed inside the scribing line 382, the first and second connection electrodes 375a and 375b formed of a transparent conductive material are formed more widely. In this case, the first and second connection electrodes 375a and 375b may be wider to overlap the scribing line 282 to prevent corrosion of the source drain metal layer when cutting the substrate.

As described above, the shorting bars 384a and 384b are formed through the gate lines 332 through the first and second connection electrodes 375a and 375b formed of the transparent conductive film, the inspection line 378 formed of the gate metal layer, and the gate lower electrode 372. ) To prevent static electricity from being generated during the manufacturing process of the thin film transistor substrate, and to easily inspect the disconnection of the gate lines of the completed thin film transistor substrate. In addition, after the inspection process is completed, the scribing lines 382 are cut in the scribing process of the liquid crystal display panel, and the shorting bars 384a and 384b and the gate line 332 are electrically disconnected to form the liquid crystal display panel. Allow it to work normally. Therefore, the laser trimming process for separating the shorting bars 384a and 384b and the inspection line 378 may be omitted.

A method of manufacturing a pad region of a liquid crystal display according to a third exemplary embodiment of the present invention will be described with reference to FIG. 7. First, a gate metal layer is formed on a substrate 312 through a deposition method such as a sputtering method. Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) are used as the gate metal layer. Subsequently, the gate metal layer is patterned by a photolithography process and an etching process using a mask, so that the gate metal including the shorting bars 384a and 384b, the gate lower electrode 372, the gate line 332, and the inspection line 378. A pattern is formed. In this case, the gate lower electrode 372 and the inspection line 378 are integrally formed, and the inspection line 378 is formed to the outside of the scribing line so as to be adjacent to the odd shorting bar 384b. Here, the shorting bars 384a and 384b are formed to be located outside the scribing line 382.

Next, a gate insulating film 392 is formed on the upper surface of the gate metal pattern through a deposition method such as PECVD or sputtering. As the material of the gate insulating film 392, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is used.

Next, a source / drain metal pattern is formed on the gate insulating layer 392 by a mask process. Specifically, the source / drain metal layer is deposited on the gate insulating layer 392 through a deposition method such as PECVD or sputtering. As the source / drain metal layer, Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) and the like are used. Subsequently, a source / drain metal pattern for forming a gate input line 352 for inputting an external signal to the gate driving IC is formed by a photolithography process and an etching process using a mask.

A protective film 394 is then formed over the gate insulating film 392 and the source / drain metal layer. As the material of the protective film 394, an inorganic insulating material similar to the gate insulating film 392 or an organic insulating material is used. Subsequently, contact holes 362, 364, 366 and 368 penetrating the passivation layer 394 and the gate insulating layer 392 are formed by a photolithography process and an etching process using a mask.

Then, a transparent conductive film is formed on the protective film 394 through a deposition method such as sputtering. ITO, TO, IZO, etc. are used as a transparent conductive film. Subsequently, the transparent conductive layer is patterned through a photolithography process and an etching process using a mask to form a transparent conductive pattern including the first and second connection electrodes 375a and 375b and the gate upper electrode 374.

Next, a plurality of liquid crystal display panels are formed by bonding to a separately manufactured upper substrate (not shown), and then inspecting the liquid crystal display panel. Subsequently, after the defect inspection of the gate line is completed, the plurality of liquid crystal display panels are cut by a scribing process to separate the unit liquid crystal display panels. At this time, the substrate 312 is cut along the scribing line 382 so that the shorting bar and the inspection line 378 are disconnected. Therefore, a separate laser trimming process for separating the shorting bar and the inspection line 378 may be omitted.

Although the gate pad region has been described in the present embodiment, the same may be applied to the data pad region.

FIG. 8 is a diagram illustrating a region in which a driving IC of a data pad region of a liquid crystal display panel of a liquid crystal display according to a fourth exemplary embodiment of the present invention is mounted, and FIG. 9 is a cross-sectional view taken along line IV-IV ′ of FIG. 8. .

8 and 9, the data pad region of the liquid crystal display panel according to the fourth embodiment of the present invention includes a plurality of data input pads 450 contacting an input terminal of the data driving IC 426, and a data driving IC. A plurality of data output pads 470 in contact with the output terminal of 426, the shorting bars 484a and 484b for inspecting the data line 442, the data lines 442 and the shorting bars 484a and 484b. An inspection line 478 is electrically connected.

The data input pad 450 is connected to the input terminal of the data driver IC 426 after the inspection process. The data input pad 450 may include a data input bottom electrode 454 formed of a source / drain metal layer, and a data input bottom electrode through the first and second input contact holes 469a and 469b passing through the passivation layer 494. First and second data input upper electrodes 456a and 456b connected to the 454. Here, TCP is connected to the first data input upper electrode 456a to input a data control signal and an image signal, and an input terminal of the data driver IC 426 is connected to the second data input upper electrode 456b to connect the data control signal. And an image signal to an output terminal of the data driver IC 426.

The data output pad 470 is connected to the output terminal of the data driver IC 426 after the inspection process to supply an image signal from the data driver IC 426 to the data line 442 in the display area. The data output pad 470 may include a first data output lower electrode 472a connected to the test line 478, a second data output lower electrode 472b connected to the data line 442, a gate insulating film and a protective film. A first data contact hole 462a penetrating to expose the first data output lower electrode 472a and a second data contact hole 462b penetrating the passivation layer 494 to expose the second data output lower electrode 472b. ) And a data output upper electrode 474. Here, the first data output lower electrode 472a is formed of a gate metal layer, the second data output lower electrode 472b is formed of a source / drain metal layer, and the data output upper electrode 474 is formed of a transparent conductive material. Each is electrically connected to the inspection line 478.

The shorting bars 484a and 484b are formed of a gate metal layer and include an odd shorting bar 484b and an even shorting bar 484a spaced apart from each other. The odd shorting bar 484b is electrically connected to an odd data line of the data line 442, and the even shorting bar 484a is electrically connected to an even data line of the data line 442. The shorting bars 484a and 484b are positioned outside the scribing line 482 in the non-display area and removed by the scribing process after the inspection process.

The inspection line 478 is formed of a gate metal layer to electrically connect the data output pad 470 and the shorting bars 484a and 484b. That is, the odd / even test line 478 is connected to the first and second connection electrodes 475a and 475b through the third test contact hole 468, respectively. The first connection electrode 475b is connected to the odd shorting bar 484b exposed through the first test contact hole 464. The second connection electrode 475a is connected to the even shorting bar 484a exposed by the second test contact hole 466. In this case, the inspection line 478 may be formed outside the scribing line 482, but may be formed inside the scribing line 482. When the inspection line 478 is formed inside the scribing line 482, the first and second connection electrodes 475a and 475b formed of a transparent conductive material are formed more widely. In this case, the first and second connection electrodes 475a and 475b may be formed wider to overlap the scribing line 482 to prevent corrosion of the source drain metal layer when cutting the substrate.

As described above, the shorting bars 484a and 484b are electrically connected to the data lines 442 through the first and second connection electrodes 475a and 475b, the inspection line 478 formed of the gate metal layer, and the data output pad 470. Is prevented from generating static electricity during the process of manufacturing the thin film transistor substrate. In addition, it is possible to easily check the disconnection failure of the data lines on the completed thin film transistor substrate. In addition, after the inspection process is completed, the scribing line 482 is cut in the scribing process of the liquid crystal display panel to electrically disconnect the shorting bar and the inspection line 478 so that the liquid crystal display panel can operate normally. . Therefore, the laser trimming process of separating the shorting bars 484a and 484b and the inspection line 478 may be omitted.

A method of manufacturing a data pad region of a liquid crystal display according to a fourth exemplary embodiment of the present invention will be described with reference to FIG. 9. First, a gate metal pattern is formed on a substrate 412 through a deposition method such as a sputtering method. Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) are used as the gate metal layer. Subsequently, the gate metal layer is patterned by a photolithography process and an etching process using a mask to form a gate metal pattern including the shorting bars 484a and 484b, the first data output lower electrode 472a, and the data inspection line 478. do. In this case, the gate metal layer constituting the data inspection line 478 extends from the first data output lower electrode 472a to be wider to the outside of the scribing line 482 to be adjacent to the shorting bars 484a and 484b. Here, the shorting bars 484a and 484b are formed to be located outside the scribing line 482.

Next, a gate insulating film 492 is formed on the upper surface of the gate metal pattern through a deposition method such as PECVD or sputtering. As the material of the gate insulating film 492, an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) is used.

A source / drain metal pattern is then formed on the gate insulating film 492 by a mask process. Specifically, a source / drain metal layer is deposited on the gate insulating film 492 through a deposition method such as PECVD or sputtering. As the source / drain metal layer, Cr, MoW, Cr / Al, Cu, Al (Nd), Mo / Al, Mo / Al (Nd), Cr / Al (Nd) and the like are used. Subsequently, a source / drain metal pattern including a data input lower electrode 454, a second data output lower electrode 472b, and a data line 442 is formed by a photolithography process and an etching process using a mask. In this case, the second data output lower electrode 472b is formed to be adjacent to the first data output lower electrode 472a which is a gate metal layer.

A protective film 494 is then formed over the gate insulating film 492 and the source / drain metal layers. As the material of the protective film 494, an inorganic insulating material similar to the gate insulating film 492 or an organic insulating material is used. Subsequently, contact holes 462a, 462b, 464, 466, 468, 469a, and 469b penetrating the passivation layer 494 and the gate insulating layer 492 are formed by a photolithography process and an etching process using a mask.

Then, a transparent conductive film is formed on the protective film 494 through a deposition method such as sputtering. ITO, TO, IZO, etc. are used as a transparent conductive film. Subsequently, the transparent conductive layer is patterned through a photolithography process and an etching process using a mask to form a transparent conductive pattern including first and second connection electrodes 475a and 475b and data input / output upper electrodes 474, 456a and 456b. To form.

Next, a plurality of liquid crystal display panels are formed by bonding to a separately manufactured upper substrate (not shown), and then inspecting the liquid crystal display panel. Subsequently, after the defect inspection of the data line is completed, the plurality of liquid crystal display panels are cut by a scribing process to separate the unit liquid crystal display panels. At this time, the substrate 412 is cut along the scribing line 482 so that the shorting bar and the inspection line are disconnected. Therefore, a separate laser trimming process for removing the shorting bar may be omitted.

Although the data pad region has been described in the present embodiment, the same may be applied to the gate pad region.

Meanwhile, the present invention can be applied not only to a liquid crystal display device but also to a display device such as a plasma display panel, a field emission device, an electroluminescent device, and the like and to all devices having a shorting bar.

As described above, in the liquid crystal display and the manufacturing method thereof according to the present invention, since the shorting bar is located outside the scribing line and the shorting bar is removed during the scribing process, the laser trimming process can be omitted, thereby reducing the tact. In addition, the process is simplified. This improves the productivity of the product.

In addition, since the laser trimming process can be omitted, not only the pad damage is minimized, but also the space margin of the liquid crystal display panel pad part can be secured.

 Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (20)

An input / output pad connected to an input / output terminal of each integrated circuit, a signal line connected to each of the output pads, a shorting bar formed outside the scribing line to supply an inspection signal to the signal line, Providing a thin film transistor substrate connecting the signal line and the shorting bar and including a test line formed on a plane different from at least one of the shorting bar and the signal line; Providing a color filter substrate facing the thin film transistor substrate; Bonding the thin film transistor substrate and the color filter substrate to form a liquid crystal display panel; Inspecting whether the liquid crystal display panel is defective by using the shorting bar; And scribing the liquid crystal display panel of the good result judgment along the scribing line formed in a direction crossing the inspection line. The method of claim 1, Preparing the thin film transistor substrate Forming a shorting bar on the substrate; Sequentially forming a gate insulating film and a protective film to cover the shorting bar; Forming an inspection contact hole penetrating the gate insulating film and the protective film to expose the shorting bar; And forming an inspection line on the passivation layer, the inspection line being connected to the shorting bar through the inspection contact hole. The method of claim 1, Preparing the thin film transistor substrate Forming a shorting bar on the substrate; Forming a gate insulating film to cover the shorting bar; Forming a test line on the gate insulating film; Forming a protective film to cover the inspection line; Forming an inspection contact hole penetrating through the gate insulating layer and the protective layer to expose the shorting bar and the inspection line; And forming a connection electrode connected to the shorting bar and the inspection line through the inspection contact hole on the passivation layer. The method according to any one of claims 2 and 3, Preparing the thin film transistor substrate And forming an input line connecting the input pads of the integrated circuits simultaneously with the shorting bar. An input / output pad connected to an input / output terminal of each integrated circuit, a signal line connected to each of the output pads, a shorting bar formed outside the scribing line to supply an inspection signal to the signal line, Providing a thin film transistor substrate connecting the signal line and the shorting bar and including a test line formed of the same metal on the same plane as the signal line, and a connection electrode for connecting the shorting bar and the test line; Providing a color filter substrate facing the thin film transistor substrate; Bonding the thin film transistor substrate and the color filter substrate to form a liquid crystal display panel; Inspecting whether the liquid crystal display panel is defective by using the shorting bar; And scribing the liquid crystal display panel of the good result judgment along the scribing line formed in a direction crossing the inspection line. The method of claim 5, Preparing the thin film transistor substrate Forming the shorting bar and the inspection line on the substrate; Sequentially forming a gate insulating film and a protective film to cover the shorting bar and the inspection line; Forming an inspection contact hole penetrating through the gate insulating layer and the protective layer to expose the shorting bar and the inspection line; And forming the connection electrode connected to the shorting bar and the inspection line through the inspection contact hole on the passivation layer. The method of claim 6, Preparing the thin film transistor substrate And forming an input line connecting the input pads of the integrated circuits to the gate insulating layer. The method of claim 5, Preparing the thin film transistor substrate Simultaneously forming a first output lower electrode of the output pad with the inspection line; Forming an input lower electrode of the input pad and a second output lower electrode of the output pad on the gate insulating layer; Forming a passivation layer covering the input lower electrode and the second output lower electrode; Forming a plurality of contact holes through the gate insulating layer and the passivation layer to expose the first output lower electrode, the second output lower electrode and the input lower electrode; Forming an output upper electrode connected to the first and second output lower electrodes and an input upper electrode connected to the input lower electrode through the contact hole on the passivation layer. Manufacturing method. An input / output pad connected to an input / output terminal of each integrated circuit and formed on a substrate; A signal line connected to each of the output pads; A shorting bar which supplies an inspection signal to the signal line and is formed outside the scribing line and removed by a scribing process; And a test line formed in a direction crossing the scribing line to connect the signal line and the shorting bar and formed on a plane different from at least one of the shorting bar and the signal line. . The method of claim 9, The shorting bar is formed of a gate metal on the substrate, And the inspection line is formed of a transparent conductive material on the gate insulating film and the protective film sequentially formed to cover the shorting bar. The method of claim 10, And a test contact hole through the gate insulating film and the protective film to expose the shorting bar so that the shorting bar and the test line are connected to each other. The method of claim 9, And the shorting bar is further removed by a scribing process and further comprises a connection electrode connecting the shorting bar and the inspection line. The method of claim 12, The shorting bar is formed of a gate metal on the substrate, The inspection line is formed of a source / drain metal on the gate insulating layer formed to cover the shorting bar. And the connection electrode is formed of a transparent conductive material on a protective film formed to cover the inspection line. The method of claim 13, And a test contact hole through the gate insulating film and the passivation layer to expose the shorting bar and the test line so that the shorting bar, the test line, and the connection electrode are connected to each other. The method of claim 9, And an input line formed on the same plane as the shorting bar on the same plane and connecting the input pads of the integrated circuits. An input / output pad connected to an input / output terminal of each integrated circuit and formed on a substrate; A signal line connected to each of the output pads; A shorting bar which supplies an inspection signal to the signal line and is formed outside the scribing line and removed by a scribing process; An inspection line connecting the signal line and the shorting bar and crossing the scribing line and formed of the same metal on the same plane as the signal line; And a connection electrode for connecting the shorting bar and the inspection line. The method of claim 16, The shorting bar and the inspection line are formed of a gate metal on the substrate, And the connection electrode is formed of a transparent conductive material on the gate insulating film and the protective film formed to cover the inspection line. The method of claim 17, And an input line formed on a plane different from the shorting bar and connecting the input pads of the integrated circuits. The method of claim 17, The input pad An input lower electrode overlapping the inspection line with the gate insulating layer interposed therebetween; A contact hole penetrating the passivation layer to expose the input lower electrode; And an input upper electrode connected to the input lower electrode through the contact hole. The method of claim 19, The output pad is A first output lower electrode extending from the inspection line; A second output lower electrode extending from the signal line on the gate insulating film formed to cover the first output lower electrode; A contact hole penetrating the gate insulating film and the passivation film to expose the first and second output lower electrodes; And an output upper electrode connected to the first and second output lower electrodes through the contact hole.

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