KR20060059580A - Photosensitive material and method for manufacturing thin film transistor substrate by using the material - Google Patents

Abstract

The present invention relates to a method for manufacturing a photosensitive material made of a resin, a photosensitive compound, and a solvent, and a thin film transistor substrate for a display device using the same, wherein the photosensitive material is developed after developing the photosensitive material according to exposure energy. The change curve representing the residual degree includes at least one inflection point. As a result, the protrusion of the ohmic contact layer and the semiconductor layer on both sides in the longitudinal direction of the data line can be reduced, thereby suppressing the occurrence of defects and uniformly forming the channel region of the thin film transistor.

Description

PHOTOSENSITIVE MATERIAL AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE BY USING THE MATERIAL}

1 is a change curve showing the degree of residual after development of the photosensitive material according to the exposure energy of the conventional photosensitive material,

2 is a change curve showing the residual degree after development of the photosensitive material according to the exposure energy of the photosensitive material according to an embodiment of the present invention,

3 is a layout view of a thin film transistor substrate manufactured using the photosensitive material according to the embodiment of the present invention;

4A and 4B are cross-sectional views of a thin film transistor substrate taken along a line IVa-IVa and IVb-IVb of FIG. 3;

5A through 10B are cross-sectional views sequentially illustrating each step of manufacturing a thin film transistor substrate using a photosensitive material according to an embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

10: insulated substrate 22: gate line

24: gate pad 26: gate electrode

30 gate insulating film 40 semiconductor layer                 

50 resistive contact layer 62 data line

65 source electrode 66 drain electrode

68: data pad 70: protective film

82: pixel electrode

The present invention relates to a photosensitive material used for manufacturing a thin film transistor substrate for a display device, and more particularly, to a photosensitive material used for a photosensitive film pattern for forming a channel region of a thin film transistor and a thin film transistor for a display device using the same. It relates to a method for manufacturing a substrate.

In general, a thin film transistor substrate (TFT) is used as a circuit board for independently driving each pixel in a liquid crystal display (LCD), an organic electroluminescence (EL) display, and the like. The thin film transistor substrate is provided with scan signal wirings or gate wirings for transmitting scan signals and image signal lines or data wirings for transferring image signals. The thin film transistor may include a thin film transistor connected to a gate wiring and a data wiring, a pixel electrode connected to the thin film transistor, a gate insulating film covering and insulating the gate wiring, and a protective film covering and insulating the thin film transistor and the data wiring.

The thin film transistor includes a semiconductor layer forming a gate electrode and a channel, which are part of the gate wiring, a source electrode and a drain electrode, which are part of the data wiring, a gate insulating film and a protective film. The thin film transistor is a switching device that transfers or blocks an image signal transmitted through a data line to a pixel electrode according to a scan signal transmitted through a gate line.

Such a thin film transistor substrate is usually manufactured using 4 to 5 masks. The fewer masks used, the simpler the manufacturing process, which leads to a lower production cost.

Here, in the manufacture of a thin film transistor substrate using four masks, the channel region, the source electrode, and the drain electrode of the thin film transistor are formed through a photoresist pattern formed by a photo process and an etching process using the same. However, in the manufacturing process using the four-sheet mask, the data line may be exposed twice to wet etching. That is, two wet etching processes may be performed to form the channel region, the source electrode, and the drain electrode by using the photoresist pattern formed through the slit exposure.

Therefore, in this case, since the line width of the data line has a narrower width than that of the underlying ohmic contact layer and the semiconductor layer, the ohmic contact layer and the semiconductor layer protrude to both sides in the longitudinal direction of the data line and remain.

Accordingly, there is a problem in that the characteristics of the thin film transistor may be degraded or defects such as crosstalk or vertical staining may occur. In addition, in order to secure a process margin due to such a defect and to prevent light leakage, the black matrix region of the color filter substrate facing the thin film transistor substrate must be widened, which adversely affects the aperture ratio.

On the other hand, in order to improve this problem, as shown in Figure 1, the photosensitive film pattern using a photosensitive material that draws a curve (C1) of the average slope of the change curve showing the residual degree after development of the photosensitive material according to the exposure energy is acute Is formed so that the contour of the photoresist pattern has a high inclination angle, thereby reducing the difference between the line width of the data line and the width of the lower ohmic contact layer and the semiconductor layer. Can be reduced. However, in this case, since the thickness of the photoresist film remaining even after a small change in the exposure energy is greatly changed, it is difficult to uniformly form the thickness of the photoresist film to be formed on the channel region of the thin film transistor. As a result, the channel region of the thin film transistor may not be uniformly formed.

Therefore, in order to uniformly form the channel region of the thin film transistor, a photosensitive film pattern is formed by using a photosensitive material which draws a curved line (C2) having a moderate average slope of a change curve representing the residual degree after development of the photosensitive material according to the exposure energy. In this case, as described above, since the line width of the data line has a narrower width than that of the resistive contact layer and the semiconductor layer below, the resistive contact layer and the semiconductor layer protrude to both sides in the longitudinal direction of the data line. There is a problem.

Accordingly, an object of the present invention is to reduce the protruding of the ohmic contact layer and the semiconductor layer on both sides in the longitudinal direction of the data line, thereby suppressing the occurrence of defects, and simultaneously forming the channel region of the thin film transistor. To provide a photosensitive material.

Another object of the present invention is to provide a method of manufacturing a thin film transistor substrate for a display device using the photosensitive material.

The above object is, according to the present invention, in a photosensitive material made of a resin, a photosensitive compound, and a solvent, the photosensitive material has a change curve indicating a residual degree after development of the photosensitive material according to exposure energy at least one inflection point. It is achieved by a photosensitive material comprising a.

Here, the change curve representing the residual degree after development of the photosensitive material preferably includes a first average slope divided by the inflection point and a second average slope that is gentler than the first average slope.

In addition, the photosensitive material may have an inflection point indicating a residual degree after development of the photosensitive material by controlling the combination of the resin, the type or content of the photosensitive compound, or the hydroxyl content of the photosensitive compound. have.

Accordingly, the overall outline of the photoresist pattern may be formed to have a high inclination angle, while the photoresist pattern formed on the channel region of the thin film transistor may be formed to have a gentle inclination angle.

Another object of the present invention is to provide a method of manufacturing a thin film transistor substrate for a display device, the method comprising: forming a gate wiring including a gate line and a gate electrode connected to the insulating substrate; Forming a gate insulating film covering the gate wiring; Forming a semiconductor layer pattern on the gate insulating film; Forming an ohmic contact layer pattern on the semiconductor layer pattern; Forming a data line including a source electrode and a drain electrode formed on the ohmic contact layer and separated from each other and made of the same layer, and a data line connected to the source electrode, wherein the source electrode and the drain electrode are separated from each other. Is achieved by a photolithography process using a photosensitive film pattern formed of a photosensitive material having an inflection point in which a change curve representing the residual degree after development of the photosensitive material according to exposure energy is achieved by a method of manufacturing a thin film transistor substrate for a display device. do.

Here, the change curve representing the residual degree after development of the photosensitive material preferably includes a first average slope divided by the inflection point and a second average slope that is gentler than the first average slope.

The photoresist pattern may include a first portion positioned between the source electrode and the drain electrode, a second portion having a thickness thicker than the first portion, and a third portion having a thickness thinner than the first portion. desirable.

Here, the thickness of the third portion is preferably close to zero.

The photoresist of the first portion of the photoresist pattern may be formed by exposing the photoresist with exposure energy in a range having the second average slope in a change curve representing a residual degree after development of the photoresist. The photosensitive film of the portion is preferably formed by exposing the photosensitive material to an exposure energy in a range having the first average slope.

According to the method of manufacturing a thin film transistor substrate for a display device, the protrusion of the ohmic contact layer and the semiconductor layer on both sides in the longitudinal direction of the data line is reduced, thereby suppressing the occurrence of defects and making the channel region of the thin film transistor uniform. It can be formed.

Hereinafter, a manufacturing method of a liquid crystal display panel according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings. In the accompanying drawings, a thin film transistor substrate for a display device using an amorphous silicon (a-Si) thin film transistor (TFT) formed by a four-sheet mask process is schematically illustrated.

First, the photosensitive material according to the exemplary embodiment of the present invention will be described with reference to FIG. 2. The photosensitive material used for manufacturing the thin film transistor substrate for a display device may be a resin or a photosensitive compound (PAC). It is made up of solvents and other additives.

In the photosensitive material according to the present invention, a change curve C3 indicating a residual degree after development of the photosensitive material according to exposure energy includes at least one inflection point A. The residual degree after development of the photosensitive material is the thickness of the photoresist film remaining after exposing and developing the photosensitive material. That is, the more exposed to light is removed in the developing process. This is the case of positive photosensitive material, and the negative photosensitive material remains as more exposed to light.

The change curve C3 representing the residual degree after development of the photosensitive material has a first average slope G1 divided by the inflection point A and a second average slope G2 that is gentler than the first average slope G1. It includes. Here, there may be a plurality of inflection points A in the change curve C3, in which case a plurality of average inclinations may also exist.

Residual degree after development of the photosensitive material according to the exposure energy by combining resins having different contrast characteristics, controlling the type or content of the photosensitive compound, and controlling the hydroxyl content of the photosensitive compound. The change curve C3 indicating may have an inflection point A.

Using the photosensitive material according to the present invention, in the photoresist pattern to be described later, the photoresist formed on the channel region is formed with exposure energy in a range having a second average slope G2, and the other photoresist has a first average slope. It is formed by the exposure energy of the range having (G1).

Next, referring to FIG. 3, a structure of a thin film transistor substrate for a display device manufactured using the photosensitive material according to the exemplary embodiment of the present invention will be described.

A plurality of gate lines 22 and a plurality of storage electrode lines 28 are formed on the insulating substrate 10 in parallel with the gate lines 22.

A portion of the gate line 22 branches to form the gate electrode 26, and a gate pad 24 is formed at one end of the gate line 22. The gate line 22 includes all of the gate line 22, the gate electrode 26, the gate pad 24, and the like.

A plurality of data lines 62 are formed on the gate line 22 and the storage electrode line 28 to be insulated from each other. The data line 62, the source electrode 65 branched from the data line 62, the drain electrode 66 facing the source electrode 65, and the data pad 68 formed at one end of the data line 62 may be formed. All of them are referred to as data wiring. In the case where the sustain electrode line 28 is formed, the conductor 64 for the storage capacitor is formed on the same layer as the data line.

In the region defined by the intersection of the gate line 22 and the data line 62, a plurality of pixel electrodes 82 are formed and electrically connected to the gate line 22, the data line 62, and the pixel electrode 82. A plurality of connected thin film transistors are formed.

4A and 4B are cross-sectional views taken along lines IVa-IVa and IVb-IVb of the thin film transistor substrate illustrated in FIG. 3. A thin film transistor substrate will be described in detail with reference to FIGS. 4A and 4B as follows.

First, gate wirings 22, 24, and 26 are formed on an insulating substrate 10 made of an insulating material such as glass, quartz, ceramic, or plastic. Such gate wiring can be formed in multiple layers to compensate for the shortcomings of each metal or alloy and to obtain the desired physical properties. In one example, a double layer using aluminum or an aluminum alloy as a lower layer and chromium, molybdenum, molybdenum-tungsten or molybdenum-tungsten nitride as the upper layer is formed. The lower layer uses aluminum or aluminum alloy with low specific resistance to prevent signal resistance due to wiring resistance. It is to use chromium, molybdenum, molybdenum-tungsten or molybdenum-tungsten nitride which are highly corrosion-resistant to chemicals. In recent years, molybdenum (Mo), aluminum (Al), titanium (Ti), tungsten (W) and the like have come into the spotlight as wiring materials.

In addition, the storage electrode line 28 is formed on the insulating substrate 10 in parallel with the gate line 22. The storage electrode line 28 may also be formed in a multilayer like the gate lines 22, 24, and 26. The storage electrode line 28 overlaps the conductor 64 for the storage capacitor connected to the pixel electrode 82 to be described later to form a storage capacitor which improves the charge retention capability of the pixel. The pixel electrode 82 and the gate line to be described later will be described. If the holding capacity generated by the overlap of (22) is sufficient, it may not be formed. It is common to apply the same voltage to the sustain electrode line 28 as the common electrode (not shown) of the upper substrate (not shown) to be opposed to the thin film transistor substrate.

A gate insulating film 30 made of silicon nitride (SiNx) is formed on the gate wirings 22, 24, 26, and the storage electrode line 28 to form the gate wirings 22, 24, 26, and the storage electrode line 28. Cover.

On the gate insulating layer 30, semiconductor layers 42 and 48 made of a semiconductor such as hydrogenated amorphous silicon are formed, and on the semiconductor layers 42 and 48, n-type impurities such as phosphorus (P) are highly concentrated. Resistive contact layers 55, 56, 58 made of doped amorphous silicon are formed.

The data wires 62, 64, 65, 66, and 68 are formed on the ohmic contacts 55, 56, and 58. Such data wirings, like the gate wirings 22, 24 and 26, may be formed in multiple layers to compensate for the disadvantages of each metal or alloy and to obtain desired physical properties. For example, the data line may be formed of a triple layer of molybdenum (Mo), aluminum (Al), and molybdenum (Mo).

The data line is formed in a vertical direction and has a data line 62 having an end portion 68 of a data line to which an image signal from the outside is applied, a source electrode 65 of a thin film transistor which is a branch of the data line 62, and And a data line portion 62, 68, 65 connected to an end of the data line 62 and made of a data pad 68 for receiving an image signal from the outside and transmitting the image signal to the data line 62. A drain electrode 66 of the thin film transistor, which is separated from the line portions 62, 68, and 65, and is located opposite to the source electrode 65 with respect to the gate electrode 26 or the channel portion E of the thin film transistor. Also included is a conductor 64 for a storage capacitor located above the electrode line 28. When the sustain electrode line 28 is not formed, the conductor 64 for the storage capacitor is also not formed.

The ohmic contacts 55, 56, and 58 lower the contact resistance between the semiconductor layers 42 and 48 below and the data lines 62, 64, 65, 66, and 68 above the data lines. It has exactly the same form as (62, 64, 65, 66, 68). That is, the ohmic contact layer 55 of the data line part is the same as the data line parts 62, 68, and 65, and the ohmic contact layer 56 for the drain electrode is the same as the drain electrode 66, and the ohmic contact for the storage capacitor. Layer 58 is the same as conductor 64 for the storage capacitor.

The semiconductor layers 42 and 48 have the same shape as the data lines 62, 64, 65, 66, and 68 and the ohmic contacts 55, 56, and 58 except for the channel portion E of the thin film transistor. have. Specifically, the semiconductor capacitor layer 48 for the storage capacitor, the conductor 64 for the storage capacitor, and the ohmic contact layer 58 for the storage capacitor have the same shape, but the semiconductor layer 42 for the thin film transistor has the data wiring and the ohmic contact. Slightly different from the rest of the floor. That is, the data line parts 62, 68, 65, in particular, the source electrode 65 and the drain electrode 66 are separated from the channel part E of the thin film transistor, and the ohmic contact layer 55 and the drain electrode of the data line part are separated. The resistive contact layer 56 is also separated, but the thin film transistor semiconductor layer 42 is connected here without disconnection, thereby creating a channel of the thin film transistor.

On the data lines 62, 64, 65, 66 and 68, an a-Si: C: O film or a-Si: O: F film (low dielectric constant CVD) deposited by silicon nitride or plasma enhanced chemical vapor deposition (PECVD) method Film) or an organic insulating film is formed. The protective film 70 has contact holes 76, 78, 72 exposing the drain electrode 66, a part of the data pad 68 and the conductor 64 for the storage capacitor, and also together with the gate insulating film 30. It has a contact hole 74 that exposes a portion of the gate pad 24.

On the passivation layer 70, a pixel electrode 82 that receives an image signal from the thin film transistor and generates an electric field together with the common electrode of the upper plate is formed. The pixel electrode 82 is made of a transparent conductive material such as ITO or indium tin oxide (IZO), and is physically and electrically connected to the drain electrode 66 through the contact hole 76 to receive an image signal. The pixel electrode 82 also overlaps the neighboring gate line 22 and the data line 62 to increase the aperture ratio, but may not overlap. In addition, the pixel electrode 82 is also connected to the storage capacitor conductor 64 through the contact hole 72 to transmit an image signal to the storage capacitor conductor 64. On the other hand, contact auxiliary members 86 and 88 are formed on the gate pad 24 and the data pad 68 through the contact holes 74 and 78, respectively. These contact auxiliary members 86 and 88 complement the adhesion between the end portions 24 and 68 and the external circuit device and protect the gate pad 24 and the data pad 68, but are not essential. Their application is optional.

According to an embodiment of the present invention, a method of manufacturing a thin film transistor substrate for a display device having the structures of FIGS. 4A and 4B will be described in detail as follows.

First, as illustrated in FIGS. 5A and 5B, a gate metal layer is deposited on the insulating substrate 10, and then the gate line 22, the gate pad 24, the gate electrode 26, and the like are subjected to a photolithography process. After forming the gate wiring and the storage electrode line 28, the gate insulating film 30, the semiconductor layer 40, and the ohmic contact layer 50 made of silicon nitride are each 1,500 kPa to 1,500 kPa by chemical vapor deposition. It is successively laminated to a thickness of 5,000 kPa, 500 kPa to 2,000 kPa, 300 kPa to 600 kPa, and then the data metal layer 600 is deposited by sputtering or the like to form a data line.

In addition, a change curve C3 representing a residual degree after development of the photosensitive material according to the exposure energy is coated on the data metal layer 600 to form a photosensitive film 900 by coating the photosensitive material having the inflection point A. The change curve C3 includes a first average slope G1 divided by the inflection point A and a second average slope G2 that is gentler than the first average slope G1. The total thickness of the photosensitive film 900 has an overall thickness of about 1 μm to 2 μm.

Next, the photoresist film 900 is exposed and developed through a mask, and as shown in FIGS. 6A and 6B, the photoresist patterns 912 and 914 for forming the data lines 62, 64, 65, 66, and 68 are formed. To form. In this case, among the photoresist patterns 912 and 914, the channel portion E of the thin film transistor, that is, the first portion 914 located between the source electrode 65 and the drain electrode 66, is the data wiring portion C, that is, the data. The thickness of the wirings 62, 64, 65, 66, and 68 is smaller than that of the second portion 912 located at the portion where the wirings 62, 64, 65, 66, and 68 are to be formed, and most of the photosensitive film of the other portion D is removed.

At this time, the ratio of the thickness of the photoresist film 914 remaining in the channel portion E to the thickness of the photoresist film 912 remaining in the data wiring portion C should be different depending on the process conditions in an etching process which will be described later. It is preferable that the thickness of the first portion 914 be 1/2 or less of the thickness of the second portion 912.

As such, there may be various methods of exposing the channel portion E, that is, the first portion 914 to be thinner than the second portion 912 by using a mask, and the light transmission amount of the channel portion E. In order to control this, a slit or lattice pattern is formed or a translucent film is used.

In this case, it is preferable that the line width of the pattern located between the slits or the interval between the patterns, that is, the width of the slits, is smaller than the resolution of the exposure machine used for exposure. The thin film may have a thin film or a thin film having a different thickness.

In addition, by adjusting the exposure energy by using a slit, a lattice pattern, or a mask of a translucent film, the channel region E, that is, the first portion 914 is formed in the photoresist patterns 912 and 914. It forms by exposing with exposure energy of the range which has 2 average inclination G2. The other second portion 912 and the other portion D are formed by exposing with exposure energy in a range having the first average slope G1.

As described above, when the first portion 912 is exposed to the exposure energy in the range having the second average slope G2 that is gentler than the first average slope G1, the photoresist 914 of the photoresist 914 that remains even with a small change in the exposure energy is exposed. Since the thickness does not change significantly, the thickness of the photoresist film 914 on the channel region to be formed on the channel region of each thin film transistor can be formed substantially uniformly. Therefore, the channel region E of the thin film transistor is also formed substantially uniformly so that each thin film transistor has uniform characteristics.

On the other hand, the second portion 912 and the other portion (D) is exposed to the exposure energy of the range having the first average slope (G1) to form the overall contour of the photosensitive film pattern 912 to have a high inclination angle (θ1) It is possible to reduce the protrusion of the resistive contact layer 50 and the semiconductor layer 40 below on both sides in the longitudinal direction of the wirings 62, 64, 65, 66, 68.

Herein, the process of forming the photoresist patterns 912 and 914 will be described in more detail. First, the photosensitive material is coated and subjected to a prebake treatment process. At this time, the photosensitive material is heated without degenerating components, thereby physically removing the organic solvent and increasing the adhesive strength. This prebake process must be elaborate as it can affect subsequent processes such as exposure and development. Next, after exposure to light along the photoresist patterns 912 and 914 to be formed using a mask, all of the photosensitive materials other than the photoresist patterns 912 and 914 are removed with a developer. In this case, the thickness of the photosensitive film 914 may be more uniformly formed by exposing the photosensitive material with exposure energy in a range having a second average slope G2 in the channel region E of the thin film transistor using a mask of a slit pattern. Will be. Here, the inclination angle θ2 that forms the boundary of the first portion 914 of the photosensitive film is gently formed. On the other hand, the second portion 912 and the other portion (D) is exposed to the exposure energy of the range having the first average slope (G1) to form the overall contour of the photosensitive film pattern 912 to have a high inclination angle (θ1). . After the developing step, the photoresist patterns 912 and 914 swell by the developer, and the adhesive force with the data lines 62, 64, 65, 66 and 68 under the photoresist patterns 912 and 914 is weakened. Therefore, the weakened adhesive force is reinforced through a postbake process. This post-baking process proceeds at a relatively high temperature compared to the pre-baking process to reinforce the adhesive force, but the reflow occurs in the photoresist patterns 912 and 914, so that the overall shape of the photoresist patterns 912 and 914 is smooth. It is unevenly deformed. Therefore, the post-baking process is mainly omitted because of the difficulty in uniformly forming the channel portion E of the thin film transistor.

Subsequently, etching is performed on the photoresist patterns 912 and 914 and the underlying layers, that is, the data metal layer 600, the ohmic contact layer 50, and the semiconductor layer 40. In this case, the data lines 62, 64, 65, 66, and 68 and the films under the data lines remain intact, and only the semiconductor layer 40 remains in the channel portion E. In the portion D, all three layers 600, 50, and 40 are removed to expose the gate insulating layer 30.                     

First, as shown in FIGS. 7A and 7B, the exposed data metal layer 600 of the other portion D is removed to expose the underlying ohmic contact layer 50. In this process, both a dry etching method and a wet etching method may be used. In this case, the data metal layer 600 may be etched and the second photoresist patterns 912 and 914 may be hardly etched. However, in the case of dry etching, it is difficult to find a condition in which only the data metal layer 600 is etched and the second photoresist patterns 912 and 914 are not etched, and thus the photoresist patterns 912 and 914 may be etched together. In this case, the thickness of the first portion 914 is thicker than that of the wet etching so that the first portion 914 is removed in this process so that the lower data metal layers 601 and 602 are not exposed.

In this case, as shown in FIGS. 7A and 7B, only the data metal layer of the channel portion E and the data wiring portion D, that is, the data wiring layer 67 for the source / drain and the conductor 64 for the storage capacitor are left. The data metal layer 600 in part D is all removed to reveal the resistive contact layer 50 underneath. The remaining data wiring layers 67 and 64 have the same shape as the data wirings 62, 64, 65, 66 and 68 except that the source and drain electrodes 65 and 66 are connected without being separated. In addition, when dry etching is used, the photoresist patterns 912 and 914 are also etched to some extent.

Subsequently, as shown in FIGS. 8A and 8B, the exposed resistive contact layer 50 of the other portion D and the semiconductor layer 40 below the dry etching method together with the first portion 914 of the photoresist pattern. Remove at the same time. At this time, the photoresist pattern 912 and 914, the ohmic contact layer 50 and the semiconductor layer 40 (the semiconductor layer and the ohmic contact layer have almost no etching selectivity) are simultaneously etched and the gate insulating film 30 is etched. It is preferable to perform the etching under the condition that the etching ratio of the photoresist patterns 912 and 914 and the semiconductor layer 40 is almost the same. For example, by using a mixed gas of SF ₆ and HCl or a mixed gas of SF ₆ and O ₂ , the two films can be etched to almost the same thickness. When the etch ratios of the photoresist patterns 912 and 914 and the semiconductor layer 40 are the same, the thickness of the first portion 914 should be equal to or smaller than the sum of the thicknesses of the semiconductor layer 40 and the ohmic contact layer 50. . However, when the photoresist film of the first portion 912 is not completely removed during the etching of the ohmic contact layer 50 and the semiconductor layer 40, the photoresist film of the first portion 912 may be removed through a photoresist etch back process. do.

In this way, as shown in FIGS. 8A and 8B, the first portion 914 of the channel portion E is removed to reveal the source / drain wiring layer 67, and the ohmic portion 50 of the ohmic portion D is exposed. And the semiconductor layer 40 is removed to expose the gate insulating layer 30 thereunder. On the other hand, since the second portion 912 of the data line part C is also etched, the thickness becomes thin. In this step, the semiconductor layers 42 and 48 are completed. Reference numerals 55 and 58 denote a resistive contact layer below the source / drain wiring layer 67 and a resistive contact layer below the storage capacitor conductor 64, respectively.

Subsequently, ashing of the photoresist film remaining on the surface of the source / drain wiring layer 67 of the channel portion E is removed.

Next, as shown in FIGS. 9A and 9B, the source / drain wiring layer 67 of the channel portion E and the source / drain ohmic contact layer 55 thereunder are etched and removed. In this case, the etching may be performed only by dry etching with respect to both the source / drain interconnect layer 67 and the ohmic contact layer 57, and the wet contact with the source / drain interconnect layer 67 may be performed by wet etching. It may also be performed by dry etching. In the former case, it is preferable to perform etching under a condition where the etching selectivity of the source / drain wiring layer 67 and the ohmic contact layer 57 is large, which is difficult to find the etching end point when the etching selectivity is not large. This is because it is not easy to adjust the thickness of the semiconductor layer 42 remaining in the " In the latter case of alternating between wet etching and dry etching, the side surfaces of the source / drain wiring layer 67 to be wet etched are etched, but the dry contact etched resistive contact layer 57 is hardly etched, thus making a step shape. Examples of the etching gas used for etching the ohmic contact layer 57 and the semiconductor layer 42 may be a mixed gas of the mixed gas of CF ₄ and HCl and CF ₄ and O _2, the CF ₄ and O ₂ When used, the semiconductor layer 42 can be left in a uniform thickness. In this case, as shown in FIG. 9B, a portion of the semiconductor layer 42 may be removed to reduce the thickness, and the second portion 912 of the photoresist pattern may also be etched to a certain thickness at this time. At this time, the etching should be performed under the condition that the gate insulating film 30 is not etched, and the photoresist film is not exposed so that the second portion 912 is etched so that the data lines 62, 64, 65, 66, and 68 underneath are not exposed. It is a matter of course that the patterns 912 and 914 are thick.

In this case, the source electrode 65 and the drain electrode 66 are separated, thereby completing the data lines 62, 64, 65, 66, and 68, and the ohmic contacts 55, 56, and 58 thereunder.

Finally, all of the second portions 912 of the photoresist pattern remaining in the data line part C are removed. However, the removal of the second portion 912 may be performed after removing the channel portion E source / drain wiring layer 67 and before removing the ohmic contact layer 57 thereunder.

As mentioned earlier, wet and dry etching can be alternately used or only dry etching can be used. In the latter case, since only one type of etching is used, the process is relatively easy, but it is difficult to find a suitable etching condition. On the other hand, in the former case, the etching conditions are relatively easy to find, but the process is more cumbersome than the latter.

Next, a silicon nitride, an a-Si: C: O film, or an a-Si: O: F film is grown by chemical vapor deposition (CVD) or an organic insulating film is applied to form a protective film 70.

Next, as shown in FIGS. 10A to 10B, the passivation layer 70 is photo-etched together with the gate insulating layer 30 to drain the electrode 66, the end portion 24 of the gate line, the end portion 68 of the data line, and the like. Contact holes 76, 74, 78 and 72 are respectively formed to expose the conductor 64 for the storage capacitor.

Finally, as shown in FIGS. 2A and 2B, a 400-500 kW ITO layer or an IZO layer is deposited and photo-etched to be connected to the drain electrode 66 and the conductor 64 for the storage capacitor. Contact auxiliary members 86 and 88 connected to the pixel electrode 82, the gate pad 24, and the data pad 68, respectively, are formed.

On the other hand, as a gas used in the pre-heating process before laminating ITO or IZO, it is preferable to use nitrogen, which is the metal film 24 exposed through the contact holes 72, 74, 76, and 78. This is to prevent the metal oxide film from being formed on the upper portions of 64, 66 and 68.

The present invention is not limited to the above embodiment, and can be applied to the manufacturing process of the thin film transistor substrate using all four masks.

According to the manufacturing method, the operation and effects of the manufacturing method of the thin film transistor substrate for a display device using the photosensitive material according to the exemplary embodiment of the present invention, the overall contour of the photoresist pattern 912 has a high inclination angle (θ1) The photoresist pattern 914 formed on the channel region E of the thin film transistor may be formed to have a gentle inclination angle θ2.

As a result, the protrusion of the ohmic contact layer 50 and the semiconductor layer 40 on both sides of the data lines 62, 64, 65, 66, and 68 is reduced, thereby reducing the characteristics of the thin film transistor, the crosstalk, or the vertical direction. It is not necessary to reduce the occurrence of defects such as unevenness or reduce the aperture ratio in order to secure a process margin due to such defects, and at the same time, it is possible to uniformly form the channel region E of the thin film transistor.

As described above, according to the present invention, the resistive contact layer and the semiconductor layer are protruded to both sides in the longitudinal direction of the data line, thereby reducing the occurrence of defects and uniformly forming the channel region of the thin film transistor. It becomes possible.

Claims (8)

In a photosensitive material made of a resin, a photosensitive compound and a solvent, The photosensitive material is a photosensitive material, characterized in that the change curve indicating the residual degree after development of the photosensitive material according to the exposure energy includes at least one inflection point. The method of claim 1, The change curve representing the residual degree after development of the photosensitive material includes a first average slope divided by the inflection point and a second average slope that is gentler than the first average slope. The method of claim 1, The photosensitive material is characterized in that the change curve showing the residual degree after development of the photosensitive material by the combination of the resin, the type or content of the photosensitive compound or the hydroxyl content contained in the photosensitive compound has an inflection point Photosensitive material. In the method for manufacturing a thin film transistor substrate for a display device, Forming a gate wiring including a gate line and a gate electrode connected to the insulating substrate; Forming a gate insulating film covering the gate wiring; Forming a semiconductor layer pattern on the gate insulating film; Forming an ohmic contact layer pattern on the semiconductor layer pattern; Forming a data line including a source electrode and a drain electrode formed on the ohmic contact layer and separated from each other and made of the same layer, and a data line connected to the source electrode; Separation of the source electrode and the drain electrode is performed by a photolithography process using a photosensitive film pattern formed of a photosensitive material having a change point in which a change curve indicating a residual degree after development of the photosensitive material according to exposure energy is used. Method of manufacturing a thin film transistor substrate. The method of claim 4, wherein The change curve representing the residual degree after development of the photosensitive material includes a first average slope divided by the inflection point and a second average slope that is gentler than the first average slope. The method of claim 5, The photoresist pattern may include a first portion positioned between the source electrode and the drain electrode, a second portion having a thickness thicker than the first portion, and a third portion having a thickness thinner than the first portion. A method of manufacturing a thin film transistor substrate for a display device. The method of claim 6, And the thickness of the third portion is almost zero. The method of claim 6, The photoresist of the first portion of the photoresist pattern is formed by exposing the photosensitive material with an exposure energy in a range having the second average slope in a change curve representing a residual degree after development of the photosensitive material. And a photosensitive film is formed by exposing the photosensitive material to an exposure energy in a range having the first average slope.

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