KR19990053521A - A randomizer for downstream transmission of a cable modem transmission system - Google Patents

Abstract

The present invention relates to a randomizing apparatus for randomizing downstream data in order to obtain synchronization of symbol data during demodulation, and more particularly, to a randomizer for randomizing an input symbol stream input on a frame basis into a Galois field field GF (2 ^m ) To generate a pseudo noise code by performing a Galois field multiplication operation on a Galois field constant (? ^N ) and a last register value of a feedback shift register unit in a symbol-by-symbol basis to provide a first register of the feedback shift register unit, The elements {alpha ⁰ , alpha ¹ , alpha ² , ... on the field GF (2 ^m ) , α ^m-2 value of the final register to a constant α ⁿ α ^n} existing on the result obtained by multiplying a value ^{α t, t = (n +} k) modular-constant Galois field processing unit for providing a (2 ^m -1) And outputs the randomized symbol data by adding the input symbol data to be randomized and the last register value of the feedback shift register unit.

Description

A randomizer for downstream transmission of a cable modem transmission system (Randomizer of the cable modem transmission system in the downstream direction)

The present invention relates to a cable modem transmission system, and more particularly, to a randomizing apparatus for randomizing downstream data in order to obtain synchronization of symbol data during demodulation.

The cable modem network provides a variety of services such as telecommuting, video conferencing, and web browsing to subscribers by accessing the Internet and intranet along with ISDN and multi-digital subscriber line (xDSL).

1 is a block diagram of a cable modem network supporting broadband services. A head end 110 including a cable modem termination system (hereinafter referred to as " CMTS ") 111 is connected to a backbone network 100 including a private network or a public network provided by a network operator, And a cable modem 130 (Cable Modem: hereinafter referred to as CM) is connected. An optic / electro converter 120 is connected between the head end 110 and the CM 130 to convert an optical signal and an electrical signal. The CM 120 includes a photoelectric converter 120, a CM 130, The CM 130 and the subscriber side 140 are connected by a coaxial cable. Bidirectional communication is possible between the service provider and the subscriber, and two bi-directional communication paths are combined in the headend 110. [ The headend 110 includes an operation support system (not shown) for the CMTS 111, a CMTS 111 for enabling bidirectional communication, a combiner 112 for combining and transmitting various application services of the information provider, A transmission buffer 114, a reception buffer 115 and a distributor 113 for receiving and distributing data requested by the subscriber, a security and connection control unit 116, and the like. The CMTS 111 is provided with a network terminal 111-1 responsible for a network interface with the CMTS, a modulator 111-2 for modulating application service data (downstream data) of the information provider, And a demodulation unit 111-3 for demodulating the upstream data. The cable modem network shown in FIG. 1 is a broadband system using RF signals, and the RF interface exists between the CM and the cable network on the downstream, between the CMTS and the cable network on the downstream, and between the CMTS and the cable network on the upstream.

The downstream channels transmitted from the CMTS to each CM broadcast broadband service data at a transmission rate of 50 to 860 MHz. The upstream channel transmitted from each CM to the CMTS is transmitted to the subscriber in the range of 5 to 42 MHz, In a point-to-point manner.

The downstream protocol of the cable modem transmission system is as determined in ITU-T Recommendations J.83, Annex B, and the downstream signal processing procedure is shown in FIG. The downstream modulation is performed by framing the MPEG-2 data stream input in units of packets in the MPEG frame unit 200 and then performing a forward error correction algorithm in the FEC (Forward Error Correction) 230 to obtain reliable data. The FEC codeword output from the FEC encoder 210 is QAM modulated through the QAM modulator 220 and then transmitted through the cable channel 230 as an RF signal. Downstream demodulation is performed through the QAM demodulator 240, the FEC decoder 250, and the MPEG frame unit 260 in the reverse process of modulation. The MPEG framing process provides a parity check pattern for packet synchronization between transmitting and receiving sides, and the QAM modulation process supports 64QAM mode and 256QAM mode. The FEC encoding process uses a concatenated coding technique, an outer coder uses a Reed-Solomon code having T error correction capabilities, an inner coder, The TCM codeword for generating the coded modulation code is used to correct an uncorrectable error in the internal decoder by the external decoder so that the error rate is substantially zero.

3, the FEC encoder 210 (see FIG. 2) includes a Reed Solomon encoder 300, an interleaver 310, a randomizer 320, and a trellis encoder 330 The FEC decoder 250 includes a trellis decoder 350, a reverse randomizer 360, a deinterleaver 370, and a Reed Solomon decoder 380.

The Reed Solomon encoder 300 encodes the MPEG transport stream using the (128,122) RS block code. (128,122) The RS block code is composed of 128 symbols per block, of which only 122 symbols are information symbols and 6 symbols are parity for error correction, so that up to 3 symbols per RS block are error-corrected. The RS block codes are used in the 64QAM mode and the 256QAM mode.

The interleaver 310 performs convolutional interleaving on the (128,122) RS block codes to rearrange the data streams. The interleaver 310 is for effectively coping with a continuous error symbol (burst error) generated in the channel transmission. The convolutional interleaver structure supports a programmable structure in 64QAM mode and 256QAM mode, i.e., various interleaving modes.

The randomizer 320 randomizes the interleaved data so that the interleaved data does not have a specific pattern, thereby preventing the RF modulated signal from interfering with other channels and extracting the synchronization from the receiving side. Generates the pseudo noise code promised to the receiving side, and outputs the randomized data by adding the inputted pseudo noise code.

The trellis encoder 330 performs trellis coded modulation (TCM). TCM is a channel coding technique for obtaining a high coding gain in a bandwidth-limited channel, and is implemented by combining a coding technique and a modulation technique. The TCM structure consists of a finite convolutional encoder and a QAM modulator (64 / 256QAM).

Particularly, the randomizer 320 randomizes the data and transmits the data by using a QAM modulation technique to convert the carrier phase by the input bits and compare the phase shift value of the current symbol with the phase value of the next symbol This is because the transmitting side and the receiving side for synchronizing the original data are synchronized. If the receiving side is trying to synchronize, if the data bits of "1" or "0" are continuous for a long time, a data burst error that can not synchronize each data burst occurs. Therefore, the data bit stream is randomized and transmitted so that a sufficient phase change occurs in the receiver so that the received clock can be synchronized. In addition, it is important to make the FEC demodulation algorithm of a general receiver into a random pattern because the demodulated data sequence can not be properly demodulated if the modulated data string is not a random pattern.

The randomizing unit randomizes the input data stream by adding 7-bit RS symbols on the Galois field field GF 128 using 7-bit symbols as pseudo noise (PN) codes. Also, while the synchronization signal of the FEC frame is being inserted, the randomizing unit is initialized, and the randomized symbol must be outputted from the time when the first symbol is actually input.

Accordingly, it is an object of the present invention to provide a randomizing device for randomizing the order of actual symbol data except a sync signal in a frame on a specific Galois field.

According to another aspect of the present invention, there is provided a method of generating a pseudo noise code by adding a previous register value and a predetermined constant to a next register value to generate a pseudo noise code; A Galois field constant (α ⁿ ) processor for Galois field multiplication of the last register value of the feedback shift register unit and a Galois field constant to provide the Galois field constant to the first register of the feedback shift register unit; An initialization unit for initializing a plurality of registers of the feedback shift register unit and all the bits of the Galois field constant processing unit to " 1 " in accordance with an enable control signal; And an adding unit for adding the input symbol data to be randomized and the last register value of the feedback shift register unit.

1 is a block diagram of a cable modem network supporting broadband services,

2 is a block diagram illustrating a downstream signal processing procedure of a cable modem transmission system,

3 is a block diagram of the forward error correction unit of FIG. 2,

4 is a block diagram of a randomizer according to the present invention.

Description of the Related Art [0002]

400: feedback shift register unit 401: adders R1 to R3: registers

410: Galois field constant processing section 420: Initialization section

430:

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

First, the Galois field field in which the randomizer operates is a number system having only a finite number of elements. The Galois field field indicated by GF (q) has q elements and performs various operations The resulting value is also a number system with one of the q elements. Especially, in the finite Galois field system, it is useful to process digital data because overflow does not occur, and it is also useful for processing GF (2) with {0,1} The number of elements of the field GF (2 ^m ) is 2 ^m , and only m bases are required to represent all these elements. That is, the hardware can be implemented with m bits of binary digits. At this time, {alpha ⁰ , alpha ¹ , alpha ² , alpha ³ , ... ,? ^q } The basic base α is called the primitive element, and the polynomial with its root is called the primitive polynomial. A primitive polynomial is called a prime primitive polynomial. A prime primitive polynomial is used to distinguish a field from a primitive polynomial. A prime primitive polynomial is generally called a field generator (polynomial) polynomial.

The field generating polynomial F (x), which is determined through the addition or multiplication operation on the Galois field field GF (2 ^m ) to be a value on the field, is also determined according to the value of m, The field generating polynomial is shown in Fig.

The field generator polynomial F (x) of GF (2 ^m ) m F (x) m F (x) 2 x ² + x + 1 6 x ⁶ + x + 1 3 x ³ + x + 1 7 x ⁷ + x ³ +1 4 x ⁴ + x + 1 8 x ⁸ + x ⁴ + x ³ + x ² + 1 5 x ⁵ + x ² + 1 9 x ⁹ + x ⁴ +1

Addition or multiplication operations on Galois field fields created by field generation polynomials perform modulo-2 addition and modulo-2 multiplication.

4 is a block diagram of a randomizer according to the present invention. In this embodiment, the randomization polynomial ^{f (x) = x 3 +} x + α 3 , The constant α ³ Is the polynomial of the Galois field field 7 alpha ⁷ + alpha ³ + 1 = 0 .

4, the randomizer includes a feedback shift register unit 400, a Galois field constant processing unit 410, an initialization unit 420, and an adder 430.

The feedback shift register unit 400 receives the polynomial ^{f (x) = x 3 +} x + α 3 The contents of the first register R1 and the contents of the third register R2 are added to each other and the contents of the second register R2 The contents of the second register R2 are provided to the third register R3 and the contents of the third register R3 are multiplied by the Galois field constant? ³ to provide the contents of the third register R3 to the first register R1 . The value output from the third register R3 of the feedback shift register unit 400 corresponds to a pseudo noise and the pseudo noise and the RS symbol data actually input are supplied to the adder 430 to generate randomized data do.

Wherein the constant value of all to set to exist on a Galois field constant processing unit 410 Galois field field GF (2 ⁷⁾ to the multiplication process the Galois field constant α ³ the contents of the third register ^{(R3) {α 0, α} 1 ,? ² , ... ,? ¹²⁶ }, the next three-order-increased constant value is output from the constant value corresponding to the contents of the third register. In this case, if the value α ⁰ of the set elements is defined as α ¹²⁷ , when the value input to the Galois field constant processing unit 410 is α ^k , the result of multiplying the input α ^k by the Galois field constant α ³ is α ^t , Where t can be expressed as k + 3 modulo 127.

Meanwhile, since the synchronization signal of the FEC frame is transmitted without being randomized, the registers R1 to R3 and the Galois field constant processing unit 410 are disabled while the synchronization signal is inserted, At this point, the pseudo noise code must be generated. For this, the initialization unit 420 receives the enable signal and initializes the first to third registers R1 to R3 and the Galois field constant processing unit 420 to " 1 ". The enable signal is a control signal for initializing the entire receiving system.

Since the RS symbol data is 7 bits, each of the registers R1, R2, and R3 is formed by connecting 7-bit D flip-flops in parallel, and each adder 401 and 430 is implemented as a 7-bit exclusive-OR gate.

The contents of the register and the randomized output symbols until the processing of the five RS symbol data RS1 to RS5 after the first to third registers R1 to R3 are initialized are shown in Table 2 below.

Input symbol R1 R2 R3 Output symbol α ⁹⁹ = 1111111 α ⁹⁹ = 1111111 α ⁹⁹ = 1111111 RS1 ? ¹⁰² = 1110001 0 = 0000000 α ⁹⁹ = 1111111 RS1 +? ⁹⁹ RS2 ? ¹⁰² = 1110001 alpha ¹⁰⁶ = 0001110 0 = 0000000 RS2 +? ⁹⁹ RS3 0 = 0000000 ? ¹⁰² = 1110001 alpha ¹⁰⁶ = 0001110 RS3 + 0 RS4 ? ¹⁰⁹ = 1101101 alpha ¹⁰⁶ = 0001110 ? ¹⁰² = 1110001 RS4 +? ¹⁰⁶ RS5 α ¹⁰⁵ = 0011100 α ¹⁰⁴ = 0011100 alpha ¹⁰⁶ = 0001110 RS5 +? ¹⁰²

As shown in Table 2, the initialization unit 420 initializes the registers R1 to R3 with 7 bits '1111111', which corresponds to the Galois field field element ⁹⁹ . When the first RS symbol RS1 is input to the adder 430 after the initialization, the adder performs an exclusive-OR operation with the output (? ⁹⁹ ) of the third register to generate a randomized RS symbol. At the same time, the output? ⁹⁹ of the third register R3 is fed back to the Galois field constant processing unit 410, and the Galois field constant processing unit generates the third-order increased element? ¹⁰² to the first register R1 Feedback input. Then, the third output (α ⁹⁹⁾ and the output (α ⁹⁹⁾ is an exclusive OR operation value of 0 of the first register (R1) of the resistor (R3) is input to the second register (R2).

The randomizing device for repeatedly performing the above-described rules may be a randomizing polynomial ^{f (x) = x 3 +} x + α 3 And generates a random data stream by adding the input symbols.

The randomizer of the present invention has a Galois field constant processing unit 410 for processing a Galois field multiplication operation on a random polynomial constant on a Galois field, thereby randomizing input symbols.

Claims (2)

In order to randomize an input symbol stream input on a frame-by-symbol basis on a Galois field field GF (2 ^m ) A feedback shift register unit comprising a plurality of registers for adding a previous register value and a predetermined constant and storing the sum as a next register value; A Galois field constant processing unit for performing a Galois field multiplication operation on the last register value of the feedback shift register unit and a Galois field constant α ⁿ to provide the first register of the feedback shift register unit; An initialization unit for initializing a plurality of registers of the feedback shift register unit and all the bits of the Galois field constant processing unit to " 1 " in accordance with a control signal; And And a summation unit for adding the input symbol data to be randomized and the last register value of the feedback shift register unit to output randomized symbol data. Device. The method according to claim 1, characterized in that the Galois field constant processing unit is configured to calculate the element {alpha ⁰ , alpha ¹ , alpha ² , ...) on the Galois field field GF (2 ^m ) , ⁿ and the value α by multiplying the result of the last register of the constant α ⁿ existing in α ^m-2} is an α ^t, wherein t = (n + k) modular - the equivalent of (2 ^m -1) A randomizing device for downstream transmission of a cable modem transmission system.