KR102587268B1 - Method for manufacturing processed circuit boards, multilayer circuit boards and circuit boards with coverlay films, and films with adhesive layers - Google Patents

Abstract

Providing a method of manufacturing a processed circuit board and a film on which an adhesive layer is formed.
The surface of the conductor circuit side of a circuit board having a polymer layer containing a tetrafluoroethylene-based polymer and a conductor circuit formed on the surface of the polymer layer is plasma treated to obtain a circuit board having a plasma-treated surface, and then the circuit is obtained. A method of manufacturing a treated circuit board in which the plasma treated surface of a substrate and the adhesive layer of a substrate having an adhesive layer are heat-compressed at less than 260° C., and a film of a tetrafluoroethylene-based polymer and a thermosetting adhesive layer are laminated in this order, and then pressed. When the thermosetting adhesive layer is cured under the conditions of a temperature of 160 ° C., a press pressure of 4 MPa, and a press time of 90 minutes, the peel strength of the interface between the film and the cured thermosetting adhesive layer is 5 N / cm or more. A film in which an adhesive layer is formed. .

Description

Method for manufacturing processed circuit boards, multilayer circuit boards and circuit boards with coverlay films, and films with adhesive layers

The present invention relates to a method of manufacturing a processed circuit board, a multilayer circuit board and a circuit board with a coverlay film, and a film with an adhesive layer.

With the miniaturization and increased functionality of electronic devices and electric devices, the demand for multilayer circuit boards with multilayered conductor circuits and circuit boards with coverlay films is increasing. In the manufacture of these circuit boards, a method of thermocompression bonding an original circuit board with a conductor circuit formed on the surface of a polyimide film and a substrate (adhesive sheet (bonding sheet) or coverlay film) having a thermosetting adhesive layer is adopted. .

Additionally, in recent years, these circuit boards are required to have electrical properties (low dielectric constant, etc.) corresponding to frequencies in the high frequency range and heat resistance that can withstand solder reflow. However, conventional polyimide films have insufficient electrical properties.

Therefore, Patent Document 1 proposes a multilayer circuit board using a liquid crystal polymer film as an insulating material layer, adhesive sheet, or coverlay film of the original circuit board.

Patent Document 2 discloses a flexible metal laminate having a polyimide film, a layer of fluoropolymer having an adhesive group and a melting point of 280 to 320°C formed on the surface of the polyimide film, and metal foil formed on the surface of the layer, and a flexible metal laminate using the same. A printed board is proposed.

Patent Documents 3, 4, 5, and 6 propose a coverlay film having an adhesive layer containing a polyimide film and a fluoropolymer as a coverlay film that has excellent electrical properties and reduces transmission loss of a circuit board. .

Japanese Patent Publication No. 2014-042043 International Publication No. 2015/080260 Japanese Patent Publication No. 2014-032980 Japanese Patent Publication No. 2014-197611 Japanese Patent Publication No. 2015-133480 Japanese Patent Publication No. 2015-176921

Since the heat-resistant liquid crystal polymer has a high melting point, for example, 270°C or higher, when manufacturing these circuit boards, it is necessary to heat-compress the original circuit board and the adhesive substrate at a high temperature of 270°C or higher.

Therefore, when a liquid crystal polymer film is used, a typical press device used for adhesive substrates using a thermosetting adhesive as an adhesive layer component cannot respond because the set temperature for thermocompression is low, for example, less than 220°C. , a new press device that supports high-temperature thermocompression is needed. In addition, when thermocompression is performed at a high temperature of 270°C or higher, the liquid crystal polymer film may melt and the position of the conductor circuit may be misaligned.

Even when thermocompression bonding the flexible printed circuit board and the adhesive substrate of Patent Document 2, a high temperature higher than the melting point of the fluoropolymer (for example, 280°C or higher) is required, causing the same problems as when using a liquid crystal polymer.

There is a need for a method of manufacturing a multilayer circuit board or a circuit board with a coverlay film by thermocompressing an original circuit board and an adhesive board at a relatively low temperature.

Regarding adhesive substrates such as coverlay films, there is a demand for substrates that have adhesive properties and electrical properties when thermally compressed at a relatively low temperature. In short, even in the coverlay films of Patent Documents 3, 4, 5, and 6, which have an adhesive layer containing a fluoropolymer, high temperature heating above the melting point of the fluoropolymer during thermal compression is required to develop adhesiveness. , ordinary press equipment cannot handle this, and a special press equipment capable of high-temperature thermocompression is required.

The present invention provides a method for manufacturing a multilayer circuit board or a circuit board with a coverlay film by thermo-compressing an adhesive substrate and a circuit board at a relatively low temperature, and also provides a method for producing a multi-layer circuit board or a circuit board with a coverlay film, etc., and the electrical properties and thermal compression at a relatively low temperature. The purpose is to provide an adhesive substrate that sufficiently exhibits adhesive properties.

The present invention has the following aspects.

(1) Plasma treating the surface on the conductor circuit side of a circuit board having a polymer layer containing a tetrafluoroethylene polymer and a conductor circuit formed on the surface of the polymer layer to obtain a circuit board having a plasma-treated surface, and then: A method of manufacturing a treated circuit board, characterized in that the treated circuit board is manufactured by thermally compressing the plasma treated surface of the circuit board and the adhesive layer of the substrate having the adhesive layer at less than 260°C.

(2) The manufacturing method of (1) above, wherein the peeling strength of the heat-compressed surface of the processed circuit board is 5 N/cm or more.

(3) The substrate having the adhesive layer is a coverlay film with an adhesive layer formed thereon, and the processed circuit board is a circuit board with a coverlay film formed thereon, or the substrate having the adhesive layer is an adhesive sheet and the processed circuit board is an adhesive layer. The manufacturing method of (1) or (2) above, wherein the circuit board is formed.

(4) The manufacturing method of (1) to (3) above, wherein the wetting tension of the exposed surface of the polymer layer of the circuit board having the plasma treated surface is set to 30 mN/m or more by the plasma treatment.

(5) The tetrafluoroethylene-based polymer has at least one functional group selected from the group consisting of a carbonyl group-containing group, a hydroxy group, an epoxy group, an amide group, an amino group, and an isocyanate group. Manufacturing method.

(6) The production method of (1) to (5) above, wherein the melting point of the tetrafluoroethylene polymer is 260°C or higher.

(7) The manufacturing method of (1) to (6) above, wherein the adhesive layer is a thermosetting adhesive layer containing a rubber-modified epoxy resin and a curing agent.

(8) For the substrate having the adhesive layer, the adhesive layer of the substrate having the adhesive layer is heat-compressed with the plasma treated surface of the circuit board under the conditions of a press temperature of 160°C, a press pressure of 4 MPa, and a press time of 90 minutes. The manufacturing method of (1) to (7) above, wherein the processed circuit board is a substrate in which the peeling strength of the heat-compressed surface is 5 N/cm or more.

(9) Plasma treating the surface on the conductor circuit side of a circuit board having a polymer layer containing a tetrafluoroethylene polymer and a conductor circuit formed on the surface of the polymer layer to obtain a circuit board having a plasma-treated surface, followed by: The plasma treated surfaces of the circuit board having the plurality of plasma treated surfaces are opposed to each other, an adhesive sheet is placed between the respective plasma treated surfaces, and heat-compressed at less than 260° C. to form a multilayer circuit board having a plurality of layers of conductor circuits. A method of manufacturing a multilayer circuit board, characterized in that manufacturing a.

(10) Plasma treating the surface on the conductor circuit side of a circuit board having a polymer layer containing a tetrafluoroethylene polymer and a conductor circuit formed on the surface of the polymer layer to obtain a circuit board having a plasma-treated surface, followed by: Manufacture of a circuit board with a coverlay film, characterized in that a circuit board with a coverlay film is manufactured by thermally compressing the plasma treated surface of the circuit board and the adhesive layer of the coverlay film on which the adhesive layer is formed at less than 260 ° C. method.

(11) When a tetrafluoroethylene-based polymer film and a thermosetting adhesive layer are laminated in this order and the thermosetting adhesive layer is cured under the conditions of a press temperature of 160 ° C., a press pressure of 4 MPa, and a press time of 90 minutes, the film A film with an adhesive layer, characterized in that the peel strength of the interface of the thermosetting adhesive layer after overcuring is 5 N/cm or more.

(12) The adhesive layer of (11) above is formed, wherein the tetrafluoroethylene polymer has at least one functional group selected from the group consisting of a carbonyl group-containing group, a hydroxy group, an epoxy group, an amide group, an amino group, and an isocyanate group. film.

(13) The film with the adhesive layer of (11) or (12) above, wherein the melting point of the tetrafluoroethylene polymer is 260°C or higher.

(14) The film with the adhesive layer of any of the above (11) to (13), wherein the thermosetting adhesive layer is a thermosetting adhesive layer containing a rubber-modified epoxy resin and a curing agent.

(15) A film formed with the adhesive layer of the above (11) to (14), which is a coverlay film or an interlayer insulation film.

According to the manufacturing method of the present invention, a circuit board and an adhesive substrate are thermocompressed at a relatively low temperature, and a processed circuit board such as a multilayer circuit board or a circuit board with a coverlay film can be manufactured.

According to the present invention, a film with an adhesive layer useful as a coverlay film or an interlayer insulating film, which has excellent electrical properties and exhibits sufficient adhesiveness at a relatively low temperature, is obtained.

1 is a cross-sectional view showing an example of a multilayer circuit board.
Figure 2 is a cross-sectional view showing another example of a multilayer circuit board.
Figure 3 is a cross-sectional view showing another example of a multilayer circuit board.
FIG. 4 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 1.
FIG. 5 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 2.
FIG. 6 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 3.
Figure 7 is a cross-sectional view showing an example of using an adhesive film as a coverlay film.
Fig. 8 is a cross-sectional view showing an example of using an adhesive film as an interlayer insulating film.
Figure 9 is a cross-sectional view showing an example of a circuit board on which a coverlay film is formed.
Figure 10 is a cross-sectional view showing another example of a circuit board on which a coverlay film is formed.
Figure 11 is a cross-sectional view showing another example of a circuit board on which a coverlay film is formed.
Fig. 12 is a cross-sectional view showing an example of a multilayer circuit board on which a coverlay film is formed.
Figure 13 is a cross-sectional view showing another example of a multilayer circuit board on which a coverlay film is formed.
FIG. 14 is a cross-sectional view showing the manufacturing of the circuit board of FIG. 9.
FIG. 15 is a cross-sectional view showing manufacturing the circuit board of FIG. 10.
FIG. 16 is a cross-sectional view showing manufacturing the circuit board of FIG. 11.
FIG. 17 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 12.
FIG. 18 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 13.

The definitions of terms below apply throughout this specification and claims.

“Thermal compression temperature” is the set temperature of the hot plate in the press device.

“Melting point” is the temperature corresponding to the maximum value of the melting peak measured by differential scanning calorimetry (DSC).

“Wetting tension” is a value measured according to JIS K 6768:1999 (corresponding international standard ISO 8296:1987). In the measurement of wetting tension, a cotton swab dipped in a test liquid whose wetting tension is already known is quickly rubbed on the test piece to form a liquid film of 6 cm2, and the state of the liquid film is observed 2 seconds after application to determine whether tearing has occurred. If not, do it as wet. The maximum wetting tension at which tearing of the liquid film does not occur becomes the wetting tension of the test piece. Additionally, the lower limit of the wetting tension of the test liquid specified in JIS K 6768:1999 is 22.6 mN/m.

“Peel strength of processed circuit board” is a value measured as follows. The processed circuit board is cut to 150 mm in length and 10 mm in width to prepare an evaluation sample. The polymer layer, the conductor circuit, and the adhesive layer are separated to a position of 50 mm from one end in the longitudinal direction of the evaluation sample. Using a tensile tester, the strip is peeled at an angle of 90° at a tensile speed of 50 mm/min, and the average load over a measurement distance of 20 mm to 80 mm is determined as the peel strength (N/cm).

“Peel strength of film with adhesive layer” is a value measured as follows. The film with the adhesive layer after heat curing is cut into a length of 150 mm and a width of 10 mm to prepare an evaluation sample. The polymer layer and the thermosetting adhesive layer after heat curing are separated to a position of 50 mm from one end in the longitudinal direction of the evaluation sample. Using a tensile tester, it is peeled at an angle of 90° at a tensile speed of 50 mm/min, and the average load from the measurement distance of 20 mm to 80 mm is taken as the peel strength (N/cm).

“Melt-mouldable polymer” means a polymer that has a melt flow rate of 0.1 to 1000 g/10 min at a temperature 20°C or more higher than the melting point of the resin under the condition of a load of 49 N.

“Mel flow rate” is the melt mass flow rate (MFR) specified in JIS K 7210-1:2014 (corresponding international standard ISO 1133-1:2011).

“10-point average illuminance (Rz _JIS )” is a value specified in Annex JA of JIS B 0601:2013.

“Unit” is a general term for an atomic group formed directly by polymerizing one molecule of a monomer and an atomic group obtained by chemically converting a part of the atomic group. Units based on monomers are also simply described as “units.”

The value of “pressure” represents “absolute pressure” unless otherwise specified.

1 to 18 are all schematic drawings, and the dimensional ratios in them are different from the actual ones for convenience of explanation.

The processed circuit board in the present invention includes a polymer layer (hereinafter also referred to as F layer) containing a tetrafluoroethylene-based polymer (hereinafter also referred to as F polymer) and a conductor circuit formed on the surface of the F layer. The surface of the conductor circuit side of a circuit board (hereinafter also referred to as an original circuit board) is plasma treated to obtain a circuit board having a plasma treated surface, and further having the plasma treated surface of the circuit board and an adhesive layer. It is obtained by thermocompression bonding the adhesive layer of a substrate (hereinafter also referred to as an adhesive substrate) at less than 260°C.

The processed circuit board includes an F layer, a conductor circuit formed on the surface of the F layer, and an adhesive layer (hereinafter also referred to as an adhesive layer) in contact with the surface of the conductor circuit and the surface of the F layer other than the portion where the conductor circuit is formed. have The adhesive layer is a layer formed from an adhesive substrate by thermocompression, and is specifically a layer derived from the adhesive layer of the adhesive sheet described later or the coverlay film on which the adhesive layer is formed.

The processed circuit board is preferably one in which the adhesive substrate is a coverlay film with an adhesive layer and the processed circuit board is a circuit board with a coverlay film, or the adhesive substrate is an adhesive sheet and the processed circuit board is a circuit board with an adhesive layer. do.

In the latter processed circuit board, it may additionally have a coverlay layer in contact with the surface of the processed circuit board. The coverlay layer is a layer that protects the conductor circuit, and specifically, a coverlay layer formed from a coverlay film provided with an adhesive layer described later can be mentioned.

The processed circuit board may have a heat-resistant base material layer in contact with the surface opposite to the side on which the conductor circuit of the F layer is formed.

The processed circuit board may have two or more F layers, may have two or more heat-resistant base layers, and may have two or more coverlay layers.

Through holes, via holes, etc. may be formed in the processing circuit board.

The peel strength of the heat-compressed surface of the processed circuit board is preferably 5 N/cm or more, more preferably 8 N/cm or more, and especially preferably 10 N/cm or more. If the peel strength is more than the lower limit of the above range, the adhesion between the F layer and the adhesive layer is excellent. The higher the peel strength, the better, and the upper limit is not limited. In addition, the thermal compression surface is the interface between the F layer and the conductor circuit and the adhesive layer.

The heat-resistant base material layer is a layer containing a heat-resistant base material, and may have a single-layer structure or a multi-layer structure.

Heat-resistant substrates include polyimide (aromatic polyimide, etc.), polyarylate, polysulfone, polyallyl sulfone (polyether sulfone, etc.), aromatic polyamide, aromatic polyetheramide, polyphenylene sulfide, polyallyl ether ketone, Examples include polyamide-imide, liquid crystal polyester, and fiber-reinforced substrates.

The fiber-reinforced base material consists of a matrix resin (cured product of thermosetting resin such as epoxy resin, heat-resistant resin, etc.) and reinforcing fibers (glass fiber, carbon fiber, aramid fiber, polybenzoxazole fiber, polyarylate fiber) embedded in the matrix resin. etc. It may be a woven fabric or a non-woven fabric.).

The thickness of the heat-resistant base material layer is usually 5 to 150 μm, preferably 7.5 to 100 μm, and more preferably 12 to 75 μm.

The conductor circuit in the present invention includes a conductor circuit in which a predetermined circuit pattern is formed by processing the metal foil of a metal clad laminate having a metal foil, an F layer, and optionally a heat-resistant base layer by etching, etc., and the metal foil of the metal clad laminate. Examples include a conductor circuit of electrolytic copper plating with a predetermined circuit pattern processed by the SAP method or MSAP method described later.

Materials of the metal foil include copper, copper alloy, stainless steel, nickel, nickel alloy (including 42 alloy), aluminum, aluminum alloy, and the like. In typical circuit boards used in electronic devices, copper foil such as rolled copper foil and electrolytic copper foil is widely used, and copper foil is also preferred for the metal foil in the present invention.

A rust-prevention layer (oxide film such as chromate, etc.), a heat-resistant layer, etc. may be formed on the surface of the metal foil. The surface of the metal foil may be subjected to surface treatment (coupling agent treatment, etc.) to increase adhesiveness with the adhesive layer.

The 10-point average roughness (Rz _JIS ) of the surface of the metal foil is preferably 0.2 to 2.0 μm, and more preferably 0.3 to 1.5 μm. In this case, it is easy to balance the adhesive force with the adhesive layer and the reduction of electrical transmission loss.

The thickness of the metal foil is preferably 5 to 75 μm.

The conductor circuit is preferably formed by processing the metal-clad laminate using a semi-additive method (SAP method) or a modified semi-additive method (MSAP method).

The first form of the SAP method includes a method having the following steps.

A process of removing all of the metal foil of a metal clad laminate by etching,

A process of forming one or both through holes and via holes,

A process of desmearing the entire surface (including through holes and via holes),

A process of forming an electroless plating layer on the entire surface (including through holes and via holes),

A process of forming a plating resist in the non-circuit area of the surface of the electroless plating layer,

A process of forming a conductor circuit by electrolytic plating after forming a plating resist,

A process for removing plating resist,

A process of removing the electroless plating layer exposed by removing the plating resist by flash etching.

A second form of the SAP method includes a method having the following steps.

A process of forming one or both through holes and via holes in a metal clad laminate,

A process of desmearing the entire surface (including through holes and via holes),

A process of removing all of the metal foil by etching,

A process of forming an electroless plating layer on the entire surface (including through holes and via holes),

A process of forming a plating resist in the non-circuit area of the surface of the electroless plating layer,

A process of forming a conductor circuit by electrolytic plating after forming a plating resist,

A process for removing plating resist,

A process of removing the electroless plating layer exposed by removing the plating resist by flash etching.

The first form of the MSAP method includes a method having the following steps.

A process of forming one or both through holes and via holes in a metal clad laminate,

A process of desmearing the entire surface (including through holes and via holes),

A process of forming an electroless plating layer on the entire surface (including through holes and via holes),

A process of forming a plating resist in the non-circuit area of the surface of the electroless plating layer,

A process of forming a conductor circuit by electrolytic plating after forming a plating resist,

A process for removing plating resist,

A process of removing the electroless plating layer and metal foil exposed by removing the plating resist by flash etching.

A second form of the MSAP method includes a method having the following steps.

A process of forming a plating resist in a non-circuit area on the surface of the metal foil of a metal clad laminate,

A process of forming a conductor circuit by electrolytic plating after forming a plating resist,

A process for removing plating resist,

A process in which the metal foil exposed by removing the plating resist is removed by flash etching, etc.

The adhesive substrate in the present invention is preferably an adhesive sheet or a coverlay film provided with an adhesive layer. Additionally, the adhesive layer of the adhesive substrate may be thermoplastic or thermosetting, and thermosetting is preferred. In short, the adhesive substrate is preferably a substrate having a thermosetting adhesive layer. In this case, the adhesive layer in the processed circuit board contains the cured product of these adhesive components (cured product of the thermosetting adhesive).

The adhesive sheet is a sheet-shaped adhesive, and may be a sheet composed only of the adhesive, or may be a sheet in which an adhesive layer is formed on both sides of a heat-resistant resin film. When the adhesive in the adhesive sheet is a thermosetting adhesive, the thermosetting adhesive is preferably a semi-cured product in a semi-cured state.

A coverlay film with an adhesive layer has a coverlay layer (coverlay film) and an adhesive layer formed on one side of the coverlay layer. When the adhesive in the adhesive layer of the coverlay film on which the adhesive layer is formed is a thermosetting adhesive, the thermosetting adhesive is preferably a semi-cured product in a semi-cured state.

Materials of the coverlay layer include heat-resistant resin and F polymer.

The thickness of the coverlay layer is preferably 12 to 100 μm. The thickness of the adhesive layer of the adhesive substrate is preferably 5 to 50 μm. It is preferable that the thermosetting adhesive layer contains a thermosetting resin.

Examples of thermosetting resins include epoxy resins, cyanate ester resins, multifunctional maleimide resins, unsaturated polyphenylene ether resins, benzoxazine resins, and vinyl ester resins. Two or more types of thermosetting resins may be used together.

The thermosetting adhesive layer usually contains a curing agent and a curing accelerator.

The curing agent is appropriately selected depending on the type of thermosetting resin. For example, when the thermosetting resin is an epoxy resin, examples of the curing agent include an amine-based curing agent, a phenol-based curing agent, an acid anhydride-based curing agent, dicyandiamide, and a low molecular weight polyphenylene ether compound. Two or more types of curing agents may be used in combination.

Examples of the curing accelerator include imidazole, tertiary amine, organic phosphine, and metallic soap. Two or more types of curing accelerators may be used in combination.

The thermosetting adhesive layer may further contain fillers, thermoplastic resins, and other additives.

Fillers include silica, metal oxides (aluminum oxide, magnesium oxide, titanium oxide, etc.), metal hydroxides (aluminum hydroxide, magnesium hydroxide, etc.), barium sulfate, calcium carbonate, magnesium carbonate, boron nitride, aluminum borate, barium titanate, titanic acid. Strontium, calcium titanate, magnesium titanate, bismuth titanate, talc, clay, mica powder, cured resin powder, rubber particles (acrylic rubber particles, core-shell type rubber particles, cross-linked acrylonitrile-butadiene rubber particles, cross-linked styrene-butadiene rubber particles, etc. ) can be mentioned. Two or more types of fillers may be used together.

Examples of thermoplastic resins include acrylic resin, phenoxy resin, polyvinyl acetal resin, polyphenylene ether resin, and carbodiimide resin.

Other additives include flame retardants, flame retardant auxiliaries, leveling agents, colorants, etc.

The thermosetting adhesive layer in the present invention is preferably a thermosetting adhesive layer containing a rubber-modified epoxy resin and a curing agent.

A rubber-modified epoxy resin is an epoxy resin that has two or more epoxy groups and has a rubber skeleton formed in the resin structure. Rubbers that form the rubber skeleton include polybutadiene, acrylonitrile butadiene rubber, styrene-based elastomer, urethane rubber, and acrylic rubber. The acrylonitrile butadiene rubber may have a terminal carboxyl group. Styrene-based elastomers include styrene-butadiene block copolymer, styrene-ethylenepropylene block copolymer, styrene-butadiene-styrene block copolymer, styrene-isoprene-styrene block copolymer, styrene-ethylenebutylene-styrene block copolymer, and styrene- and ethylene propylene-styrene block copolymer. Urethane rubber includes copolymers of polycarbonate diol and isocyanate. Acrylic rubber includes copolymers of glycidyl (meth)acrylate, alkyl (meth)acrylate, and aromatic vinyl compounds.

The epoxy equivalent of the rubber-modified epoxy resin is preferably 200 to 350 g/eq.

The rubber-modified epoxy resin is preferably glycidyl ether type epoxy resin, glycidyl ester type epoxy resin, glycidylamine type epoxy resin, or oxidation type epoxy resin.

The glycidyl ether type epoxy resin is preferably a bisphenol A type epoxy resin, bisphenol F type epoxy resin, novolac type epoxy resin, or alcohol type epoxy resin.

The glycidyl ester type epoxy resin is preferably a hydrophthalic acid type epoxy resin or a dimer acid type epoxy resin.

The curing agent is preferably dicyandiamide, aromatic diamine, aliphatic diamine, phenol novolak resin, naphthol novolak resin, aminotriazine novolak resin, or acid anhydride. From the viewpoint of heat resistance, aminotriazine novolak resin is preferred.

The F layer in the present invention is a layer containing a tetrafluoroethylene-based polymer (F polymer) having a unit (hereinafter also referred to as TFE unit) based on tetrafluoroethylene (hereinafter also referred to as TFE). am.

The F layer may contain an inorganic filler, a resin other than the F polymer, additives, etc. The proportion of F polymer in the F layer is more preferably 90% by mass or more, and its upper limit is 100% by mass.

The thickness of the F layer is usually 1 to 1000 μm, preferably 5 to 500 μm, more preferably 10 to 500 μm, further preferably 10 to 300 μm, and especially preferably 10 to 200 μm.

As the F polymer, a melt-moldable F polymer is preferable. The melt flow rate of the F polymer is preferably 0.1 to 1000 g/10 min, more preferably 0.5 to 100 g/10 min, and particularly preferably 5 to 20 g/10 min.

The melting point of the F polymer is preferably 260°C or higher, more preferably 260 to 325°C, further preferably 280 to 320°C, and particularly preferably 280 to 315°C. In this case, the heat resistance of the F layer is excellent, and it is easy to suppress positional misalignment during thermal compression when forming a conductor circuit or the like. Additionally, a general-purpose device can be used.

The fluorine content of the F polymer is preferably 70 to 78 mass%. In addition, the fluorine content is the ratio of the total mass of fluorine atoms to the total mass of the F polymer, and is determined by ¹⁹ F-NMR.

The F polymer may have at least one functional group (hereinafter also referred to as a functional group) selected from the group consisting of a carbonyl group-containing group, a hydroxy group, an epoxy group, an amide group, an amino group, and an isocyanate group, or it may not have a functional group. do. An F polymer having a functional group is preferred because it has superior adhesion between the F layer and other layers (adhesive layer, conductor circuit, heat-resistant base layer, etc., the same applies hereinafter).

Examples of the F polymer having a functional group include units based on monomers having a functional group or F polymers having a terminal group having a functional group. Specifically, a copolymer of TFE and PAVE having a functional group, a copolymer of TFE and HFP having a functional group, a copolymer of ethylene and TFE having a functional group, etc.

There may be two or more types of functional groups in the F polymer.

As the functional group, a carbonyl group-containing group is preferred because the adhesion between the F layer and other layers is more excellent. Examples of the carbonyl group-containing group include a keto group, carbonate group, carboxyl group, haloformyl group, alkoxycarbonyl group, and acid anhydride residue. Additionally, “acid anhydride residue” means a group represented by -C(=O)-O-C(=O)-.

The keto group is preferably contained between carbon atoms in an alkylene group having 2 to 8 carbon atoms. In addition, the carbon number of the alkylene group is the carbon number that does not include the carbon atom of the keto group.

Haloformyl groups include -C(=O)F, -C(=O)Cl, -C(=O)Br, -C(=O)I, and -C(=O)F. desirable.

The alkoxy group in the alkoxycarbonyl group is preferably an alkoxy group having 1 to 8 carbon atoms, and a methoxy group or an ethoxy group is particularly preferable.

The carbonyl group-containing group is preferably an acid anhydride residue or a carboxyl group.

The content of functional groups in the F polymer is preferably 10 to 60,000, and particularly preferably 300 to 5,000, per 1 × 10 ⁶ main chain carbon number of the F polymer. In this case, the adhesion between the F layer and other layers is excellent, especially low-temperature adhesion.

The content of the adhesive functional group can be measured by the method described in Japanese Patent Application Publication No. 2007-314720.

From the viewpoint of adhesiveness between the F layer and other layers, the functional group in the F polymer preferably exists as a terminal group of the main chain of the F polymer or a pendant group of the main chain of the F polymer, and as a pendant group of the main chain of the F polymer It is particularly desirable to be present. These F polymers can be produced by copolymerizing TFE with a monomer having a functional group, or by polymerizing TFE using a chain transfer agent or polymerization initiator that brings a functional group.

As the monomer having a functional group, a monomer having a carbonyl group-containing group, a hydroxy group, an epoxy group, an amide group, an amino group, or an isocyanate group is preferable, and a monomer having an acid anhydride residue or a carboxyl group is particularly preferable. These monomers include maleic acid, itaconic acid, citraconic acid, undecylenic acid, itaconic anhydride (hereinafter also referred to as “IAH”), citraconic anhydride (hereinafter also referred to as CAH), and 5-norbor. Examples include nene-2,3-dicarboxylic anhydride (hereinafter also referred to as NAH), maleic anhydride, hydroxyalkyl vinyl ether, and epoxyalkyl vinyl ether.

Examples of chain transfer agents that bring about functional groups include acetic acid, acetic anhydride, methyl acetate, ethylene glycol, and propylene glycol.

Polymerization initiators bringing functional groups include di-n-propylperoxydicarbonate, diisopropylperoxycarbonate, tert-butylperoxyisopropylcarbonate, bis(4-tert-butylcyclohexyl)peroxydicarbonate, and di- 2-ethylhexylperoxydicarbonate can be exemplified.

Examples of F polymers in which a functional group exists as a pendant group of the main chain include, from the viewpoint of adhesiveness, F polymers having a TFE unit, a unit based on a monomer having an acid anhydride residue, and a unit based on a fluoroolefin other than TFE. It can be exemplified.

The monomer is preferably IAH, CAH, NAH, or maleic anhydride, more preferably IAH, CAH, or NAH, and particularly preferably IAH or NAH. In this case, the adhesion between the F layer and other layers is excellent.

Additionally, the F polymer may contain a 1,2-dicarboxylic acid residue formed by hydrolysis of a part of the acid anhydride residue. In this case, the content of the 1,2-dicarboxylic acid unit is included in the content of the unit based on the monomer having an acid anhydride residue.

Fluoroolefins other than TFE include vinyl fluoride, vinylidene fluoride, trifluoroethylene, hexafluoropropylene (hereinafter also referred to as HFP), hexafluoroisobutylene, and perfluoro(alkyl vinyl ether) ( Hereinafter also referred to as PAVE), fluorovinyl ether, fluoro(divinyl ether), polyfluoro(alkylethylene) (hereinafter also referred to as FAE) having a functional group, and fluoro monomer having a ring structure. HFP, PAVE, and FAE are preferred because of the excellent moldability of the F polymer and bending resistance of the F layer.

In PAVE, CF ₂ =CFOCF ₃ , CF ₂ =CFOCF ₂ CF ₃ , CF ₂ =CFOCF ₂ CF ₂ CF ₃ (hereinafter also referred to as PPVE), CF ₂ =CFOCF ₂ CF ₂ CF ₂ CF ₃ , CF ₂ = CFO(CF ₂ ) ₆ F can be exemplified.

In FAE, CH ₂ =CF(CF ₂ ) ₂ F, CH ₂ =CF(CF ₂ ) ₄ F, CH ₂ =CF(CF ₂ ) ₆ F, CH ₂ =CF(CF ₂ ) ₂ H, CH ₂ = CF(CF ₂ ) ₄ H, CH ₂ =CF(CF ₂ ) ₆ H, CH ₂ =CH(CF ₂ ) ₂ F (hereinafter also referred to as PFEE), CH ₂ =CH(CF ₂ ) ₄ F (hereinafter referred to as PFEE) , PFBE), CH ₂ =CH(CF ₂ ) ₆ F, CH ₂ =CH(CF ₂ ) ₂ H, CH ₂ =CH(CF ₂ ) ₄ H, CH ₂ =CH(CF ₂ ) ₆ H can be exemplified.

Fluoro monomers having a ring structure include perfluoro(2,2-dimethyl-1,3-dioxole), 2,2,4-trifluoro-5-trifluoromethoxy-1,3-di. Examples include oxol and perfluoro(2-methylene-4-methyl-1,3-dioxolane).

Examples of fluorobinyl ethers having a functional group include CF ₂ =CFOCF ₂ CF(CF ₃ )OCF ₂ CF ₂ SO ₂ F, CF ₂ =CFOCF ₂ CF ₂ SO ₂ F, CF ₂ =CFOCF ₂ CF(CF ₃ )OCF ₂ CF ₂ SO ₃ H, CF ₂ =CFOCF ₂ CF ₂ SO ₃ H, CF ₂ =CFO(CF ₂ ) ₃ COOCH ₃ , CF ₂ =CFO(CF ₂ ) ₃ COOH can be exemplified.

Examples of fluoro(divinyl ether) include CF ₂ =CFCF ₂ CF ₂ OCF=CF ₂ and CF ₂ =CFCF ₂ OCF=CF ₂ .

The F polymer may further have units based on non-fluorine monomers other than the monomers described above.

Non-fluorine monomers include ethylene, propylene, 1-butene, and vinyl esters (vinyl acetate, etc.).

Preferred examples of F polymers include copolymers of TFE, NAH, and PPVE, copolymers of TFE, IAH, and PPVE, copolymers of TFE, CAH, and PPVE, copolymers of TFE, IAH, and HFP, and TFE, CAH, and HFP. Copolymers of TFE and IAH and PFBE and ethylene, copolymers of TFE and CAH and PFBE and ethylene, copolymers of TFE and IAH and PFEE and ethylene, copolymers of TFE and CAH and PFEE and ethylene, TFE and Examples include copolymers of IAH, HFP, PFBE, and ethylene.

The F polymer preferably contains 50 to 99.89 mol% (more preferably 50 to 98.9 mol%) of TFE units out of all units constituting the polymer, and 0.01 to 5 mol% of units based on monomers having functional groups. It is preferable to contain (more preferably 0.1 to 2 mol%), and it is preferable to contain 0.1 to 49.99 mol% (more preferably 1 to 49.9 mol%) of units based on HFP, PAVE or FAE.

In this case, the heat resistance, chemical resistance, and high-temperature elastic modulus of the F layer, the adhesiveness of the F layer and other layers, and the moldability and bending resistance of the F polymer are excellent.

When the F polymer contains a TFE unit and a unit based on a monomer having a functional group, a unit based on HFP, PAVE or FAE, and a unit based on ethylene, the TFE unit is contained in an amount of 25 to 80 mol% (more than Preferably 45 to 63 mol%), and preferably 0.01 to 5 mol% (more preferably 0.05 to 1 mol%) of units based on monomers having functional groups, HFP, PAVE or FAE It is preferable to contain 0.2 to 20 mol% (more preferably 0.5 to 15 mol%) of units based on ethylene, and 20 to 75 mol% (more preferably 37 to 55 mol%) of ethylene-based units. desirable.

In this case, the chemical resistance and bending resistance of the F layer, the adhesion between the F layer and the adhesive layer, the conductor circuit, the heat-resistant base layer, etc., and the moldability of the F polymer are superior.

Fluororesins without functional groups include copolymers of TFE and PAVE, copolymers of TFE and HFP, copolymers of ethylene and TFE, homopolymers of vinylidene fluoride, homopolymers of chlorotrifluoroethylene, and ethylene and chlorotrimethylene. A copolymer of fluoroethylene, etc. can be mentioned.

In the manufacturing method of the present invention, the surface of the conductor circuit side of the circuit board having the F layer and the conductor circuit formed on the surface of the F layer is plasma treated.

Plasma treatment includes atmospheric pressure plasma treatment, vacuum plasma treatment, etc., and vacuum plasma treatment is preferable.

Vacuum plasma treatment is a plasma treatment using glow discharge in a pressure-reduced container, and the applied voltage is lower than that of corona discharge, so power consumption can be reduced. In addition, since the treatment is performed at low pressure, there is little oxidative deterioration of the F polymer surface, and the generation of contaminants (low molecular weight substances that are decomposition products of F polymer, etc.) due to the treatment is small, thereby suppressing the generation of WBL (Weak Boundary Layer). Therefore, the peel strength of the F layer and the adhesive layer can be further improved.

Examples of the processing gas include helium gas, neon gas, argon gas, nitrogen gas, oxygen gas, carbon dioxide gas, methane gas, carbon tetrafluoride gas, and hydrogen gas. The processing gas may be either a single gas or a mixed gas. The treatment gas is preferably argon gas, carbon dioxide gas, a mixture of nitrogen gas and hydrogen gas, or a mixture of argon gas and hydrogen gas from the viewpoint of forming a plasma treatment surface with a desirable wetting tension.

The gas pressure is preferably 0.1 to 1330 Pa, and more preferably 1 to 266 Pa.

A preferable combination of processing gas and processing pressure in plasma processing includes a combination in which the processing gas is nitrogen gas, a mixture of argon gas and hydrogen gas, or carbon dioxide gas, and the processing pressure is 1 to 266 Pa. In this case, it is particularly easy to form a plasma treated surface with excellent wetting tension, and it is easy to obtain a treated substrate with high peel strength.

If, for example, a power of 10 W to 100 kW is applied between the electrodes under the gas pressure at a high frequency of 10 kHz to 2 GHz, the glow discharge becomes stable. As a frequency band, in addition to high frequency, low frequency, microwave, and direct current can also be used.

In order to keep the wetting tension of the exposed surface of the F layer in a desirable range, it is desirable to set the discharge power to 10 to 500 W and the processing time to be 10 to 100 seconds.

As a vacuum plasma generator, an internal electrode type is preferable. In some cases, it may be an external electrode type, or a capacitive coupling type such as Coilor or an inductive coupling type.

The shape of the electrode includes a plate shape, a ring shape, a rod shape, a cylinder shape, etc. It may be of an earthed shape with the metal inner wall of the processing device serving as one electrode.

In order to apply a voltage of 1000 V or more between electrodes and maintain a stable plasma state, it is desirable to apply an insulating coating with a significant withstand voltage to the input electrode. In the case of electrodes exposed to metal such as copper, iron, or aluminum, arc discharge is likely to occur, so it is desirable to apply an enamel coat, glass coat, ceramic coat, etc. to the surface of the electrode.

The wetting tension of the exposed surface of the F layer on the plasma treated surface is preferably 30 mN/m or more, more preferably 30 to 60 mN/m, and even more preferably 30 to 50 mN/m. The wetting tension of the exposed surface of the F layer on the plasma treated surface tends to increase as the amount of adhesive groups on the surface of the F layer increases. If the wet tension is more than the lower limit of the above range, the peel strength of the F layer and the adhesive layer is further improved even if the temperature of thermocompression is lowered. If the wetting tension is below the upper limit of the above range, there are few contaminants resulting from surface treatment, and interference with adhesion due to contaminants can be suppressed.

In the manufacturing method of the present invention, the plasma-treated surface of a circuit board having a plasma-treated surface and the adhesive layer of the adhesive substrate are thermocompressed at less than 260°C. For example, the plasma-treated surface and the adhesive sheet are heat-compressed, or the plasma-treated surface and the adhesive layer of the coverlay film are heat-compressed.

The temperature of thermocompression is less than 260°C, preferably less than 220°C, and more preferably 200°C or less. If the temperature of thermocompression is less than 260°C, the positions of conductor circuits, etc. during thermocompression are less likely to be misaligned, and a press device for conventional adhesive substrates can be used.

The temperature of thermocompression is preferably 120°C or higher, more preferably 140°C or higher, and still more preferably 160°C or higher, since the peeling strength of the F layer and the adhesive layer is excellent. The pressure of thermocompression is preferably 1 to 8 MPa, and more preferably 2 to 6 MPa. The heat compression time is preferably 30 to 150 minutes, and more preferably 60 to 120 minutes.

In a first preferred aspect of the manufacturing method of the present invention, the surface of the conductor circuit side of the original circuit board is plasma treated to obtain a circuit board having a plasma treated surface, and the circuit board having a plurality of the plasma treated surfaces is plasma treated. A method of manufacturing a multilayer circuit board having a plurality of layers of conductor circuits is provided, in which the surfaces are opposed to each other, an adhesive sheet is placed between the plasma treated surfaces, and heat-compressed at less than 260°C.

In a second preferred aspect of the manufacturing method of the present invention, the surface of the conductor circuit side of the original circuit board is plasma treated to obtain a circuit board having a plasma treated surface, and further, the plasma treated surface of the circuit board and an adhesive layer are A method of manufacturing a circuit board with a coverlay film is included, in which the adhesive layer of the formed coverlay film is heat-compressed at less than 260°C.

1 is a cross-sectional view showing an example of a multilayer circuit board. The multilayer circuit board 1 includes a heat-resistant base layer 10, an F layer 12 formed on both sides thereof, a conductor circuit 14 formed on the surface of the F layer 12, and a surface of the conductor circuit 14. and an adhesive layer (16) in contact with the surface of the F layer (12) and a coverlay layer (18) in contact with the adhesive layer (16).

Figure 2 is a cross-sectional view showing an example of a multilayer circuit board. The multilayer circuit board 2 includes a two-layer heat-resistant base layer 10, an F layer 12 formed on both sides of the layer, a conductor circuit 14 formed on the surface of the F layer 12, and both sides are conductors. An adhesive layer (16A) in contact with the surface of the circuit 14 and the surface of the F layer 12, an adhesive layer 16B on one side of which is in contact with the surface of the conductor circuit 14 and the surface of the F layer 12, and an adhesive layer 16B ) has a coverlay layer (18) in contact with it.

Figure 3 is a cross-sectional view showing an example of a multilayer circuit board. The multilayer circuit board 3 includes a two-layer heat-resistant base layer 10, an F layer 12 formed on each side, a conductor circuit 14 formed on the surface of the F layer 12, and a surface of one side. An adhesive layer (16A) that is in contact with the surface of the lower conductor circuit (14) and the surface of the F layer (12) and the other surface is in contact with the upper heat-resistant base layer (10), and one side of which is in contact with the upper conductor circuit (14). It has an adhesive layer 16B in contact with the surface and the surface of the F layer 12, and a coverlay layer 18 in contact with the adhesive layer 16B.

FIG. 4 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 1.

The circuit board 20 has a heat-resistant base layer 10, an F layer 12 formed on both surfaces thereof, and a conductor circuit 14 formed on the surface of the F layer 12. Both surfaces of the circuit board 20 are plasma treated.

The coverlay film 22 with an adhesive layer has a coverlay layer 18 made of an F layer, and an adhesive layer 26 formed on one side of the coverlay layer 18.

In order from the bottom, the coverlay film 22 with an adhesive layer, the circuit board 20, and the coverlay film 22 with an adhesive layer are placed on the plasma-treated surface of the circuit board 20 with the adhesive layer 26. After overlapping and stacking each other in contact, they are heat-compressed at less than 260°C.

FIG. 5 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 2.

In order from the bottom, the coverlay film 22 with an adhesive layer, the circuit board 20, the adhesive sheet 24, the circuit board 20, the coverlay film 22 with an adhesive layer, and the circuit board 20. ) is laminated so that the adhesive layer 26 is in contact with the plasma treated surface, and then these are heat-compressed at less than 260°C.

FIG. 6 is a cross-sectional view showing the manufacturing of the multilayer circuit board of FIG. 3.

The circuit board 30 has a heat-resistant base layer 10, an F layer 12 formed on one side thereof, and a conductor circuit 14 formed on the surface of the F layer 12. The surface of the circuit board 30 on the conductor circuit 14 side is plasma treated.

In order from the bottom, the circuit board 30, the adhesive sheet 24, the circuit board 30, and the coverlay film 22 with the adhesive layer formed thereon are placed on the plasma treated surface of the circuit board 30 to form the adhesive layer 26. After stacking them so that they are in contact with each other, they are heat-compressed at less than 260°C.

In the manufacturing method of the present invention described above, since the surface of the original circuit board on which the conductor circuit is formed is plasma treated, the adhesive layer of the original circuit board and the adhesive substrate is sufficiently heat-compressed even if the temperature is less than 260 ° C. do. As a result, a processed circuit board (multilayer circuit board, circuit board on which a coverlay film is formed, etc.) has excellent adhesion between the F layer and the adhesive layer, and the peel strength of the F layer and the conductor circuit is, for example, 5 N/cm or more. obtained.

The film with an adhesive layer of the present invention (hereinafter also referred to as an adhesive film) is a film in which an F polymer film (hereinafter also referred to as an F film) and a thermosetting adhesive layer are laminated in this order. When the thermosetting adhesive layer of the adhesive film is cured under the conditions of a press temperature of 160°C, a press pressure of 4 MPa, and a press time of 90 minutes, the peel strength of the interface between the F film and the thermosetting adhesive layer after curing is 5 N/cm or more. am.

The adhesive film may have a thermosetting adhesive layer laminated only on one side of the F film, or may have a thermosetting adhesive layer laminated on both sides of the F film. An F film in which a thermosetting adhesive layer is laminated only on one side of the F film is useful as a coverlay film. An F film in which a thermosetting adhesive layer is laminated on both sides of the F film is useful as an interlayer insulating film. When the adhesive film has a thermosetting adhesive layer on both sides of the F film, the peeling strength at the interface between the F film and the cured thermosetting adhesive layer is 5 N/cm or more for any thermosetting adhesive layer.

The peeling strength of the interface between the F film and the thermosetting adhesive layer after curing is preferably 8 N/cm or more, and more preferably 10 N/cm or more. If the peel strength is more than the lower limit of the above range, the adhesion between the F film and the thermosetting adhesive layer after curing is excellent. The higher the peel strength, the better, and the upper limit is not limited.

The thermosetting adhesive layer in the adhesive film contains a thermosetting adhesive.

The thickness of the thermosetting adhesive layer in the adhesive film is preferably 5 to 50 μm. When the adhesive film has thermosetting adhesive layers on both sides of the F film, the thickness of each thermosetting adhesive layer is preferably within the above range.

It is preferable that the thermosetting adhesive layer contains a thermosetting resin. It is preferable that the thermosetting adhesive layer further contains a curing agent and a curing accelerator.

The types of thermosetting resin, curing agent, and curing accelerator in the adhesive film are the same as those in the manufacturing method of the processed circuit board of the present invention described above, and their preferable ranges are also the same.

The F film in the adhesive film is a film containing a tetrafluoroethylene-based polymer (F polymer) having units based on tetrafluoroethylene.

The F film may contain an inorganic filler, a resin other than the F polymer, additives, etc. The proportion of F polymer in the F film is more preferably 90 mass% or more. The upper limit of the proportion of F polymer is 100% by mass.

The thickness of the F film is preferably 12 to 100 μm.

The F polymer in the adhesive film is the same as the F polymer in the process circuit board manufacturing method of the present invention described above, and its preferable range is also the same.

Methods for producing the adhesive film include a method of applying a thermosetting adhesive to one or both surfaces of the F film, and a method of laminating a thermosetting adhesive sheet on one or both surfaces of the F film. When using an adhesive film as a coverlay film, a thermosetting adhesive layer is formed on one surface of the F film. When using an adhesive film as an interlayer insulating film, a thermosetting adhesive layer is formed on both surfaces of the F film.

Application methods for thermosetting adhesives include die coat method, spray method, roll coat method, spin coat method, gravure coat method, micro gravure coat method, gravure offset method, knife coat method, kiss coat method, bar coat method, and Fountain Mayor. Examples include the bar method and the slot die coat method.

Methods for laminating F film and thermosetting adhesive sheet include press, roll laminate, double belt press, etc.

In the production of an adhesive film, it is preferable to plasma treat one or both surfaces of the F film and form a thermosetting adhesive layer on the surface of the plasma treated side of the F film. As a result, the adhesion between the F film and the thermosetting adhesive layer is more excellent. Various conditions for plasma processing are the same as those described in the plasma processing in the process circuit board manufacturing method of the present invention, and their preferable ranges are also the same.

The wetting tension of the plasma-treated surface of the F film in the adhesive film is preferably 30 mN/m or more, more preferably 30 to 60 mN/m, and still more preferably 30 to 50 mN/m. The wetting tension of the plasma-treated surface of the F film tends to increase as the amount of functional groups on the surface of the F film increases. If the wet tension is more than the lower limit of the above range, the adhesion between the F film and the thermosetting adhesive layer is more excellent even if the temperature of thermocompression is lowered. If the wetting tension is below the upper limit of the above range, there are few contaminants generated by surface treatment, and adhesion inhibition due to contaminants does not occur easily.

As explained above, in the adhesive film of the present invention, an F film and a thermosetting adhesive layer are laminated. Since F film has superior electrical properties compared to polyimide film, transmission loss can be reduced when used as a printed board material for high frequency applications. In addition, the adhesive film of the present invention has a peel strength of 5 N at the interface between the F film and the cured thermosetting adhesive layer when the thermosetting adhesive layer is cured by heat pressing under the conditions of a temperature of 160°C, a pressure of 4 MPa, and a time of 90 minutes. It is more than /cm. Therefore, the adhesive film of the present invention and the circuit board can be firmly bonded even by thermocompression at a relatively low temperature (less than 260°C).

Furthermore, in the adhesive film of the present invention, if an F polymer having a functional group is used as the F polymer, the peel strength of the interface between the F film and the cured thermosetting adhesive layer is easy to adjust to 5 N/cm or more. Additionally, if a thermosetting adhesive layer is formed on the surface of the F film whose surface wettability has been adjusted by plasma treatment, the peeling strength of the interface between the F film and the cured thermosetting adhesive layer can be easily adjusted to 5 N/cm or more.

The adhesive film of the present invention is preferably used as a coverlay film or an interlayer insulating film, and is particularly preferably used as an adhesive substrate in the method for manufacturing a processed substrate of the present invention described above.

Figure 7 is a cross-sectional view showing an example of using an adhesive film as a coverlay film. The adhesive film 10' has an F film 12' and a thermosetting adhesive layer 14' formed on the surface of the F film 12'. The surface of the F film 12' on the thermosetting adhesive layer 14' side is plasma treated.

Fig. 8 is a cross-sectional view showing an example of using an adhesive film as an interlayer insulating film. The adhesive film 11' has an F film 12' and thermosetting adhesive layers 14' formed on both surfaces thereof. The surface of the F film 12' on the thermosetting adhesive layer 14' side is plasma treated.

FIG. 9 is a cross-sectional view showing an example of a circuit board on which a coverlay film using an adhesive film as a coverlay film is formed. The circuit board 1' on which the coverlay film is formed includes an insulating layer 20', a conductor circuit 22' formed on both sides thereof, a surface of the conductor circuit 22', and a surface of the insulating layer 20'. It has an adhesive film 10", which is a cured adhesive film 10' in contact with the adhesive film 10". In the adhesive film 10", the adhesive layer 14 is formed by thermosetting the thermosetting adhesive layer 14' of the adhesive film 10'. ") It is in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20' other than the portion where the conductor circuit 22' is formed.

Fig. 10 is a cross-sectional view showing another example of a circuit board on which a coverlay film using an adhesive film as a coverlay film is formed. The circuit board 2' on which the coverlay film is formed includes two insulating layers 20', a conductor circuit 22' formed on both sides thereof, and both surfaces of the conductor circuit 22' and the insulating layer 20. '), an adhesive layer 24" in contact with the surface of the conductor circuit 22', and an adhesive film 10" in contact with the surface of the insulating layer 20'.

FIG. 11 is a cross-sectional view showing another example of a circuit board on which a coverlay film using an adhesive film as a coverlay film is formed. The circuit board 3' on which the coverlay film was formed includes two insulating layers 20', a conductor circuit 22' formed on one side thereof, and the surface of one side being exposed to the surface of the lower conductor circuit 22' and The adhesive layer 24" is in contact with the surface of the insulating layer 20' and the other surface is in contact with the upper insulating layer 20', the surface of the upper conductor circuit 22' and the insulating layer 20'. It has an adhesive film (10") in contact with the surface.

FIG. 12 is a cross-sectional view showing an example of a multilayer circuit board on which a coverlay film is formed in which the adhesive film is a coverlay film and an interlayer insulating film. The multilayer circuit board 4' on which the coverlay film is formed includes two insulating layers 20', conductor circuits 22' formed on both sides of the conductor circuits 22', and both surfaces of the conductor circuits 22' and the insulating layer. Adhesive film 11", which is the cured adhesive film 11', in contact with the surface of the conductor circuit 20', and adhesive film 10" in contact with the surface of the conductor circuit 22' and the surface of the insulating layer 20'. has

In the adhesive film 10", the adhesive layer 14" formed by thermosetting the thermosetting adhesive layer 14' of the adhesive film 10' is connected to the surface of the conductor circuit 22' and the surface on which the conductor circuit 22' is formed. It is in contact with the surface of the insulating layer 20' other than that portion.

On both sides of the adhesive film 11", an adhesive layer 14" formed by thermosetting the thermosetting adhesive layer 14 on both sides of the adhesive film 11 is attached to the surface of the conductor circuit 22' and the insulating layer 20'. is in contact with each surface.

Figure 13 is a cross-sectional view showing another example of a multilayer circuit board on which a coverlay film is formed in which the adhesive film is a coverlay film and an interlayer insulating film. The circuit board 5' on which the coverlay film was formed includes two insulating layers 20', a conductor circuit 22' formed on each side thereof, and one surface of which is the surface of the lower conductor circuit 22'. and an adhesive film 11" in contact with the surface of the insulating layer 20' and the other surface in contact with the upper insulating layer 20', and the surface of the upper conductor circuit 22' and the insulating layer 20'. ) has an adhesive film (10") in contact with the surface.

FIG. 14 is a cross-sectional view showing the manufacturing of the circuit board of FIG. 9.

The circuit board 30' has an insulating layer 20' and conductor circuits 22' formed on both surfaces thereof. The surfaces of the insulating layer 20' on both sides of the circuit board 30' are plasma treated. In order from the bottom, the adhesive film 10', the circuit board 30', and the adhesive film 10' are overlapped so that the thermosetting adhesive layer 14' is in contact with the plasma treated surface of the circuit board 30'. After lamination, they are heat-compressed.

FIG. 15 is a cross-sectional view showing manufacturing the circuit board of FIG. 10.

In order from the bottom, adhesive film 10', circuit board 30', adhesive sheet 24', circuit board 30', adhesive film 10', and plasma treatment of circuit board 30'. After stacking the thermosetting adhesive layer 14' in contact with the surface, these are heat-compressed.

FIG. 16 is a cross-sectional view showing manufacturing the circuit board of FIG. 11.

The circuit board 32' has an insulating layer 20' and a conductor circuit 22' formed on one side thereof. The surface of the insulating layer 20' of the circuit board 32' on the side where the conductor circuit 22' is formed is plasma treated. In order from the bottom, the circuit board 32', adhesive sheet 24', circuit board 32', and adhesive film 10' are placed on the plasma treated surface of the circuit board 32'. ') are overlapped and laminated so that they are in contact, and then these are heat-compressed.

FIG. 17 is a cross-sectional view showing manufacturing the circuit board of FIG. 12.

In order from the bottom, adhesive film 10', circuit board 30', adhesive film 11', circuit board 30', adhesive film 10', plasma treatment of circuit board 30' After stacking the thermosetting adhesive layer 14' in contact with the surface, these are heat-compressed.

FIG. 18 is a cross-sectional view showing manufacturing the circuit board of FIG. 13.

In order from the bottom, the circuit board 32', the adhesive film 11', the circuit board 32', and the adhesive film 10' are placed on the plasma treated surface of the circuit board 32'. ') are overlapped and laminated so that they are in contact, and then these are heat-compressed.

Additionally, the circuit boards 30' and 32' are circuit boards having a plasma-treated surface obtained by plasma-treating at least the conductor circuit side surface of the original circuit board in the manufacturing method of the present invention described above. It is desirable.

As explained above, the adhesive film of the present invention is a film that has excellent electrical properties as a coverlay film, interlayer insulating film, etc., can reduce transmission loss even in high-frequency applications, and can be used at relatively low temperatures (less than 260°C). am.

Example

Hereinafter, the present invention will be described in detail by way of examples, but the present invention should not be construed as being limited to these examples. In addition, the materials, physical properties, and evaluation methods used in the examples and the like are as follows.

(Melting point of polymer)

Using a differential scanning calorimeter (DSC-7020, manufactured by Seiko Instruments), the melting peak was recorded when the polymer was heated at a rate of 10°C/min, and the temperature (°C) corresponding to the maximum value was taken as the melting point.

(melt flow rate of polymer)

Using a melt indexer (manufactured by Techno Seven), the mass (g) of polymer flowing out from a nozzle with a diameter of 2 mm and a length of 8 mm in 10 minutes was measured at 372°C and under a load of 49 N, and was taken as the melt flow rate.

(wet tension)

The wet tension of the exposed surface of the polymer layer after plasma treatment was determined according to JIS K 6768:1999 using a mixed liquid for wet tension test (manufactured by Wako Pure Chemical Industries, Ltd.).

(Peel Strength)

An object (film or processed circuit board) was cut to 150 mm in length and 10 mm in width to prepare an evaluation sample. The space between the polymer layer and the adhesive layer was peeled to a position of 50 mm from one end in the longitudinal direction of the evaluation sample. It was peeled at an angle of 90° at a tensile speed of 50 mm/min using a tensile tester, and the average load from a measurement distance of 20 mm to 80 mm was taken as the peel strength (N/cm).

＜TFE-based polymer＞

Polymer F1: Polymer prepared according to the description in paragraphs [0111] to [0113] of International Publication No. 2016/104297 (ratio (molar ratio) of each unit: TFE unit/NAH unit/PPVE unit = 97.9/0.1/2.0, adhesive Base content: 1000 per 1 × 10 ⁶ carbon atoms in the polymer main chain, melting point: 305°C, melt flow rate: 11.0 g/10 min, fluorine content: 75 mass%).

Polymer F2: Commercially available PFA (ratio (molar ratio) of each unit: TFE unit/PPVE unit = 98.0/2.0, melting point: 310°C, melt flow rate: 11.0 g/10 min, fluorine content: 75 mass%).

＜Film F1＞

Film F1: A film (thickness 12 μm) obtained by extruding polymer F1 into a film form at a die temperature of 340°C using a 65 mmϕ single screw extruder with a 750 mm wide coat hanger die.

＜Film F2＞

Film F2: A film (thickness 12 μm) obtained by extruding polymer F2 into a film form at a die temperature of 340°C using a 65 mmϕ single screw extruder with a 750 mm wide coat hanger die.

＜Polyimide film＞

Film PI: Kapton (brand name) 100EN manufactured by Toray DuPont Co., Ltd. (thickness: 25 μm).

＜Copper foil＞

Copper foil: Electrolytic copper foil (CF-T4X-SV-12, manufactured by Fukuda Metal Foil Kogyo Co., Ltd., thickness: 12 μm, arithmetic average roughness of the surface (Rz _JIS ): 1.1 μm).

＜Thermosetting adhesive sheet＞

Adhesive sheet 1: NIKAFLEX (brand name) SAFG (thickness: 25 μm) manufactured by Nikkan Kogyo Co., Ltd.

Adhesive sheet 11: Adhesive sheet (thickness: 15 μm) containing acrylonitrile butadiene modified epoxy resin, aluminum hydroxide, acrylic rubber, aminotriazine novolak resin (curing agent) and imidazole (curing accelerator).

[Example 1] Manufacturing example and evaluation example of film with adhesive layer formed

[Example 1-1]

In a carbon dioxide gas atmosphere with a gas pressure of 20 Pa, a high-frequency voltage of 110 kHz was applied between the electrodes, and one side of the film F1 was plasma treated under the conditions of a discharge power of 300 W and 60 seconds. The wetting tension of the plasma-treated surface of film F1 was 50 mN/m.

The adhesive sheet 1 was laminated on the plasma treated surface of the film F1 to obtain a film Ad1 with a thermosetting adhesive layer formed thereon. Film Ad1 was press-processed by a vacuum press (temperature: 160°C, pressure: 4 MPa, time: 90 minutes), and the peel strength of the interface between film F1 and the cured adhesive layer in the treated film Ad1 was measured, and the result was 8 N. It was /cm.

[Example 1-2] ~ [Example 1-7]

Except for changing the type of film and the plasma treatment conditions, the same procedure as in Example 1-1 was performed to obtain films Ad2 to Ad7 each having a thermosetting adhesive layer formed thereon.

The manufacturing conditions, wet tension, and peel strength of each adhesive layer-formed film are summarized in Table 1.

Additionally, in Example 1-3 (comparative example), when the film F1 after plasma treatment and the adhesive sheet 1 were overlapped and subjected to press processing under the conditions of a temperature of 280°C, a pressure of 4 MPa, and a time of 30 minutes, the interface The peel strength was less than 0.2 N/cm. This is believed to be because the temperature during the press treatment was 280°C, and the adhesive layer was thermally decomposed.

[Example 2] Manufacturing example and evaluation example of processed circuit board (Part 1)

[Example 2-1]

Copper foil, film F1, film PI, film F1, and copper foil were stacked in this order and heat pressed under vacuum at 320°C for 30 minutes to obtain a metal-clad laminate.

One side of the metal-clad laminate was masked and immersed in an etching solution (H-1000A, ferric chloride aqueous solution, manufactured by Sunhayato Co., Ltd.) to completely remove the copper foil on one side.

Next, a high-frequency voltage of 110 kHz is applied between the electrodes in a carbon dioxide gas atmosphere with a gas pressure of 20 Pa, and the exposed surface of the film F1 layer is plasma treated under the conditions of a discharge power of 300 W for 60 seconds to obtain a plasma-treated surface. Circuit board 1 was obtained. The wetting tension of the exposed surface of the film F1 layer on the plasma treated surface was 50 mN/m.

Two circuit boards 1 are placed so that their respective plasma treated surfaces face each other, an adhesive sheet 1 is placed between them, they are overlapped, and heat press is applied (temperature 160°C, pressure 4 MPa, heat compression for 90 minutes) to bond them. Processed circuit board 1 was obtained by bonding two sheets of circuit board 1 through the cured product of adhesive sheet 1. The peel strength at the interface between film F1 and the cured adhesive layer was measured and found to be 8 N/cm.

[Example 2-2] ~ [Example 2-7]

Processed circuit boards 2 to 4 were obtained in the same manner as in Example 1-1, except that the type of film and the plasma treatment conditions were changed.

The manufacturing conditions for each processed circuit board, the wet tension of the film layer, and the peel strength are summarized in Table 2.

Additionally, in Example 2-3 (comparative example), two circuit boards 1 were placed so that their respective plasma treated surfaces faced each other, and an adhesive sheet 1 was placed between them to overlap them, and the heat press treatment conditions were a temperature of 280° C. and a pressure of 280° C. When press processing was performed at 4 MPa for 30 minutes, the peeling strength of the interface was less than 0.2 N/cm. It is thought that this is because the temperature during the press treatment was 280°C, and the adhesive layer was thermally decomposed.

Additionally, in Example 2, the evaluation was performed without forming a conductor circuit on the surface of the TFE-based polymer layer, but the same results were obtained even when a conductor circuit was formed on the surface of the TFE-based polymer layer.

[Example 3] Manufacturing example and evaluation example of processed circuit board (Part 2)

Copper foil, film F1, film PI, film F1, and copper foil were stacked in this order and heat pressed under vacuum at 320°C for 30 minutes to obtain a metal-clad laminate.

One side of the metal-clad laminate is masked and immersed in an etching solution (H-1000A, ferric chloride aqueous solution, manufactured by Sunhayato Co., Ltd.) to form a conductor circuit with the copper foil on one side.

A high frequency voltage of 110 kHz is applied between the electrodes in a carbon dioxide gas atmosphere with a gas pressure of 20 Pa, and the conductor circuit side (exposed surface of the film F1 layer) is plasma treated under the conditions of a discharge power of 300 W and 60 seconds, and the plasma treated surface is formed. A circuit board 11 having is obtained.

Two circuit boards 11 are arranged so that their respective plasma-treated surfaces face each other, and an adhesive sheet 11 is placed between them to overlap them, and then subjected to heat press treatment using a vacuum press (temperature 160°C, pressure 4 MPa, heat compression for 90 minutes). This was heat-compressed to obtain a processed circuit board 11 in which two circuit boards 11 were bonded via the cured product of the adhesive sheet 11. The peel strength at the interface between film F1 and the cured adhesive layer was measured and found to be 9 N/cm.

Additionally, the same results are obtained even when butadiene-modified epoxy resin rubber, styrene-based elastomer-modified epoxy resin, urethane-modified epoxy resin, or acrylic-modified epoxy resin is used instead of acrylonitrile-butadiene-modified epoxy resin.

The processed circuit board obtained by the manufacturing method of the present invention, such as a multilayer circuit board or a circuit board with a coverlay film, is useful as a circuit board for electronic devices and electric devices requiring miniaturization and high functionality. The adhesive film of the present invention is useful as a coverlay film, an interlayer insulating film, etc. used in the production of multilayer circuit boards, circuit boards with coverlay films, etc.

In addition, the full contents of the specification, claims, drawings, and abstract of Japanese Patent Application No. 2017-243191 filed on December 19, 2017 and Japanese Patent Application No. 2018-006324 filed on January 18, 2018 are here. It is cited and introduced as a disclosure of the specification of the present invention.

1, 2, 3: Multilayer circuit board
10: Heat-resistant base layer
12: F floor
14: conductor circuit
16, 16A, 16B: Adhesive layer
18: Coverlay layer
20, 30: circuit board
22: Coverlay film with adhesive layer formed
24: Adhesive sheet
26: Adhesive layer
1', 2', 3': Circuit board with coverlay film formed
4', 5': Multilayer circuit board with coverlay film formed
10', 11': Adhesive film
10", 11": Adhesive film after curing
12': F film
14': thermosetting adhesive layer
14": Thermosetting adhesive layer
20': insulation layer
22': conductor circuit
24': adhesive sheet
30', 32': Circuit board

Claims (15)

The surface of the conductor circuit side of a circuit board having a polymer layer containing a tetrafluoroethylene-based polymer and a conductor circuit formed on the surface of the polymer layer by processing a metal foil with a surface 10-point average roughness (Rz _JIS ) of 2.0 μm or less. Vacuum plasma treatment is performed to obtain a circuit board having a plasma-treated surface where the wet tension of the exposed surface of the polymer layer is 30 mN/m or more and 50 mN/m or less, and then a substrate having a plasma-treated surface of the circuit board and an adhesive layer. A method of manufacturing a processed circuit board, characterized in that the adhesive layer is heat-compressed at less than 200° C. to manufacture the processed circuit board. According to claim 1,
A method of manufacturing a processed circuit board, wherein the peeling strength of the heat-compressed surface of the processed circuit board is 5 N/cm or more. The method of claim 1 or 2,
The substrate having the adhesive layer is a coverlay film with an adhesive layer formed thereon, and the processed circuit board is a circuit board with a coverlay film formed thereon, or the substrate having the adhesive layer is an adhesive sheet and the processed circuit board is a circuit board with an adhesive layer formed thereon. A method of manufacturing a processed circuit board, which is a substrate. delete The method of claim 1 or 2,
A method for manufacturing a processed circuit board, wherein the tetrafluoroethylene-based polymer has at least one functional group selected from the group consisting of a carbonyl group-containing group, a hydroxy group, an epoxy group, an amide group, an amino group, and an isocyanate group. The method of claim 1 or 2,
A method of manufacturing a processed circuit board, wherein the tetrafluoroethylene-based polymer has a melting point of 260°C or higher. The method of claim 1 or 2,
A method of manufacturing a processed circuit board, wherein the adhesive layer is a thermosetting adhesive layer containing a rubber-modified epoxy resin and a curing agent. The method of claim 1 or 2,
When the substrate having the adhesive layer is thermo-compressed with the plasma treated surface of the circuit board and the adhesive layer of the substrate having the adhesive layer under the conditions of a press temperature of 160° C., a press pressure of 4 MPa, and a press time of 90 minutes, A method of manufacturing a processed circuit board, which is a substrate in which the peel strength of the heat-compressed surface of the processed circuit board is 5 N/cm or more. The surface of the conductor circuit side of a circuit board having a polymer layer containing a tetrafluoroethylene-based polymer and a conductor circuit formed by processing a metal foil with a surface 10-point average roughness (Rz _JIS ) of 2.0 μm or less on the surface of the polymer layer. Vacuum plasma treatment is performed to obtain a circuit board having a plasma treated surface where the wet tension of the exposed surface of the polymer layer is 30 mN/m or more and 50 mN/m or less, and then plasma treatment of the circuit board having a plurality of the plasma treated surfaces. Manufacture of a multilayer circuit board, characterized in that the surfaces are opposed to each other, an adhesive sheet is placed between the respective plasma treated surfaces, and heat-compressed at less than 200° C. to produce a multilayer circuit board having a plurality of layers of conductor circuits. method. The surface of the conductor circuit side of a circuit board having a polymer layer containing a tetrafluoroethylene-based polymer and a conductor circuit formed on the surface of the polymer layer by processing a metal foil with a surface 10-point average roughness (Rz _JIS ) of 2.0 μm or less. Vacuum plasma treatment is performed to obtain a circuit board having a plasma-treated surface with a wet tension of the exposed surface of the polymer layer of 30 mN/m or more and 50 mN/m or less, and then a cover on which the plasma-treated surface of the circuit board and an adhesive layer are formed. A method of manufacturing a circuit board with a coverlay film, characterized in that the circuit board with the coverlay film is manufactured by heat-compressing the adhesive layer of the lay film at less than 200 ° C. delete delete delete delete delete