KR102463365B1 - Apparatus and method for simulating performance of electro magnetic compatibility of junction block - Google Patents

Abstract

The present invention provides an input unit that receives design data of a junction block and antenna design data, a modeling unit that models the junction block and antenna as a 3D model based on the received design data of the junction block and the received antenna design data, It characterized in that it includes a simulation unit that performs a simulation to evaluate the EMC (Electro Magnetic Compatibility) performance based on the junction block and the modeled antenna, and an analysis unit that analyzes the EMC performance of the modeled junction block based on the simulation result. .

Description

Apparatus and method for simulating EMC performance of junction blocks

The present invention relates to an apparatus and method for simulating EMC performance of a junction block, and to an apparatus and method for simulating EMC performance of a junction block capable of simulating the EMC performance of the junction block.

All electric devices of a car are connected with the electronic control unit (ECU) inside the engine room of the car with wires. do.

The junction block is composed of a fuse, a relay, a unit, and the like, and serves to distribute the power of the battery and the generator to the electronic system of the entire vehicle.

On the other hand, a plurality of wiring harnesses are located around the junction block. Accordingly, there is a problem in that the junction block malfunctions due to interference by a wiring harness or electromagnetic waves generated inside and outside the vehicle.

The background technology of the present invention is disclosed in 'High Voltage Junction Block' of Korean Patent Application Laid-Open No. 10-2019-0117424 (2019.10.16.).

The present invention was created to solve the above problems, and an object according to an aspect of the present invention is to test the EMC performance of the junction block by performing a simulation to evaluate the EMC performance based on design data of the junction block and antenna. An apparatus and method for simulating EMC performance of a junction block are provided.

An apparatus for simulating EMC performance of a junction block according to an aspect of the present invention includes: an input unit for receiving design data of the junction block and design data of an antenna; a modeling unit that models the junction block and the antenna as a 3D model based on the received design data of the junction block and the received antenna design data; a simulation unit configured to perform a simulation to evaluate Electro Magnetic Compatibility (EMC) performance based on the modeled junction block and the modeled antenna; and an analysis unit that analyzes the EMC performance of the modeled junction block based on the simulation result.

In the present invention, the design data of the junction block is characterized in that it includes information about the stacked structure of a printed circuit board (PCB), device information included in the PCB, and a PCB circuit diagram.

In the present invention, the antenna design data includes antenna size information, antenna shape information, and antenna polarization information.

In the present invention, the simulation unit determines the transmission frequency and polarization direction of the modeled antenna, and according to the determined transmission frequency and polarization direction, the PCB surface of the modeled junction block by electromagnetic waves radiated through the modeled antenna It is characterized in that the surface current induced in the to be obtained as a result of the simulation.

In the present invention, the simulation unit generates a PCB surface image showing the level of the surface current for each location based on the obtained surface current.

In the present invention, the analysis unit interprets that the modeled junction block does not satisfy the EMC performance standard when a surface current greater than a preset reference surface current occurs in at least some regions of the PCB surface of the modeled junction block characterized in that

According to an aspect of the present invention, a method for simulating EMC performance of a junction block includes: receiving, by an input unit, design data of the junction block and design data of an antenna; modeling, by a modeling unit, the junction block and the antenna as a 3D model based on the received design data of the junction block and the received design data of the antenna; performing, by a simulation unit, a simulation to evaluate Electro Magnetic Compatibility (EMC) performance based on the modeled junction block and the modeled antenna; and analyzing, by an analysis unit, EMC performance of the modeled junction block based on the simulation result.

In the present invention, the design data of the junction block includes information about a printed circuit board (PCB) stacked structure, device information included in the PCB, and a PCB circuit diagram.

In the present invention, the antenna design data includes antenna size information, antenna shape information, and antenna polarization information.

In the present invention, the performing step may include: determining, by the simulation unit, a transmission frequency of the modeled antenna; determining, by the simulation unit, a polarization direction of the modeled antenna; obtaining, by the simulation unit, a surface current induced on the PCB surface of the modeled junction block by electromagnetic waves radiated through the modeled antenna as a result of the simulation; and generating, by the simulation unit, a PCB surface image showing the level of the surface current for each location based on the obtained surface current.

In the analyzing step in the present invention, the analysis unit, when a surface current greater than a preset reference surface current occurs in at least a portion of the PCB surface of the modeled junction block, the PCB of the modeled junction block has EMC performance It is characterized in that it is interpreted as not satisfying the specification.

According to one aspect of the present invention, it is possible to overcome the spatial and temporal constraints that occur during the EMC performance test of the junction block by performing a virtual simulation for testing the EMC performance based on the design data of the PCB and the antenna of the junction block. .

In addition, according to another aspect of the present invention, it is possible to intuitively determine a region vulnerable to electromagnetic waves by checking the surface current induced on the PCB surface of the junction block by electromagnetic waves by location.

1 is a block diagram of an apparatus for simulating EMC performance of a junction block according to an embodiment of the present invention.
2 is an exemplary diagram for explaining modeling of a PCB and an antenna of a junction block of an EMC performance simulation apparatus of a junction block according to an embodiment of the present invention.
3 is an exemplary diagram for explaining modeling of an antenna of an EMC performance simulation apparatus of a junction block according to an embodiment of the present invention.
4 is an exemplary view for explaining a simulation result of an EMC performance simulation apparatus of a junction block according to an embodiment of the present invention.
5 is a flowchart illustrating a method for simulating EMC performance of a junction block according to an embodiment of the present invention.
6 is a flowchart for explaining a step of performing a simulation of a method for simulating EMC performance of a junction block according to an embodiment of the present invention.

Hereinafter, an apparatus and method for simulating EMC performance of a junction block according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. In this process, the thickness of the lines or the size of the components shown in the drawings may be exaggerated for clarity and convenience of explanation. In addition, the terms to be described later are terms defined in consideration of functions in the present invention, which may vary according to intentions or customs of users and operators. Therefore, definitions of these terms should be made based on the content throughout this specification.

1 is a block diagram of an EMC performance simulation apparatus of a junction block according to an embodiment of the present invention, and FIG. 2 is a PCB and an antenna of the junction block of the EMC performance simulation apparatus of the junction block according to an embodiment of the present invention. It is an exemplary view for explaining modeling, FIG. 3 is an exemplary view for explaining modeling of an antenna of an EMC performance simulation apparatus of a junction block according to an embodiment of the present invention, and FIG. It is an exemplary diagram for explaining the simulation result of the EMC performance simulation device of the junction block.

Referring to FIG. 1 , an apparatus for simulating EMC performance of a junction block according to an embodiment of the present invention includes an input unit 100 , a modeling unit 200 , a simulation unit 300 , an analysis unit 400 , and an output unit 500 . may include.

The input unit 100 may receive design data of the junction block and design data of the antenna from the outside.

For example, the input unit 100 may receive the design data of the junction block and the design data of the antenna from the user, and the junction block from the memory (not shown) or the server (not shown) in which the design data of the junction block and the antenna are stored. and antenna design data.

Here, the design data of the junction block includes information about the stacked structure of a printed circuit board (PCB) provided inside the junction block (eg, copper foil information, epoxy thickness information), and a device included in the PCB provided inside the junction block. It may include information (eg, passive element information included in the PCB) and PCB circuit diagram information provided in the junction block.

However, the information included in the design data of the junction block is not limited to the above-described information, and various information necessary for implementing the junction block as a 3D model may be included. For example, PCB size information of the junction block, PCB material information of the junction block, etc. may be included in the design data of the junction block.

Meanwhile, the antenna design data may include antenna size information, antenna shape information, and antenna polarization information.

For example, the shape information of the antenna may include shape information of the antenna according to the type of antenna to be used for modeling. The type of antenna may include a dipole antenna, a monopole antenna, a yagi antenna, a patch antenna, a horn antenna, a parabolic antenna, a helical antenna, a slot antenna, and the like.

However, the information included in the design data of the antenna is not limited to the above information, and various information necessary for implementing the antenna as a 3D model may be included.

The modeling unit 200 may model the junction block and the antenna as a 3D model based on the design data of the junction block received through the input unit 100 and the design data of the antenna received through the input unit 100 .

For example, the modeling unit 200 reflects the information on the PCB stacking structure provided inside the junction block input through the input unit 100, device information and PCB circuit diagram information included in the PCB, and converts the junction block into a 3D model. It can be modeled in virtual space.

Similarly, the modeling unit 200 may model the antenna in a virtual space as a 3D model by reflecting the antenna size information, the antenna shape information, and the antenna polarization information received through the input unit 100 .

Referring to FIG. 2 , the modeling unit 200 may model in a virtual space such that the junction block and the antenna are spaced apart from each other.

Here, the junction block corresponds to a subject of simulation for EMC performance evaluation, and the antenna serves to provide an environment for EMC performance evaluation.

The present invention is to virtually experiment with the influence of a junction block by electromagnetic waves generated inside and outside the vehicle, and the antenna is used to implement electromagnetic waves generated inside and outside the vehicle.

Referring to FIG. 3 , the transmission frequency of the antenna may be set to be a low frequency (80 to 1000 MHz) in order to implement an environment in which the size of electromagnetic waves is small, and in this case, it is preferable to implement the antenna as a Yagi antenna.

On the other hand, in order to implement an environment in which the size of electromagnetic waves is large, the transmission frequency of the antenna can be set to be high frequency (1 to 3 GHz), and in this case, it is preferable to implement the antenna as a Horn antenna.

Meanwhile, the simulation unit 300 may perform a simulation for evaluating Electro Magnetic Compatibility (EMC) performance based on the junction block modeled through the modeling unit 200 and the antenna modeled through the modeling unit 200 .

According to an embodiment of the present invention, the simulation unit 300 may obtain a surface current induced on the PCB surface of the junction block modeled by the electromagnetic wave radiated through the modeled antenna as a result of the simulation.

More specifically, the simulation unit 300 determines the transmission frequency of the modeled antenna, determines the polarization direction of the modeled antenna (eg, selects one of vertical polarization and horizontal polarization) and radiates, and the modeled antenna The surface current induced on the PCB surface of the junction block modeled by electromagnetic waves radiated through PCB surface images can be created.

Referring to FIG. 4, when a vertical polarization of 80 MHz is generated through an antenna, the PCB surface image showing the level of surface current for each position on the PCB surface is shown as in FIGS. 4(a) and (b), and the antenna is When a horizontal polarization of 400 MHz is generated through the circuit board, the PCB surface image showing the level of the surface current for each position on the PCB surface appears as shown in FIGS. 4(c) and 4(b). In this case, the stronger the surface current induced in the PCB of the junction block is, the more it is displayed in red, and the weaker the surface current induced in the PCB of the junction block is, the more it is displayed in green.

As shown in Table 1, the simulation unit 300 may repeatedly perform a simulation for evaluating the EMC performance of the junction block while changing the transmission frequency and polarization direction of the antenna.

In the case of vertical polarization, the transmit frequency of the antenna may be varied in the range of 80 MHz to 3.0 GHz, and in the case of horizontal polarization, the transmit frequency of the antenna may be varied in the range of 400 MHz to 3.0 GHz. The above-mentioned range is a value derived according to the regulation on EMC performance evaluation of the junction block, and the range of the transmit frequency of the antenna is not limited to the above-described range.

Meanwhile, the analysis unit 400 may analyze the EMC performance of the modeled junction block based on the simulation result.

According to an embodiment of the present invention, when a surface current greater than or equal to a preset reference surface current occurs in at least a partial region of the PCB surface of the modeled junction block, the modeled junction block satisfies the EMC performance standard. It can be interpreted as not being able to

For example, when a surface current greater than or equal to a preset reference surface current occurs in at least a portion of the PCB surface image showing the level of the surface current for each position of the PCB surface based on the surface current, the analysis unit 400 generates the modeled It can be interpreted that the junction block does not satisfy the EMC performance specification.

The output unit 500 may output the simulation result of the simulation unit 300 or the analysis result of the analysis unit 400 to the outside.

For example, the output unit 500 may be a display device such as a monitor, and the output unit 500 is a PCB surface image generated through the simulation unit 300 or a modeled model analyzed through the analysis unit 400 . Whether or not the junction block meets the EMC performance standard can be output externally.

5 is a flowchart illustrating a method for simulating EMC performance of a junction block according to an embodiment of the present invention, and FIG. 6 is a step of performing a simulation of the method for simulating EMC performance of a junction block according to an embodiment of the present invention. This is a flowchart for explanation.

Hereinafter, a method of simulating the EMC performance of the junction block will be described with reference to FIGS. 5 and 6 .

In step S100 , the input unit 100 may receive design data of a junction block and design data of an antenna.

Here, the design data of the junction block may include information about the stacked structure of the PCB, device information included in the PCB, and a PCB circuit diagram.

Also, the antenna design data may include antenna size information, antenna shape information, and antenna polarization information.

In step S200 , the modeling unit 200 may model the junction block and the antenna as a 3D model based on the received design data of the junction block and the received antenna design data.

For example, in step S200, the modeling unit 200 reflects the information on the PCB stacking structure provided inside the junction block input through the input unit 100, the device information included in the PCB, and the PCB circuit diagram information to reflect the junction Blocks can be modeled in virtual space as a 3D model.

Similarly, in step S200, the modeling unit 200 reflects the size information of the antenna received through the input unit 100, the shape information of the antenna, and the polarization information of the antenna to model the antenna in a virtual space as a 3D model. .

In step S300 , the simulation unit 300 may perform a simulation for evaluating EMC performance based on the modeled junction block and the modeled antenna.

Referring to FIG. 6 , step S300 may include steps S310, S320, S330 and S340.

In step S310, the simulation unit 300 may determine the transmission frequency of the modeled antenna.

In step S320 , the simulation unit 300 may determine the polarization direction of the modeled antenna.

In step S330 , the simulation unit 300 may obtain a surface current induced on the PCB surface of the junction block modeled by the electromagnetic wave radiated through the modeled antenna as a result of the simulation.

In step S340 , the simulation unit 300 may generate a PCB surface image showing the level of the surface current for each location based on the obtained surface current.

Referring back to FIG. 5 , in step S400 , the analysis unit 400 may analyze the EMC performance of the modeled junction block based on the simulation result.

For example, in step S400, when a surface current greater than or equal to a preset reference surface current occurs in at least some regions of the PCB surface of the modeled junction block, the modeled junction block does not satisfy the EMC performance standard. can be interpreted as not being able to

In step S500 , the output unit 500 may output the simulation result of the simulation unit 300 or the analysis result of the analysis unit 400 to the outside.

For example, in step S500 , the output unit 500 externally checks whether the EMC performance standard of the PCB surface image generated through the simulation unit 300 or the modeled junction block analyzed through the analysis unit 400 is satisfied. can be output as

As described above, the apparatus and method for simulating EMC performance of a junction block according to an embodiment of the present invention perform a virtual simulation for evaluating EMC performance based on design data of a PCB and an antenna of the junction block by performing a virtual simulation of the junction block. It is possible to overcome the spatial and temporal constraints that occur during performance testing. In addition, by checking the surface current induced on the PCB surface of the junction block by electromagnetic waves by location, it is possible to intuitively determine an area vulnerable to electromagnetic waves.

Implementations described herein may be implemented in, for example, a method or process, an apparatus, a software program, a data stream, or a signal. Although discussed only in the context of a single form of implementation (eg, discussed only as a method), implementations of the discussed features may also be implemented in other forms (eg, as an apparatus or program). The apparatus may be implemented in suitable hardware, software and firmware, and the like. A method may be implemented in an apparatus such as, for example, a processor, which generally refers to a computer, a microprocessor, a processing device, including an integrated circuit or programmable logic device, or the like. Processors also include communication devices such as computers, cell phones, portable/personal digital assistants ("PDA") and other devices that facilitate communication of information between end-users.

Although the present invention has been described with reference to the embodiment shown in the drawings, this is merely exemplary, and it is understood that various modifications and equivalent other embodiments are possible by those of ordinary skill in the art. will understand Accordingly, the true technical protection scope of the present invention should be defined by the following claims.

100: input unit
200: modeling unit
300: simulation unit
400: analysis unit
500: output unit

Claims (11)

an input unit receiving design data of the junction block and design data of the antenna;
a modeling unit that models the junction block and the antenna as a 3D model based on the received design data of the junction block and the received antenna design data;
a simulation unit configured to perform a simulation to evaluate Electro Magnetic Compatibility (EMC) performance based on the modeled junction block and the modeled antenna; and
An analysis unit that analyzes the EMC performance of the modeled junction block based on the simulation result;
The simulation unit determines the transmission frequency and polarization direction of the modeled antenna, and the surface induced on the PCB surface of the modeled junction block by electromagnetic waves radiated through the modeled antenna according to the determined transmission frequency and polarization direction. EMC performance simulation apparatus of a junction block, characterized in that the current is acquired as a result of the simulation.
The method of claim 1,
The design data of the junction block includes information on a stacked structure of a printed circuit board (PCB), device information included in the PCB, and a PCB circuit diagram.
The method of claim 1,
The antenna design data includes antenna size information, antenna shape information, and antenna polarization information.
delete The method of claim 1,
The simulation unit, EMC performance simulation apparatus of the junction block, characterized in that based on the obtained surface current to generate a PCB surface image showing the level of the surface current for each location.
The method of claim 1,
Wherein the analysis unit interprets that the modeled junction block does not satisfy the EMC performance standard when a surface current greater than a preset reference surface current occurs in at least a partial region of the PCB surface of the modeled junction block EMC performance simulation device for junction blocks.
receiving, by an input unit, design data of a junction block and design data of an antenna;
modeling, by a modeling unit, the junction block and the antenna as a 3D model based on the received design data of the junction block and the received design data of the antenna;
performing, by a simulation unit, a simulation to evaluate Electro Magnetic Compatibility (EMC) performance based on the modeled junction block and the modeled antenna; and
Analyzing, by an analysis unit, EMC performance of the modeled junction block based on the simulation result;
The performing step is,
determining, by the simulation unit, a transmission frequency of the modeled antenna;
determining, by the simulation unit, a polarization direction of the modeled antenna; and
and acquiring, by the simulation unit, a surface current induced on the PCB surface of the modeled junction block by the electromagnetic wave radiated through the modeled antenna as a result of the simulation; simulation method.
8. The method of claim 7,
The design data of the junction block includes information on a printed circuit board (PCB) stacked structure, device information included in the PCB, and a PCB circuit diagram.
8. The method of claim 7,
The antenna design data includes antenna size information, antenna shape information, and antenna polarization information.
8. The method of claim 7,
The performing step is,
The simulation unit, based on the obtained surface current, generating a PCB surface image showing the level of the surface current for each location; EMC performance simulation method of the junction block further comprising a.
8. The method of claim 7,
In the analyzing step, the analyzing unit,
Junction block, characterized in that when a surface current greater than a preset reference surface current occurs in at least a portion of the PCB surface of the modeled junction block, it is interpreted that the PCB of the modeled junction block does not satisfy EMC performance standards. EMC performance simulation method.

Images