KR102333519B1 - Method for processing a stacked wafer - Google Patents

Abstract

An object of the present invention is to satisfactorily divide a laminated wafer with an opaque layer formed thereon.
A method of processing a laminated wafer W in which a glass substrate W2 is adhered to the front side of a silicon substrate W1, wherein a device is formed from the back side of a silicon substrate on which an opaque layer 14 that hardly transmits infrared rays is formed. The silicon substrate is exposed by cutting in the surplus area on the outer periphery, and an infrared camera is positioned above the silicon substrate exposed in the surplus area to detect and align the line to be divided on the surface side of the silicon substrate. The first cutting blade for the dragon was cut along the dividing line to divide the silicon substrate, and the second cutting blade for the glass substrate was cut along the groove that divided the silicon substrate to divide the glass substrate.

Description

The processing method of a laminated wafer

The present invention relates to a processing method of a laminated wafer in which the laminated wafer is divided along a line to be divided.

Conventionally, as a laminated wafer, one in which a glass substrate is adhered to the surface of a silicon substrate with a resin is known, and as a processing method of this type of laminated wafer, a method of cutting with an ultrasonic blade has been proposed (see, for example, Patent Document 1). In the processing method of patent document 1, a masking tape is affixed on the back surface of a silicon substrate, and the masking tape side is hold|maintained by the chuck table in the state which turned the glass substrate upward. And the division|segmentation line of the surface of a silicon substrate is detected and aligned by passing through a glass substrate by an imaging means, and a glass substrate and a silicon substrate are cut with the ultrasonic blade along the division|segmentation line.

[Patent Document 1] Japanese Patent Laid-Open No. 2007-081264

By the way, there exist those in which a metal film, a satin finish surface, etc. are formed on the back side of the silicon substrate of a laminated wafer. Since the metal film or the satin-finished surface is an opaque layer that does not allow infrared rays to pass through, alignment using an infrared camera cannot be performed in a state where the silicon substrate is directed upward. It is necessary to cut from the side. However, if a metal film is formed on the back surface of the silicon substrate, metal burrs are generated, and if a satin finish surface is formed on the back surface of the silicon substrate, chipping of the back surface is deteriorated, and defects are likely to occur in the chip after division. was happening

The present invention has been made in view of such a point, and an object of the present invention is to provide a method for processing a laminated wafer that can satisfactorily divide a laminated wafer with an opaque layer formed thereon.

The processing method of a laminated wafer of one aspect of the present invention is a processing method of a laminated wafer in which a glass substrate is adhered with a resin to the surface side of a silicon substrate in which a plurality of devices partitioned by a plurality of division lines are formed on the surface of the silicon substrate. In this case, an opaque layer that hardly transmits infrared rays is formed on the back surface of the silicon substrate, and the glass substrate side is placed on the chuck table upper surface of the cutting device through the protective tape of the laminated wafer to which the protective tape is adhered to the glass substrate side. and, after performing the arranging step, with a cutting blade of the cutting device, cutting and removing the opaque layer in the periphery surplus region where the plurality of devices are not formed to expose a silicon substrate After exposing the substrate and exposing the silicon substrate to the surplus region, an infrared camera is placed on the exposed silicon substrate in the surplus region to pass through the silicon substrate to detect the line to be divided on the surface side for alignment After performing the alignment step, a first cutting blade is cut from the silicon substrate side of the laminated wafer to the middle of the resin to divide the silicon substrate along the division scheduled line. After performing the first cutting step, cutting the second cutting blade to the middle of the protective tape along the groove cut in the first cutting step to divide the glass substrate along the dividing line and a second cutting step.

According to this configuration, of the opaque layer covering the back surface of the silicon substrate of the laminated wafer, the outer peripheral excess region in which the device is not formed is removed, and the silicon substrate is partially exposed. By placing an infrared camera on this exposed silicon substrate, the line to be divided on the surface side of the silicon substrate is detected by infrared rays transmitted through the silicon substrate, and alignment is performed. Moreover, since it cuts from the opaque layer side of the back surface of a silicon substrate, it becomes difficult to generate|occur|produce a burr, and it becomes difficult to generate|occur|produce a back surface chipping. Accordingly, the laminated wafer on which the opaque layer is formed can be satisfactorily divided along the division scheduled line.

According to the present invention, alignment is made possible by removing the outer peripheral excess area among the opaque layer on the back surface of the silicon substrate, and by cutting in from the opaque layer side on the back surface of the silicon substrate, the problem caused by the opaque layer is solved while the problem caused by the opaque layer is eliminated. can be partitioned well.

BRIEF DESCRIPTION OF THE DRAWINGS It is an exploded perspective view of the laminated wafer of this embodiment.
It is explanatory drawing of the processing method of the laminated wafer of a comparative example.
3 is a diagram showing an example of an arrangement step of the present embodiment.
Fig. 4 is a diagram showing an example of the step of exposing the outer peripheral excess region silicon substrate of the present embodiment.
5 is a diagram showing an example of the alignment step of the present embodiment.
It is a figure which shows an example of the 1st cutting step of this embodiment.
7 : is a figure which shows an example of the 2nd cutting step of this embodiment.

Hereinafter, with reference to an accompanying drawing, the processing method of the laminated wafer of this embodiment is demonstrated. First, a laminated wafer to be processed will be described. BRIEF DESCRIPTION OF THE DRAWINGS It is an exploded perspective view of the laminated wafer of this embodiment. It is explanatory drawing of the processing method of the laminated wafer of a comparative example.

As shown in Fig. 1, the laminate wafer W is formed by bonding a glass substrate W2 to the surface 11 side of the silicon substrate W1 with a transparent resin 13 (refer to Fig. 3). On the surface 11 of the silicon substrate W1, a plurality of division lines L are arranged in a grid shape, and a plurality of devices D partitioned by the division lines L are formed. The surface 11 of the silicon substrate W1 is divided into a device region A1 in which the device D is formed, and an outer peripheral surplus region A2 in which the device D is not formed around the device region A1. have. In addition, on the back surface 12 of the silicon substrate W1, a non-transmissive layer 14 such as a metal layer or a satin finish surface that hardly transmits infrared rays is formed.

As shown in the comparative example of FIG. 2A, normally, in the laminated wafer W structured in this way, since the back surface 12 of the silicon substrate W1 is covered with the opaque layer 14, the glass substrate W2 It is machined along the division|segmentation plan line L (refer FIG. 1) from the side. In this method, with the glass substrate W2 side of the laminated wafer W facing upward, the silicon substrate W1 side of the laminated wafer W is attached to the protective tape T affixed to the ring frame F. this is stuck Further, when the cutting blade 39 for the glass substrate W2 is ultrasonically vibrated, the glass substrate W2 and the silicon substrate W1 are ultrasonically cut together along the dividing line L by the cutting blade 39 . .

By the way, since the laminated wafer W is down-cut by the cutting blade 39, the opaque layer 14 of the back surface 12 of the silicon substrate W1 tends to deteriorate. For this reason, although the cutting resistance of the silicon substrate W1 with respect to the cutting blade 39 is reduced by ultrasonic cutting, burrs, chipping, etc. of the opaque layer 14 of the silicon substrate W1 cannot be suppressed. Instead of processing the glass substrate W2 and the silicon substrate W1 at once by ultrasonic cutting, it is also considered to process the glass substrate W2 and the silicon substrate W1 separately, but even with a step cut divided into two steps in this way Deterioration of the opaque layer 14 cannot be prevented.

For example, as shown on the left side of FIG. 2B , if the metal film 15 is formed as the non-transmissive layer 14 on the back surface 12 of the silicon substrate W1, the metal film ( 15), metal burrs 16 are generated in the chips after division. A chip becomes defective by the metal burr 16, and the metal burr 16 penetrates into the protective tape T, making it impossible to peel a chip. Further, as shown on the right side of FIG. 2B , if the satin finish surface 17 is formed as the opaque layer 14 on the back surface 12 of the silicon substrate W1, the satin finish of the silicon substrate W1 is The adhesion area of the surface 17 and the protective tape T decreases, the adhesion force becomes weak, and the back surface chipping of the silicon substrate W1 will worsen.

In particular, when the silicon substrate W1 is formed to be thin (several tens of mu m), chipping occurred on the back surface of the silicon substrate W1 and the cracks were elongated, and the chip after division was broken. In this way, when the opaque layer 14 is formed on the back surface 12 of the silicon substrate W1, the chip after division tends to be defective when the laminate wafer W is cut from the glass substrate W2 side. . On the other hand, if the laminated wafer W is reversed and cut from the silicon substrate W1 side, since the image pickup by the infrared camera is blocked by the opaque layer 14, the division scheduled line L cannot be detected. No, alignment cannot be performed.

Therefore, in the processing method of the laminated wafer W of the present embodiment, alignment is possible by removing the portion corresponding to the outer peripheral surplus region A2 among the opaque layer 14 of the back surface 12 of the silicon substrate W1. 5 (see Fig. 5), and cutting along the planned division line L from the back surface 12 side of the silicon substrate W1 (see Figs. 6 and 7). Thereby, generation|occurrence|production of a burr|burr and back surface chipping is suppressed and it becomes possible to divide|segment the laminated wafer W favorably along the division|segmentation schedule line L. In addition, in this embodiment, although it was set as the structure which processes the laminated wafer W in which the metal film 15 and the satin finish surface 17 were formed as the opaque layer 14, it is not limited to this structure. In the processing method of the laminated wafer W of this embodiment, the amount of infrared rays transmitted through the non-transmissive layer 14 other than the metal film 15 or the satin-finished surface 17 , that is, the back surface 12 of the silicon substrate W1 . It is also effective for the laminated wafer W on which the non-transmissive layer 14 is formed.

Hereinafter, a method of processing a laminated wafer will be described in detail with reference to FIGS. 3 to 7 . Fig. 3 is an arrangement step of this embodiment, Fig. 4 is an outer peripheral excess region silicon substrate exposure step of this embodiment, Fig. 5 is an alignment step of this embodiment, Fig. 6 is a first cutting step of this embodiment, and Fig. 7 is It is a figure which shows each example of the 2nd cutting step of this embodiment.

As shown in FIG. 3 , the positioning step is performed before the operation of the cutting device. In the arrangement step, the laminated wafer W supported by the ring frame F is loaded into a cutting device for trimming (not shown). As for the laminated wafer W, the protective tape T affixed to the ring frame F is affixed to the glass substrate W2 of the laminated wafer W, and the glass substrate W2 side is affixed through the protective tape T. It is disposed on the upper surface of the chuck table 31 of the cutting device. At this time, the stacked wafer W is sucked and held by the chuck table 31 through the protective tape T so that the center of the stacked wafer W coincides with the rotation axis of the chuck table 31 .

As shown in Fig. 4, after the disposing step is performed, the outer peripheral surplus region silicon substrate exposing step is performed. In the step of exposing the outer peripheral surplus region silicon substrate, the cutting blade 32 for trimming is positioned in the outer peripheral surplus region A2 in which the plurality of devices D (refer to FIG. 1) are not formed, and the cutting blade 32 The non-transmissive layer 14 is cut. Subsequently, by rotating the chuck table 31 with respect to the cutting blade 32 , the opaque layer 14 is removed from the outer peripheral surplus area A2 so that the step portion 21 is formed along the outer periphery of the laminated wafer W. is formed As the non-transmissive layer 14 is partially removed, the silicon substrate W1 is partially exposed.

In this case, as the cutting blade 32 for trimming, it is preferable that the surface roughness of the stepped portion 21 can be made as smooth as possible without clogging by the impermeable layer 14 such as a metal layer. . Moreover, since the tip shape of the cutting blade 32 for trimming is flat, the step bottom surface 22 from which the opaque layer 14 is removed is formed flat. In this way, the non-transmissive layer 14 of the device region A1 is left from the back surface 12 side of the silicon substrate W1, and the non-transmissive layer 14 of the outer peripheral excess region A2 is removed over the entire periphery. , an infrared transmission region by the infrared camera 36 (refer to FIG. 5 ) in the alignment step is formed.

As shown in Fig. 5A, the alignment step is carried out after the outer peripheral surplus region silicon substrate exposing step is carried out. In the alignment step, the laminated wafer W is loaded from the cutting device for trimming to the cutting device for division (not shown), and the silicon substrate W1 side is directed upward through the protective tape T. The glass substrate W2 side is held on the upper surface of the chuck table 35 . An infrared camera 36 is positioned above the exposed silicon substrate W1 of the outer peripheral surplus region A2, and the step portion 21 of the silicon substrate W1 is imaged. At this time, infrared rays are irradiated from the infrared camera 36 toward the step portion 21 of the silicon substrate W1 , and the reflected light transmitted through the silicon substrate W1 and reflected from the surface 11 is received by the infrared camera 36 . By indenting, a captured image is generated.

As shown in FIG. 5B , since the division line L extends across the entire surface of the silicon substrate W1 , the division immediately below the step portion 21 from which the opaque layer 14 is removed. The scheduled line L is imaged. At this time, since the step bottom surface 22 is formed flat and smooth, the surface 11 (Fig. 5a) side to be divided line L is detected. Based on the captured image of the dividing line L, the central position in the width direction of the first cutting blade 37 for the silicon substrate W1 is positioned at the central position in the width direction of the dividing line L. alignment is performed.

As shown in FIG. 6 , after the alignment step is performed, the first cutting step is performed. In the first cutting step, the silicon substrate W1 at the upper end of the stacked wafer W is divided by the first cutting blade 37 for the silicon substrate W1 . As the first cutting blade 37, a blade suitable for silicon cutting is selected, for example, an electroforming blade having a small abrasive grain diameter is used. When the first cutting blade 37 is positioned at the division scheduled line L (refer to FIG. 1) from the radially outer side of the laminated wafer W, it is possible to cut to the middle of the resin 13 below the silicon substrate W1. The first cutting blade 37 is lowered to a depth, and the chuck table 35 is fed with respect to the first cutting blade 37 .

Thereby, the first cutting blade 37 cuts from the silicon substrate W1 side of the laminated wafer W to the middle of the resin 13, and the silicon substrate along the division scheduled line L (refer to Fig. 5B). (W1) is divided. By repeating this cutting feed, the silicon substrate W1 is cut along all the division lines L, and the grid-like grooves 23 are formed in the silicon substrate W1 at the upper end of the stacked wafer W. As shown in FIG. In addition, since the first cutting blade 37 divides only the silicon substrate W1 without cutting the glass substrate W2, glazing or the like is difficult to occur in the first cutting blade 37, so that the silicon substrate ( The decrease in cutting performance for W1) is suppressed.

In addition, since the laminated wafer W is cut down from the opaque layer 14 side by the first cutting blade 37 , a problem caused by cutting the non-transmissive layer 14 can be suppressed. . That is, even if the non-transmissive layer 14 is a metal film, deformation of the metal film is suppressed by the silicon substrate W1 immediately below the non-transmissive layer 14, so that metal burrs are less likely to occur. Further, even if the opaque layer 14 is a satin-finished surface, since the satin-finished surface is located on the upper surface of the laminated wafer W, chipping deteriorates as in the case where the satin-finished surface is located on the lower surface of the laminated wafer W. nothing happens In this way, even if the opaque layer 14 is formed on the silicon substrate W1, failure factors such as metal burrs and chipping are suppressed.

7 , after the first cutting step is performed, the second cutting step is performed. In a 2nd cutting step, the glass substrate W2 of the lower end of the laminated wafer W is divided|segmented by the 2nd cutting blade 38 for glass substrates W2. As the second cutting blade 38, a blade suitable for glass cutting is selected, for example, a resin blade having a larger abrasive grain diameter and a narrower width than that of the first cutting blade 37 (refer to FIG. 6) is used. When the second cutting blade 38 is positioned in the groove 23 on the silicon substrate W1 on the outer side in the radial direction of the laminated wafer W, it is possible to cut to the middle of the protective tape T under the glass substrate W2. The second cutting blade 38 is lowered to a depth, and the chuck table 35 is fed with respect to the second cutting blade 38 .

Thereby, the laminated wafer W is cut to the middle of the protective tape T by the 2nd cutting blade 38, and glass is followed along the groove|channel 23 (segment plan line L) of the silicon substrate W1. The substrate W2 is divided. By repeating this cutting feed, the glass substrate W2 is cut along all the division|segmentation schedule lines L, and the laminated|stacked wafer W is divided|segmented into individual chips. In addition, since the second cutting blade 38 is formed narrower in width than the first cutting blade 37, the silicon substrate W1 is not damaged by the second cutting blade 38 having a large particle diameter, and the glass substrate is not damaged. It has become possible to cut only (W2) satisfactorily.

As described above, according to the processing method of the laminated wafer W of the present embodiment, in the opaque layer 14 covering the back surface 12 of the silicon substrate W1 of the laminated wafer W, the device D is The non-formed outer peripheral excess area A2 is removed to partially expose the silicon substrate W1. By placing the infrared camera 36 on the exposed silicon substrate W1, the divided line L on the surface 11 side of the silicon substrate W1 is detected by the infrared rays transmitted through the silicon substrate W1. alignment is performed. Further, since it is cut from the opaque layer 14 side of the back surface 12 of the silicon substrate W1, burrs are less likely to occur and chipping of the back surface is less likely to occur. Therefore, the laminated wafer W on which the non-transmissive layer 14 is formed can be satisfactorily divided along the division scheduled line L.

On the other hand, in this embodiment, the arrangement step and the step of exposing the silicon substrate of the outer peripheral surplus region are performed with a cutting device for trimming, and the alignment step, the first cutting step, and the second cutting step are performed with a cutting device for division. However, it is not limited to this configuration. The arrangement step, the step of exposing the outer peripheral surplus region silicon substrate, the alignment step, the first cutting step, and the second cutting step may all be performed with the same cutting device.

In addition, although the present embodiment and modifications have been described, as another embodiment of the present invention, a combination of the above embodiments and modifications wholly or partially may be used.

In addition, the embodiment of the present invention is not limited to the above-described embodiment and modified examples, and various changes, substitutions and modifications may be made without departing from the spirit of the technical idea of the present invention. Furthermore, as long as the technical idea of the present invention can be realized by other methods due to technological advances or other derived technologies, those methods may be used. Accordingly, the claims cover all embodiments that can be included within the scope of the technical idea of the present invention.

In addition, in this embodiment, although the structure of processing the laminated wafer which laminated|stacked the glass substrate on the silicon substrate was demonstrated, the processing of another laminated wafer which can divide|segment a laminated wafer favorably while solving the problem resulting from the opaque layer. It is also possible to apply the method.

As described above, the present invention has the effect that a laminated wafer with an opaque layer can be satisfactorily divided, and in particular, a method for processing a laminated wafer in which a laminated wafer in which a glass substrate is adhered to a thin silicon substrate is cut. useful for

11: Surface of silicon substrate 12: Back surface of silicon substrate
13: resin 14: opaque layer
15: metal film (opaque layer) 17: satin finish surface (opaque layer)
23: groove of silicon substrate 32: cutting blade for trimming
36: infrared camera
37: first cutting blade for silicon substrate
38: second cutting blade for glass substrate
A1: Device area A2: Outer surplus area
D: Device L: Line to be split
T: protective tape W: laminated wafer
W1: silicon substrate W2: glass substrate

Claims (1)

A method of processing a laminated wafer in which a glass substrate is adhered with a resin to the surface side of a silicon substrate in which a plurality of devices partitioned by a plurality of division lines are formed on the surface of the silicon substrate,
An opaque layer is formed on the back surface of the silicon substrate through which infrared rays are difficult to transmit,
an arrangement step of arranging the glass substrate side on the chuck table upper surface of the cutting device through the protection tape of the laminated wafer to which the protection tape is adhered to the glass substrate side;
After carrying out the arranging step, a silicon substrate exposing step of exposing a silicon substrate by cutting and removing the opaque layer in an outer peripheral surplus region where the plurality of devices are not formed with a cutting blade of the cutting device;
After performing the exposing step of exposing the outer circumferential surplus region silicon substrate, an infrared camera is placed on the exposed silicon substrate of the outer periphery surplus region to pass through the silicon substrate to detect the division scheduled line on the surface side and perform alignment; ,
After performing the alignment step, from the opaque layer side of the laminated wafer, through the opaque layer and the silicon substrate, a first cutting blade is cut to the middle of the resin, and the silicon substrate is divided into the division scheduled line A first cutting step of dividing along
After performing the first cutting step, along the groove cut in the first cutting step, a second cutting blade is cut to the middle of the protective tape to divide the glass substrate along the dividing line step
including,
The second cutting blade has a larger grain diameter of abrasive grains than that of the first cutting blade, and has a width narrower than that of the first cutting blade.

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