JP2018041896A - Processing method of laminated wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To preferably divide a laminated wafer to which a non-permeating layer is formed.SOLUTION: A processing method of a laminated wafer (W) to which a glass substrate (W2) is adhered on a surface side of a silicon substrate (W1), comprises steps of: exposing the silicon substrate by cutting a peripheral residual region in which a device is not formed from a back surface side of the silicon substrate in which a non-transmitting layer (14) hardly transmitting an infrared is formed; performing an alignment by positioning an infrared camera at an upper device of the silicon substrate exposed in the peripheral residual region and detecting a division scheduled line of the surface side of the silicon substrate; dividing the silicon substrate by cutting the region with a first cutting blade for the silicon substrate along the division scheduled line; and dividing the glass substrate by cutting the region along with a groove obtained by dividing the silicon substrate with a second cutting blade for the glass substrate.SELECTED DRAWING: Figure 7

Description

  The present invention relates to a laminated wafer processing method for dividing a laminated wafer along a division line.

  Conventionally, a laminated wafer in which a glass substrate is bonded to the surface of a silicon substrate with a resin is known, and a method of cutting with an ultrasonic blade has been proposed as a processing method of this type of laminated wafer (for example, a patent) Reference 1). In the processing method described in Patent Document 1, a protective tape is attached to the back surface of the silicon substrate, and the protective tape side is held on the chuck table with the glass substrate facing upward. Then, the dividing line on the surface of the silicon substrate is detected and aligned through the glass substrate by the imaging means, and the glass substrate and the silicon substrate are cut by an ultrasonic blade along the dividing line.

JP 2007-081264 A

  By the way, there is a laminated wafer in which a metal film, a textured surface, or the like is formed on the back side of the silicon substrate. Since the metal film and the satin surface are impermeable layers that do not easily transmit infrared light, alignment using an infrared camera cannot be performed with the silicon substrate facing upward, and the laminated wafer is not a glass substrate as in the processing method of Patent Document 1. It is necessary to cut from the side. However, if a metal film is formed on the back surface of the silicon substrate, metal burrs are generated, and if a matte surface is formed on the back surface of the silicon substrate, the back surface chipping deteriorates, and the chip after division is defective. There was a problem that it was likely to occur.

  This invention is made | formed in view of this point, and makes it one of the objectives to provide the processing method of the laminated wafer which can divide | segment the laminated wafer in which the impermeable layer was formed favorably.

  According to another aspect of the present invention, there is provided a laminated wafer processing method in which a glass substrate is bonded with a resin to a surface of a silicon substrate in which a plurality of devices partitioned by a plurality of division lines are formed on the surface of the silicon substrate. And a glass substrate side through the protective tape of the laminated wafer in which a non-transparent layer that does not easily transmit infrared rays is formed on the back surface of the silicon substrate, and a protective tape is attached to the glass substrate side. Mounting on the upper surface of the chuck table of the cutting apparatus, and after performing the mounting step, the impermeable layer in the outer peripheral surplus area where the plurality of devices are not formed by the cutting blade of the cutting apparatus. After performing the outer peripheral surplus region silicon substrate exposing step to expose the silicon substrate by cutting and the outer peripheral surplus region silicon substrate exposing step, An alignment step in which an infrared camera is positioned on the silicon substrate where the surplus area is exposed, passes through the silicon substrate, detects the planned division lines on the surface side, and performs alignment, and after performing the alignment step, the laminated wafer The first cutting blade is cut from the silicon substrate side to the middle of the resin, the first cutting step for dividing the silicon substrate along the division line, and after the first cutting step, the first cutting step is performed. A second cutting step of cutting the second cutting blade halfway along the protective tape along the groove cut in the cutting step and dividing the glass substrate along the division line.

  According to this structure, the outer peripheral surplus area | region in which the device is not formed is removed among the impervious layers which cover the back surface of the silicon substrate of a laminated wafer, and a silicon substrate is partially exposed. By positioning the infrared camera on the exposed silicon substrate, the division line on the surface side of the silicon substrate is detected by the infrared rays transmitted through the silicon substrate, and alignment is performed. Moreover, since it is cut from the non-transparent layer side of the back surface of the silicon substrate, burrs are hardly generated and back surface chipping is hardly generated. Therefore, the laminated wafer on which the impermeable layer is formed can be favorably divided along the planned division line.

  According to the present invention, it is possible to perform alignment by removing the outer peripheral surplus region of the non-transparent layer on the back surface of the silicon substrate, and by cutting from the non-transparent layer side on the back surface of the silicon substrate, the problem caused by the non-transparent layer is eliminated. A laminated wafer can be divided | segmented favorably, eliminating.

It is a disassembled perspective view of the laminated wafer of this Embodiment. It is explanatory drawing of the processing method of the laminated wafer of a comparative example. It is a figure which shows an example of the mounting step of this Embodiment. It is a figure which shows an example of the outer periphery excess area | region silicon substrate exposure step of this Embodiment. It is a figure which shows an example of the alignment step of this Embodiment. It is a figure which shows an example of the 1st cutting step of this Embodiment. It is a figure which shows an example of the 2nd cutting step of this Embodiment.

  Hereinafter, a method for processing a laminated wafer according to the present embodiment will be described with reference to the accompanying drawings. First, the laminated wafer to be processed will be described. FIG. 1 is an exploded perspective view of the laminated wafer according to the present embodiment. FIG. 2 is an explanatory diagram of a method for processing a laminated wafer of a comparative example.

  As shown in FIG. 1, the laminated wafer W is formed by bonding a glass substrate W2 to a surface 11 side of a silicon substrate W1 with a transparent resin 13 (see FIG. 3). On the surface 11 of the silicon substrate W1, a plurality of division lines L are arranged in a lattice pattern, and a plurality of devices D partitioned by the division lines L are formed. The surface 11 of the silicon substrate W1 is divided into a device region A1 where the device D is formed and an outer peripheral surplus region A2 where the device D is not formed around the device region A1. Further, on the back surface 12 of the silicon substrate W1, an impermeable layer 14 that is difficult to transmit infrared rays, such as a metal layer or a satin surface, is formed.

  As shown in the comparative example of FIG. 2A, normally, the laminated wafer W configured in this way has the rear surface 12 of the silicon substrate W1 covered with the impermeable layer 14, and therefore the line L to be divided from the glass substrate W2 side. (See FIG. 1). In this method, the silicon substrate W1 side of the laminated wafer W is attached to the protective tape T attached to the ring frame F with the glass substrate W2 side of the laminated wafer W facing upward. Further, the cutting blade 39 for the glass substrate W2 is ultrasonically vibrated, so that the glass substrate W2 and the silicon substrate W1 are ultrasonically cut along the planned division line L by the cutting blade 39.

  By the way, since the laminated wafer W is cut down by the cutting blade 39, the impermeable layer 14 on the back surface 12 of the silicon substrate W1 is likely to deteriorate. For this reason, although the cutting resistance of the silicon substrate W1 with respect to the cutting blade 39 is reduced by ultrasonic cutting, burrs, chipping, and the like of the impermeable layer 14 of the silicon substrate W1 cannot be suppressed. Instead of processing the glass substrate W2 and the silicon substrate W1 at a time by ultrasonic cutting, it is possible to process the glass substrate W2 and the silicon substrate W1 individually, but in this way, the step cut is divided into two stages. However, the deterioration of the impermeable layer 14 cannot be prevented.

  For example, as shown on the left side of FIG. 2B, when the metal film 15 is formed as the non-permeable layer 14 on the back surface 12 of the silicon substrate W1, metal is formed on the divided chips by cutting the metal film 15 on the silicon substrate W1. A burr 16 is generated. The chip becomes defective due to the metal burr 16, and the metal burr 16 bites into the protective tape T and the chip cannot be peeled off. Further, as shown on the right side of FIG. 2B, when the matte ground 17 is formed as the opaque layer 14 on the back surface 12 of the silicon substrate W1, the pasting surface 17 of the silicon substrate W1 and the protective tape T are attached to each other. It decreases and the sticking force becomes weak, and the back surface chipping of the silicon substrate W1 becomes worse.

  In particular, when the silicon substrate W1 is formed thin (several tens of μm), backside chipping occurs in the silicon substrate W1 and cracks extend, and the divided chips are damaged. Thus, when the impermeable layer 14 is formed on the back surface 12 of the silicon substrate W1, if the laminated wafer W is cut from the glass substrate W2 side, the chips after the division are likely to be defective. On the other hand, if the laminated wafer W is turned upside down and cut from the silicon substrate W1 side, the imaging by the infrared camera is blocked by the opaque layer 14, so the division line L cannot be detected and alignment is performed. Can not do it.

  Therefore, in the processing method of the laminated wafer W of the present embodiment, the portion corresponding to the outer peripheral surplus region A2 is removed from the non-permeable layer 14 on the back surface 12 of the silicon substrate W1 to enable alignment (see FIG. 5). Cutting is performed along the planned division line L from the back surface 12 side of the silicon substrate W1 (see FIGS. 6 and 7). Thereby, generation | occurrence | production of a burr | flash and a back surface chipping is suppressed, and it becomes possible to divide the laminated wafer W along the division | segmentation planned line L favorably. In the present embodiment, the laminated wafer W on which the metal film 15 and the matte ground 17 are formed as the impermeable layer 14 is processed. However, the present invention is not limited to this configuration. In the processing method of the laminated wafer W according to the present embodiment, the opaque layer 14 other than the metal film 15 and the matte surface 17, that is, the opaque layer 14 that reduces the amount of infrared transmission is formed on the back surface 12 of the silicon substrate W <b> 1. This is also effective for the laminated wafer W.

  Hereinafter, a method for processing a laminated wafer will be described in detail with reference to FIGS. 3 is a placement step of the present embodiment, FIG. 4 is an outer peripheral surplus region silicon substrate exposure step of the present embodiment, FIG. 5 is an alignment step of the present embodiment, and FIG. 6 is a first cutting of the present embodiment. FIG. 7 is a diagram showing an example of each of the second cutting steps of the present embodiment.

  As shown in FIG. 3, the placing step is performed before the cutting apparatus is operated. In the mounting step, the laminated wafer W supported by the ring frame F is carried into a trimming cutting device (not shown). In the laminated wafer W, the protective tape T attached to the ring frame F is attached to the glass substrate W2 of the laminated wafer W, and the glass substrate W2 side is placed on the upper surface of the chuck table 31 of the cutting device via the protective tape T. Is done. At this time, the laminated wafer W is sucked and held on the chuck table 31 via the protective tape T so that the center of the laminated wafer W coincides with the rotation axis of the chuck table 31.

  As shown in FIG. 4, after the placing step is performed, the outer peripheral surplus region silicon substrate exposing step is performed. In the outer peripheral surplus region silicon substrate exposing step, the cutting blade 32 for trimming is positioned in the outer peripheral surplus region A2 where a plurality of devices D (see FIG. 1) are not formed, and the impermeable layer 14 is cut by the cutting blade 32. . Subsequently, the chuck table 31 is rotated with respect to the cutting blade 32, whereby the impermeable layer 14 is removed from the outer peripheral surplus region A <b> 2 and the stepped portion 21 is formed along the outer periphery of the laminated wafer W. By partially removing the opaque layer 14, the silicon substrate W1 is partially exposed.

  In this case, it is preferable that the trimming cutting blade 32 is not clogged with the impermeable layer 14 such as a metal layer and can smooth the surface roughness of the stepped portion 21 as much as possible. Further, since the tip shape of the cutting blade 32 for trimming is flat, the step bottom surface 22 from which the impermeable layer 14 is removed is formed flat. In this way, the opaque layer 14 in the outer peripheral surplus region A2 is removed from the back surface 12 side of the silicon substrate W1 while leaving the opaque layer 14 in the outer peripheral surplus region A2, and the infrared camera 36 ( An infrared transmission region is formed according to FIG.

  As shown in FIG. 5A, the alignment step is performed after the outer peripheral surplus region silicon substrate exposure step is performed. In the alignment step, the laminated wafer W is carried from the trimming cutting device to the dividing cutting device (not shown), and the glass substrate W2 side is chucked via the protective tape T with the silicon substrate W1 side facing upward. It is held on the upper surface of the table 35. The infrared camera 36 is positioned above the exposed silicon substrate W1 in the outer peripheral surplus area A2, and the stepped portion 21 of the silicon substrate W1 is imaged. At this time, infrared rays are irradiated from the infrared camera 36 toward the stepped portion 21 of the silicon substrate W1, and reflected light that has been transmitted through the silicon substrate W1 and reflected by the surface 11 is taken into the infrared camera 36 to generate a captured image. The

  As shown in FIG. 5B, the planned division line L extends across the entire surface of the silicon substrate W1, so that the planned division line L just below the stepped portion 21 from which the opaque layer 14 has been removed is imaged. The At this time, since the step bottom surface 22 is flat and smoothly formed, the silicon substrate W1 is transmitted through the silicon substrate W1 while scattering of infrared rays on the step bottom surface 22 is suppressed. A planned line L is detected. Based on the captured image of the scheduled division line L, alignment is performed such that the center position in the width direction of the first cutting blade 37 for the silicon substrate W1 is positioned at the center position in the width direction of the scheduled division line L.

  As shown in FIG. 6, the first cutting step is performed after the alignment step is performed. In the first cutting step, the upper silicon substrate W1 of the laminated wafer W is divided by the first cutting blade 37 for the silicon substrate W1. As the first cutting blade 37, a blade suitable for silicon cutting is selected. For example, an electroformed blade having a small abrasive grain size is used. When the first cutting blade 37 is positioned on the division line L (see FIG. 1) on the outer side in the radial direction of the laminated wafer W, the first cutting blade has a depth capable of cutting halfway through the resin 13 below the silicon substrate W1. 37 is lowered, and the chuck table 35 is cut and fed to the first cutting blade 37.

  Thus, the first cutting blade 37 cuts the laminated wafer W from the silicon substrate W1 side to the middle of the resin 13, and the silicon substrate W1 is divided along the division line L (see FIG. 5B). By repeating this cutting feed, the silicon substrate W1 is cut along all the division lines L, and lattice-like grooves 23 are formed in the upper silicon substrate W1 of the laminated wafer W. In addition, since the first cutting blade 37 divides only the silicon substrate W1 without cutting the glass substrate W2, the first cutting blade 37 is less likely to be crushed and the like, and a reduction in cutting performance with respect to the silicon substrate W1 is suppressed. ing.

  Further, since the laminated wafer W is cut by the first cutting blade 37 from the impermeable layer 14 side by down-cutting, it is possible to suppress problems caused by cutting the impermeable layer 14. That is, even if the impermeable layer 14 is a metal film, deformation of the metal film is suppressed by the silicon substrate W1 immediately below the impermeable layer 14, and metal burrs are less likely to occur. Further, even if the impermeable layer 14 is a satin surface, since the satin surface is located on the upper surface of the laminated wafer W, chipping may deteriorate as in the case where the satin surface is located on the lower surface of the laminated wafer W. Absent. Thus, even if the opaque layer 14 is formed on the silicon substrate W1, defective factors such as metal burrs and chipping can be suppressed.

  As shown in FIG. 7, the second cutting step is performed after the first cutting step is performed. In the second cutting step, the lower glass substrate W2 of the laminated wafer W is divided by the second cutting blade 38 for the glass substrate W2. As the second cutting blade 38, a blade suitable for glass cutting is selected. For example, a resin blade having a coarser grain size and a narrower width than the first cutting blade 37 (see FIG. 6) is used. . When the second cutting blade 38 is positioned in the groove 23 on the silicon substrate W1 on the outer side in the radial direction of the laminated wafer W, the second cutting blade 38 has a depth capable of being cut halfway through the protective tape T below the glass substrate W2. The chuck table 35 is cut and fed to the second cutting blade 38.

  Thereby, the laminated wafer W is cut to the middle of the protective tape T by the second cutting blade 38, and the glass substrate W2 is divided along the groove 23 (division planned line L) of the silicon substrate W1. By repeating this cutting feed, the glass substrate W2 is cut along all the division lines L, and the laminated wafer W is divided into individual chips. Further, since the second cutting blade 38 is formed to be narrower than the first cutting blade 37, only the glass substrate W2 is favorably cut without damaging the silicon substrate W1 with the second cutting blade 38 having a coarse particle size. It is possible.

  As described above, according to the method for processing the laminated wafer W according to the present embodiment, the outer peripheral surplus area A2 in which the device D is not formed in the impermeable layer 14 covering the back surface 12 of the silicon substrate W1 of the laminated wafer W. Is removed and the silicon substrate W1 is partially exposed. By positioning the infrared camera 36 on the exposed silicon substrate W1, the division line L on the surface 11 side of the silicon substrate W1 is detected by the infrared rays transmitted through the silicon substrate W1, and alignment is performed. Further, since the back surface 12 of the silicon substrate W1 is cut from the non-transparent layer 14 side, burrs are hardly generated and back surface chipping is difficult to occur. Therefore, the laminated wafer W on which the opaque layer 14 is formed can be divided well along the division line L.

  In this embodiment, the placing step and the outer peripheral surplus region silicon substrate exposing step are performed by a trimming cutting device, and the alignment step, the first cutting step, and the second cutting step are performed by a dividing cutting device. Although configured, it is not limited to this configuration. The mounting step, the outer peripheral surplus region silicon substrate exposure step, the alignment step, the first cutting step, and the second cutting step may all be performed by the same cutting device.

  Moreover, although this Embodiment and the modified example were demonstrated, what combined the said embodiment and modified example entirely or partially as another embodiment of this invention may be sufficient.

  The embodiments of the present invention are not limited to the above-described embodiments and modifications, and various changes, substitutions, and modifications may be made without departing from the spirit of the technical idea of the present invention. Furthermore, if the technical idea of the present invention can be realized in another way by technological advancement or another derived technique, the method may be used. Accordingly, the claims cover all embodiments that can be included within the scope of the technical idea of the present invention.

  Further, in the present embodiment, the configuration for processing a laminated wafer in which a glass substrate is laminated on a silicon substrate has been described. However, the laminated wafer can be favorably divided while solving the problems caused by the opaque layer. It is also possible to apply to the processing method of a laminated wafer.

  As described above, the present invention has an effect that a laminated wafer in which an impermeable layer is formed can be favorably divided, and in particular, a laminated wafer in which a glass substrate is bonded to a thin silicon substrate. This is useful for a method of processing a laminated wafer to be cut.

11 Front surface of silicon substrate 12 Back surface of silicon substrate 13 Resin 14 Impervious layer 15 Metal film (impermeable layer)
17 pear ground (impermeable layer)
23 Silicon substrate groove 32 Trimming cutting blade 36 Infrared camera 37 First cutting blade for silicon substrate 38 Second cutting blade for glass substrate A1 Device region A2 Peripheral surplus region D Device L Divided line T Protection tape W Lamination Wafer W1 Silicon substrate W2 Glass substrate

Claims (1)

A method for processing a laminated wafer in which a glass substrate is bonded with a resin to the surface side of a silicon substrate in which a plurality of devices partitioned by a plurality of division lines are formed on the surface of the silicon substrate,
An opaque layer that does not easily transmit infrared rays is formed on the back surface of the silicon substrate.
A placing step of placing the glass substrate side on the chuck table upper surface of the cutting device via the protective tape of the laminated wafer having the protective tape attached to the glass substrate side;
After performing the mounting step, the outer peripheral surplus region silicon substrate exposed to expose the silicon substrate by cutting and removing the impermeable layer in the outer peripheral surplus region where the plurality of devices are not formed with the cutting blade of the cutting apparatus Steps,
After performing the outer peripheral surplus region silicon substrate exposure step, an infrared camera is positioned on the silicon substrate where the outer peripheral surplus region is exposed, and the alignment is performed by detecting the planned division line on the surface side through the silicon substrate. An alignment step;
After performing the alignment step, the first cutting step of cutting the first cutting blade from the silicon substrate side of the laminated wafer to the middle of the resin, and dividing the silicon substrate along the division line,
After performing the first cutting step, a second cutting blade is cut halfway along the protective tape along the groove cut in the first cutting step, and the glass substrate is divided along the division line. Two cutting steps;
A method for processing a laminated wafer comprising:

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