KR101683583B1 - Light emitting device - Google Patents

Abstract

An embodiment relates to a light emitting device.
A light emitting device according to an embodiment includes a conductive substrate, a first conductive layer disposed on the conductive substrate, a first semiconductor layer disposed on the first conductive layer, an active layer disposed on the first semiconductor layer, A second semiconductor layer disposed on the active layer and the second conductive layer, and an insulating layer, wherein the second conductive layer is disposed between the first semiconductor layer and the active layer, And is disposed in the form of surrounding the first semiconductor layer and the active layer along the lower surface of the outer peripheral portion of the second semiconductor layer.

Description

[0001] LIGHT EMITTING DEVICE [0002]

This embodiment relates to a light emitting device.

Light emitting diodes (LEDs) are a type of semiconductor devices that convert electrical energy into light. Light emitting diodes have advantages of low power consumption, semi-permanent lifetime, fast response speed, safety, and environmental friendliness compared with conventional light sources such as fluorescent lamps and incandescent lamps. Accordingly, much research has been conducted to replace an existing light source with a light emitting diode, and a light emitting diode has been increasingly used as a light source for various lamps used outside the room, a lighting device such as a liquid crystal display device, a display board, and a streetlight.

1 is a cross-sectional view of a vertical light emitting device 100 according to the related art.

Hereinafter, for convenience of explanation, it is assumed that the semiconductor layer in contact with the substrate 120 shown in FIG. 1 is an n-type semiconductor layer and the semiconductor layer disposed on the active layer 140 is a p-type semiconductor layer do.

1, the light emitting device 100 includes an n-type electrode 110, a conductive substrate 120 disposed on the n-type electrode layer 110, an n-type semiconductor layer 130 (not shown) disposed on the conductive substrate 120, an active layer 140 disposed on the n-type semiconductor layer 130, a p-type semiconductor layer 150 disposed on the active layer 140, and a p-type electrode layer 150 disposed on the p- 160).

1, when the conductive substrate 120 is used, since a voltage can be applied to the n-type semiconductor layer 130 through the conductive substrate 120, an electrode can be formed on the substrate itself . Accordingly, the n-type electrode 110 may be disposed on the conductive substrate 120, and the p-type electrode 160 may be disposed on the p-type semiconductor layer 150 to produce a vertical light emitting device.

1, the p-type electrode 160 is disposed at the uppermost portion of the light emitting device 100, and when the light emitting device 100 is operated, the active layer 140 is exposed to the outside Thereby blocking a part of the emitted light. Accordingly, the vertical type light emitting device 100 shown in FIG. 1 has a disadvantage in that the light loss is large and the luminous efficiency is reduced.

It is an object of the present invention to provide a light emitting device in which light loss due to reduction of a light emitting region is minimized and activation of a current flow is maximized.

A light emitting device according to an embodiment of the present invention includes a conductive substrate, a first conductive layer disposed on a conductive substrate, a first semiconductor layer disposed on the first conductive layer, an active layer disposed on the first semiconductor layer, A second semiconductor layer disposed on the active layer and the second conductive layer, and an insulating layer, wherein the second conductive layer is formed on the insulating layer along the sidewalls of the first semiconductor layer and the active layer, And is disposed in a manner to surround the first semiconductor layer and the active layer along the lower surface of the outer peripheral portion of the second semiconductor layer.

According to the embodiment of the present invention, it is possible to provide a light emitting device in which the light loss due to the reduction of the light emitting region is minimized and the activation of the current flow is maximized.

1 is a cross-sectional view of a conventional vertical light emitting device.
2 and 3 are cross-sectional views of a light emitting device according to an embodiment.
4 is a top view of a light emitting device taken along the line A-A 'shown in FIG. 3;
5 is a schematic view showing a package of a light emitting element;

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It is to be understood, however, that the appended drawings illustrate the embodiments of the present invention in more detail and are not intended to limit the scope of the present invention. You will know.

2 is a cross-sectional view of a conventional vertical light emitting device 200 having a via hole electrode shape as an embodiment. The vertical light emitting device 200 shown in FIG. 2 is a structure for increasing the light emitting efficiency of the conventional vertical light emitting device 100 shown in FIG.

For convenience of explanation, a semiconductor layer which is in contact with the n-type electrode layer 220 through the via holes 220a, 220b and 220c is an n-type semiconductor layer and is disposed between the p-type electrode layer 240 and the active layer 260 The semiconductor layer is assumed to be a p-type semiconductor layer.

The light emitting device 200 shown in Fig. 2 includes a p-type electrode layer 240, a p-type semiconductor layer 250, and an active layer 260 extending from the n-type electrode layer 220 to the n-type semiconductor layer 270 Via holes 220a, 220b and 220c extending to a predetermined region are formed. Unlike the conventional light emitting device 100 shown in FIG. 1, this structure has an advantage in that the light extraction efficiency is good because there is no portion where the upper portion of the n-type semiconductor layer 270 on which light is actually emitted is clogged with the electrode have.

3 is a cross-sectional view of a light emitting device 300 according to another embodiment. 4 is a top view of the light emitting device 300 taken along the line A-A 'shown in FIG.

3 and 4, the light emitting device 300 according to the embodiment includes a conductive substrate 310, a first conductive layer 320, a first semiconductor layer 330, an active layer 340, A layer 350, a second semiconductor layer 360, and an insulating layer 370.

Hereinafter, for convenience of explanation, the first conductive layer 320 is a p-type conductive layer, the first semiconductor layer 330 is a p-type semiconductor layer, the second conductive layer 350 is an n-type conductive layer, The second semiconductor layer 360 is assumed to be an n-type semiconductor layer.

The conductive substrate 310 may be formed of one or more of Au, Ni, Al, Cu, W, Si, Se, and GaAs. For example, the conductive substrate 310 may be made of a material in the form of an alloy of Si and Al.

The p-type conductive layer 320 may be disposed on the conductive substrate 310. The p-type conductive layer 320 may be formed of one or more of Ag, Al, Pt, Ni, Pt, Pd, Au, Ir, and a transparent conductive oxide (ITO, GZO). This is because the contact resistance of the p-type semiconductor layer 330 is minimized because the p-type conductive layer 320 is in electrical contact with the p-type semiconductor layer 330 and the light generated in the active layer 340 So that the light emitting efficiency can be improved. The p-type conductive layer 320 may have a multi-layer structure including a reflective layer.

The p-type semiconductor layer 330 is disposed on the p-type conductive layer 320, the active layer 340 is disposed on the p-type semiconductor layer 330, and the n-type semiconductor layer 360 is disposed on the active layer 340 As shown in FIG.

The n-type semiconductor layer 360 is a semiconductor material having a composition formula of In _x Al _y Ga _(1-xy) N (0? x? 1, 0? y? 1, 0? x + y? 1) InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN and the like, and n-type dopants such as Si, Ge and Sn can be doped.

The p-type semiconductor layer 330 is a semiconductor material having a composition formula of In _x Al _y Ga _(1-xy) N (0? x? 1, 0? y? 1, 0? x + y? 1) InAlGaN, GaN, AlGaN, InGaN, AlInN, AlN, InN and the like, and a p-type dopant such as Mg or Zn may be doped.

The active layer 340 may be formed of any one of a single quantum well structure, a multi quantum well (MQW) structure, a quantum wire structure, and a quantum dot structure, but is not limited thereto.

The active layer 340 may be formed of a semiconductor material having a composition formula of In _x Al _y Ga _(1-xy) N (0? X? 1, 0? _Y? 1, 0? _X + y? When the active layer 340 is formed of a multiple quantum well structure (MQW), the active layer 340 may be formed by stacking a plurality of well layers and a plurality of barrier layers. For example, the InGaN well layer / GaN barrier layer / RTI >

In addition, the active layer 340 may be formed by selecting a different material depending on the material of the p-type semiconductor layer 330 and the n-type semiconductor layer 360. That is, since the active layer 340 is a layer that converts energy resulting from recombination of electrons and electrons into light and emits light, energy smaller than the energy band gap of the p-type semiconductor layer 330 and the n-type semiconductor layer 360 It is preferable to be formed of a material having a bandgap.

The n-type conductive layer 350 is disposed on the p-type conductive layer 320 and may be formed vertically from the p-type conductive layer 320. In addition, the n-type conductive layer 350 may be disposed along the sidewalls of the p-type semiconductor layer 330 and the active layer 340, and may be connected in a single line. That is, the n-type conductive layer 350 is located at the edge of the device, not in the form of a via-hole electrode formed at the central portion of the device.

In the embodiment, the n-type conductive layers 350 are connected by one line, but the present invention is not limited thereto. For example, the n-type conductive layer 350 may have a constant period or may include an aperiodic pattern.

In addition, the n-type conductive layer 350 may be formed higher than the active layer 340. Therefore, a part of the region of the n-type conductive layer 350 is present on the same layer as the p-type semiconductor layer 330 and the active layer 340, and the remaining region exists in the region of the n-type semiconductor layer 360 . Here, the remaining region of the n-type conductive layer 350 is in contact with the n-type semiconductor layer 360. Since the n-type conductive layer 350 is electrically connected to the n-type semiconductor layer 360, it is preferable that the n-type conductive layer 350 is formed of a material with which the contact resistance with the n-type semiconductor layer 360 is minimized.

In addition, the n-type conductive layer 350 may include at least one region where a part thereof is exposed to the outside, that is, at least one of the exposed regions 351a and 351b. N-type electrode pad portions 353a and 353b for connecting an external power source to the n-type conductive layer 350 may be disposed on the exposed regions 351a and 351b, respectively. The exposed regions 351a and 351b can be disposed at the edges of the light emitting device 300, which can maximize the light emitting area.

The n-type conductive layer 350 may be formed of one or more of Al, Au, Pt, Ti, Cr, and W. [

The insulating layer 370 may be formed such that the n-type conductive layer 350 is electrically insulated from the other layers except for the n-type semiconductor layer 360. More specifically, the insulating layer 370 is formed between the p-type conductive layer 320 and the n-type conductive layer 350 and between the side walls of the p-type semiconductor layer 330 and the active layer 340 and the n-type conductive layer 350, As shown in Fig.

The insulating layer 350 may or may not be disposed on the side wall of the region protruding from the n-type semiconductor layer 360 in the region of the n-type conductive layer 350. In the latter case, the contact area between the n-type conductive layer 350 and the n-type semiconductor layer 360 can be maximized by minimizing the insulating region between the n-type conductive layer 350 and the n-type semiconductor layer 360.

The insulating layer 370 is not formed on the n-type conductive layer 350. The upper portion of the n-type conductive layer 350 and the n-type semiconductor layer 360 may be electrically connected.

The insulating layer 370, any one of silicon oxide (SiO _2), silicon nitride (SiO _x N _y, Si _x N _y), metal oxides (Al ₂ O ₃₎ and fluoride (fluoride) compounds of the series Or more.

A passivation layer (not shown) may be disposed on a side surface of the light emitting device 300 to suppress a leakage current generated during operation of the light emitting device 300. A passivation layer (not shown) is for protecting the light emitting structure from the outside, and suppresses the leakage current, a silicon oxide (SiO _2), silicon nitride (SiO _x N _y, Si _x N _y), metal oxides (Al ₂ O ₃ ) and a fluoride-based compound.

In the light emitting device according to the embodiment, the area reduction of the activation layer can be minimized because the conductive layer is located at the edge of the device. Further, the conductive layer is formed in a line shape and contacts the semiconductor layer, so that the contact area with the semiconductor layer can be maximized.

Hereinafter, the light emitting device package according to the embodiment will be described with reference to FIG. 5 is a cross-sectional view schematically showing a package 1000 of a light emitting element.

5, the light emitting device package 1000 according to the embodiment includes a package body 1100, a first electrode layer 1110, a second electrode layer 1120, a light emitting device 1200, and a filler material 1300 .

The package body 1100 may be formed of a silicon material, a synthetic resin material, or a metal material, and an inclined surface may be formed around the light emitting device 1200 to increase light extraction efficiency.

The first electrode layer 1110 and the second electrode layer 1120 are installed in the package body 1100. The first electrode layer 1110 and the second electrode layer 1120 are electrically isolated from each other and provide power to the light emitting device 1200. The first electrode layer 1110 and the second electrode layer 1120 may reflect the light generated from the light emitting device 1200 to increase the light efficiency and may be configured to discharge heat generated in the light emitting device 1200 to the outside It can also play a role.

The light emitting device 1200 is electrically connected to the first electrode layer 1110 and the second electrode layer 1120. The light emitting device 1200 may be mounted on the package body 1100 or on the first electrode layer 1110 or the second electrode layer 1120.

The light emitting device 1200 may be electrically connected to the first electrode layer 1110 and the second electrode layer 1120 by a wire, a flip chip, or a die bonding method.

The filler 1300 may be disposed so as to surround and protect the light emitting device 1200. The filler 1300 may include a phosphor 1310 to change the wavelength of the light emitted from the light emitting device 1200.

The light emitting device package 1000 may be mounted with one or more than one of the light emitting devices of the above-described embodiments, but the present invention is not limited thereto.

A plurality of light emitting device packages 1000 according to embodiments may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, and the like may be disposed on the light path of the light emitting device package 1000. The light emitting device package 1000, the substrate, and the optical member can function as a light unit.

Another embodiment may be implemented as a display device, an indicating device, a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, for example, the lighting system may include a lamp, have.

It will be apparent to those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof.

It is therefore to be understood that the embodiments described above are illustrative and not restrictive in all aspects and that the scope of the invention is indicated by the appended claims rather than the foregoing description, And all changes or modifications derived from equivalents thereof should be construed as being included within the scope of the present invention.

300: Light emitting element
310: conductive substrate
320: first conductive layer
330: first semiconductor layer
340: active layer
350: second conductive layer
360: second semiconductor layer
370: insulating layer

Claims (12)

A conductive substrate;
A first conductive layer disposed on the conductive substrate;
A first semiconductor layer disposed on the first conductive layer;
An active layer disposed on the first semiconductor layer;
A second conductive layer disposed on the first conductive layer;
A second semiconductor layer disposed on the active layer and the second conductive layer; And
And an insulating layer,
Wherein the second conductive layer is disposed along the sidewalls of the first semiconductor layer and the active layer with the insulating layer interposed therebetween, and the second semiconductor layer surrounds the first semiconductor layer and the active layer along the lower surface of the outer periphery of the second semiconductor layer Emitting element.
delete The method according to claim 1,
Wherein the second conductive layer is in the form of a line connected to the sidewalls of the first semiconductor layer and the active layer and along the outer periphery of the second semiconductor layer.
The method according to claim 1,
Wherein the second conductive layer includes a plurality of patterns spaced apart from each other along a sidewall of the first semiconductor layer and the active layer and an outer peripheral portion of the second semiconductor layer.
The method according to claim 1,
Wherein the second conductive layer has at least one region where a part of the second conductive layer is exposed to the outside,
And an electrode pad portion disposed on the exposed region of the second conductive layer.
6. The method of claim 5,
And the electrode pad portion is disposed at an edge of the light emitting element.
The method according to claim 1,
Wherein the conductive substrate comprises at least one of Au, Ni, Al, Cu, W, Si, Se, and GaAs.
The method according to claim 1,
Wherein the first conductive layer comprises at least one of Ag, Al, Pt, Ni, Pt, Pd, Au, Ir, and a transparent conductive oxide,
Wherein the transparent conductive oxide comprises at least one of ITO and GZO.
The method according to claim 1,
Wherein the first conductive layer includes a reflective layer that reflects light generated from the active layer.
The method according to claim 1,
Wherein the second conductive layer comprises at least one of Al, Au, Pt, Ti, Cr, and W.
The method according to claim 1,
Wherein the insulating layer comprises at least one of silicon oxide, silicon nitride, metal oxide, and fluoride series compound.
The method according to claim 1,
The side surfaces of the first semiconductor layer and the active layer, and the upper surface of the second conductive layer disposed along the outer periphery of the second semiconductor layer are located higher than the active layer.

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