KR101613737B1 - Organic Light Emitting Diode Display And Driving Method Thereof - Google Patents

Abstract

The organic light emitting diode display device according to the present invention includes: an organic light emitting diode (OLED) emitting light by a driving current flowing between a high potential driving voltage source for generating a high potential driving voltage and a base voltage source; A driving TFT having a gate electrode connected to a first node and a source electrode connected to the high potential driving voltage source, the driving TFT controlling the driving current according to a source-gate voltage; And a switch circuit connected to the driving TFT and the organic light emitting diode and reflecting the high potential driving voltage, the threshold voltage of the driving TFT, and the threshold voltage of the organic light emitting diode to the first node.

Description

[0001] The present invention relates to an organic light emitting diode (OLED) display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an organic light emitting diode (OLED) display device, and more particularly, to an organic light emitting diode display device capable of improving image quality and a driving method thereof.

2. Description of the Related Art In recent years, development of various flat panel displays (FPD) has been accelerated. Particularly, the organic light emitting diode display device has advantages of high response speed, high luminous efficiency, high luminance and wide viewing angle by using a self-luminous element which emits light by itself.

The organic light emitting diode display device has an organic light emitting diode as shown in FIG. The organic light emitting diode has organic compound layers (HIL, HTL, EML, ETL, EIL) formed between the anode electrode and the cathode electrode.

The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer EIL). When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the HTL and electrons passing through the ETL are transferred to the EML to form excitons, Thereby generating visible light.

The organic light emitting diode display device arranges the pixels including the organic light emitting diode in a matrix form and controls the brightness of the pixels according to the gray level of the video data. Such an organic light emitting diode display device is divided into a passive matrix type and an active matrix type using a TFT (Thin Film Transistor) as a switching element. Among them, the active matrix method selectively turns on the TFT as the active element to select the pixel and maintains the light emission of the pixel with the voltage held in the storage capacitor.

2 is a circuit diagram showing one pixel equivalently in an active matrix type organic light emitting diode display.

2, a pixel of an active matrix type organic light emitting diode display device includes an organic light emitting diode OLED, a switch TFT ST, a driver TFT DT, and a storage capacitor Cst.

The switch TFT (ST) turns on in response to a scan pulse from the gate line (GL), thereby conducting a current path between the source electrode and the drain electrode. The switch TFT (ST) applies a data voltage from the data line (DL) to the gate electrode of the driver TFT (DT) and the storage capacitor (Cst) during the turn-on period. The driving TFT DT controls the current flowing in the organic light emitting diode OLED according to the gate-source voltage Vgs of its own. The storage capacitor Cst keeps the gate potential of the driving TFT DT constant for a predetermined period. The organic light emitting diode OLED has a structure as shown in FIG. 1 and is connected between the drain electrode of the driving TFT DT and the ground voltage source GND.

2 is proportional to the driving current Ioled flowing in the organic light emitting diode OLED and the driving current Ioled is proportional to the gate-source voltage of the driving TFT DT Vgs of the driving TFT DT and the threshold voltage Vth of the driving TFT DT.

Here, 'μ' denotes the mobility of the driving TFT DT, 'Cox' denotes the parasitic capacitance of the driving TFT DT, 'W' denotes the channel width of the driving TFT DT, 'Vdd' denotes a high potential driving voltage, and 'Vdata' denotes a data voltage.

Such image quality deterioration due to the luminance deviation between pixels in an organic light emitting diode display device is caused by various causes.

First, there is an electrical characteristic deviation of the driving TFT DT such as a threshold voltage Vth for the above reasons.

In a panel using a Low Temperature Poly Silicon (LTPS) back plane, a characteristic deviation of the driving TFT (DT) between pixels occurs due to an ELA (Excimer Laser Annealing) process. On the other hand, in a panel using an amorphous silicon (a-Si) back plane, there is almost no characteristic deviation of the driving TFT (DT) due to the process. However, due to the gate-bias stress accumulated in the gate electrode of the driving TFT DT in accordance with the panel driving, the deterioration degree of the driving TFT DT varies from pixel to pixel, Resulting in characteristic deviations. When the characteristic deviation of the driving TFT DT, that is, the difference of the threshold voltage Vth of the driving TFT DT between the pixels is generated, the organic light emitting diode (OLED) corresponding to the same data voltage Vdata The driving current Ioled flowing through the OLED varies depending on the pixels.

Second, a deviation of the high potential driving voltage (Vdd) due to the IR drop can be mentioned.

The IR drop is a phenomenon in which the level of the high potential driving voltage (Vdd) gradually decreases as the distance from the voltage input terminal is decreased due to the wiring resistance of the power supply wiring. Therefore, the level of the high potential driving voltage Vdd applied to the pixels differs depending on the positions of the pixels. If the level of the high-potential driving voltage Vdd between the pixels changes according to the position, the driving current Iolde flowing through the organic light-emitting diode OLED corresponding to the same data voltage Vdata Are different for each pixel.

Thirdly, degradation of the organic light emitting diode (OLED) due to driving for a long time can be cited. The deterioration with respect to the organic light emitting diode (OLED) becomes larger in a portion that is driven for a long time with a relatively bright gradation as shown in FIG. In the conventional pixel structure, when the organic light emitting diode (OLED) is deteriorated, the luminance is lowered at the position.

Accordingly, it is an object of the present invention to provide an organic light emitting diode display device and a method of driving the same, which can improve image quality by preventing luminance deviation between pixels.

According to an aspect of the present invention, there is provided an organic light emitting diode (OLED) display device including: an organic light emitting diode (OLED) emitting light by a driving current flowing between a high potential driving voltage source for generating a high potential driving voltage and a base voltage source; A driving TFT having a gate electrode connected to a first node and a source electrode connected to the high potential driving voltage source, the driving TFT controlling the driving current according to a source-gate voltage; And a switch circuit connected to the driving TFT and the organic light emitting diode and reflecting the high potential driving voltage, the threshold voltage of the driving TFT, and the threshold voltage of the organic light emitting diode to the first node.

Wherein the switch circuit comprises: a first switch TFT connected between the first node and a drain electrode of the drive TFT; A second switch TFT connected between the second node and the organic light emitting diode; A third switch TFT connected between a data line to which a data voltage is applied and a third node; A fourth switch TFT connected between the reference voltage source and the third node; A fifth switch TFT connected between the second node and the third node; A sixth switch TFT connected between the driving TFT and the organic light emitting diode; A seventh switch TFT connected between the reference voltage source and the first node; A first capacitor connected between the first node and the third node; And a second capacitor connected between the first node and the second node.

A gate electrode of each of the first to third switch TFTs is connected to an n-th scan line to which an n-th scan signal is applied; A gate electrode of each of the fourth to sixth switch TFTs is connected to an nth emission line to which an nth emission signal is applied; And the gate electrode of the seventh switch TFT is connected to the (n-1) th scan line to which the (n-1) th scan signal is applied.

During the first period, the n-1 scan signal and the nth emission signal are maintained at the turn-on level and the n-th scan signal is maintained at the turn-off level; The nth scan signal and the nth emission signal are maintained at a turn-off level and the nth scan signal is maintained at a turn-on level during a second period subsequent to the first period; During the third period following the second period, the (n-1) th and (n) scan signals are maintained at the turn-off level and the n-th emission signal is maintained at the turn-on level.

A gate electrode of each of the first to third switch TFTs is connected to an n-th scan line to which an n-th scan signal is applied; A gate electrode of each of the fourth and fifth switch TFTs is connected to an n1-th emission line to which an n1-emission signal is applied; A gate electrode of the sixth switch TFT is connected to an n2-th emission line to which an n-th emission signal is applied; And the gate electrode of the seventh switch TFT is connected to the (n-1) th scan line to which the (n-1) th scan signal is applied.

During the first period, the n-1 scan signal and the n1 emission signal are maintained at the turn-on level and the n-th scan signal and the n2 emission signal are maintained at the turn-off level; The n-1 scan signal and the n1 and n2 emission signals are maintained at a turn-off level and the n-th scan signal is maintained at a turn-on level during a second period subsequent to the first period; During the third period subsequent to the second period, the (n-1) th and (n) scan signals are maintained at the turn-off level and the n1 and n2 emission signals are maintained at the turn-on level.

The driving current is expressed by the following equation.

Here, 'Ioled' denotes the driving current, 'μ' denotes a mobility of the driving TFT, 'Cox' denotes a parasitic capacitance of the driving TFT, 'W' denotes a channel width of the driving TFT, 'Vdd' is the high-potential driving voltage, and 'Vdata' is the gate-to-gate voltage difference of the driving TFT, 'Vth' is the threshold voltage of the driving TFT, 'Denotes a data voltage,' Vref 'denotes a reference voltage by the reference voltage source, and' Vtho 'denotes a threshold voltage of the organic light emitting diode.

According to an embodiment of the present invention, an organic light emitting diode that emits light by a driving current flowing between a high potential driving voltage source and a base voltage source for generating a high potential driving voltage, a gate electrode connected to the first node, A driving TFT having a source electrode connected to the first node and the driving current and controlling the driving current according to a source-gate voltage; and a driving TFT connected to second and third nodes different from the first node and the first node, A method of driving an organic light emitting diode display device having a switch circuit for controlling includes the steps of initializing a potential of the first to third nodes to a reference voltage level during a first period; A first calculation value obtained by subtracting a threshold voltage of the driving TFT from the high potential driving voltage is applied to the first node during a second period subsequent to the first period and a threshold voltage of the organic light emitting diode is applied to the second node Applying a data voltage to the third node; And for varying the potential of the second and third nodes to the reference voltage level for a third period subsequent to the second period and reflecting the second calculated value according to the variation to the first node, To a compensation value obtained by subtracting the second calculation value from the first calculation value; The second calculated value indicates a value obtained by subtracting the reference voltage from the sum of the data voltage and the threshold voltage of the organic light emitting diode.

According to the organic light emitting diode display device and the driving method of the present invention, the driving current flowing through the organic light emitting diode is not affected by the threshold voltage deviation and / or the high potential driving voltage deviation of the driving TFT. As a result, even if the deviations are generated, luminance unevenness phenomenon between the pixels is not caused, so that a dramatic improvement in image quality can be expected compared with the conventional method.

Further, according to the organic light emitting diode display device and the driving method of the present invention, since the driving current increases in proportion to the increase of the threshold voltage of the organic light emitting diode, luminance unevenness due to the deterioration of the organic light emitting diode between the pixels is automatically It is possible to expect remarkable image quality improvement compared to the conventional one.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram for explaining the principle of light emission of a general organic light emitting diode display device. FIG.
2 is an equivalent circuit diagram of a pixel in a conventional organic light emitting diode display.
3 is a view showing a residual image generated by deterioration of an organic light emitting diode.
4 is a block diagram illustrating an organic light emitting diode display device according to an embodiment of the present invention.
5 is an equivalent circuit diagram of a pixel according to an embodiment of the present invention.
FIG. 6 is a voltage waveform diagram of control signals applied to FIG. 5 and each node. FIG.
FIG. 7A is an equivalent circuit diagram of a pixel for the first period of FIG. 6; FIG.
FIG. 7B is an equivalent circuit diagram of a pixel for the second period of FIG. 6; FIG.
FIG. 7C is an equivalent circuit diagram of a pixel for the third period of FIG. 6; FIG.
8 is a graph showing the relationship between voltage and current according to the degree of deterioration of the organic light emitting diode.
9 is a view showing that the degree of deterioration of an organic light emitting diode is reflected in a driving current.
10 is an equivalent circuit diagram of a pixel according to another embodiment of the present invention.
11 is a voltage waveform diagram of control signals applied to Fig.

Hereinafter, preferred embodiments of the present invention will be described with reference to FIGS. 4 to 11. FIG.

4 is a block diagram illustrating an organic light emitting diode display device according to an embodiment of the present invention.

4, an organic light emitting diode display device according to an embodiment of the present invention includes a display panel 10 in which pixels P are arranged in a matrix form, a data driver (not shown) for driving the data lines 14 A scan driver 13A for driving the scan lines 15; an emission driver 13B for driving the emission lines 16; And a timing controller 11 for controlling the operation.

In the display panel 10, a plurality of data lines 14, scan lines 15 and emission lines 16 are intersected with each other, and pixels P are arranged for each of the intersection areas. Each of the pixels P is supplied with a high potential driving voltage Vdd and a reference voltage Vref. Each of the pixels P may be connected to one data line 14, two neighboring scan lines 15, and one emission line 16 as shown in FIG. Each of the pixels P may be connected to one data line 14, two neighboring scan lines 15, and one pair of emission lines 16P as shown in Fig. Here, each of the pair of emission lines 16P includes a first emission line and a second emission line. The high-potential driving voltage (Vdd) is generated at a constant DC level by the high-potential driving voltage source. The reference voltage Vref is generated at a constant DC level by the reference voltage source. The reference voltage Vref is set to a voltage level between the base low voltage and the high potential driving voltage Vdd and can be generally set to a level lower than the threshold voltage of the organic light emitting diode.

The timing controller 11 rearranges the digital video data RGB input from the outside according to the resolution of the display panel 10 and supplies the digital video data RGB to the data driver 12. [ The timing controller 11 also controls the timing of the data driver 12 based on the timing signals such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the dot clock signal DCLK and the data enable signal DE. A data control signal DDC for controlling the operation timing, a scan control signal SDC for controlling the operation timing of the scan driver 13A and an emission control signal for controlling the operation timing of the emission driver 13B Signal EDC.

The data driver 12 converts the digital video data RGB into an analog data voltage (hereinafter, referred to as a data voltage) according to the data control signal DDC and supplies it to the data lines 14.

The scan driver 13A generates a scan signal in accordance with the scan control signal SDC and supplies the scan signal to the scan lines 15. [ The scan driver 13A includes a shift register for shifting the scan signal. The shift register can be formed directly on the display panel 10 according to the GIP (Gate In Panel) method.

The emission driver 13B generates an emission signal according to the emission control signal EDC and supplies it to the emission lines 16. [ The emission driver 13B includes a shift register for shifting the emission signal. The shift register can be formed directly on the display panel 10 according to the GIP (Gate In Panel) method.

Fig. 5 shows an example of a pixel P arranged on the nth horizontal line (n is a positive integer).

Referring to FIG. 5, a pixel P according to an embodiment of the present invention includes an organic light emitting diode (OLED), a driver TFT DT, and a switch circuit SWC.

The gate electrode of the driving TFT DT is connected to the switch circuit SWC through the first node N1 and the source electrode of the driving TFT DT is connected to the high potential driving voltage source VDD, Is connected to the switch circuit SWC through the fourth node N4. The driving TFT DT controls the amount of current flowing in the organic light emitting diode OLED according to its source-gate voltage. Here, the driving TFT DT may be implemented as a P-type MOSFET (Metal-Oxide Semiconductor Field Effect Transistor).

The anode electrode of the organic light emitting diode OLED is connected to the switch circuit SWC via the fifth node N5 and the cathode electrode of the organic light emitting diode OLED is connected to the ground voltage source GND. The organic light emitting diode OLED has the structure shown in FIG. 1, and emits light by a driving current applied through the driving TFT DT.

The switch circuit SWC includes the first to seventh switch TFTs ST1 to ST7 and the first and second capacitors Cst and Cfb.

The gate electrode of the first switch TFT ST1 is connected to the nth scan line 15n to which the nth scan signal SCANn is supplied and the source electrode of the first switch TFT ST1 is connected to the fourth node N4 And the drain electrode of the first switch TFT (ST1) is connected to the first node (N1). The first switch TFT (ST1) samples the threshold voltage of the driver TFT (DT) by switching the current path between the first node (N1) and the fourth node (N4) in response to the nth scan signal (SCANn) .

The gate electrode of the second switch TFT ST2 is connected to the nth scan line 15n to which the nth scan signal SCANn is supplied and the source electrode of the second switch TFT ST2 is connected to the fifth node N5 And the drain electrode of the second switch TFT (ST2) is connected to the second node (N2). The second switch TFT ST2 switches the current path between the second node N2 and the fifth node N5 in response to the nth scan signal SCANn so that the threshold voltage Vtho of the organic light emitting diode OLED ) Is sampled.

The gate electrode of the third switch TFT ST3 is connected to the nth scan line 15n to which the nth scan signal SCANn is supplied and the source electrode of the third switch TFT ST3 is connected to the data voltage Vdata , And the drain electrode of the third switch TFT (ST3) is connected to the third node (N3). The third switch TFT ST3 supplies the data voltage Vdata from the data line 14 to the third node N3 by being turned on in response to the nth scan signal SCANn.

The gate electrode of the fourth switch TFT ST4 is connected to the emission line 16n to which the nth emission signal EMn is supplied and the source electrode of the fourth switch TFT ST4 is connected to the reference voltage source VREF And the drain electrode of the fourth switch TFT (ST4) is connected to the third node (N3). The fourth switch TFT (ST4) turns on in response to the nth emission signal (EMn), thereby supplying the reference voltage (Vref) to the third node (N3).

The gate electrode of the fifth switch TFT ST5 is connected to the nth emission line 16n to which the nth emission signal EMn is supplied and the source electrode of the fifth switch TFT ST5 is connected to the third node N3 , And the drain electrode of the fifth switch TFT (ST5) is connected to the second node (N2). The fifth switch TFT (ST5) turns on in response to the nth emission signal (EMn), thereby supplying the reference voltage (Vref) to the second node (N2).

The gate electrode of the sixth switch TFT ST6 is connected to the nth emission line 16n to which the nth emission signal EMn is supplied and the source electrode of the sixth switch TFT ST6 is connected to the fourth node N4 , And the drain electrode of the sixth switch TFT (ST6) is connected to the fifth node (N5). The sixth switch TFT (ST6) is turned on in response to the nth emission signal (EMn), thereby switching the current path between the fourth node (N4) and the fifth node (N5).

The gate electrode of the seventh switch TFT (ST7) is connected to the (n-1) th scan line (15n-1) to which the n-1th scan signal (SCANn- Is connected to the reference voltage source VREF, and the drain electrode of the seventh switch TFT (ST7) is connected to the first node N1. The seventh switch TFT (ST7) turns on in response to the (n-1) th scan signal SCANn-1, thereby supplying the reference voltage Vref to the first node N1.

The first capacitor Cst is connected between the first node N1 and the third node N3. The second capacitor Cfb is connected between the first node N1 and the second node N2. The first and second capacitors Cst and Cfb reflect the amount of potential change at the second and third nodes N2 and N3 through the voltage distribution to the first node N1.

The operation of the pixel P according to one embodiment of the present invention will be described with reference to FIG. 6 and FIGS. 7A to 7C.

Referring to FIG. 6, the operation of the pixel P according to an embodiment of the present invention may be described by dividing it into a first period to a third period (T1 to T3).

Referring to FIG. 7A, the n-1 scan signal SCANn-1 is generated at the turn-on level, that is, the low logic level L during the first period T1 to turn on the seventh switch TFT ST7 , The nth emission signal EMn is generated at the low logic level L to turn on the fourth to sixth switch TFTs ST4 to ST6. During the first period T1, the n-th scan signal SCANn is generated at the turn-off level, that is, the high logic level H, to turn off the first to third switch TFTs ST1 to ST3.

As a result, the potentials VN1 to VN3 of the first node N1 to the third node n3 are initialized to the reference voltage Vref, respectively.

Referring to FIG. 7B, during the second period T2, the n-1 scan signal SCANn-1 is inverted to the high logic level H to turn off the seventh switch TFT ST7, The scan signal SCANn is turned to the low logic level L to turn on the first to third switch TFTs ST1 to ST3 and the nth emission signal EMn is inverted to the high logic level H, To turn off the sixth switch TFTs (ST4 to ST6). During the second period T2, the data voltage Vdata is supplied to the data line.

As a result, the potential VN1 of the first node N1 is lower than the high-potential driving voltage Vdd by the diode connection of the driving TFT DT (the gate electrode and the drain electrode of the driving TFT DT are short-circuited) (Vdd-Vth) obtained by subtracting the threshold voltage (Vth) of the reference signal (DT). The sampled first calculation value (Vdd-Vth) is stored in the first capacitor (Cst). The potential VN2 of the second node N2 is sampled at the threshold voltage Vtho of the organic light emitting diode OLED. The threshold voltage Vtho of the sampled organic light emitting diode OLED is stored in the second capacitor Cfb. The potential of the third node N3 is programmed to the data voltage Vdata and the programmed data voltage Vdata is stored to the first capacitor Cst.

Referring to FIG. 7C, the n-1 scan signal SCANn-1 is maintained at the high logic level H during the third period T3 to turn off the seventh switch TFT ST7, The scan signal SCANn is inverted to the high logic level H to turn off the first to third switch TFTs ST1 to ST3 and the nth emission signal EMn is inverted to the low logic level L And turns on the fourth to sixth switch TFTs (ST4 to ST6).

As a result, the potentials VN2 and VN3 of the second and third nodes N2 and N3 change to the reference voltage Vref. The sum of the second calculated value (Vdata + Vtho-Vref) corresponding to this variation, that is, the sum of the data voltage (Vdata) and the threshold voltage (Vtho) of the organic light emitting diode (OLED) Vref) of the first node N1 is reflected to the potential VN1 of the first node N1. Accordingly, the potential VN1 of the first node N1 becomes equal to the compensation value {(Vdd-Vth) - (Vdata-Vth)) obtained by subtracting the second calculated value (Vdata-Vtho-Vref) from the first calculated value Vtho-Vref)}.

Since the potential VN1 of the first node N1 is set to the compensation value Vdd-Vth- (Vdata + Vtho-Vref) and the sixth switch TFT ST6 is turned on, the potential of the organic light emitting diode OLED The driving current Ioled flows as shown in the following equation (2).

Here, 'μ' denotes the mobility of the driving TFT DT, 'Cox' denotes the parasitic capacitance of the driving TFT DT, 'W' denotes the channel width of the driving TFT DT, Vth is the threshold voltage of the driving TFT DT, Vdd is the high-level driving voltage, and Vdd is the gate-to-source voltage of the driving TFT DT. 'Vdata' denotes a data voltage, 'Vref' denotes a reference voltage, and 'Vtho' denotes a threshold voltage of the organic light emitting diode (OLED).

Unlike Equation (1), Equation 2 (C) does not include 'Vth' and 'Vdd' in the equation. This means that the driving current Ioled flowing through the organic light emitting diode OLED does not depend on the threshold voltage Vth deviation of the driving TFT DT between pixels and / or the high potential driving voltage Vdd deviation. As a result, even if the threshold voltage (Vth) and / or the high potential driving voltage (Vdd) of the driver TFT (DT) between the pixels is changed, the resulting luminance deviation between the pixels is not generated.

Also, (C) in Equation (2) differs from Equation (1) in the past, and includes 'Vtho' as a factor in the equation. Accordingly, the driving current Ioled flowing through the organic light emitting diode OLED increases in proportion to an increase in the threshold voltage Vtho of the organic light emitting diode OLED. For example, when the threshold voltage Vtho of the organic light emitting diode OLED gradually increases in the order of A <B <C according to the driving time of the organic light emitting diode OLED as shown in FIG. 8, The driving current Ioled flowing in the organic light emitting diode OLED increases in the order of A <B <C. As a result, since the driving current Ioled increases in proportion to the degree of increase of the threshold voltage Vtho of the organic light emitting diode OLED according to Equation 2C, The luminance deviation between the pixels is automatically compensated.

Figs. 10 and 11 show another example of the pixel P arranged on the nth horizontal line (n is a positive integer) and the signal waveform applied to the pixel P. Fig.

The pixel P according to another embodiment of the present invention is connected to the nth emission line pair 16Pn including the n1th emission line 161n and the n2th emission line 162n. The n1th emission line 161n is connected to the gate electrodes of the fourth and fifth switch TFTs ST4 and ST5 and the n2th emission line 162n is connected to the gate electrode of the sixth switch TFT ST6 . The fourth and fifth switch TFTs ST4 and ST5 are switched in accordance with the n1 emission signal EMn1 from the n1th emission line 161n and the sixth switch TFT ST6 is switched in accordance with the n2 emission line And the n2 emission signal EMn2 from the n-th emission control unit 162n. The remaining connection configuration is substantially the same as the connection structure of the pixel P according to the embodiment of the present invention shown in Fig.

As to the operation of the pixel P according to another embodiment of the present invention, the sixth switch TFT ST6 is operated independently of the fourth and fifth switch TFTs ST4 and ST5. That is, during the first period T1, the sixth switch TFT ST6 is turned off unlike the fourth and fifth switch TFTs ST4 and ST5. In the pixel P according to Fig. 5, since the sixth switch TFT ST6 is turned on simultaneously with the fourth and fifth switch TFTs ST4 and ST5 during the first period T1, the undesired timing The organic light emitting diode OLED may emit light during the light emission period. However, in the pixel P according to FIG. 10, the abnormal light emission of the organic light emitting diode OLED can be previously cut off by turning off the sixth switch TFT ST6 during the first period T1. To this end, the n-th second emission signal EMn2 is generated at the turn-off level (high logic level) during the first period T1. The operation of the pixel P according to Fig. 10 is substantially the same as the operation of the pixel P according to Fig. 5, in addition to the above difference.

As described above, according to the organic light emitting diode display device and the driving method of the present invention, the driving current flowing through the organic light emitting diode is not affected by the threshold voltage deviation and / or high potential driving voltage deviation of the driving TFT. As a result, even if the deviations are generated, luminance unevenness phenomenon between the pixels is not caused, so that a dramatic improvement in image quality can be expected compared with the conventional method.

Further, according to the organic light emitting diode display device and the driving method of the present invention, since the driving current increases in proportion to the increase of the threshold voltage of the organic light emitting diode, luminance unevenness due to the deterioration of the organic light emitting diode between the pixels is automatically It is possible to expect remarkable image quality improvement compared to the conventional one.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. For example, in the embodiment of the present invention, only the case where the TFT is implemented as a P-type MOSFET has been described. However, the technical idea of the present invention is not limited to this and can be applied to an N-type MOSFET and a C-type MOSFET (CMOS) Of course. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10: Display panel 11: Timing controller
12: Data driver 13A: Scan driver
13B: Emission driver 14: Data line
15: Scan line 16: Emission line

Claims (10)

An organic light emitting diode (OLED) emitting light by a driving current flowing between a high potential driving voltage source generating a high potential driving voltage and a base voltage source;
A driving TFT having a gate electrode connected to a first node and a source electrode connected to the high potential driving voltage source, the driving TFT controlling the driving current according to a source-gate voltage; And
And a switch circuit connected to the driving TFT and the organic light emitting diode and reflecting the high potential driving voltage, the threshold voltage of the driving TFT, and the threshold voltage of the organic light emitting diode to the first node,
The switch circuit includes:
A first switch TFT connected between the first node and a drain electrode of the driving TFT;
A second switch TFT connected between the second node and the organic light emitting diode;
A third switch TFT connected between a data line to which a data voltage is applied and a third node;
A fourth switch TFT connected between the reference voltage source and the third node;
A fifth switch TFT connected between the second node and the third node;
A sixth switch TFT connected between the driving TFT and the organic light emitting diode;
A seventh switch TFT connected between the reference voltage source and the first node;
A first capacitor connected between the first node and the third node; And
And a second capacitor connected between the first node and the second node. delete The method according to claim 1,
A gate electrode of each of the first to third switch TFTs is connected to an n-th scan line to which an n-th scan signal is applied;
A gate electrode of each of the fourth to sixth switch TFTs is connected to an nth emission line to which an nth emission signal is applied;
And the gate electrode of the seventh switch TFT is connected to the (n-1) th scan line to which the (n-1) th scan signal is applied. The method of claim 3,
During the first period, the n-1 scan signal and the nth emission signal are maintained at the turn-on level and the n-th scan signal is maintained at the turn-off level;
The nth scan signal and the nth emission signal are maintained at a turn-off level and the nth scan signal is maintained at a turn-on level during a second period subsequent to the first period;
And the n-th scan signal is maintained at a turn-off level and the n-th emission signal is maintained at a turn-on level during a third period subsequent to the second period. The method according to claim 1,
A gate electrode of each of the first to third switch TFTs is connected to an n-th scan line to which an n-th scan signal is applied;
A gate electrode of each of the fourth and fifth switch TFTs is connected to an n1-th emission line to which an n1-emission signal is applied;
A gate electrode of the sixth switch TFT is connected to an n2-th emission line to which an n-th emission signal is applied;
And the gate electrode of the seventh switch TFT is connected to the (n-1) th scan line to which the (n-1) th scan signal is applied. 6. The method of claim 5,
During the first period, the n-1 scan signal and the n1 emission signal are maintained at the turn-on level and the n-th scan signal and the n2 emission signal are maintained at the turn-off level;
The n-1 scan signal and the n1 and n2 emission signals are maintained at a turn-off level and the n-th scan signal is maintained at a turn-on level during a second period subsequent to the first period;
And the n-1 and the n-th scan signals are maintained at a turn-off level and the n1 and n2 emission signals are maintained at a turn-on level during a third period subsequent to the second period. The method according to claim 1,
Wherein the driving current is expressed by the following equation.

Here, 'Ioled' denotes the driving current, 'μ' denotes a mobility of the driving TFT, 'Cox' denotes a parasitic capacitance of the driving TFT, 'W' denotes a channel width of the driving TFT, 'Vdd' is the high-potential driving voltage, and 'Vdata' is the gate-to-gate voltage difference of the driving TFT, 'Vth' is the threshold voltage of the driving TFT, 'Denotes a data voltage,' Vref 'denotes a reference voltage by the reference voltage source, and' Vtho 'denotes a threshold voltage of the organic light emitting diode. An organic light emitting diode that emits light by a driving current flowing between a high potential driving voltage source and a base voltage source for generating a high potential driving voltage, a gate electrode connected to the first node, and a source electrode connected to the high potential driving voltage source, A drive TFT for controlling the drive current in accordance with a voltage between gates and a switch circuit connected to the first node and the second and third nodes different from the first node and for controlling the potential of the first node A driving method of an organic light emitting diode display device,
Initializing a potential of the first to third nodes to a reference voltage level during a first period;
A first calculation value obtained by subtracting a threshold voltage of the driving TFT from the high potential driving voltage is applied to the first node during a second period subsequent to the first period and a threshold voltage of the organic light emitting diode is applied to the second node Applying a data voltage to the third node; And
For a third period subsequent to the second period, by varying the potential of the second and third nodes to the reference voltage level and reflecting a second calculated value according to the variation to the first node, Setting a potential to a compensation value obtained by subtracting the second calculation value from the first calculation value;
Wherein the second operation value indicates a value obtained by subtracting the reference voltage from a sum of a data voltage and a threshold voltage of the organic light emitting diode. 9. The method of claim 8,
Wherein a current path between the driving TFT and the organic light emitting diode is interrupted during the first period. 9. The method of claim 8,
Wherein the driving current is expressed by the following equation.

Here, 'Ioled' denotes the driving current, 'μ' denotes a mobility of the driving TFT, 'Cox' denotes a parasitic capacitance of the driving TFT, 'W' denotes a channel width of the driving TFT, 'Vdd' is the high-potential driving voltage, and 'Vdata' is the gate-to-gate voltage difference of the driving TFT, 'Vth' is the threshold voltage of the driving TFT, 'Denotes the data voltage,' Vref 'denotes the reference voltage, and' Vtho 'denotes a threshold voltage of the organic light emitting diode.

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