KR101610724B1 - Simulation apparatus for estimating emi acceptable level of semiconductor level and method thereof - Google Patents

Abstract

The present invention relates to a simulation apparatus and a simulation method for estimating an EMI acceptable level of a semiconductor level. The present invention includes: a simulation model generation unit generating an electrical schematic by combining pre-stored printed circuit Board (PCB), IBIS, and noise source models; and a simulation unit obtaining waveform information corresponding to input noise source setting information from the noise source model, applying the obtained waveform information to the electrical schematic generated by the simulation model generation unit, obtaining a current spectrum by fourier transform of a current waveform output from the electrical schematic, obtaining an electromagnetic wave intensity by performing electromagnetic field interpretation by using the obtained current spectrum, and determining noise source information satisfying a system electromagnetic compatibility (EMC) environment by comparing the obtained electromagnetic wave intensity to a pre-set electromagnetic interference (EMI) level standard limit.

Description

TECHNICAL FIELD [0001] The present invention relates to a simulation apparatus and a method for estimating an EMI level of a semiconductor level,

[0001] The present invention relates to a simulation apparatus and method for estimating an EMI level of a semiconductor level, and more particularly, to a simulation apparatus and method for estimating an EMI level of a semiconductor level, To a simulation apparatus and method for estimating an EMI level of a semiconductor level that determines the current / voltage / power specification of a semiconductor that meets the system EMC environment while varying noise source information in the coupled electrical schematic .

In recent years, as the use of electronic products and semiconductor integrated circuits has increased, related products therefor have been diversified. As the frequency of use increases with the development of technology, PI (Power Integrity, Power Integrity, ) / EMI (Electro Magnetic Interference) problems are increasing.

Especially, in the case of EMI, when spurious and noise components generated in circuits and systems of related products are radiated to the outside, it acts as a jamming signal to other electronic systems. Therefore, If the EMI emission exceeds the standard, the product is prohibited from being sold. Therefore, the time and effort required to obtain approval for the EMI standard is increasing.

Until now, we have concentrated on EMI analysis and measurement technology for package and printed circuit board (PCB) mounted on products to solve EMI problem.

However, as the frequency becomes higher, it is difficult to solve the EMI problem only by the technique of the package (package) and the PCB. Therefore, it is necessary to consider not only the package and the PCB but also the semiconductor element (chip) which becomes the source of the EMI.

Accordingly, interest in EMI simulation considering a semiconductor element (chip) has been increasing in recent years, and ICEM (Integrated Circuit Electromagnetic Model), which is an equivalent model for EMI analysis of a product including a semiconductor element (chip) .

However, since ICEM can not be modeled by chip makers or chip developers who have schematic and layout information, system manufacturers can not perform EMI simulation using ICEM when developing new products. Therefore, IBIS (I / O Buffer Information Specification) model and PCB model, but it is difficult to accurately predict the EMI. Therefore, additional development period and cost are required for satisfying EMC after system fabrication.

Korean Patent Publication No. 2012-0101873, entitled " Apparatus and method for predicting radiated electromagnetic waves in a cable "

An object of the present invention is to provide a simulation apparatus and method for estimating EMI level of a semiconductor level that enables a system developer to easily construct a simulation model that can predict an EMC environment by replacing ICEM, which is difficult to implement, with a noise source model. .

Another object of the present invention is to provide a simulation apparatus and method for estimating an EMI tolerance level at a semiconductor level capable of determining a current / voltage / power specification as well as an EMI tolerance level of a semiconductor satisfying a system EMC environment before system development have.

According to an aspect of the present invention, there is provided an apparatus for generating an electrical schematic, comprising: a simulation model generation unit that combines a previously stored PCB (Printed Circuit Boards) model, an IBIS model, and a noise source model to generate an electrical schematic; Acquiring waveform information corresponding to the source setting information from the noise source model, applying the obtained waveform information to the electric circuit generated by the simulation model generation unit, and performing a Fourier transform (Electro Magnetic Compatibility) level limit by comparing the obtained electromagnetic wave intensity with a predetermined EMI (Electro Magnetic Interference) level specification limit, thereby obtaining the electromagnetic spectrum of the electromagnetic spectrum, Simulation that determines the noise source information satisfying the environment There is provided a simulation apparatus for estimating an EMI tolerance level at a semiconductor level including a simulation unit.

The simulation apparatus for estimating the EMI level of the semiconductor level includes a noise source model in which waveform information for at least one noise source among current, voltage, and power for each semiconductor is defined, an IBIS model, a PCB model And a storage unit in which at least one of the storage unit and the storage unit is stored.

Wherein the noise source model is implemented in at least one of a piecewise linear wave, a sine wave, a saw wave, and a square wave, At least one of a peak value, a period, and a frequency with respect to at least one noise source.

The noise source setting information may include at least one of a waveform type, a peak value for a noise source, a period, and a frequency.

The simulation model generation unit arranges the semiconductor devices at corresponding positions of the transmission line defined on the PCB model, creates an equivalent circuit indicating the electrical connection relationship between the semiconductor devices, and implements the IBIS model and the noise source model Routed electrical circuits can be created as a simulation model.

The simulation unit may apply the waveform information obtained from the noise source model to the electric circuit, and obtain the current waveform using the IBIS model for each semiconductor element.

Wherein the simulation unit determines the noise source setting information as noise source information satisfying the system EMC environment when the obtained electromagnetic wave intensity is equal to or higher than the EMI level specification limit and if the electromagnetic noise intensity is not higher than the EMI level specification limit, And the electromagnetic wave intensity obtained by the simulation can be compared with the EMI level specification limit.

According to another aspect of the present invention, there is provided a method for estimating an EMI tolerance level at a semiconductor level, the simulation apparatus comprising: (a) combining an already stored PCB model, IBIS model and noise source model to generate an electrical schematic (B) acquiring, from a noise source model, waveform information corresponding to the noise source setting information input from the user; (c) applying the obtained waveform information to the generated electric circuit, (D) obtaining electromagnetic wave intensity by performing electromagnetic field analysis using the obtained current spectrum; (e) comparing the obtained electromagnetic wave intensity with a predetermined EMI level specification limit Determines the noise source information satisfying the system EMC environment according to the comparison result, There is provided a method for EMI level estimation at a semiconductor level, comprising the steps of:

The step (c) includes the steps of: applying the obtained waveform information to a corresponding semiconductor element of an electric circuit, obtaining a current waveform using an IBIS model for each semiconductor element, performing a Fourier transform on the obtained current waveform, And a step of acquiring the information.

Wherein the step (e) includes the steps of: determining whether the obtained electromagnetic wave intensity is equal to or greater than a predetermined EMI level specification limit; if the electromagnetic wave intensity is equal to or greater than the EMI level specification limit, Determining the satisfactory noise source information, and if the intensity of the electromagnetic wave is not equal to or higher than the EMI level specification limit, changing the noise source setting information and performing the step from step (b) again.

According to the present invention, it is possible to easily and comfortably construct the simulation model by replacing the ICEM, which is difficult to implement, with the noise source model, so that the system EMC environment can be predicted effectively before the system is manufactured.

In addition, it is possible to vary the noise source information in the electric circuit combining the PCB model, the IBIS model and the noise source model, so that it is possible to estimate the EMI tolerance level of the semiconductor satisfying the system EMC environment and to determine the current / voltage / have.

In addition, EMI simulation that considers semiconductors can be performed quickly and effectively for various input data patterns.

1 is a block diagram schematically illustrating a configuration of a simulation apparatus for estimating EMI level of a semiconductor level according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating a method for estimating an EMI level of a semiconductor level by a simulation apparatus according to an embodiment of the present invention. Referring to FIG.

The foregoing and other objects, features, and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a 'simulation apparatus and method for estimating an EMI (Electro Magnetic Interference) tolerance level at a semiconductor level' according to the present invention will be described in detail with reference to the accompanying drawings. The embodiments are provided so that those skilled in the art can easily understand the technical spirit of the present invention, and thus the present invention is not limited thereto. In addition, the matters described in the attached drawings may be different from those actually implemented by the schematic drawings to easily describe the embodiments of the present invention.

In the meantime, each constituent unit described below is only an example for implementing the present invention. Thus, in other implementations of the present invention, other components may be used without departing from the spirit and scope of the present invention. In addition, each component may be implemented solely by hardware or software configuration, but may be implemented by a combination of various hardware and software configurations performing the same function. Also, two or more components may be implemented together by one hardware or software.

Also, the expression " comprising " is intended to merely denote that such elements are present as an expression of " open ", and should not be understood to exclude additional elements.

1 is a block diagram schematically illustrating a configuration of a simulation apparatus for estimating EMI level of a semiconductor level according to an embodiment of the present invention.

1, a simulation apparatus (hereinafter referred to as a simulation apparatus) 100 for estimating an EMI level of a semiconductor level includes a Printed Circuit Boards (PCB) model generation unit 110, a storage unit 120, a simulation model A generating unit 130, a simulation unit 140, and a control unit 150.

The PCB model generation unit 110 forms a transmission line for arranging and connecting the semiconductor elements based on the PCB layout information and transmits a semiconductor element or a parasitic element (for example, R, L, C, G, Zo, and so on). At this time, the generated PCB model may be an equivalent circuit generated based on, for example, SPICE (Simulation Program with Integrated Circuit Emphasis). Here, the semiconductor element is a term encompassing a semiconductor, a chip, an IC, an integrated circuit, a semiconductor chip, and the like, and the transmission line includes a signal wiring and a power wiring.

A noise source model 122, an IBIS (I / O Buffer Information Specification) model 124, a PCB model 126, and the like are stored in the storage unit 120.

The noise source model 122 defines waveform information for at least one noise source of current, voltage, and power for each semiconductor pin. The noise source model 122 is implemented in the form of a piecewise linear wave, a sine wave, a saw wave, a square wave, etc., A peak value, a period, a frequency, and the like. The noise source includes current, voltage, power, and the like.

The IBIS model 124 is a model that models the shape of a signal waveform coming from each terminal of a semiconductor and measures the shape of a digital waveform coming from each semiconductor terminal and is organized into text data. The IBIS model 124 increases the clock speed of the digital integrated circuit and increases the transmission line effect on the PCB due to the high frequency signal and fast signal integrity analysis such as line interference phenomenon and ringing phenomenon (VI) and voltage-time (VT) information of a digital input / output pin in a table form. The packaging parasitics (R, L, C parasitic component), and ESD prevention circuit. The IBIS model 124 is provided by the chip manufacturer.

The PCB model 126 may be a PCB model generated by the PCB model generation unit 110.

The storage unit 120 stores a program necessary for controlling the operation of the simulation apparatus 100 and data generated during the execution of the program. The storage unit 120 may include various types of memory devices.

The simulation model generation unit 130 includes a PCB model 126 including PCB layout based parasitic information, an IBIS model 124 including package and lead frame based parasitic information, Noise source model 122 to generate an electrical schematic. That is, the simulation model generation unit 130 arranges the semiconductor devices at corresponding positions of the transmission line defined on the PCB model, and generates an electrical schematic representing the electrical connection relation between the semiconductor devices as a simulation model do. At this time, the IBIS model and the noise source model of each semiconductor device are routed on the electric circuit.

The simulation unit 140 acquires waveform information corresponding to the noise source setting information input by the user from the noise source model 122 and applies the obtained waveform information to the electric circuit generated in the simulation model generation unit 130 And the electromagnetic wave intensity is obtained by performing an electromagnetic field analysis using the current spectrum to obtain the electromagnetic wave intensity, and the obtained electromagnetic wave intensity is converted into a predetermined EMI (Electro Magnetic Interference) level standard The noise source information satisfying the system EMC (Electro Magnetic Compatibility) environment is determined.

That is, when the user inputs the noise source setting information including the semiconductor element, the waveform type, the peak value of the current / voltage / power, the period, and the frequency and inputs the simulation command, the simulation unit 140 outputs the input noise From the noise source model 122, waveform information corresponding to the source setting information. At this time, the waveform information obtained from the noise source model 122 is a wave corresponding to the waveform form of the noise source setting information, for example, a piecewise linear wave, a sine wave, a saw wave, and a square wave, and the wave includes information on a peak value, a period, a frequency, and the like of a current / voltage / power inputted by a user as noise source setting information.

Then, the simulation unit 140 applies the waveform information obtained from the noise source model 122 to the corresponding semiconductor element of the electric circuit, and uses the IBIS model 124 for each of the semiconductor elements arranged in the electric circuit, The current waveform finally output from the circuit is obtained. That is, since each semiconductor element disposed in the electric circuit is routed to the corresponding IBIS model 124 and current waveform information derived from each semiconductor element is defined in the IBIS model 124, the simulation unit 140 is connected to the electric circuit Current waveform information output from the arranged semiconductor devices can be obtained from the IBIS model 124 routed with the semiconductor devices. Therefore, the simulation unit 140 can apply the current waveform information output from the first semiconductor element to the second semiconductor element in the following order according to the signal wiring of the electric circuit, and finally obtain the current waveform output from the electric circuit . At this time, the current waveform output from the electric circuit may be information obtained by a time domain analysis.

Then, the simulation unit 140 obtains a current spectrum by Fourier transforming the current waveform output from the electric circuit, and performs electromagnetic field analysis using the current spectrum to obtain the electromagnetic wave intensity. That is, the simulation unit 140 obtains a current spectrum capable of analyzing the conducted emission by Fast Fourier Transform (Fourier Transform) or Fourier Transform (Fourier Transform) of the current waveform analyzed in the time domain. Then, the simulation unit 140 performs the electromagnetic field analysis by solving the Maxwell Equation. Then, the intensity of the electromagnetic wave including the distribution of the E field and the H field and the amount thereof can be obtained. At this time, the obtained electromagnetic wave intensity may be radiated emission that is radiated into the air in the form of electromagnetic waves.

When the electromagnetic wave intensity is obtained, the simulation unit 140 compares the obtained electromagnetic wave intensity with a predetermined EMI level specification limit. Here, the EMI level specification limit is a value determined to determine the EMI tolerance level of the semiconductor, and may be based on international regulations, domestic regulations, environmental regulations, industrial regulations, and the like.

If the electromagnetic wave intensity is above the EMI level specification limit, the simulation unit 140 determines the noise source setting information at that time as the noise source information satisfying the system EMC environment and sets the EMI level specification limit at this time to the EMI tolerance level Can be estimated. Here, satisfying the system EMC environment can reduce the noise generated in the system so as not to affect the operation of the other system (electronic equipment), while also reducing the noise influence It is designed to block.

If the electromagnetic wave intensity is not higher than the EMI level specification limit, the simulation unit 140 changes the noise source setting information and performs the simulation again. That is, if the electromagnetic wave intensity is not higher than the EMI level specification limit, the simulation unit 140 outputs a signal (message) indicating that the system EMC environment is dissatisfied. Then, the user changes the waveform type, the peak value of the current / voltage / power, the period, and the frequency of the semiconductor, and the simulation unit 140 calculates the waveform type, the peak value of the current / voltage / Cycle, frequency, and the like to the noise source setting information and perform the simulation again.

The simulation unit 140 outputs the noise source information (that is, the waveform type, the peak value of the current / voltage / power, the period of the period, and the period of the period) in the electric circuit in which the PCB model 126, the IBIS model 124 and the noise source model 122 are combined. , Frequency, etc.), while performing time domain analysis, frequency domain analysis, and electromagnetic field analysis (E field and H field). Accordingly, the simulation unit 140 can predict the system EMC environment according to the noise source variable and determine the current / voltage / power specification at that time as well as the EMI tolerance level estimation of the semiconductor satisfying the system EMC environment. The current / voltage / power specification may include peak value, period, frequency, etc. of current / voltage / power.

The control unit 150 controls the overall function of the simulation apparatus 200 by executing a driving program stored in the storage unit 120 according to an instruction of a user of the simulation apparatus input through an input unit (not shown).

The control unit 150 controls the operation of various components of the simulation apparatus 100 including the PCB model generation unit 110, the storage unit 120, the simulation model generation unit 130, and the simulation unit 140 to be.

The control unit 150 may include at least one computing unit, which may be a general purpose central processing unit (CPU), programmable device elements (CPLDs, FPGAs) that are suitably implemented for a particular purpose, Device (ASIC) or a microcontroller chip.

These components that the simulation apparatus 100 may include may be implemented by hardware, software, or a combination thereof, and two or more components may be implemented simultaneously by one hardware or software.

Meanwhile, the simulation apparatus 100 according to the present embodiment may be operated based on a computing system. That is, each component constituting the simulation apparatus 100 according to the present embodiment can be implemented to be operated on a computing system.

FIG. 2 is a diagram illustrating a method for estimating an EMI level of a semiconductor level by a simulation apparatus according to an embodiment of the present invention. Referring to FIG.

Referring to FIG. 2, the simulation apparatus combines the previously stored PCB model, the IBIS model, and the noise source model to generate an electrical schematic (S202). That is, the simulation apparatus creates an equivalent circuit showing the electrical connection relation according to the arrangement and wiring of the semiconductor elements defined on the PCB model, and creates an electric circuit in which the IBIS model and the noise source model are routed to the corresponding positions of the equivalent circuit do.

Then, when the user inputs noise source setting information including a semiconductor element, a waveform type, a peak value of current / voltage / power, a period, and frequency (S204), the simulation apparatus calculates waveform information From the noise source model (S206).

The simulation apparatus applies the waveform information obtained from the noise source model to the electric circuit generated in step S202 (S208), and obtains a current waveform of the electric circuit wiring using the IBIS model (S210). That is, the simulation apparatus applies the waveform information obtained from the noise source model to the corresponding semiconductor element of the electric circuit, and obtains the current waveform by SPICE using the IBIS model for each semiconductor element.

The simulation apparatus performs Fourier transform on the current waveform obtained in step S210 to obtain a current spectrum (S212), and electromagnetic field strength is obtained by using the current spectrum (S214). At this time, the simulation apparatus performs the electromagnetic field analysis by solving the Maxwell Equation to obtain the electromagnetic field intensity including the distribution of the E field and the H field and the amount thereof.

The simulation apparatus determines whether the obtained electromagnetic wave intensity is equal to or higher than a predetermined EMI level specification limit (S216).

If it is determined in step S216 that the electromagnetic wave intensity is above the EMI level specification limit, the simulation apparatus determines the noise source setting information as the noise source information satisfying the system EMC environment (S218).

If it is determined in step S216 that the electromagnetic wave intensity is not equal to or greater than the EMI level specification limit, the simulation apparatus changes the noise source setting information (S220) and performs step S206.

The simulation device can predict the system EMC environment by varying the noise source in the electric circuit combining the PCB model, the IBIS model and the noise source model. The simulation device can predict the peak value of the current / voltage / power at the semiconductor level for satisfying the system EMC environment, , The maximum allowable value for the frequency can be predicted.

Herein, the signal waveform output from the semiconductor is described as the current waveform, but it is apparent that signal waveforms such as voltage and power are also possible.

The method for estimating the EMI level of the semiconductor level can be written in a program, and the codes and code segments constituting the program can be easily deduced by a programmer in the field. In addition, a program for a method for estimating EMI tolerance level at a semiconductor level can be stored in an electronic device readable medium, readable and executed by an electronic device.

Thus, those skilled in the art will appreciate that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: simulation apparatus 110: PCB model generation unit
120: storage unit 130: simulation model generation unit
140: Simulation unit 150:

Claims (10)

A simulation model generation unit that combines a previously stored Printed Circuit Boards (PCB) model, an IBIS (I / O Buffer Information Specification) model, and a noise source model to generate an electrical schematic; And
Acquiring waveform information corresponding to the inputted noise source setting information from the noise source model, applying the obtained waveform information to the electric circuit generated by the simulation model generation unit, and applying a Fourier transform (Electromagnetic interference) level limit of the electromagnetic wave intensity, and the electromagnetic wave intensity is obtained by performing an electromagnetic field analysis using the obtained current spectrum to obtain a system EMC (Electro Magnetic Interference) level limit by comparing the obtained electromagnetic wave intensity with a predetermined EMI (Electro Magnetic Interference) A simulation unit for determining noise source information satisfying a magnetic compatibility environment;
A simulation apparatus for estimating an EMI level of a semiconductor level, comprising:
Wherein the simulation unit determines the noise source setting information as noise source information satisfying the system EMC environment when the obtained electromagnetic wave intensity is equal to or higher than the EMI level specification limit and changes the noise source setting information And the electromagnetic wave intensity obtained by the simulation is compared with the EMI level specification limit.
The method according to claim 1,
And a PCB model generated based on any one of a noise source model, IBIS model, and PCB layout information in which waveform information for a noise source of at least one of current, voltage, and power for each semiconductor is defined For EMI-tolerant level estimation at a semiconductor level.
The method according to claim 1,
The noise source model is implemented in the form of at least one of a piecewise linear wave, a sine wave, a saw wave, and a square wave, And a peak value, a period, and a frequency with respect to at least one noise source of the EMI level.
The method according to claim 1,
Wherein the noise source setting information includes at least one of a peak value, a period, and a frequency with respect to at least any one of a semiconductor device, a waveform type, and a noise source.
The method according to claim 1,
The simulation model generation unit routes the semiconductor device and the IBIS model of the semiconductor device to a corresponding position of the transmission line defined on the PCB model to generate an electrical circuit indicating an electrical connection relationship between the semiconductor devices, And the noise source model is routed to generate a simulation model.
The method according to claim 1,
Wherein the simulation unit applies the waveform information obtained from the noise source model to the electric circuit and obtains the current waveform using the IBIS model for each semiconductor element.
delete A method of estimating an EMI tolerance level at a semiconductor level in a simulation apparatus,
(a) combining the previously stored PCB model, the IBIS model, and the noise source model to generate an electrical circuit;
(b) acquiring, from a noise source model, waveform information corresponding to the noise source setting information input from the user;
(c) applying the obtained waveform information to the generated electric circuit, and Fourier-transforming a current waveform output from the electric circuit to obtain a current spectrum;
(d) obtaining electromagnetic wave intensity by performing electromagnetic field analysis using the obtained current spectrum; And
(e) comparing the obtained electromagnetic wave intensity with a predetermined EMI level specification limit, determining noise source information satisfying a system EMC environment according to a result of the comparison, or changing the noise source setting information, ;
A method for EMI tolerance level estimation at a semiconductor level comprising:
The step (e)
Determining whether the calculated electromagnetic wave intensity is equal to or higher than a predetermined EMI level specification limit; And
If it is determined that the electromagnetic wave intensity is equal to or higher than the EMI level specification limit, the noise source setting information is determined as noise source information satisfying the system EMC environment. If the electromagnetic noise intensity is not higher than the EMI level specification limit, b) repeating the steps from step b). < RTI ID = 0.0 > 11. < / RTI >
9. The method of claim 8,
The step (c)
Applying the obtained waveform information to a corresponding semiconductor element of an electric circuit, and obtaining a current waveform using an IBIS model for each semiconductor element; And
And a step of Fourier transforming the obtained current waveform to obtain a current spectrum.
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