KR101406955B1 - Solar cell and method for manufacturing the same - Google Patents

Abstract

The present invention relates to a solar cell and a method for manufacturing the same. A solar cell according to the present invention includes a silicon substrate (100) which has a front surface where a pattern (P1) is formed; an insulating layer (200) including SiOx which is formed on the front surface of the silicon substrate (100) except the pattern (P1); an anti-reflection layer (300) including SiNx which is formed on the insulating layer (200); a frontside electric field layer (130) which is formed by diffusing n-type or p-type impurities into the pattern (P1); an intrinsic amorphous silicon layer (400) and a conductive amorphous silicon layer (500) which are successively formed on the backside of the silicon substrate (100); a frontside electrode (700) which is formed in the pattern (P1); and a backside electrode (800) which is formed on the backside of the conductive amorphous silicon layer (500).

Description

SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME

The present invention relates to a solar cell and a manufacturing method thereof. More specifically, due to the intrinsic amorphous silicon layer and the conductive amorphous silicon layer formed on the entire front and rear surfaces, in which the amount of received light is increased by the front electrode formed in a depressed shape and the high concentration doping is selectively performed on the entire surface, And more particularly, to a solar cell having improved photoelectric conversion efficiency by increasing an open-circuit voltage and a method of manufacturing the same.

Solar cell is a core element of solar power generation that converts sunlight into electricity, and its application range is very wide. Even when the photoelectric conversion efficiency is excellent, such a solar cell is limited to about 20%, and most of the remaining light is transmitted or reflected and is lost. In order to increase the efficiency of such a solar cell, it is very important to minimize the reflection of sunlight on the surface of the solar cell while maximizing the number of photons reaching the solar cell.

As one of the methods for maximizing the number of photoelectrons, a method of performing photoelectric conversion by absorbing sunlight of a wide range of sunlight, that is to say, a sunlight range, has attracted attention. An example is the formation of a local back surface field layer of a solar cell that contributes to photoelectric conversion of light in the long wavelength band of sunlight.

In a conventional solar cell, a back surface layer is formed by printing Al or the like on the rear surface of a crystalline p-type substrate and forming a crystalline p ⁺ layer in which Al impurity is diffused through a sintering process. The conventional backside front layer has the effect of passivating the backside, but since it is based on crystalline silicon having a small energy band gap, the effect of controlling the open-circuit voltage is insufficient, There was a problem.

On the other hand, studies for lowering the resistance of a semiconductor substrate and an electrode for improving photoelectric conversion efficiency have been actively carried out. Particularly, in the electrode forming technique, it is important to control the aspect ratio, the electrode density, It is becoming a challenge.

In a conventional solar cell, high concentration doping is performed on the entire surface of an n-type or p-type silicon substrate to form an n ⁺ or p ⁺ silicon layer. Since high concentration doping is performed on the entire surface of the silicon substrate, there is a problem that the sheet resistance is increased and the photoelectric conversion efficiency is adversely affected.

SUMMARY OF THE INVENTION Accordingly, the present invention has been made to solve the above-mentioned problems occurring in the prior art, and it is an object of the present invention to provide a solar cell having an intrinsic amorphous silicon layer and a conductive amorphous silicon layer, And to provide a solar cell capable of passivating and a manufacturing method thereof.

It is another object of the present invention to provide a solar cell in which high concentration doping is selectively performed on a silicon substrate and the surface resistance with the front electrode is controlled to improve the photoelectric conversion efficiency and a method of manufacturing the same.

The above object of the present invention can be achieved by a semiconductor device comprising: a silicon substrate having a pattern formed on its front surface; An insulating layer including silicon oxide (SiO _x ) formed on a front surface of the silicon substrate excluding the pattern; An anti-reflection layer comprising silicon nitride (SiN _x ) formed on the insulating layer; A front whole layer formed by diffusing n-type or p-type impurities into the pattern; An intrinsic amorphous silicon layer and a conductive amorphous silicon layer sequentially formed on the back surface of the silicon substrate; A front electrode formed in the pattern; And a rear electrode formed on the rear surface of the conductive amorphous silicon layer.

And an auxiliary front layer formed by implanting n-type or p-type impurities on the silicon substrate.

And a transparent conductive layer including a transparent conductive oxide (TCO) between the conductive amorphous silicon layer and the rear electrode.

The n-type impurity is N, P, As, Sb, Bi, P 2 O 5, POCl 3, As (C 2 H 5) 3, As (CH 3) 3, Bi (C 6 H 5) 3, Bi ( CH ₃ ) ₃ or Bi (tmhd) ₃ , and the p-type impurity may include at least one of B, Al, Ga, In and Tl.

The front electrode may be formed of a plurality of layers including at least one of Sn, Ni, Cu, Ag, Au, Ti, Cr, Pd, Pb and Al.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of: (a) forming a pattern by irradiating a first laser onto a front surface of a silicon substrate; (b) forming a texturing structure on at least one surface of a front surface or a back surface of the silicon substrate; (c) implanting n-type or p-type impurity into the pattern to form a front whole layer; (d) forming an insulating layer including silicon oxide (SiO _x ) on the entire surface of the silicon substrate; (e) forming an antireflective layer including silicon nitride (SiN _x ) on the insulating layer; (f) irradiating a second laser to remove the insulating layer and the anti-reflection layer formed on the pattern; (g) sequentially forming an intrinsic amorphous silicon layer and a conductive amorphous silicon layer on the back surface of the silicon substrate; And (h) forming a front electrode on the pattern, and forming a rear electrode on the rear surface of the conductive amorphous silicon layer.

According to the present invention, an intrinsic amorphous silicon layer and a conductive amorphous silicon layer are formed on the back surface of a solar cell to increase the open voltage and to passivate the back surface of the solar cell.

Also, according to the present invention, it is possible to improve the photoelectric conversion efficiency by performing high-concentration doping on the silicon substrate and controlling the surface resistance with the front electrode.

In addition, according to the present invention, the amount of received light can be increased by the front electrode formed in a depressed shape, so that the photoelectric conversion efficiency can be improved.

1 to 8 are views sequentially illustrating a manufacturing process of a solar cell according to an embodiment of the present invention.
9 is a view illustrating a solar cell according to another embodiment of the present invention.

The following detailed description of the invention refers to the accompanying drawings, which illustrate, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It should be understood that the various embodiments of the present invention are different, but need not be mutually exclusive. For example, certain features, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the invention in connection with an embodiment. It is also to be understood that the position or arrangement of the individual components within each disclosed embodiment may be varied without departing from the spirit and scope of the invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is to be limited only by the appended claims, along with the full scope of equivalents to which such claims are entitled, if properly explained. In the drawings, like reference numerals refer to the same or similar functions throughout the several views, and length and area, thickness, and the like may be exaggerated for convenience.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that those skilled in the art can easily carry out the present invention.

In the following detailed description, only a part of the solar cell is shown in cross section for convenience of explanation.

1 to 8 are views sequentially illustrating a manufacturing process of a solar cell according to an embodiment of the present invention.

First, the structure of the solar cell shown in Fig. 8 will be briefly described and a manufacturing method will be described.

A solar cell according to an embodiment of the present invention includes a silicon substrate 100, a front surface field layer 130, an insulating layer 200, an antireflection layer 300, an intrinsic amorphous silicon layer a conductive layer 400, a conductive amorphous silicon layer 500, a front electrode 700, and a rear electrode 800.

The silicon substrate 100 may be an n-type silicon substrate 100 or a p-type silicon substrate 100. Hereinafter, an n-type silicon substrate 100, more specifically, an n-type Czochralski silicon (CzSi) substrate 100 will be described. A texturing structure 110 may be formed on the surface of the n-type silicon substrate 100.

The entire front layer 130 in which impurities of the conductive type such as the conductivity type of the silicon substrate 100 are diffused at a high concentration may be formed in the pattern P1 (see FIG. 7A) of the silicon substrate 100 . That is, in the case of the n-type silicon substrate 100, the n + -type front layer 120 is formed by injecting the Group 15 element of high concentration into the n-type impurity. In the case of the p-type silicon substrate 100, Can be injected as a p-type impurity to form a p + whole front layer.

A front insulating layer 200 including silicon oxide (SiO _x ) and an antireflection layer 300 including silicon nitride (SiN _x ) may be sequentially formed on the front surface of the silicon substrate 100 except for the pattern P1. have.

The intrinsic amorphous silicon layer 400 and the conductive amorphous silicon layer 500 may be sequentially formed on the rear surface of the silicon substrate 100. [ The conductive amorphous silicon layer 500 may be doped with a conductive impurity opposite to that of the conductive type to the silicon substrate 100. That is, the p-type amorphous silicon layer 500 can be formed in the case of the n-type silicon substrate 100 and the n-type amorphous silicon layer 500 can be formed in the case of the p-type silicon substrate 100 have.

A front electrode 700 may be formed in the pattern P1 and a rear electrode 800 may be formed on the rear surface of the conductive amorphous silicon layer 500. [

In the solar cell of the present invention, since the intrinsic amorphous silicon layer 400 and the conductive amorphous silicon layer 500 are formed on the rear surface, the open circuit voltage is increased and the rear surface of the solar cell is passivated . The crystalline silicon has an energy band gap of about 1.1 eV, and the amorphous silicon has an energy band gap of about 1.7 eV, which is larger than that of crystalline silicon, so that the open circuit voltage of the solar cell can be increased. As the conductive amorphous silicon layer 500 doped at a higher concentration than the silicon substrate 100 is disposed on the rear surface, the minority carriers are prevented from moving to the rear surface of the solar cell to be recombined, It is possible to passivate the rear surface of the semiconductor device.

In addition, the solar cell of the present invention is characterized in that the entire front layer 130 is selectively formed on the silicon substrate 100. That is, by forming the front entire layer 130 having a high concentration selectively in the pattern P1 of the silicon substrate 100, it is possible to improve the photoelectric conversion efficiency by controlling the surface resistance with the front electrode 700 .

In addition, the solar cell of the present invention is characterized by reducing the shadowing loss by forming the front electrode 700 in a depressed shape in the pattern P1, thereby improving the amount of received light and improving the photoelectric conversion efficiency.

Hereinafter, a manufacturing process of the solar cell of the present invention will be described with reference to FIGS. 1 to 8. FIG.

Referring to FIG. 1, an n-type silicon substrate 100 or a p-type silicon substrate 100 is prepared. The n-type silicon substrate 100 can be manufactured by adding a Group 15 element such as phosphorus or antimony to the silicon substrate as an impurity. The p-type silicon substrate 100 can be formed by boron- , Aluminum (Al), or the like, as an impurity. Hereinafter, an n-type silicon substrate 100 will be described on the assumption.

Next, referring to FIG. 2, a pattern P1 can be formed by irradiating the entire surface of the n-type silicon substrate 100 with the first laser L1. The first pattern P1 preferably has a width of at least 20 mu m and a depth of 10 to 40 mu m. The first laser L1 preferably uses a pulsed laser so that the first laser L1 can remove a specific depth of the silicon substrate 100. The first laser L1 is preferably an infrared ray having a pulse width of 1 to 500 ns It is more preferable to use a pulsed laser.

Next, referring to FIG. 3, a texturing structure 110 may be formed on the surface of the n-type silicon substrate 100. In FIG. 3, the texturing structure 110 is formed on the front surface of the n-type silicon substrate 100, but the texturing structure 110 may be formed on the rear surface. It is difficult to form the texturing structure 110 only on one side of the silicon substrate 100 in consideration of the process cost and process efficiency when forming the texturing structure 110 on the front surface only. After forming the texturing structure 110 to the back side of the texturing structure 110, the back side planarization operation may be further performed.

Texturing in the present invention is intended to prevent a phenomenon in which the incident light is reflected on the surface of the n-type silicon substrate 100 of the solar cell to be optically lost, thereby deteriorating the characteristics thereof. That is, the pyramid pattern 110 or the irregular pattern 110 is formed on the surface of the n-type silicon substrate 100 by making the surface of the n-type silicon substrate 100 roughened. For example, if the surface of the n-type silicon substrate 100 is roughened by texturing, the light reflected once on the surface can be reflected again toward the solar cell, so that light loss can be reduced, The photoelectric conversion efficiency of the battery can be improved. At this time, known texturing methods such as chemical etching, reactive ion etching (RIE) and sandblasting may be used as the texturing method. For example, the texturing structure 110 may be a pyramid pattern having a size of 2 to 10 μm, and the texturing structure 110 may be formed not only on the surface of the n-type silicon substrate 100 but also inside the pattern P1 .

3 (b), before the next front layer 130 is formed on the pattern P1 of the silicon substrate 100, the auxiliary front layer 120 may be further formed have. The auxiliary front whole layer 120 includes a minority carrier (hole in the case of the n-type silicon substrate 100, p-type silicon in the case of the n-type silicon substrate 100) among the electron-hole pairs generated by photon in the silicon substrate 100, The electrons in the case of the substrate 100 may move to the front surface of the solar cell to prevent recombination at the boundary with the surface or the front electrode 700.

The auxiliary front whole layer 120 may be formed by ion implantation of a conductive impurity such as a conductive type of the silicon substrate 100. That is, in the case of the n-type silicon substrate 100, the n ⁺ -type auxiliary front whole layer 120 is formed by injecting the Group 15 element of high concentration into the n-type impurity. In the case of the p- The p ⁺ type auxiliary front surface layer 120 can be formed by implanting the element as a p-type impurity. n-type impurity is N, P, As, Sb, Bi, P 2 O 5, POCl 3, As (C 2 H 5) 3, As (CH 3) 3, Bi (C 6 H 5) 3, Bi (CH ₃ ) ₃ or Bi (tmhd) ₃ , and the p-type impurity may include at least one of B, Al, Ga, In and Tl.

After impurities are implanted, the n ⁺ type auxiliary front layer 120 or the p ⁺ type auxiliary front layer 120 may be formed by annealing in a furnace at a temperature of 750 to 950 캜 to provide a sheet resistance of 40 to 120 ohm / sq. In addition to the ion implantation method, a known impurity implantation method such as forming the auxiliary front whole layer 120 with POCl ₃ (n-type impurity) and BBr ₃ (p-type impurity) gas using a furnace can be used without limitation.

Next, referring to FIG. 4, the front surface layer 130 may be formed by implanting n-type or p-type impurities into the pattern P1. The front whole layer 130 includes a minority carrier (a hole in the case of the n-type silicon substrate 100 and a hole in the p-type silicon substrate 100) among the electron- 100], the electrons may move to the front surface of the solar cell to prevent recombination at the boundary with the surface or front electrode 700. [

The front whole layer 130 can be formed by ion-implanting a conductive impurity such as a conductive impurity such as the conductive type of the silicon substrate 100. That is, in the case of the n-type silicon substrate 100, the n ⁺ -type front whole layer 130 is formed by injecting the Group 15 elements as n-type impurities. In the case of the p-type silicon substrate 100, Type impurity so that the p ⁺ type front whole layer 130 can be formed. If the auxiliary front entire layer 120 described in FIG. 3 (b) is formed, the front entire layer 130 can inject impurities at a higher concentration than the auxiliary front whole layer 120. That is, the front auxiliary I-layer 120 is n ⁺ type when the front around the layer 130 is a n ⁺⁺ type, auxiliary front around the layer 120 is a p ⁺ type around the front layer 130 are p ⁺⁺ type . The entire front layer 130 may be formed by ion implantation of impurities. n-type impurity is N, P, As, Sb, Bi, P 2 O 5, POCl 3, As (C 2 H 5) 3, As (CH 3) 3, Bi (C 6 H 5) 3, Bi (CH ₃ ) ₃ or Bi (tmhd) ₃ , and the p-type impurity may include at least one of B, Al, Ga, In and Tl.

After the impurities are implanted, the entire front layer 130 having a sheet resistance of 40 to 120 ohm / sq can be formed through annealing in a furnace at 750 to 950 ° C. In addition to the ion implantation method, a well-known impurity implantation method such as forming the front whole layer 130 using POCl ₃ (n-type impurity) or BBr ₃ (p-type impurity) gas using a furnace can be used without limitation. When forming the front whole layer 130 using the furnace, a silicon oxide film (not shown) having a thickness of 100 to 2000 nm is formed on the entire surface of the silicon substrate 100, It is preferable that the front whole layer 130 formation process of FIG. At this time, the silicon oxide film acts as a mask so that impurities can be implanted only into the pattern P1.

Before the next step, a step of dipping and removing an insulating film (not shown) such as PSG or BSG, which is formed naturally on the silicon substrate 100, in a water bath containing HF may be further performed.

Next, referring to FIG. 5, an insulating layer 200 and an antireflection layer 300 may be sequentially formed on the entire surface of the n-type silicon substrate 100.

The insulating layer 200 may include silicon oxide (SiO _x ). The insulating layer 200 may be formed to a thickness of 5 to 25 nm on the entire surface of the silicon substrate 100 by using a known thin film forming method using an oxidizing solution such as HNO ₃ , KCN, ozone or the like. In some cases, the step of forming the insulating layer 200 may be omitted.

The antireflective layer 300 may comprise silicon nitride (SiN _x ). The antireflection layer 300 serves as a passivation layer for protecting the surface of the solar cell and stabilizing the solar cell, and also helps the light incident on the solar cell to enter into the solar cell without being reflected. The antireflection layer 300 may be formed to a thickness of 70 to 90 nm on the insulating layer 200 using a thin film deposition method such as plasma enhanced chemical vapor deposition (PECVD).

Next, referring to FIG. 6, the insulating layer 200 and the antireflection layer 300 formed in the pattern P1 may be removed by irradiating the second laser L2. It is preferable that the second laser L2 uses a pulsed laser so that the second laser L2 can selectively remove only the insulating layer 200 and the antireflection layer 300. If the pulse width is 0.1 It is more preferable to use a green pulse laser having a wavelength of about 100 ps. In particular, a picosecond laser having a pulse width of more than a pico second has a characteristic of being capable of high-precision processing because it is mainly a photochemical reaction which is a non-thermal reaction.

Next, referring to FIG. 7A, an intrinsic amorphous silicon layer 400 and a conductive amorphous silicon layer 500 may be sequentially formed on the rear surface of the silicon substrate 100. Here, the conductive amorphous silicon layer 500 refers to an amorphous silicon layer 500 that is n-type or p-type conductivity, and impurities of the opposite conductivity type to that of the silicon substrate 100 are formed on the silicon substrate 100, And it is more preferable to be doped at a higher concentration than the doping concentration of the silicon substrate 100. [ That is, the p-type or p ⁺ -type amorphous silicon layer 500 is used when the n-type silicon substrate 100 is used and the n-type or n ⁺ -type amorphous silicon layer 500 is used when the p- Can be stacked. As the amorphous silicon layer having a larger energy band gap than the crystalline silicon layer is formed, the open circuit voltage can be increased to increase the efficiency of the solar cell, and the silicon substrate 100, the intrinsic amorphous silicon layer 400, The passivation effect can be improved by bonding the conductive amorphous silicon layer 500.

The intrinsic amorphous silicon layer 400 can be deposited by a PECVD process using SiH ₄ and H ₂ gas at a ratio of 1: 1 to 1:20. The intrinsic amorphous silicon layer 400 can be deposited to a thickness of 2 to 20 nm.

The conductive amorphous silicon layer 500 can be deposited by a PECVD process using SiH ₄ and H ₂ gases in a ratio of 1: 1 to 1:20 and containing 0.1 to 5% impurities, and a thickness of 5 to 30 nm . ≪ / RTI >

Referring to FIG. 7B, a transparent conductive layer (not shown) including a transparent conductive oxide (TCO) is formed between the conductive amorphous silicon layer 500 and the rear electrode 800 before the rear electrode 800 is formed. 600 may be formed. The TCO may be any one of AZO (ZnO: Al), ITO (Indium-Tin-Oxide), GZO (ZnO: Ga), BZO (ZnO: B) and SnO ₂ (SnO ₂ : F).

Next, referring to FIG. 8, a front electrode 700 and a rear electrode 800 may be formed.

The front electrode 700 can be formed in the pattern P1, that is, on the front front layer 130. The front electrode 700 may be formed by various known electrode forming methods such as sputtering, e-beam evaporation, ink jet, printing, plating, (Sn), nickel (Ni), copper (Cu), silver (Ag), gold (Au), titanium (Ti), chromium (Cr), and the like are formed by screen printing, , A metal such as palladium (Pd), lead (Pb), or aluminum (Al), or an alloy thereof may be applied to the front electrode 700 and then the front electrode 700 may be formed by sintering the metal paste.

Meanwhile, the front electrode 700 may be formed of a plurality of layers (not shown). For example, when the front electrode 700 is formed only of copper (Cu) having high electrical conductivity, copper may diffuse into the silicon substrate 100. Therefore, a nickel (Ni) electrode layer may be formed between the copper electrode layer and the silicon substrate 100 to prevent copper from diffusing into the silicon substrate 100. In addition, the nickel electrode layer may serve to reduce contact resistance by forming an intermetallic compound at the interface of the silicon substrate 100 through annealing.

The rear electrode 800 may be formed on the conductive amorphous silicon layer 500 and may be formed by a known method such as the front electrode 700.

As described above, according to the present invention, the intrinsic amorphous silicon layer 400 and the conductive amorphous silicon layer 500 are formed on the rear surface of the solar cell to increase the open voltage, thereby improving the photoelectric conversion efficiency, There is an advantage to be able to. In addition, the present invention can selectively form a front entire layer 130 on a part of the silicon substrate 100, thereby improving the photoelectric conversion efficiency by controlling the surface resistance with respect to the front electrode 700 have. In addition, the present invention is advantageous in that the photoelectric conversion efficiency can be improved by increasing the amount of received light by forming the front electrode 700 in a recessed shape.

9 is a view showing a solar cell according to another embodiment of the present invention.

As described in FIG. 3B, the solar cell of the present invention can use the silicon substrate 100 having the auxiliary front surface layer 120 formed on the front surface thereof. In this case, the auxiliary front whole layer 120 may be lightly doped and the front whole layer 130 may be doped at a high concentration. That is, the front auxiliary I-layer 120 is n ⁺ type when the front around the layer 130 is a n ⁺⁺ type, auxiliary front around the layer 120 is a p ⁺ type around the front layer 130 are p ⁺⁺ type So that the minority carriers of the silicon substrate 100 migrate to the front surface of the solar cell and are recombined with each other more effectively, thereby further improving the photoelectric conversion efficiency.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken in conjunction with the present invention. Variations and changes are possible. Such variations and modifications are to be considered as falling within the scope of the invention and the appended claims.

100: silicon substrate
110: Texturing structure
120: auxiliary front layer
130: Front whole layer
200: front insulation layer
300: antireflection layer
400: intrinsic amorphous silicon layer
500: conductive amorphous silicon layer
600: transparent conductive layer
700: front electrode
800: Rear electrode
L1: first laser
L2: second laser
P1: pattern

Claims (7)

A silicon substrate having a pattern formed on its front surface;
An insulating layer including silicon oxide (SiO _x ) formed on a front surface of the silicon substrate excluding the pattern;
An anti-reflection layer comprising silicon nitride (SiN _x ) formed on the insulating layer;
A front whole layer formed by diffusing n-type or p-type impurities into the pattern;
An intrinsic amorphous silicon layer and a conductive amorphous silicon layer sequentially formed on the back surface of the silicon substrate;
A front electrode formed in the pattern; And
A back electrode formed on the back surface of the conductive amorphous silicon layer,
And a second electrode. The method according to claim 1,
Further comprising an auxiliary front layer formed by implanting n-type or p-type impurities on the silicon substrate. The method according to claim 1,
And a transparent conductive layer including a transparent conductive oxide (TCO) between the conductive amorphous silicon layer and the rear electrode. The method according to claim 1,
The n-type impurity is N, P, As, Sb, Bi, P 2 O 5, POCl 3, As (C 2 H 5) 3, As (CH 3) 3, Bi (C 6 H 5) 3, Bi ( CH ₃ ) ₃ or Bi (tmhd) ₃ ,
Wherein the p-type impurity includes at least one of B, Al, Ga, In, and Tl. The method according to claim 1,
Wherein the front electrode is formed of a plurality of layers including at least one of Sn, Ni, Cu, Ag, Au, Ti, Cr, Pd, Pb and Al. (a) forming a pattern by irradiating a first laser onto a front surface of a silicon substrate;
(b) forming a texturing structure on at least one surface of a front surface or a back surface of the silicon substrate;
(c) implanting n-type or p-type impurity into the pattern to form a front whole layer;
(d) forming an insulating layer containing silicon oxide (SiO _x ) on the entire surface of the silicon substrate
(e) forming an antireflective layer comprising silicon nitride (SiN _x ) on the insulating layer;
(f) irradiating a second laser to remove the insulating layer and the anti-reflection layer formed on the pattern;
(g) sequentially forming an intrinsic amorphous silicon layer and a conductive amorphous silicon layer on the back surface of the silicon substrate; And
(h) forming a front electrode on the pattern, and forming a back electrode on the rear surface of the conductive amorphous silicon layer
≪ / RTI > The method according to claim 6,
Wherein the first laser is an infrared pulsed laser having a pulse width of 1 ns to 500 ns and the second laser is a pulsed green laser having a pulse width of 0.1 ps to 100 ps Gt;

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