KR101311301B1 - Nanowire transistor and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a nanowire transistor and a method of manufacturing the same, the method of manufacturing a nanowire transistor according to the present invention comprises the steps of preparing a substrate, forming a gate electrode and an array electrode on the substrate, Forming an insulating film on the formed substrate, forming a nanowire pattern on the insulating film, and forming a source electrode and a drain electrode on the substrate on which the nanowire pattern is formed.

Nanowire, electric field, solvent, flow

Description

NANOWIRE TRANSISTOR AND MANUFACTURING METHOD THEREOF

1 is a cross-sectional view showing a transistor according to an embodiment of the present invention.

2A through 2D are cross-sectional views sequentially illustrating a method of manufacturing a transistor according to an embodiment of the present invention.

3 is a cross-sectional view showing a liquid crystal display device according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10: substrate 12, 112: gate electrode

14, 114: array electrode 16, 116: source electrode

18, 118: drain electrode 20, 120: insulating film

30, 130: nanowire pattern 100: the first substrate

101: second substrate 102: liquid crystal layer

140: protective film 152: pixel electrode

154: common electrode 160: color filter layer

163: Black Matrix

The present invention relates to a nanowire transistor and a method of manufacturing the same, and more particularly, to a method for producing a nanowire by arranging nanowires using an electric field, and a nanowire transistor by the method.

In the latter half of the 20th century, nanotechnology (NT), a nanotechnology (NT), has developed a one-dimensional structure of nano-materials and nanotubes with diameters of 100nm or less, such as nanowires, nanorods, nanoribbons, And nanostructures.

When the size of a material is reduced to a micrometer, most of the physical properties of the bulk material remain intact, but when nanometer-sized, new physical properties are expressed. Using these new physical properties, nanodevices such as electronic and optical devices can be assembled, and nanotechnology is attracting attention as a next-generation important technology field.

In particular, quantum confinement effects occur in small materials such as nanowires. The most prominent point of quantum confinement effects is that a band gap increases as the size of an object decreases.

If the band gap becomes large, it can be used as a semiconductor. Indeed, according to the disclosed technique, semiconductor nanowire suspension is dispersed on a SiO ₂ substrate, and then the electrodes of the source and drain are joined by electron beam lithography to produce a nanowire-field effect transistor (NW-FET). (X. Duan, et al., Indium phosphide nanowires as building blocks for nanoscale electronic and photoelectronic devices', Nature, 409, pp 66-69 (2001)).

In the NW-FET as described above, the measurement of the current vs. source-drain voltage and the current vs. gate voltage shows that when the gate voltage is changed, the electrostatic potential of the semiconductor nanowire changes, thus modulating the carrier concentration and the conductivity of the nanowire. The phenomenon was found. Here, the type of doping (n or p type) according to the modulation of the conductivity can be determined, and the mobility of the carrier (ie, electron or hole) in each type of nanowire can be calculated from the basic formula of the transistor. The electrical transfer characteristics of were identified. At this time, the nanowire materials show excellent carrier mobility when compared to the bulk materials, which is the excellent characteristics of the semiconductor nanowires.

If the nanowires as described above are used, the present invention can be applied to manufacturing transistors that are driving elements such as flat panel displays.

In order to form a transistor such as a flat panel display, a method of coating a nanowire-dispersed solution, a Langmuir-Blodgett (LB) method, a self-alignment monolayer (SAM) method, and the like Nanowires may be arranged between the source electrode and the drain electrode in various ways.

However, the above method including coating the nanowire dispersion solution is not only difficult to align the nanowires in a desired shape at a desired position, but also difficult to form on a large area substrate in a short time. In addition, there is a problem in that the number of steps of the manufacturing process is rapidly increased to form nanowires.

For this reason, it is difficult to apply nanowires in the manufacture of transistors, and a method of manufacturing a transistor by forming a nanowire semiconductor layer that solves the above problems is required.

In order to solve the above problems, the present invention has a primary object to provide a method for manufacturing a large area nanowire transistor. Another object is to provide a manufacturing method for forming a transistor without an additional process for forming nanowires.

The present invention provides a method for manufacturing a nanowire transistor to achieve the above object. The method of manufacturing a nanowire transistor according to the present invention comprises the steps of preparing a substrate, forming a gate electrode and an array electrode on the substrate, forming an insulating film on the substrate on which the array electrode is formed, Forming a nanowire pattern on the substrate; and forming a source electrode and a drain electrode on the substrate on which the nanowire pattern is formed.

In this case, the forming of the nanowire pattern may include dropping a solution in which the nanowires are dispersed in a polar solvent and arranging the nanowires by forming an electric field by applying a voltage to the array electrode.

The present invention also includes a nanowire transistor manufactured by the manufacturing method, a method of manufacturing a liquid crystal display device using the nanowire transistor, and a liquid crystal display device manufactured by the manufacturing method.

Hereinafter, a nanowire transistor according to a preferred embodiment of the present invention will be described first with reference to the drawings, and then a manufacturing method, a liquid crystal display including the transistor, and a manufacturing method thereof will be described. Hereinafter, the formation of a film or layer on another film or layer includes not only when two films or layers are in contact with each other but also when another film or layer is present between the two films or layers.

1 is a cross-sectional view showing a nanowire transistor manufactured according to an embodiment of the present invention.

Referring to the drawings, a gate electrode 12 is formed on a substrate 10 made of an insulating material such as glass or quartz, and an array electrode 14 is formed at regular intervals from the gate electrode 12. . The array electrode 14 includes a first electrode 14a and a second electrode 14b spaced apart at regular intervals from both sides of the gate electrode 12.

The array electrode 14 is an electrode for forming the nanowire pattern 30 corresponding to the semiconductor layer, which will be described later in detail in the method of manufacturing a transistor according to the present invention.

The gate electrode 12 and the array electrode 14 may be formed of a conductive material and may be formed of the same material.

In the drawing, the gate electrode 12 and the array electrode 14 are formed on the same layer on the substrate 10, but may be formed on different layers with the insulating film 20 interposed therebetween.

The insulating film 20 is formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiO ₂ ) on the substrate 10 on which the gate electrode 12 and the array electrode 14 are formed.

The source electrode 16 and the drain electrode 18 are formed on the insulating film 20 on the gate electrode 12 with the gate electrode 12 spaced apart from the center. The source electrode 16 and the drain electrode 18 may be formed to overlap each other with the insulating film 20 in an upper region corresponding to the position of the array electrode 14.

A nanowire pattern 30 is formed between the source electrode 16 and the drain electrode 18 so as to contact both ends of the source electrode 16 and the drain electrode 18. The nanowires are provided in a rod shape grown in a uniaxial direction, and the side ends of the nanowires are in contact with the source electrode 16 and the drain electrode 18 across the source electrode 16 and the drain electrode 18. .

Herein, in order to increase the efficiency of the semiconductor layer between the source electrode 16 and the drain electrode 18 as a channel, the distance between the source electrode 16 and the drain electrode 18 is smaller than the length of the nanowire. do.

The transistor having the above structure is characterized in that the nanowire pattern 30 acts as a semiconductor. In small materials such as nanowires, a quantum confinement effect is observed. The most prominent point of the quantum confinement effect is that as the size of the object becomes smaller, the band gap becomes larger. By using the phenomenon in which the band gap is increased, the semiconductor device can be used as a semiconductor, and the transistor can be driven by forming a nanowire having an appropriate size between the source electrode 16 and the drain electrode 18.

In the embodiment of the present invention, the nanowire pattern 30 serves as a semiconductor. Therefore, when a voltage is applied to the gate electrode 12, electrons or holes move from the source electrode 16 to the drain electrode 18 through the nanowire pattern 30. This means that the nanowire pattern 30 acts as a channel between the source electrode 16 and the drain electrode 18.

2A through 2D are cross-sectional views sequentially illustrating a method of manufacturing the transistor.

In order to manufacture a transistor according to an embodiment of the present invention, a substrate 10 is prepared, a gate electrode 12 and an array electrode 14 are formed on the substrate 10, and then the array electrode 14 is formed. An insulating film 20 is formed on the formed substrate. Next, a nanowire pattern is formed by applying a voltage to the array electrode 14 on the insulating film 20 to form an electric field, and the source electrode 16 and the drain electrode 18 on the substrate on which the nanowire pattern is formed. ).

2A, first, a substrate 10 made of an insulating material such as glass or quartz is prepared, and then a gate electrode 12 and an array electrode 14 are formed on the substrate 10. .

The array electrode 14 is formed to be spaced apart from the gate electrode 12, and formed as a first electrode 14a and a second electrode 14b on both sides of the gate electrode 12. In this case, the distance between the first electrode 14a and the second electrode 14b may be smaller than the length of the nanowire to be formed later.

Here, in the present embodiment, the gate electrode 12 and the array electrode 14 are formed on the same layer, but the present invention is not limited thereto. If necessary, the gate electrode 12 is formed first, and then the array electrode 14 is formed on another layer. It is also possible to form). However, when the gate electrode 12 and the array electrode 14 are formed on the same layer, the gate electrode 12 and the array electrode 14 may be formed at the same time because one photomask can be formed at the same time. Do.

The gate electrode 12 and the array electrode 14 may be formed of a conductive material, and a low resistance metal is preferable. For example, it can be formed using aluminum, copper, molybdenum, chromium, an aluminum alloy, or the like.

Next, as shown in FIG. 2B, an insulating film 20 is formed on the substrate on which the gate electrode 12 is formed. The insulating film 20 is formed of an insulating material such as silicon nitride silicon oxide silicon oxide (SiO ₂ ).

Next, as shown in FIG. 2C, the nanowire pattern 30 is formed on the insulating film 20.

The nanowire pattern 30 is formed by applying a voltage to the array electrode 14 to form an electric field, and dropping a solution in which the nanowire is dispersed in a polar solvent to the substrate and arranging the nanowires by the electric field. It is possible. In addition, a solution in which nanowires are dispersed in a polar solvent is dropped on a substrate, and then a voltage is applied to the array electrode 14 to form an electric field, thereby forming the nanowires. The method of forming an electric field after dropping will be described as an example.

The solution is prepared by preparing nanowires and dispersing the nanowires by adding them to a polar solvent.

Here, the nanowires can be manufactured by various methods such as a catalyst using a laser, a self-catalyst VLS method, a metal organic chemical vapor deposition (MOCVD). In the method of arranging the nanowires according to the present invention, the method of manufacturing the nanowires is not limited to a specific method and may be a known method.

For example, the above-mentioned MOCVD is a technique of forming a thin film of a metal oxide using a chemical reaction, in which an organic compound vapor of a metal having a high vapor pressure is sent to a substrate heated in a vacuum container to grow the metal oxide on the substrate. By using such MOCVD, the metal oxide semiconductor crystal can be epitaxially grown on the substrate, so that the nanowire used in the present invention can be manufactured.

Next, the prepared nanowires are dispersed in a polar solvent.

Examples of the polar solvent include acetone, water, isopropyl alcohol, and the like. In the present invention, a mixture solution corresponding to one of the polar solvents or at least one of the polar solvents may be used. desirable. For example, a mixture of hexane, acetone, water, and isopropyl alcohol may be used as a dispersion solvent of nanowires.

A polar solvent is a solvent composed of a solvent molecule having a polar functional group (or molecule) in a solvent molecule and having a partially separated charge. The polar solvent has a dipole moment due to partial charge separation, and when an electric field is applied to the polar solvent, the solvent molecules are aligned or moved in accordance with the direction of the electric field by the dipole moment. In the embodiment of the present invention, the nanowires are efficiently arranged using the properties of the polar solvent.

After the nanowire dispersion solution 131 is prepared by dispersing the nanowires in the solvent as described above, the nanowire dispersion solution 131 is formed on the substrate, that is, the first electrode 14a and the first electrode 14a. It is dripped between two electrodes 14b.

Next, a voltage is applied between the array electrode 14, that is, the first electrode 14a and the second electrode 14b, to form an electric field between the first electrode 14a and the second electrode 14b. The direction of the electric field may vary depending on the sign of the voltage applied, but is formed in a direction from one electrode to the other electrode.

When the electric field is formed, the solvent molecules in the dropped nanowire dispersion solution are subjected to the coulomb force by the electric field formed. That is, the partial charge is separated in the solvent molecule, so the coulomb force acts in relation to the electric field. Thus, each solvent molecule is arranged or moved according to the direction of the electric field. Accordingly, the nanowires are aligned in a certain direction.

The polar solvent of the nanowire dispersion solution is then removed by heating or volatilization at room temperature.

After the nanowire pattern 30 is formed, as shown in FIG. 2D, the source electrode 16 and the drain electrode 18 are formed on the substrate on which the nanowire pattern 30 is formed using a conductive material. The source electrode 16 and the drain electrode 18 can be formed as a single photomask using photolithography.

As described above, the nanowire transistor may be formed through two mask processes without a separate process for forming the nanowire pattern 30. In addition, according to the embodiment of the present invention by forming a nanowire pattern 30 by dropping the nanowire dispersion solution by arranging the nanowires there is an advantage that can be easily applied to a large area.

The above-described nanowire transistors are not only display devices such as liquid crystal displays (LCDs), organic light emitting diodes (OLEDs), plasma display panels (PDPs) but also transistors in addition to display devices. It is possible to apply to a variety of devices, including.

3 is a cross-sectional view of a liquid crystal display using a transistor according to an embodiment of the present invention. The illustrated example is only a preferred embodiment and the present invention is not limited thereto, and it is obvious that the present invention can also be applied to an organic light emitting display device or a plasma display panel.

A liquid crystal display device is a display device for displaying an image by adjusting the light transmittance using the optical anisotropy of the liquid crystal. Although the liquid crystal display is composed of a plurality of pixels, only one pixel is shown in the drawing for convenience of description, and the description will be given based on the characteristic parts that are distinguished from the transistor and its manufacturing method. Portions omitted or summarized according to known methods.

Referring to the liquid crystal display device according to the present invention, as shown in FIG. 3, the liquid crystal display device includes a second substrate 101 facing the first substrate 100 and the first substrate 100 and the first substrate. It consists of a liquid crystal layer 103 formed between the 100 and the second substrate 101.

The liquid crystal forming the liquid crystal layer 103 is a material having optical anisotropy, and since the orientation varies depending on the applied voltage, light transmittance may be adjusted. Accordingly, a still image or a moving image corresponding to the light transmittance of the liquid crystal layer 103 is displayed on the liquid crystal display device.

The first substrate 100 is a substrate on which a plurality of nanowire transistors as driving elements are formed, and a plurality of pixels are formed. Each pixel is formed with a nanowire transistor.

The nanowire transistor has a gate electrode 112 and an array electrode 114 spaced apart from each other, an insulating film 120 formed on the gate electrode 112, and a center of the gate electrode 112 on the insulating film 120. A nanowire pattern formed by contacting the source electrode 116 and the drain electrode 118 between the source electrode 116 and the drain electrode 118, and the source electrode 116 and the drain electrode 118 spaced apart from each other. Consists of 130.

In this case, although not illustrated, gate lines and data lines are formed on the first substrate 100 to cross the length and width to define pixel regions. The gate electrode 112 is branched from a gate line, and the source electrode 116 is branched from a data line.

The passivation layer 140 is formed on the entire surface of the substrate on which the source electrode 116 and the drain electrode 118 are formed. The passivation layer 140 may be an inorganic insulating layer 120 such as silicon nitride or an insulating layer 120 made of an organic material. A contact hole for exposing a part of the drain electrode 118 is formed in the passivation layer 140.

The pixel electrode 152 is formed on the passivation layer 140 and is electrically connected to the drain electrode 118 through the contact hole. The pixel electrode 152 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

The second substrate 101 is a color filter substrate, and a color filter layer 160 for realizing color is formed. The second substrate 101 has a black matrix 163 formed on the insulating substrate. The black matrix 163 generally distinguishes between color filters of red (R), green (G), and blue (B) and prevents light leakage.

The color filter layer 160 is formed by repeating red, green, and blue on the black matrix 163 and serves to color the light passing through the liquid crystal layer 103. The color filter layer 160 is generally formed of a photosensitive organic material.

A common electrode formed of a transparent conductive material such as indium tin oxide or indium zinc oxide is formed on the color filter layer 160. The common electrode is formed together with the pixel electrode 152 to apply a voltage to the liquid crystal layer 103. Play a role.

Although not illustrated in another embodiment, in the case of a liquid crystal display device having a horizontal electric field method (In Plane Swiching, IPS mode), the common electrode may be formed on the same plane as the pixel electrode 152.

Although not shown, the first substrate 100 and the second substrate 101 are bonded to each other by a sealing material, and a liquid crystal layer 103 is formed therebetween to form the first substrate 100. The information is displayed by controlling the amount of light passing through the liquid crystal layer 103 by driving the liquid crystal molecules by the transistor.

In order to manufacture the above-described liquid crystal display device, preparing a first substrate 100 and a second substrate 101 facing the first substrate 100, and nanowire transistors on the first substrate 100 Forming a pixel; forming a pixel electrode 152 electrically connected to the drain electrode 118 of the transistor; and bonding the first substrate 100 and the second substrate 101 to each other. Include.

In order to form the nanowire transistor, first, the gate electrode 112 and the array electrode 114 are formed on the first substrate 100. It is formed by depositing a gate wiring material on an insulating substrate and then patterning it by a photolithography process using a photomask. In this case, the gate electrode 112 may be formed, and the array electrode 114 may be formed as a separate photomask by further depositing an insulating material and a conductive material on the gate electrode 112. However, it is preferable to form the array electrodes 114 by depositing and patterning them together to form the gate electrode 112 and the array electrodes 114 simultaneously with one photomask.

Next, the insulating films 120 and 20 are formed on the substrate on which the gate electrode 112 is formed, and the nanowire pattern 130 is formed on the insulating film 120.

The source electrode 116 and the drain electrode 118 are deposited on the substrate on which the nanowire pattern 130 is formed, and the source electrode 116 and the drain electrode 118 are patterned by a photolithography process using a photomask. The electrode 116 and the drain electrode 118 are formed.

Subsequently, the passivation layer 140 is formed to cover the thin film transistor, and the passivation layer 140 is patterned to form a contact hole exposing a portion of the drain electrode 118. A transparent conductive material is formed on the passivation layer 140 and patterned to form the pixel electrode 152.

The second substrate 101 can be manufactured by a known technique. A liquid crystal display device is completed by forming the liquid crystal layer 103 between the first substrate 100 and the second substrate.

In the above-described method, a liquid crystal display using a nanowire thin film transistor and a nanowire transistor may be manufactured.

According to an embodiment of the present invention, unlike the conventional nanowire pattern, there is an advantage that the nanowires can be easily arranged in a desired direction by using a nanowire dispersion solution and an electric field. By adjusting the nanowire pattern easily even in a large area, a large area nanowire transistor can be manufactured.

In addition, in the existing invention, there is no need to proceed with a separate mask process for patterning nanowires, and since the transistor can be manufactured by two mask processes, the process is simplified and costs are reduced.

The detailed description of the invention should be construed as illustrative of preferred embodiments rather than as limiting the scope of the invention. For example, the method of manufacturing a nanowire transistor according to the present invention may be applied to manufacture a liquid crystal display device, but is not limited thereto and may be applied to a method of manufacturing an organic light emitting display device or other device including a nanowire transistor.

Accordingly, the invention is not to be determined by the embodiments described, but should be determined by equivalents to the claims and the appended claims.

As described above, the present invention provides a manufacturing method of a nanowire transistor applicable to a large area, a nanowire transistor manufactured by the manufacturing method, and a liquid crystal display device including the transistor. It also provides a method of fabricating a transistor without the additional process of forming nanowires.

Claims (24)

Preparing a substrate; Forming a gate electrode and an array electrode on the substrate; Forming an insulating film on the substrate on which the gate electrode is formed; Forming a nanowire pattern on the insulating film; And And forming a source electrode and a drain electrode on the substrate on which the nanowire pattern is formed. The method of claim 1, Forming the nanowire pattern is Applying an electric voltage to the array electrode to form an electric field; And dropping a solution in which the nanowires are dispersed in a polar solvent on the substrate, and arranging the nanowires by the electric field. The method of claim 1, Forming the nanowire pattern is Dropping a solution of nanowires dispersed in a polar solvent on the substrate; And forming an electric field by applying a voltage to the array electrode to arrange the nanowires. The method according to claim 2 or 3, Forming the nanowire pattern is Removing a solvent of the solution in which the nanowires are dispersed, Nanowire transistor manufacturing method characterized in that it further comprises. The method according to claim 2 or 3, The array electrode is formed of a spaced first electrode and a second electrode, The nanowire transistor manufacturing method, characterized in that the solution is dispersed between the first electrode and the second electrode. The method of claim 5, Forming the nanowire pattern is a step of forming a nanowire transistor by applying a voltage of a different sign to the first electrode and the second electrode. The method according to claim 2 or 3, The polar solvent is acetone (acetone), water, isopropyl alcohol (isopropyl alcohol) characterized in that it comprises a nanowire transistor manufacturing method. The method of claim 1, And the gate electrode and the array electrode are formed at the same time. Preparing a first substrate and a second substrate facing each other; Forming a gate electrode and an array electrode on the first substrate; Forming an insulating film on the first substrate on which the gate electrode is formed; Forming a nanowire pattern on the insulating film; Forming a source electrode and a drain electrode on the first substrate on which the nanowire pattern is formed; Forming a pixel electrode electrically connected to the drain electrode; And Forming a liquid crystal layer between the first substrate and the second substrate. 10. The method of claim 9, Forming the nanowire pattern is Applying an electric voltage to the array electrode to form an electric field; And dropping a solution in which the nanowires are dispersed in a polar solvent on the first substrate, and arranging the nanowires by the electric field. 10. The method of claim 9, Forming the nanowire pattern is Dropping a solution in which nanowires are dispersed in a polar solvent on the first substrate; And forming the electric field by applying a voltage to the array electrode to arrange the nanowires. The method according to claim 10 or 11, Forming the nanowire pattern is And removing a solvent of the solution in which the nanowires are dispersed. The method according to claim 10 or 11, The array electrode is formed of a spaced first electrode and a second electrode, The solution in which the nanowires are dispersed is dropped between the first electrode and the second electrode. 14. The method of claim 13, And forming the nanowire pattern by applying a voltage having a different sign to the first electrode and the second electrode. The method according to claim 10 or 11, The polar solvent comprises at least one of acetone (acetone), water, isopropyl alcohol (isopropyl alcohol). 10. The method of claim 9, And the gate electrode and the array electrode are formed at the same time. Board; A gate electrode formed on the substrate; An insulating film formed on the substrate; A source electrode and a drain electrode formed on the insulating film; A nanowire pattern formed between the source electrode and the drain electrode in contact with the source electrode and the drain electrode; And Nanowire transistor comprising an array electrode formed on both sides of the nanowire pattern. 18. The nanowire transistor of claim 17, wherein the array electrode is formed on the same layer as the gate electrode. 18. The method of claim 17, The array electrode is a nanowire transistor, characterized in that composed of a first electrode and a second electrode formed on both sides with respect to the gate electrode. 18. The method of claim 17, And the source electrode and the drain electrode formed on an upper portion corresponding to the position of the array electrode. The method of claim 17 or 20, The distance between the source electrode and the drain electrode is a nanowire transistor, characterized in that less than the length of the nanowire pattern. 18. The method of claim 17, The nanowire pattern is a nanowire transistor, characterized in that the rod-like growth in the uniaxial direction. 18. The method of claim 17, And the gate electrode and the array electrode are made of the same material. A first substrate; A second substrate facing the first substrate; And It comprises a liquid crystal layer formed between two substrates, Wherein the first substrate comprises: A gate electrode and an array electrode spaced apart from each other on the first substrate; An insulating film formed on the gate electrode and the array electrode; A source electrode and a drain electrode formed on the insulating layer and spaced apart from the gate electrode; A nanowire pattern formed between the source electrode and the drain electrode in contact with the source electrode and the drain electrode; And And a pixel electrode in electrical contact with the drain electrode.

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