KR101186518B1 - Method of fabricating liquid crystal display device - Google Patents

Abstract

In the manufacturing method of the liquid crystal display device of the present invention, by forming the active layer and the storage electrode through one mask process, the number of masks is reduced, the manufacturing process is simplified, and the manufacturing cost is reduced. Providing a first substrate and a second substrate to prevent damage to the active layer; Forming an active layer and a storage layer on the first substrate, and forming a storage electrode formed of an aluminum-based metal on the storage layer; Forming a first insulating film on the first substrate; Forming a gate line, a common line, and a gate line on the first substrate; Forming a second insulating film on the first substrate; Forming a source electrode and a drain electrode on the first substrate, and forming a data line substantially crossing the gate line to define a pixel region; Forming a third insulating film on the first substrate; Forming a pixel electrode on the first substrate, wherein the pixel electrode is electrically connected to the drain electrode; And bonding the first substrate and the second substrate to each other.

LCD, active layer, storage electrode, aluminum

Description

Manufacturing method of liquid crystal display device {METHOD OF FABRICATING LIQUID CRYSTAL DISPLAY DEVICE}

1 is a plan view showing a part of an array substrate of a general liquid crystal display device.

2 is a plan view illustrating a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

3A to 3F are cross-sectional views sequentially illustrating a manufacturing process along the line II-II ′ of the array substrate shown in FIG. 2.

4A to 4F are cross-sectional views illustrating in detail the first mask process illustrated in FIG. 3A.

5 is a graph showing the characteristics of a thin film transistor according to an embodiment of the present invention.

DESCRIPTION OF REFERENCE NUMERALS

108: common line 110: array substrate

118: pixel electrode 121: gate electrode

122 source electrode 123 drain electrode

124 ': Active layer 124 ": Storage layer

124a: source region 124b: drain region

124c: Channel region 130 ": Storage electrode

The present invention relates to a method for manufacturing a liquid crystal display device, and more particularly, to a method for manufacturing a liquid crystal display device in which the number of masks is reduced to simplify the manufacturing process, improve the yield and prevent damage to the active layer.

Recently, interest in information display has increased, and a demand for using portable information media has increased, and a light-weight flat panel display (FPD) that replaces a cathode ray tube (CRT) And research and commercialization are being carried out. Particularly, among such flat panel display devices, a liquid crystal display (LCD) is an apparatus for displaying an image using the optical anisotropy of a liquid crystal, and is excellent in resolution, color display and picture quality and is actively applied to a notebook or a desktop monitor have.

The liquid crystal display is largely composed of a color filter substrate as a first substrate, an array substrate as a second substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

Hereinafter, a structure of a general liquid crystal display device will be described in detail with reference to the drawings.

FIG. 1 is a plan view showing a part of an array substrate of a general liquid crystal display device. In an actual liquid crystal display device, N gate lines and M data lines cross each other, and MxN pixels exist. Only represented.

As shown in the figure, a gate line 16 and a data line 17 are formed on the array substrate 10 to be arranged vertically and horizontally on the array substrate 10 to define a pixel area. In addition, a thin film transistor as a switching element is formed in an intersection region of the gate line 16 and the data line 17, and a pixel electrode 18 is formed in the pixel region.

In this case, the thin film transistor includes a gate electrode 21 connected to the gate line 16, a source electrode 22 connected to the data line 17, and a drain electrode 23 connected to the pixel electrode 18. The thin film transistor is supplied to a first insulating film (not shown), a second insulating film (not shown), and the gate electrode 21 to insulate the gate electrode 21 and the source / drain electrodes 22 and 23. The active layer 24 forms a conductive channel between the source electrode 22 and the drain electrode 23 by the gate voltage.

In this case, the source electrode 22 is electrically connected to the source region of the active layer 24 through the first contact hole 40A formed in the first insulating film and the second insulating film, and the drain electrode 23 is The second contact hole 40B is electrically connected to the drain region of the active layer 24. In addition, a third insulating film (not shown) having a third contact hole 40C is formed on the drain electrode 23, and the drain electrode 23 is connected to the pixel electrode 18 through the third contact hole 40C. Electrical connection with the

The array substrate 10 configured as described above is bonded to an upper color filter substrate (not shown) to form a liquid crystal display device.

Here, in the fabrication of the array substrate including the thin film transistor described above, a plurality of photolithography processes are used to pattern gate electrodes, active layers, source / drain electrodes, first to third contact holes, and pixel electrodes. in need. In particular, when the storage capacitance is added to the thin film transistor, at least one photolithography process is required.

The photolithography process is a series of processes for transferring a pattern drawn on a mask onto a substrate on which a thin film is deposited to form a desired pattern. The photolithography process includes a plurality of processes such as photoresist coating, exposure, and development. As a result, many photolithography processes have many problems, such as lowering the production yield and increasing the probability of defects in the formed thin film transistors.

In particular, a mask designed to form a pattern is very expensive, and as the number of masks applied to the process increases, the manufacturing cost of the liquid crystal display device increases in proportion.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a method of manufacturing a liquid crystal display device in which the number of masks used for manufacturing a thin film transistor is reduced by forming an active layer and a storage electrode in one mask process.

Another object of the present invention is to provide a method of manufacturing a liquid crystal display device which prevents damage to an active layer by forming a storage electrode from an aluminum-based metal.

Further objects and features of the present invention will be described in the configuration and claims of the invention which will be described later.

In order to achieve the above object, the manufacturing method of the liquid crystal display device of the present invention comprises the steps of providing a first substrate and a second substrate; Forming an active layer and a storage layer on the first substrate, and forming a storage electrode formed of an aluminum-based metal on the storage layer; Forming a first insulating film on the first substrate; Forming a gate line, a common line, and a gate line on the first substrate; Forming a second insulating film on the first substrate; Forming a source electrode and a drain electrode on the first substrate, and forming a data line substantially crossing the gate line to define a pixel region; Forming a third insulating film on the first substrate; Forming a pixel electrode on the first substrate, wherein the pixel electrode is electrically connected to the drain electrode; And bonding the first substrate and the second substrate to each other.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the manufacturing method of the liquid crystal display device according to the present invention.

FIG. 2 is a plan view showing a portion of an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention, and particularly, one pixel including a thin film transistor.

In an actual liquid crystal display device, N gate lines and M data lines cross each other, and there are M × N pixels. However, only one pixel is shown in the figure for simplicity.

In this embodiment, a polycrystalline silicon thin film transistor in which an active layer is formed using a polycrystalline silicon thin film is described as an example. However, the present invention is not limited thereto, and an active layer may be formed using an amorphous silicon thin film. .

As shown in the figure, a gate line 116 and a data line 117 are formed on the array substrate 110 in the present embodiment to be arranged vertically and horizontally on the array substrate 110 to define a pixel region. In addition, a thin film transistor, which is a switching element, is formed in an intersection area of the gate line 116 and the data line 117, and is connected to the thin film transistor in the pixel area, and the common electrode of a color filter substrate (not shown). In addition, a pixel electrode 118 for driving a liquid crystal (not shown) is formed.

In this case, a common line 108 is formed in the pixel area in substantially the same direction as the gate line 116.

The thin film transistor includes a gate electrode 121 connected to the gate line 116, a source electrode 122 connected to the data line 117, and a drain electrode 123 connected to the pixel electrode 118. In addition, the thin film transistor is supplied to a first insulating film (not shown), a second insulating film (not shown), and the gate electrode 121 to insulate the gate electrode 121 and the source / drain electrodes 122 and 123. The active layer 124 'forms a conductive channel between the source electrode 122 and the drain electrode 123 by the gate voltage.

As described above, the active layer 124 'of the present embodiment is formed of a polycrystalline silicon thin film, and the active layer 124' is partially connected to a storage layer (not shown) formed in the pixel region. . In this case, a storage electrode 130 ″ formed of an aluminum-based conductive material and patterned in the same form as the storage layer is formed on the storage layer.

The storage electrode 130 ″ is formed by depositing an aluminum-based metal such as aluminum or an aluminum alloy on the polycrystalline silicon thin film and then using diffraction exposure. Thus, instead of molybdenum, an aluminum-based metal may be formed as a barrier metal ( The reason why the aluminum is used as a barrier metal layer is that aluminum has a smaller atomic number than molybdenum and has a structure similar to that of silicon atoms, which is a bombardment of molybdenum in the process of depositing molybdenum by sputtering on a polycrystalline silicon thin film. In other words, the molybdenum has an atomic number of 42 and is about three times larger than that of silicon having an atomic number of 14, whereas the atomic number of aluminum is 13, Similar to silicone.

The method of forming the storage electrode using the barrier metal layer has an advantage of reducing the mask process compared to the method of forming the storage electrode through the doping process.

The source electrode 122 is electrically connected to the source region 124a of the active layer 124 through the first contact hole 140A formed in the first insulating film and the second insulating film, and the drain electrode 123. Is electrically connected to the drain region 124b of the active layer 124 through the second contact hole 140B. In addition, a portion of the source electrode 122 extends in one direction to form a portion of the data line 117, and a portion of the drain electrode 123 extends toward the pixel region to be formed in the third insulating layer (not shown). The third electrode 120 is electrically connected to the pixel electrode 118 through the third contact hole 140C.

The storage electrode 130 ″ overlaps a portion of the common line 108 thereon to form a first storage capacitor Cst with the first insulating layer therebetween, and the common line 108 in the pixel region A second storage capacitor is formed by overlapping a portion of the upper pixel electrode with the second insulating layer and the third insulating layer interposed therebetween.

The array substrate 110 configured as described above is manufactured by simplifying a manufacturing process by forming the active layer 124 ′, the storage layer 124 ″, and the storage electrode 130 ″ through one mask process using diffraction exposure. The cost can be reduced, which will be described in detail through the manufacturing method of the liquid crystal display.

3A through 3F are cross-sectional views sequentially illustrating a manufacturing process along the line II-II ′ of the array substrate illustrated in FIG. 2.

As shown in FIG. 3A, an active layer 124 ′ and a storage layer 124 ″ formed of a silicon thin film using a photolithography process (first mask process) on a substrate 110 made of a transparent insulating material such as glass. In this case, a storage electrode 130 ″ made of an aluminum-based metal is formed on the storage layer 124 ″.

In this case, after forming a buffer layer 111 formed of a silicon oxide film (SiO ₂ ) on the substrate 110, the active layer 124 ′ and the storage layer 124 on the buffer layer 111. The buffer layer 111 serves to block impurities such as sodium (Narium) in the substrate 110 from penetrating into the upper layer during the process.

As described above, the active layer 124 ′ and the storage layer 124 ″ may be formed through one mask process by using diffraction exposure, which will be described in detail with reference to the accompanying drawings.

4A to 4F are cross-sectional views illustrating in detail the first mask process illustrated in FIG. 3A.

As shown in FIG. 4A, a buffer layer 111 and a silicon thin film 124 are formed on a substrate 110 made of a transparent insulating material such as glass.

The silicon thin film 124 may be formed of an amorphous silicon thin film or a crystallized silicon thin film. However, in the present embodiment, a thin film transistor is formed using a crystallized polycrystalline silicon thin film. In this case, the polycrystalline silicon thin film may be formed by depositing an amorphous silicon thin film on a substrate using various crystallization methods, which will be described below.

First, an amorphous silicon thin film may be formed by depositing in various ways. Representative methods of depositing the amorphous silicon thin film include a low pressure chemical vapor deposition (LPCVD) method and a plasma chemical vapor deposition (Plasma) method. Enhanced Chemical Vapor Deposition (PECVD).

As a method of crystallizing the amorphous silicon thin film, there are largely a solid phase crystallization (SPC) method for heat treating the amorphous silicon thin film in a high temperature furnace and an excimer laser annealing (ELA) method using a laser. .

As the laser crystallization, an excimer laser annealing method using a pulse-type laser is mainly used, but in recent years, sequential lateral solidification (SLS) in which grains are grown in a horizontal direction to improve crystallization characteristics. The method is being studied.

The barrier metal layer 130 made of an aluminum-based conductive material such as aluminum or an aluminum alloy is formed on the crystallized silicon thin film 124 to have a relatively thin thickness (˜200 μs).

In this case, as described above, the barrier metal layer 130 is formed of an aluminum-based conductive material because the aluminum has a smaller atomic number than that of molybdenum and has a structure similar to that of silicon atoms. That is, the molybdenum has an atomic number of 42 and is about three times larger than that of silicon having an atomic number of 14, while the atomic number of aluminum is 13, which is similar to that of silicon, thereby minimizing impact on the lower silicon thin film 124. .

Next, as shown in Figure 4b, after forming a photosensitive film 170 made of a photosensitive material such as a photoresist on the entire surface of the substrate 110 to the photosensitive film 170 through the diffraction mask 180 of the present embodiment Optionally irradiates light.

In this case, the diffraction mask 180 used in the present embodiment is applied with a transmission region I and a slit pattern that transmit all of the irradiated light so that only a part of the light is transmitted and a portion of the slit region II and all of the irradiated light are blocked. A blocking region III is provided to block the light, and only the light passing through the diffraction mask 180 is irradiated to the photosensitive film 170.

Subsequently, after developing the photosensitive film 170 exposed through the diffraction mask 180, as shown in FIG. 4C, light is blocked or partially blocked through the blocking region III and the slit region II. The first photoresist film pattern 170A and the second photoresist film pattern 170B having a predetermined thickness remain in the region, and the photoresist film is completely removed in the transmission region I through which all the light is transmitted, so that the surface of the barrier metal layer 130 Exposed.

In this case, the first photoresist pattern 170A formed in the blocking region III is thicker than the second photoresist pattern 170B formed through the slit region II. In addition, the photoresist film is completely removed in the region where all the light is transmitted through the transmission region I. This is because a positive photoresist is used, and the present invention is not limited thereto, and a negative photoresist may be used.

Next, as shown in FIG. 4D, the first photosensitive film pattern 170A and the second photosensitive film pattern 170B formed as described above are used as masks to selectively remove the silicon thin film and the barrier metal layer formed thereunder. Then, an active layer 124 'and a storage layer 124 "made of the silicon thin film are formed on the substrate 110. At this time, the barrier is formed on the active layer 124' and the storage layer 124". The barrier metal pattern 130 ′ formed of a metal layer and patterned in the same form as the active layer 124 ′ and the storage layer 124 ″ remains.

Subsequently, when an ashing process of removing a portion of the first photoresist pattern 170A and the second photoresist pattern 170B is performed, as shown in FIG. 4E, an upper portion of the active layer 124 ′ is formed. That is, the second photoresist pattern of the slit region II to which diffraction exposure is applied is completely removed to expose the surface of the barrier metal pattern 130 ′.

In this case, the first photoresist pattern is a third photoresist pattern 170A 'from which the thickness of the second photoresist pattern is removed, and thus remains only on the storage layer 124 ″ corresponding to the blocking region III.

Subsequently, as shown in FIG. 4F, when a portion of the barrier metal pattern is removed using the remaining third photoresist pattern 170A 'as a mask, the barrier metal pattern is formed on the storage layer 124 ″. The storage electrode 130 ″ is formed.

Next, as shown in FIG. 3B, the first insulating film 115A and the first conductive film are sequentially formed on the entire surface of the substrate 110, and then the first film is formed using a photolithography process (second mask process). By selectively patterning the conductive layer, a gate electrode 121 made of the first conductive layer is formed on the active layer 124 'and a common line 108 formed of the first conductive layer on the storage layer 124 ". In this case, a gate line 116 formed of the first conductive layer is formed through the second mask process.

The first conductive layer includes aluminum (Al), aluminum alloy, tungsten (W), and copper to form the gate line 116 and the common line 108 including the gate electrode 121. It may be made of a low resistance opaque conductive material such as (copper; Cu), chromium (Cr), molybdenum (Mo), and the like.

Thereafter, a high concentration of impurity ions are implanted into a predetermined region of the active layer 124 'using the gate electrode 121 as a mask to form a p + or n + source region 124a and a drain region 124b. Here, reference numeral 124c denotes a channel region forming a conductive channel between the source region 124a and the drain region 124b.

Next, as shown in FIG. 3C, after depositing the second insulating film 115B on the entire surface of the substrate 110 on which the gate electrode 121 is formed, the first film is subjected to a photolithography process (third mask process). Partial regions of the insulating layer 115A and the second insulating layer 115B are removed to expose the first contact hole 140A exposing a portion of the source region 124a and the second contact exposing a portion of the drain region 124b. The hole 140B is formed.

3D, the source region is formed through the first contact hole 140A by forming a second conductive layer on the entire surface of the substrate 110 and then patterning the same by using a photolithography process (fourth mask process). A source electrode 122 is formed to be electrically connected to 124a, and a drain electrode 123 is formed to be electrically connected to the drain region 124b through the second contact hole 140B. In this case, a portion of the source electrode 122 extends in one direction to form the data line 117.

Next, as shown in FIG. 3E, after depositing the third insulating film 115C on the entire surface of the substrate 110, patterning the third insulating film 115C by using a photolithography process (fifth mask process). As a result, the third contact hole 140C exposing a part of the drain electrode 123 is formed.

In this case, the third insulating layer 115C may be formed of a transparent organic material such as benzocyclobutene or acrylic resin for high opening ratio.

3F, after the third conductive film is formed over the entire surface of the substrate 110 on which the third insulating film 115C is formed, the third conductive film is formed by using a photolithography process (sixth mask process). By selectively patterning, the pixel electrode 118 electrically connected to the drain electrode 123 through the third contact hole 140C is formed.

The third conductive layer may use a transparent conductive material having excellent transmittance such as indium tin oxide (ITO) or indium zinc oxide (IZO) to form the pixel electrode 118. have.

The array substrate 110 configured as described above is bonded to face the color filter substrate (not shown) by a sealant (not shown) formed outside the image display area to form a liquid crystal display device. The bonding of the color filter substrate is performed through a bonding key (not shown) formed on the array substrate 110 and the color filter substrate.

In this case, the thin film transistor manufactured according to the embodiment of the present invention minimizes the damage of the silicon thin film when forming the barrier metal layer, thereby improving its electrical characteristics, which will be described in detail with reference to the accompanying drawings.

5 is a graph illustrating characteristics of a thin film transistor according to an exemplary embodiment of the present invention, in which the horizontal axis represents a gate voltage and the vertical axis represents a current flowing between the source electrode and the drain electrode.

Here, the graph shown in the square shows the electrical characteristics of the thin film transistor when the active layer and the storage electrode are formed through a separate mask process, and the graph shown in the circle shows the thin film when the barrier metal layer is formed of molybdenum. It shows the electrical characteristics of the transistor.

In addition, the graph shown as a triangle shows the electrical characteristics of the thin film transistor in this embodiment in which the active layer and the storage electrode are formed through one mask process and the barrier metal layer is formed of aluminum.

As shown in the figure, when the barrier metal layer is made of molybdenum, as shown in the transfer curve of the thin film transistor, the characteristics of the short current on the low current and the high off current are substantially short. Although it is difficult to apply, when the barrier metal layer is made of aluminum as in the present embodiment, it can be seen that the transfer characteristics of the thin film transistor are excellent without being degraded.

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

As described above, in the method of manufacturing the liquid crystal display according to the present invention, the active layer and the storage electrode can be formed in one mask process by using diffraction exposure. As a result, the number of masks used for manufacturing the thin film transistor is reduced, thereby reducing the manufacturing process and cost.

In addition, the manufacturing method of the liquid crystal display device according to the present invention by forming a storage electrode by depositing an aluminum-based conductive material on the active layer to prevent damage to the active layer provides an effect of improving the electrical characteristics of the thin film transistor. .

Claims (10)

Providing a first substrate and a second substrate; Forming an active layer and a storage layer on the first substrate, and forming a storage electrode formed of an aluminum-based metal on the storage layer; Forming a first insulating film on the first substrate; Forming a gate line, a common line, and a gate line on the first substrate; Forming a second insulating film on the first substrate; Forming a source electrode and a drain electrode on the first substrate, and forming a data line crossing the gate line to define a pixel region; Forming a third insulating film on the first substrate; Forming a pixel electrode on the first substrate, wherein the pixel electrode is electrically connected to the drain electrode; And And attaching the first substrate and the second substrate to each other. The method of claim 1, wherein the active layer and the storage layer are formed of a silicon thin film. The method of claim 1, wherein the forming of the active layer, the storage layer, and the storage electrode is performed. Forming a silicon thin film and a conductive film on the first substrate; Forming a first photoresist pattern having a first thickness in a first region of the first substrate and forming a second photoresist pattern having a second thickness in a second region; By selectively etching the silicon thin film and the conductive film using the first photoresist pattern and the second photoresist pattern as masks, a storage layer made of the silicon thin film in the first region and an active layer made of the silicon thin film in the second region. Forming a conductive layer pattern formed on the active layer and the storage layer; Removing the second photoresist pattern and simultaneously removing a portion of the first photoresist pattern to form a third photoresist pattern having a third thickness; And And selectively etching the conductive layer pattern using the third photoresist layer pattern as a mask to form a storage electrode formed of the conductive layer pattern on the storage layer. The method of claim 3, wherein the conductive layer pattern is patterned in the form of the active layer and the storage layer. The method of claim 3, wherein forming the first photoresist pattern and the second photoresist pattern Forming a photoresist film on the conductive film; Irradiating light to the photosensitive film through a diffraction mask provided with a first transmission region for transmitting all the light, a second transmission region for transmitting only a part of the light, and a blocking region for blocking the light; And The photoresist film irradiated with light through the diffraction mask is developed to form a photoresist pattern on the conductive layer, wherein a first photoresist pattern having a first thickness is formed in the first region where the storage layer is to be formed, and an active layer is formed. And forming a second photoresist pattern having a second thickness in two regions. The liquid crystal display device according to claim 5, wherein when the positive type photosensitive film is used, the blocking region is applied to the first region, and the second transmission region of the diffraction mask is applied to the second region. Manufacturing method. The method of claim 5, wherein the diffraction mask is a diffraction pattern is formed in a second transmission region that transmits only a portion of the light to form a second photosensitive film pattern of a second thickness thinner than the first thickness on the second region. Method of manufacturing a liquid crystal display device. The method of claim 3, wherein the conductive film is formed of an aluminum-based conductive material of aluminum or an aluminum alloy. The method of claim 1, wherein the storage electrode overlaps a common line on an upper portion of the storage electrode to form a first storage capacitor with the first insulating layer interposed therebetween. 10. The method of claim 9, wherein the common line in the pixel region overlaps the pixel electrode on the upper portion thereof to form a second storage capacitor with the second insulating layer and the third insulating layer interposed therebetween. .

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