KR101079302B1 - Manufacturing method for thin film of poly-crystalline silicon - Google Patents

Abstract

PURPOSE: A method for manufacturing a polycrystalline silicon thin film is provided to efficiently manufacture the polycrystalline silicon thin film by promoting the transmission of heat energy through a crystallization promoting layer. CONSTITUTION: A metal absorbing layer is formed on an insulation layer of a substrate(S2). A metal layer is formed on the metal absorbing layer(S3). A metal oxide layer is formed by depositing a metal oxide layer on the metal layer or thermally processing the metal layer(S5). A first silicon layer is formed by laminating an amorphous silicon layer on the metal oxide layer(S6). A metal silicide oxide layer is formed by moving catalyst metal element from the metal layer to a first silicon layer. A second silicon layer is formed by laminating the amorphous silicon layer on the metal silicide oxide layer(S8). Crystalline silicon is generated in the second silicon layer by using the metal particles of the metal silicide oxide layer as a catalydy(S10).

Description

Manufacturing method for thin film of Poly-Crystalline Silicon}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a polycrystalline silicon thin film for use in a solar cell, and more particularly, to a method for effectively producing a polycrystalline silicon thin film of an amorphous silicon thin film by metal induction crystallization.

In general, most problems arising in the production of poly-silicon (poly-Si) are due to the use of glass substrates that are vulnerable at high temperatures, and the process temperature cannot be raised sufficiently to the temperature at which the amorphous silicon (a-Si) thin film is crystallized.

The process requiring high temperature heat treatment in the production of poly-Si is a crystallization heat treatment (Crystallization) that converts the amorphous silicon (a-Si) thin film to a crystalline silicon thin film and an activation heat treatment (Dopant) that is electrically activated after doping Activation).

At present, a variety of processes (LTPS: Low Temperature poly-Si) have been proposed for forming a polycrystalline silicon thin film in a short time at a low temperature that the glass substrate allows. Representative methods for forming a polycrystalline silicon thin film include solid phase crystallization (SPC), excimer laser annealing (ELA), and metal induced crystallization (MIC).

Solid Phase Crystallization (SPC) is the most direct and long used method of obtaining polycrystalline silicon (poly-Si) thin films from amorphous silicon (a-Si). SPC is a method of obtaining a polycrystalline silicon thin film having a grain size of about several micro by heat-treating the amorphous silicon thin film at a temperature of 600 ℃ or more for several tens of hours. The polycrystalline silicon thin film obtained by this method has a disadvantage in that it is difficult to use a glass substrate because of high defect density in crystal grains and a high heat treatment temperature, and a long process time due to long heat treatment.

Excimer Laser Annealing (ELA) is a method of instantaneously irradiating an excimer laser to a amorphous silicon thin film for nanoseconds to melt and recrystallize the amorphous silicon thin film without damaging the glass substrate.

However, ELA is known to have significant problems in mass production processes. ELA has a very non-uniform grain structure of polycrystalline silicon (poly-Si) thin film according to the laser irradiation amount. ELA has a problem that it is difficult to manufacture a uniform crystalline silicon thin film because of the narrow process range. In addition, the surface of the polycrystalline silicon thin film is rough, which adversely affects the characteristics of the device. This problem is more serious in the application of organic light emitting diodes (OLEDs) in which the uniformity of thin film transistors (TFTs) is important.

To overcome this problem, the proposed method is Metal Induced Crystallization (MIC). MIC is a method of inducing crystallization of silicon by applying a metal catalyst to amorphous silicon by sputtering or spin coating, followed by heat treatment at low temperature. As the metal catalyst, various metals such as nickel (Ni), copper (Cu), aluminum (Al), and palladium (Pd) may be used. In general, nickel (Ni) is used as a metal catalyst in MIC, in which reaction control is easy and large grains are obtained. MIC can be crystallized at low temperatures below 700 ° C, but there are significant problems in the actual production process. This problem is that a significant amount of metal diffused in the active region in the TFT causes typical metal contamination, increasing leakage current, one of the TFT characteristics.

The development of low temperature poly-silicon (LTPS) has been carried out for the purpose of application to liquid crystal display devices, but recently, active matrix organic light emitting diodes (AMOLED) and thin film polycrystalline silicon solar cells In addition, the need for development is increasing.

Inexpensive, high-productivity poly-Si fabrication methods will compete with amorphous silicon thin-film transistor liquid crystal displays (a-Si TFT LCDs) in the display family with many active organic light emitting diodes (AMOLEDs) in the market. It is important in that it is. The method of manufacturing polycrystalline silicon is also important in that active organic light emitting diodes (AMOLEDs) will compete with crystalline wafer forms in solar cells. Therefore, the production cost and market competitiveness of the product can be stably polycrystalline at a low price compared to an amorphous silicon thin film transistor liquid crystal display (a-Si TFT LCD) and a crystalline wafer type solar cell in which the production technology has reached a stabilization stage. It depends on whether you can make silicon.

1 schematically shows a manufacturing process for obtaining a polycrystalline silicon thin film from amorphous silicon by a metal induction crystallization method. Referring to FIG. 1, in the conventional process, a buffer layer 2 made of silicon oxide (SiO ₂ ) is formed on a substrate 1 such as glass, and an amorphous silicon layer 3 is formed on the buffer layer 2 by plasma chemical vapor deposition (PECVD). After forming by Plasma Enhanced Chemical Vapor Deposition, sputtering and coating a metal such as nickel (Ni) on the amorphous silicon layer (3) and then heat-treated by RTA (Rapid Thermal Annealing) at about 700 ℃ The crystalline silicon 4 is formed from the silicon layer 3. However, according to the conventional method, since it is difficult to precisely control the amount of the metal applied to the upper portion of the amorphous silicon layer 3, there is an inconvenience that it is necessary to remove the excessively applied metal. This process not only increases manufacturing costs but also adversely affects the quality of the crystallized silicon.

An object of the present invention is to solve the above problems, in the method of manufacturing a polycrystalline silicon thin film using the metal induction crystallization method, precisely control the amount of catalyst metal and enable crystallization at low temperature By providing an efficient method for producing a polycrystalline silicon thin film.

In order to achieve the above object, a method of manufacturing a polycrystalline silicon thin film according to the present invention includes: forming an insulating film on a substrate;

A metal absorbing layer forming step of forming a metal absorbing layer on the insulating film formed in the insulating film forming step;

A metal layer forming step of forming a metal layer on the metal absorbing layer;

A metal oxide film forming step of forming a metal oxide film by heat-treating the metal layer to form a metal oxide film or depositing a metal oxide film on the metal layer;

Forming a first silicon layer by laminating an amorphous silicon layer on the metal oxide film;

A heat treatment step of moving the catalyst metal atoms from the metal layer to the first silicon layer to form a metal silicide oxide layer;

Forming a second silicon layer by laminating an amorphous silicon layer on the metal silicide oxide layer; And

And a crystallization step of heat treating the crystalline silicon in the second silicon layer using the metal particles of the metal silicide oxide layer as a catalyst.

A blocking layer forming step of forming a blocking layer on the second silicon layer formed after performing the second silicon layer forming step to block foreign substances from flowing in from the outside during the crystallization process;

A crystallization step of heat-treating the crystalline silicon in the second silicon layer using the metal particles of the silicide oxide layer as a catalyst after the blocking layer forming step; And

And a blocking layer removing step of removing the blocking layer after the crystallization step.

The metal absorbing layer and the blocking layer include any one of fluorine compounds (CaF ₂ , MgF ₂ , LaF ₃ , LiF), nitrides (SiN, AlN, Si ₃ N ₄ ),

The insulating film includes oxides (SiO ₂ , Al ₂ O ₃ , MgO, CaO),

It is preferable that the thickness of the said metal absorption layer, the said blocking layer, and the said insulating film is 5 kPa-2 micrometers, respectively.

The heat treatment temperature in the metal layer forming step, the heat treatment step is 50 ℃ to 1000 ℃,

The heat treatment temperature in the crystallization step is preferably 300 ℃ to 1000 ℃.

The metal layer has a thickness of 5 kPa to 1500 kPa,

The thickness of the metal oxide film is 1Å to 300Å,

The thickness of the first silicon layer is 5 kPa to 1500 kPa,

The ratio of the thickness of the metal layer and the first silicon layer is preferably 1: 0.5 to 1:20.

A patterning step of removing a portion of the metal layer by a lift off method or a photolithography method in the metal layer forming step;

The metal oxide film forming step, the first silicon forming step, the metal silicide oxide film forming step, and the crystallization step may be performed.

On the other hand, another method for producing a polycrystalline silicon thin film according to the present invention for achieving the above object, the insulating film forming step of forming an insulating film on a substrate;

A metal absorbing layer forming step of forming a metal absorbing layer on the insulating film formed in the insulating film forming step;

A metal layer forming step of forming a metal layer on the metal absorbing layer;

A metal oxide film forming step of forming a metal oxide film by heat-treating the metal layer to form a metal oxide film or depositing a metal oxide film on the metal layer;

Forming a first silicon layer on the metal oxide layer by depositing an amorphous silicon germanium layer (SiGe) or an amorphous silicon carbide (SiC);

A heat treatment step of moving the catalyst metal atoms from the metal layer to the first silicon layer to form a metal silicide oxide layer;

Forming a second silicon layer in which an amorphous silicon germanium layer (SiGe) or an amorphous silicon carbide (SiC) is deposited on the metal silicide oxide layer; And

And a crystallization step of heat treating the crystalline silicon germanium (SiGe) or the crystalline silicon carbide (SiC) in the second silicon layer using the metal particles of the metal silicide oxide layer as a catalyst.

The method of manufacturing a polycrystalline silicon thin film according to the present invention has the effect of diffusion into the amorphous silicon layer, the crystallization promoting layer promotes the transfer of thermal energy in the silicon crystallization process in the amorphous silicon layer to produce an effective polycrystalline silicon crystallized thin film. . In addition, the manufacturing method of the polycrystalline silicon thin film according to the present invention has an advantage that can be crystallized at a lower temperature than the conventional manufacturing method. In addition, the method of manufacturing a polycrystalline silicon thin film according to the present invention provides an effect of reducing the phenomenon that the surface of the crystalline silicon layer formed in the crystallization step by the metal absorbing layer is contaminated by metal.

1 is a view for explaining a conventional method for producing a polycrystalline silicon thin film by a metal induction crystallization method.
2 is a view showing a manufacturing process according to an embodiment of the present invention.
3 is a view showing a cross section after the metal oxide film forming step shown in FIG.
4 is a view showing a cross section after the first silicon layer forming step shown in FIG.
5 is a view showing a cross section after the heat treatment step shown in FIG.
6 is a view showing a cross section after the blocking layer forming step.
FIG. 7 is a cross-sectional view schematically showing the formation of polycrystalline silicon on a substrate after the crystallization step shown in FIG. 2.
8 is a cross-sectional view after the barrier layer removing step shown in FIG. 2.
9 is a photograph of the surface of amorphous silicon as viewed under an optical microscope.
FIG. 10 is a graph analyzing the wave number of the amorphous silicon illustrated in FIG. 9.
11 is a photograph of the surface of a crystalline silicon wafer viewed with an optical microscope.
FIG. 12 is a graph analyzing the wave number of the silicon wafer illustrated in FIG. 11.
FIG. 13 is a photograph of a surface of a polycrystalline silicon thin film manufactured by a conventional metal induction crystallization method viewed with an optical microscope. FIG.
FIG. 14 is a graph analyzing the wave number of the polycrystalline silicon thin film illustrated in FIG. 13.
15 is a photograph of the surface of the polycrystalline silicon thin film prepared according to the present invention under an optical microscope.
FIG. 16 is a graph analyzing the wave number of the polycrystalline silicon thin film illustrated in FIG. 15.

Hereinafter, with reference to the accompanying drawings an embodiment according to the present invention will be described in detail.

2 is a view showing a manufacturing process according to an embodiment of the present invention. 3 is a view showing a cross section after the metal oxide film forming step shown in FIG. 4 is a view showing a cross section after the first silicon layer forming step shown in FIG. 5 is a view showing a cross section after the heat treatment step shown in FIG. 6 is a view showing a cross section after the blocking layer forming step. FIG. 7 is a cross-sectional view schematically showing the formation of polycrystalline silicon on a substrate after the crystallization step shown in FIG. 2. 8 is a cross-sectional view after the barrier layer removing step shown in FIG. 2.

2 to 8, a method of manufacturing a polycrystalline silicon thin film (hereinafter, referred to as a “manufacturing method”) according to a preferred embodiment of the present invention may include an insulating film forming step S1, a metal absorbing layer forming step S2, Metal layer forming step (S3), patterning step (S4), metal oxide film forming step (S5), first silicon layer forming step (S6), heat treatment step (S7), and second silicon layer forming step (S8) ), A blocking layer forming step (S9), a crystallization step (S10), and a blocking layer removing step (S11).

In the insulating film forming step S1, the insulating film 20 is formed on the substrate 10 made of a material such as glass, for example. The insulating film 20 may be performed by a known method such as sputtering or plasma chemical vapor deposition (PECVD). For example, an oxide (SiO ₂ , Al ₂ O ₃ , MgO, etc.) may be selected as the insulating layer 20. The insulating film 20 is provided for an insulating function. In addition, the insulating layer 20 may have impurities diffused from the substrate 10 to the first silicon layer 50 or the second silicon layer 60 to be described later in the heat treatment step S7 or the crystallization step S10. The first silicon layer 50 and the second silicon layer 60 are provided to prevent contamination of impurities. It is preferable that the thickness of the said insulating film 20 is 5 kPa-2 micrometers, respectively. If the thickness of the insulating film 20 is less than 5 GPa, the insulating function is relatively poor in the crystallization step (S10) described later. On the other hand, in the case where the thickness of the insulating film 20 exceeds 2 μm, the manufacturing cost increases, and the improvement of the insulation function is hardly achieved.

In the metal absorbing layer forming step S2, the metal absorbing layer 30 is formed on the insulating film 20 formed in the insulating film forming step S1. For example, any one of fluorine compounds (CaF ₂ , MgF ₂ , LaF ₃ , LiF, etc.) and nitrides (SiN, AlN, Si ₃ N _4, etc.) may be selected. The metal absorbing layer 30 has a function of inhibiting metal atoms of the metal layer 40 to be described later from being excessively diffused on the surface of the crystalline silicon 70 in the crystallization step S10 to contaminate the surface of the crystalline silicon 70. Do it. That is, the metal absorbing layer 30 is made of a compound capable of diffusing metal, unlike the insulating film 20. It is preferable that the thickness of the said metal absorption layer 30 is 5 kPa-2 micrometers. If the thickness of the metal absorption layer 30 is less than 5Å, the role of absorbing the metal in the crystallization step (S10) described later is insignificant. On the other hand, when the thickness of the metal absorbing layer 30 exceeds 2㎛, the process time for forming the metal absorbing layer 30 is long, there is an uneconomical problem.

In the metal layer forming step S3, for example, nickel (Ni), copper (Cu), cobalt (Co), iron (Fe), gold (Au), aluminum (Al), and indium (In) on the metal absorption layer 30. ), A metal layer 40 such as titanium (Ti) is formed. The metal layer 40 may be performed by known methods such as sputtering or plasma chemical vapor deposition (PECVD). It is preferable that the thickness of the said metal layer 40 is 5 kPa-1500 kPa. When the thickness of the metal layer 40 is less than 5 mm, there is a problem of poor process reproducibility and poor uniformity of the metal layer 40 when deposited on a large area due to the too thin thickness. On the other hand, when the thickness of the metal layer 40 exceeds 1500Å, a large amount of metal penetrates and causes a metal contamination problem, thereby degrading the characteristics of a device including a crystallized silicon layer.

The patterning step S4 is a step of removing a portion of the metal layer 40 by, for example, a lift off method or a photolithography method in the metal layer forming step S3. 3 illustrates a cross section in which the metal oxide film forming step S5 is performed without performing the patterning process illustrated in FIG. 2. The patterning step S4 may be performed as necessary, and the object of the present invention may be achieved even if the patterning step S4 is not performed.

In the metal oxide film forming step (S5), the metal layer 40 that has undergone the patterning step (S4) is heat-treated to form a metal oxide film 45 on the surface of the metal layer 40, or a metal oxide film (on the metal layer 40). 45) may be deposited to form a metal oxide film. Meanwhile, when the patterning step S4 is not performed, the metal oxide layer 45 may be formed on the metal layer 40 without forming a pattern as shown in FIG. 3. It is preferable that the thickness of the metal oxide film 45 is 1 kPa to 300 kPa. If the thickness of the oxide film 45 is less than 1 mm, the metal oxide film 45 may be too thin to perform its function. On the other hand, when the thickness of the metal oxide film 45 exceeds 300 kPa, it is difficult to penetrate the catalyst metal from the metal layer 40 and the execution time of the process is too long, which is uneconomical. When the metal oxide film 45 is formed by the heat treatment in the metal oxide film forming step S5, the heat treatment temperature is preferably 50 ° C to 1000 ° C. When the heat treatment temperature in the metal oxide film forming step (S5) is less than 50 ℃ there is a problem that the metal oxide film 45 is not formed. On the other hand, when the heat treatment temperature in the metal oxide film forming step (S5) exceeds 1000 ℃ may cause a problem that the glass substrate is damaged or damaged by the thermal shock.

In the first silicon layer forming step (S6), an amorphous silicon layer is stacked on the metal oxide layer 45 to form a first silicon layer 50. The first silicon layer 50 is formed by laminating on the metal oxide film 45 using a known means such as plasma chemical vapor deposition. It is preferable that the thickness of the said 1st silicon layer 50 is 5 kPa-1500 kPa. In the case where the thickness of the first silicon layer 50 is less than 5 mm, the thickness of the first silicon layer 50 is so thin that process reproducibility deteriorates and the uniformity of the first silicon layer 50 when deposited in a large area. There is a problem of poor uniformity. On the other hand, when the thickness of the first silicon layer 50 exceeds 1500Å, the metal silicide oxide layer 55 to be described later is formed by combining with the metal element of the metal layer 40. There is a problem that chemical bonds are generated that are not necessary to produce. In addition, the ratio of the thickness of the metal layer 40 and the thickness of the first silicon layer 50 is preferably 1: 0.5 to 1:20. When the ratio of the thickness of the metal layer 40 and the thickness of the first silicon layer 50 is out of the range, as described above, there is a problem in that chemical bonds that are not necessary to form the metal silicide oxide layer 55 are generated. have. That is, a chemical bond of a composition other than the composition of the metal silicide oxide layer 55 necessary for the metal inductive coupling is formed to interfere with inductive crystallization.

In the heat treatment step (S7), the catalyst metal atoms are transferred from the metal layer 40 to the first silicon layer 50 to be formed to form the metal silicide oxide layer 55. The metal silicide oxide layer 55 is formed by chemically bonding particles of the metal layer 40, the metal oxide layer 45, and the first silicon layer 50 by thermal energy. That is, catalyst metal atoms, such as nickel (Ni), move from the inner layer 40 to the first silicon layer 50 and combine with oxygen (O) transferred from the metal oxide layer 45 to form a metal such as, for example, NiSiO. The silicide oxide layer 55 is formed. The heat treatment performed in the heat treatment step S7 may be performed by a high temperature furnace, rapid heat treatment (RTA), ultraviolet (UV) heating, or the like. The metal silicide oxide layer 55 formed in the heat treatment step S7 serves as a nucleus for crystallizing the second silicon layer 60 in the crystallization step S10 described later. The heat treatment temperature in the heat treatment step (S7) is preferably 50 ℃ to 1000 ℃. If the heat treatment temperature of the heat treatment step (S7) is less than 50 ℃ there is a problem that the metal silicide oxide 55 is not formed well. When the heat treatment temperature of the heat treatment step (S7) exceeds 1000 ℃ there is a problem that the glass substrate (10) is deformed or damaged by heat shock. The thickness of the metal silicide oxide layer 55 formed in the heat treatment step S7 is preferably 15 kPa to 3000 kPa. When the thickness of the metal silicide oxide layer 55 is less than 15 μm, it is difficult to implement the process and the overall thickness uniformity is poor. When the thickness of the metal silicide oxide layer 55 exceeds 3000 kV, there is a problem in that unnecessary chemical bonds are generated due to the thick oxide layer.

In the second silicon layer forming step (S8), an amorphous silicon layer is stacked on the metal silicide oxide layer 55 to form a second silicon layer 60. As the method of forming the second silicon layer 60, the method employed in the first silicon layer forming step S6 may be adopted.

In the blocking layer forming step S9, the blocking layer 65 is formed on the second silicon layer 60. The blocking layer 65 serves to block impurities from flowing into the second silicon layer 60 from the outside during the crystallization of the second silicon layer 60. For example, any one of fluorine compounds (CaF ₂ , MgF ₂ , LaF ₃ , LiF, etc.) and nitrides (SiN, AlN, Si ₃ N _4, etc.) may be selected. It is preferable that the thickness of the said blocking layer 65 is 5 kPa-2 micrometers. If the thickness of the barrier layer 65 is less than 5 mm, there is a problem that the thickness is too thin, so that the process reproducibility is poor and that the uniformity of the barrier layer 65 is degraded when the barrier layer 65 is deposited on a large area. On the other hand, if the thickness of the barrier layer 65 exceeds 2㎛ there is a problem that the process takes a long time and the thin film can be peeled off. The blocking layer 65 may be performed as described below without forming the blocking layer 65 as necessary.

In the crystallization step S10, heat treatment is performed such that the crystalline silicon 70 is generated in the second silicon layer 60 using the metal particles of the metal silicide oxide layer 55 as a catalyst. The heat treatment temperature in the crystallization step (S10) is preferably 300 ℃ to 1000 ℃. In this embodiment, the heat treatment in the crystallization step (S10) was carried out at 630 ℃ using RTA (Rapid Thermal Annealing) equipment. When the heat treatment temperature of the crystallization step (S10) is less than 300 ℃ there is a problem that the crystallization is not good because the temperature is low to crystallize. When the heat treatment temperature of the crystallization step S10 exceeds 1000 ° C., the substrate 10 may be deformed or damaged by heat shock.

In the barrier layer removing step S11, the barrier layer 65 is removed after the crystallization step S10. The barrier layer 65 may be removed by using a chemical method such as etching or a physical method such as grinding. The blocking layer removing step S11 may be performed only when the blocking layer forming step S10 is performed, and may be omitted when the blocking layer forming step S10 is not performed.

In order to analyze the crystallization state of the polycrystalline silicon thin film manufactured by such a manufacturing method, the size of the crystal grains was observed by using an optical microscope and Raman Spectroscopy, and the wave number having the maximum intensity was analyzed.

9 is a photograph of the surface of amorphous silicon as viewed under an optical microscope. FIG. 10 is a graph analyzing the wave number of the amorphous silicon illustrated in FIG. 9. 11 is a photograph of the surface of a crystalline silicon wafer viewed with an optical microscope. FIG. 12 is a graph analyzing the wave number of the silicon wafer illustrated in FIG. 11. FIG. 13 is a photograph of a surface of a polycrystalline silicon thin film manufactured by a conventional metal induction crystallization method viewed with an optical microscope. FIG. FIG. 14 is a graph analyzing the wave number of the polycrystalline silicon thin film illustrated in FIG. 13. 15 is a photograph of the surface of the polycrystalline silicon thin film prepared according to the present invention under an optical microscope. FIG. 16 is a graph analyzing the wave number of the polycrystalline silicon thin film illustrated in FIG. 15.

9 and 10, the second silicon layer 60, which is amorphous silicon, exhibits maximum intensity at a wavenumber of 480 cm ⁻¹ . In FIG. 10, the horizontal axis represents a wave number (cm ⁻¹ ) and corresponds to a frequency. A wave number is a unit of frequency that represents the number of waves in a unit distance by dividing the frequency of light by the speed of light in atomic, molecular, and nuclear spectroscopy. In other words, the frequency of a wave is represented by the Greek letter ν (nu), which is equal to the luminous flux c divided by the wavelength λ. That is, ν〓c / λ. In the visible region of the spectrum, a typical spectral line has a wavelength of 5.8 × 10 ⁻⁵ cm and corresponds to a frequency of 5.17 × 10 ¹⁴ kHz. However, because such a frequency has a value that is too large, it is convenient to divide the number by the speed of light to reduce the size. The frequency divided by the speed of light is ν / c, which is 1 / λ in the above equation. When the wavelength is measured in m, 1 / λ represents the number of waves found within 1m. The wavenumber is usually measured in units of 1 / m, i.e. m ^{- 1} and 1 / cm, i.e. cm- ¹ .

In FIG. 10, the vertical axis represents a sum of waves measured per unit time and corresponds to intensity (CPS, Count Per Second). The units of the horizontal axis and the vertical axis of FIGS. 12, 14, and 16 are the same as in FIG. 10. In contrast, silicon wafers, which are typical crystalline silicon, exhibit maximum strength at a wavenumber of 520 cm ⁻¹ as shown in FIGS. 11 and 12. 13 and 14 show graphs of surface photographs and wave counts of polycrystalline silicon thin films manufactured by a conventional metal induction crystallization method. Referring to FIGS. 13 and 14, the maximum strength is exhibited at a similar frequency compared to the crystalline silicon wafers shown in FIGS. 11 and 12. By the way, it can be seen that the optical micrograph of the surface of the silicon thin film shown in Fig. 13 is magnified 1000 times and the size of the crystal grains is relatively small.

Meanwhile, optical micrographs and wave number analysis graphs of the polycrystalline silicon thin film manufactured by the present invention are shown in FIGS. 15 and 16, respectively. Referring to FIG. 16, it can be seen that the wave number representing the maximum strength in the polycrystalline silicon thin film manufactured by the present invention is well represented as in the crystalline silicon wafer shown in FIG. 12. In addition, FIG. 15 is an optical micrograph 1000 times larger, and comparing FIG. 15 with FIG. 13 shows that the grains of the polycrystalline silicon thin film manufactured by the present invention are much larger than those of the polycrystalline silicon thin film manufactured by the conventional method. Can be. From the experimental results, it can be seen that the manufacturing method of the polycrystalline silicon thin film according to the present invention is superior to the conventional manufacturing method. In addition, the manufacturing method of the polycrystalline silicon thin film according to the present invention has the advantage that it can be crystallized at a lower temperature than the conventional manufacturing method. In particular, the present invention provides the effect of reducing the contamination of the surface of the crystallized silicon layer by the metal by inhibiting the excessive amount of metal particles from the metal silicide oxide layer to the crystalline silicon layer in the crystallization step. do.

Meanwhile, in another embodiment of the method of manufacturing a polycrystalline silicon thin film according to the present invention, in the process according to the above-described embodiment, the amorphous silicon layer laminated on the oxide film formed in the oxide film forming step S5 is amorphous silicon germanium (SiGe). Or may be substituted with amorphous silicon carbide (SiC). Therefore, a crystallization step of heat-treating the crystalline silicon germanium (SiGe) or crystalline silicon carbide (SiC) from the amorphous silicon germanium (SiGe) or amorphous silicon carbide (SiC) by using the metal particles of the metal silicide oxide layer as a catalyst; There is a difference from the above embodiment in that it performs.

While the present invention has been described with reference to the preferred embodiments, it is to be understood that the invention is not to be limited by the example, and various changes and modifications may be made without departing from the spirit and scope of the invention.

10 ... substrate 20 ... insulation
30 ... metal absorption layer 40 ... metal layer
45 ... metal oxide layer 50 ... first silicon layer
55 ... metal silicide oxide layer 60 ... second silicon layer
65 barrier layer 70 crystalline silicon
S1 ... Insulating film forming step S2 ... Metal absorbing layer forming step
S3 ... metal layer forming step S4 ... patterning step
S5 ... metal oxide film forming step S6 ... first silicon layer forming step
S7 ... heat treatment step S8 ... second silicon layer forming step
S9 ... blocking layer forming step S10 ... crystallization step
S11 ... Block Removal Step

Claims (7)

An insulating film forming step of forming an insulating film on the substrate;
A metal absorbing layer forming step of forming a metal absorbing layer on the insulating film formed in the insulating film forming step;
A metal layer forming step of forming a metal layer on the metal absorbing layer;
A metal oxide film forming step of forming a metal oxide film by heat-treating the metal layer to form a metal oxide film or depositing a metal oxide film on the metal layer;
Forming a first silicon layer by laminating an amorphous silicon layer on the metal oxide film;
A heat treatment step of moving the catalyst metal atoms from the metal layer to the first silicon layer to form a metal silicide oxide layer;
Forming a second silicon layer by laminating an amorphous silicon layer on the metal silicide oxide layer; And
And a crystallization step of heat treating the crystalline silicon to be produced in the second silicon layer using the metal particles of the metal silicide oxide layer as a catalyst. The method of claim 1,
A blocking layer forming step of forming a blocking layer on the second silicon layer formed after performing the second silicon layer forming step to block foreign substances from flowing in from the outside during the crystallization process;
A crystallization step of heat-treating the crystalline silicon in the second silicon layer using the metal particles of the silicide oxide layer as a catalyst after the blocking layer forming step; And
And removing the blocking layer after the crystallization step. The method of claim 2,
The metal absorbing layer and the blocking layer includes any one of a fluorine compound and a nitride,
The insulating film includes an oxide,
The metal absorbing layer, the blocking layer and the insulating film have a thickness of 5 Å to 2 탆, respectively. The method of claim 1,
The heat treatment temperature in the metal oxide film forming step, the heat treatment step is 50 ℃ to 1000 ℃,
The heat treatment temperature in the crystallization step is a method for producing a polycrystalline silicon thin film, characterized in that 300 ℃ to 1000 ℃. The method of claim 1,
The metal layer has a thickness of 5 kPa to 1500 kPa,
The thickness of the metal oxide film is 1Å to 300Å,
The thickness of the first silicon layer is 5 kPa to 1500 kPa,
The ratio of the thickness of the metal layer and the first silicon layer is 1: 0.5 to 1:20 manufacturing method of the polycrystalline thin film. The method of claim 1,
A patterning step of removing a portion of the metal layer by a lift off method or a photolithography method in the metal layer forming step;
And performing the metal oxide film forming step, the first silicon forming step, the metal silicide oxide film forming step, and the crystallization step. An insulating film forming step of forming an insulating film on the substrate;
A metal absorbing layer forming step of forming a metal absorbing layer on the insulating film formed in the insulating film forming step;
A metal layer forming step of forming a metal layer on the metal absorbing layer;
A metal oxide film forming step of forming a metal oxide film by heat-treating the metal layer to form a metal oxide film or depositing a metal oxide film on the metal layer;
Forming a first silicon layer on the metal oxide layer by depositing an amorphous silicon germanium layer (SiGe) or an amorphous silicon carbide (SiC);
A heat treatment step of moving the catalyst metal atoms from the metal layer to the first silicon layer to form a metal silicide oxide layer;
Forming a second silicon layer in which an amorphous silicon germanium layer (SiGe) or an amorphous silicon carbide (SiC) is deposited on the metal silicide oxide layer; And
A crystallization step of heat-treating the crystalline silicon germanium (SiGe) or crystalline silicon carbide (SiC) in the second silicon layer using the metal particles of the metal silicide oxide layer as a catalyst; Manufacturing method.

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