KR100812710B1 - Method and apparatus for communication using control bus - Google Patents

Abstract

A method and a device for performing communication with a control bus are provided to require no additional process for transferring an instruction whenever the instruction is transferred through the control bus and prevent speed of whole digital device from getting slower by simply transferring the instruction without any processes for transferring the instruction. A baseband unit(300) transfers an instruction through a control bus, which is an I2C bus, and reads an execution result of the instruction. An I2C(Inter IC) device(310), which includes a processor(316) for performing action according to the received instruction, receives the instruction from the baseband unit and records the execution result of the instruction. The baseband unit transfers the instruction when an ACK(ACKnowledgement) signal is received from an I2C slave(312) included in the I2C device. The I2C slave outputs an NAK(Negative AcKnowledgement) signal to the baseband unit when the instruction is received. The I2C device makes the I2C slave output the ACK signal again and the baseband unit reads the corresponding data according to the ACK signal when the received instruction is a read instruction.

Description

Communication method and apparatus using a control bus {Method and apparatus for communication using control bus}

1 is a flow chart illustrating the transfer of instructions in a digital device including a conventional I2C bus.

2 is a diagram illustrating a communication process according to each command in a digital device including a conventional I2C bus.

3 is a diagram illustrating a configuration of a digital device including an I2C bus to which a communication method using a control bus according to an embodiment of the present invention is applied.

FIG. 4 is a flowchart illustrating a process of transferring a command in a digital device including an I2C bus to which a communication method using a control bus according to an embodiment of the present invention is applied.

5 is a diagram illustrating a communication process according to each command in a digital device including an I2C bus to which a communication method using a control bus is applied according to an exemplary embodiment of the present invention.

The present invention relates to a communication method and apparatus using a control bus, and more particularly, to a communication method and apparatus using a control bus capable of transmitting a control signal more efficiently and simply.

The control bus refers to a bus for transmitting and receiving a control signal (eg, a command, etc.), and the control bus may be, for example, an I2C bus or a similar bus.

The following description is based on the most common I2C bus among control buses.

The I2C bus, also called Inter-IC (Integrated Circuit), is a two-wire, bidirectional serial bus that provides a communication link between integrated circuits.

Generally referred to as an I2C or I2C bus, it is now widely used as a de facto standard for implementing embedded systems that include the internal computing capabilities of digital devices.

In the present specification, the I2C device is a slave module connected to the baseband unit through a control bus and controlled by a control signal received through the control bus, and particularly, a device included in a digital device to communicate with other components. .

In addition, although referred to as an I2C device, a control bus other than the I2C bus may be used, and may be preferably implemented in the form of a chip rather than a device or a device.

In a digital device including an I2C bus that transmits and receives a control signal using the I2C bus, the baseband unit transmits a command, which is a control signal, to the I2C device through the I2C bus.

On the other hand, the I2C device includes an I2C register map, which is a buffer for communication between the I2C master and the I2C slave, and the I2C register map includes an I2C status register, which is a value representing the state of the I2C device.

The I2C status register is generally a read-only attribute and cannot be modified directly by the baseband unit. However, the I2C status register may change depending on the processing of an instruction, and may change its state due to a specific instruction.

An I2C communication process of transmitting and receiving a control signal using the I2C bus in a digital processing apparatus including an I2C bus will be described with reference to FIG. 1.

1 is a flowchart illustrating a process of transferring a command in a digital device including a conventional I2C bus.

As shown in FIG. 1, in a digital device including a conventional I2C bus, a command transfer process first reads a value of an I2C status register in an I2C device from a baseband unit (S100) and according to the read value of an I2C status register. It is determined whether the state of the delivery is possible (S102).

Determination of whether the instruction can be delivered is determined as shown in FIG. 1 when the value of the I2C status register indicates 'BUSY' (that is, indicating the status of executing another instruction). It will continue to determine whether the value is 'BUSY'.

However, if the value of the I2C status register is not 'BUSY', it indicates that no other command is being executed.

Therefore, the I2C device first converts the I2C status register value to 'READY' so that it can be displayed if no command is performed (S104).

The baseband unit reads the value of the I2C status register again (S106), checks whether the value of the read-back I2C status register is 'READY' (S108), and delivers an instruction only when the value of the I2C status register is 'READY'. (S110).

On the other hand, the I2C device changes the I2C status register to 'BUSY' value when the command is received, and changes the value of the I2C register to 'INIT' when the command is completed.

The reason why the I2C status register uses three values of INIT, READY, and BUSY instead of only two values of READY and BUSY is clear for the status before entering the instruction processing section (READY) and after the instruction processing (INIT). To distinguish.

As shown in FIG. 1, in order to transmit an actual command in a command transfer process using an I2C bus, two polling processes of step 102 in step 100 and step 108 in step 108 are required. This causes overhead in the process of delivering commands through I2C.

Referring to Figure 2 looks at the communication process according to each command in a digital device including a conventional I2C bus in more detail.

2 is a diagram illustrating a communication process according to each command in a digital device including a conventional I2C bus.

In FIG. 2, I2C Byte Write is an instruction to write one data through the I2C bus, and I2C Sequential Write is an instruction to continuously write several data through the I2C bus.

In addition, I2C Byte Read is a command that reads one data through the I2C bus, and I2C Sequential Read is a command that reads several data sequentially through the I2C bus.

In FIG. 2, 'Start' and 'Stop' are parts in which signals indicating the start and end of I2C communication are output, and 'Device ID', 'Address', 'Data' and 'Read' are actually read through the I2C bus. Alternatively, the write operation is performed.

In the read command (I2C Byte Read, I2C sequential read), 'Restart' receives the device ID and the address of the data to be read first, and then the data to be read is transmitted again. This is to keep the communication going.

On the other hand, in the part where actual read or write operation is performed according to the transferred command, normal I2C communication is performed only when an acknowledgment signal is generated at 'Device ID', 'Address', 'Data' and 'Read'.

On the other hand, if a negative-acknowledgement (NAK) signal is generated, the I2C device does not operate normally due to some problem. Therefore, the baseband unit continuously attempts to connect the command to the I2C device until an ACK signal is generated. In the I2C device, an error about the I2C communication itself should be transmitted to the baseband unit.

That is, first, it is determined whether the I2C device is executing another command according to the value of the I2C status register, and the command is transmitted to the I2C device, and it is determined whether communication is possible between the baseband unit and the I2C device according to the ACK signal and the NAK signal. Is actually doing

Therefore, as described above with reference to FIG. 1, the instruction transfer in the conventional I2C communication requires additional polling to check the value of the I2C status register for the instruction transfer each time the instruction is transmitted. There is a problem in that an overhead occurs, which is an additional task such as determining whether communication with the I2C device is possible.

In addition, there is a problem in that the delivery of the command is slowed due to the additional work for delivering the command and the speed of the entire digital device including the I2C bus is slowed.

In order to solve the conventional problems as described above, the present invention proposes a communication method and apparatus using a control bus that does not require additional work for command transfer each time a command is transmitted in the communication of the control bus.

In addition, the present invention proposes a communication method and apparatus using a control bus that is capable of simple command transfer without additional work for command delivery, such that the speed of the entire digital device including the control bus does not slow down.

Still other objects of the present invention will be readily understood through the following description of the embodiments.

In order to achieve the above object, according to an aspect of the present invention there is provided a communication method using a control bus.

According to a preferred embodiment of the present invention, in a method of communicating using a control bus that allows the baseband unit to be connected to the I2C device, determining whether a slave included in the I2C device generates an ACK (Acknowledge) signal ( a); And (b) transmitting a command when an ACK signal is generated in the slave, wherein the ACK signal is generated when the I2C device does not perform an operation corresponding to the command transmitted by the baseband unit. A communication method using a control bus is provided.

The control bus may be an Inter-Integrated Circuit (I2C) bus.

When the command is delivered, the I2C device may cause a non-acknowledge (NAK) signal to be generated in the slave, and when the delivered command is a read command, the I2C device may generate an ACK signal again in the slave. The master included in the baseband unit may read data according to the ACK signal.

The read data may be data recorded in an I2C register map included in the I2C device.

According to another aspect of the present invention, there is provided a recording medium recording a program for implementing a communication method using a control bus.

According to a preferred embodiment of the present invention, a program of instructions that can be executed by an I2C device coupled to the baseband unit via the control bus to perform a method of communication with the baseband unit using a control bus is tangibly implemented. And recording a program that can be read by the I2C device, and controlling a slave included in the I2C device to output an ACK (Acknowledge) signal to the baseband unit when a command processing operation is not performed. (a); (B) receiving a command from the master included in the baseband unit through the slave according to the ACK signal; Determining (c) whether the transferred command is a read command; And (d) reading data from a memory included in the I2C device and generating an ACK signal in the slave when the determination result is a read command. A recording medium having recorded thereon a program is provided.

The control bus may be an Inter-Integrated Circuit (I2C) bus.

The determining of whether the transferred command is a read command may be determined according to a type of an area next to an address area among areas constituting the command.

According to another aspect of the present invention, a communication apparatus using a control bus is provided.

According to an embodiment of the present invention, the baseband unit for transmitting a command through the control bus and reads the result of the execution of the command; And an I2C device that receives a command from the baseband unit and records a result of the execution of the command, wherein the baseband unit transmits the command when an acknowledgment signal is input from a slave included in the I2C device. A communication device using a control bus is provided.

The control bus may be an Inter-Integrated Circuit (I2C) bus.

When the command is delivered, the slave may output a negative-acknowledgement (NAK) signal to the baseband unit, and the I2C device causes the slave to output an ACK signal again when the transferred command is a read command. The baseband unit may read out corresponding data according to the ACK signal.

In addition, the I2C device may determine whether the read command is based on the type of the area next to the address area among the areas constituting the transferred command.

The I2C device may include a processor that performs an operation according to the received instruction.

The I2C device may include an I2C register map that records the execution result of the command.

As the invention allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. However, this is not intended to limit the present invention to specific embodiments, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention.

In the following description of the present invention, if it is determined that the detailed description of the related known technology may obscure the gist of the present invention, the detailed description thereof will be omitted.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another.

For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.

The term and / or includes a combination of a plurality of related items or any item of a plurality of related items.

When a component is referred to as being "connected" or "connected" to another component, it may be directly connected to or connected to that other component, but it may be understood that other components may be present in between. Should be.

On the other hand, when a component is said to be "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between.

The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention.

Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification, and one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art.

Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art, and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, and the same or corresponding components will be given the same reference numerals regardless of the reference numerals, and redundant description thereof will be omitted.

First, a configuration of a digital device including an I2C bus to which a communication method using a control bus according to an exemplary embodiment is applied will be described with reference to FIG. 3.

3 is a diagram illustrating a configuration of a digital device including an I2C bus to which a communication method using a control bus according to an exemplary embodiment of the present invention is applied.

As shown in FIG. 3, a digital device including an I2C bus to which a communication method using a control bus according to an exemplary embodiment of the present invention is applied may largely include a baseband unit 300 and an I2C device 310. have.

As described above, in the present specification, the I2C device 310 is a subordinate module connected to the baseband unit 300 via a control bus and controlled by a control signal received through the control bus. A device that communicates with them.

In addition, although referred to as the I2C device 310, a control bus other than the I2C bus may be used, and the name thereof may be changed, and preferably, a chip may be implemented instead of a device or device.

First, the baseband unit 300 may include a baseband processor 302, a memory 304, and an I2C master 306. The I2C device 310 may include an I2C slave 312, an I2C register map 314, and a processor. 316, memory 318.

The baseband processor 302 included in the baseband unit 300 is a logic circuit for processing and reacting basic instructions for operating the baseband unit 300.

The memory 304 of the baseband unit 300 may be roughly divided into two areas, an area in which the command executed in the baseband unit 300 is executed and an area used while the command is executed.

The memory for the area where the instruction is executed may be mainly in the form of flash or memory in the form of static random access memory (SRAM) or synchronous dynamic RAM (SDRAM). Memory in the form of SRAM or SDRAM may be used, but is not limited thereto.

The I2C master 306 is for communication with the I2C device and the transfer of instructions such as read or write is performed by the I2C master 306.

The I2C device 310 uses an I2C bus as a path for communication with the baseband unit 300, and the baseband unit 300 and the I2C device 310 are connected to each other through the I2C master 306 and the I2C slave 312. Connected.

The I2C register map 314 is a buffer for communication between the I2C master 306 and the I2C slave 312. The I2C register map 314 is a space for storing contents to be delivered or intended to be transmitted from the I2C master 306.

When the I2C master 306 transmits a command to the I2C slave 312, the I2C master 306 transmits data to be delivered together with address information to store the data, and the address information and data are stored in the I2C register map 314.

When the conventional I2C master 306 passes an instruction to the I2C slave 312, a specific value that indicates whether the I2C device 310 operates (e.g., instruction processing operation, etc.) first in the I2C register map 314. It is determined whether it is recorded in a specific area of the I2C register map 314 and the instruction is transmitted.

Such a specific value of the I2C register map 314 is called an I2C status register, and conventionally, the instruction is an I2C master 306 only when the value of the I2C status register is a specific value representing a state in which the I2C device 310 is not executing an instruction. To the I2C slave 312.

However, in the present invention, regardless of a specific value of the I2C register map 314, the I2C device 310 receives and executes an instruction using only an acknowledgment (ACK) or negative-acknowledgement (NAK) signal generated by the I2C slave 312. do.

In general, the ACK or NAK signal is an error detection signal and generates an ACK signal when a command or data is successfully received at the receiving side when the command or data is exchanged.

However, if the command or data is not properly received, it generates a NAK signal to retransmit the original command or data.

In the present invention, the command is transmitted to the I2C device 310 by using the ACK and NAK signals.

A process of receiving the command of the I2C device 310 using the ACK or NAK signal and performing the operation according to the received command will be described in detail with reference to FIGS. 4 and 5.

The processor 316 included in the I2C device 310 is a logic circuit for processing and reacting to basic instructions for the operation of the I2C device 310, and also processes instructions passed to the I2C slave 312.

Like the memory 304 included in the baseband unit 300, the memory 220 of the I2C device 310 may be largely divided into two regions: an region where an instruction is executed and an region used while the instruction is executed.

In addition, the memory for the region in which the instruction is executed may be used in the form of flash, or the memory in the form of static random access memory (SRAM) or the synchronous dynamic RAM (SDRAM). Memory in the form of SRAM or SDRAM may be used, but is not limited thereto.

On the other hand, in the portion where the read or write operation is performed as described above, the I2C device 310 generates an acknowledgment (ACK) signal to perform normal I2C communication.

On the other hand, generation of a negative-acknowledgement (NAK) signal indicates a case in which the I2C device 310 does not operate normally due to a problem.

In the present invention, only the ACK signal and the NAK signal can be used to transmit and execute a command to the I2C device 310 without reading the value of the conventional I2C status register.

To this end, first, the I2C device 310 outputs a NAK signal when the command is being executed, and when the I2C device 310 is not executing the command, it outputs an ACK signal.

That is, since the processing of the instruction in the I2C device 310 is performed by the processor 316 included in the I2C device 310, when the processor 316 is executing the instruction, the I2C slave 312 generates a NAK signal. .

On the other hand, when the processor 316 is not executing an instruction, the I2C slave 312 generates an ACK signal.

With reference to FIG. 4, a process of transferring a command by a communication method using a control bus according to an exemplary embodiment of the present invention using such a feature will be described.

4 is a flowchart illustrating a command transfer process in a digital device including an I2C bus to which a communication method using a control bus according to an embodiment of the present invention is applied.

As shown in FIG. 4, in the digital device including the I2C bus to which the communication method using the control bus according to the exemplary embodiment of the present invention is applied, first, an I2C device 310, an I2C device 310, is transmitted. More specifically, I2C slave 312 attempts to transfer the command (S400), and finally delivers the command only when the I2C slave 312 generates an ACK signal (S402).

On the other hand, if the I2C slave 312 does not generate an ACK signal (ie, generates a NAK signal), the command is again transmitted from the I2C master 306 to the I2C slave 312.

It can be seen that the process of transferring commands is simplified in the digital device including the I2C bus according to the present invention of FIG. 4 as compared with the process of transferring commands in the digital device including the conventional I2C bus of FIG. 1.

That is, the present invention basically uses the ACK / NAK signal only as a criterion for determining whether the current communication is possible or not, and determines whether the current I2C communication is processing a command coming through the I2C. It is used as a reference to simplify the process of delivering instructions in a digital device including an I2C bus.

On the other hand, the initial state of the I2C slave 312 is set to emit an ACK signal in response to the I2C command, and if one command is passed, the I2C slave 312 until the basic processing for the command is completed. ) Generates a NAK signal.

According to this method, since the I2C communication itself does not operate normally while the I2C device 310 processes one command, another command cannot be executed during the processing of the command, so that the I2C device 310 processes the normal command. Becomes possible.

When the processing of one command is completed, the I2C slave 312 is caused to generate an ACK signal, thereby making it possible to receive the next command.

On the other hand, when the command received through the I2C master 306 to perform the received command in the I2C device, the I2C slave 312 can be determined differently depending on the command rather than leaving the NAK state unconditionally.

When a command for reading data processed by the I2C device 310 is transmitted to the I2C slave 312, if the I2C slave 312 is left in the NAK state after receiving the command, the I2C master 306 and the I2C slave 312 are separated. This is because the I2C master 306 cannot read the desired data from the I2C register map 314 because communication is impossible.

On the other hand, in the case of receiving a command and processing data in the I2C device 310, for example, if a command such as writing is received, the I2C master 306 and I2C until the execution of the command is completed after receiving the command. Since no other communication is needed between the slaves 312, the I2C slave 312 may remain in the NAK state.

Therefore, when the command is received through the I2C bus, the I2C slave 312 is not continuously converted to the NAK state and is determined to determine whether the received command is a read command or a write command, so that the I2C master 306 and the I2C slave ( After the command transfer between 312), the N2 signal is continuously generated by the I2C slave 312 only in the write command that does not require other communication, and when the execution of the command is completed, the ACK signal is generated.

The process of causing the ACK / NAK signal to occur in the I2C slave 312 according to the received command will be described in more detail with reference to FIG. 5.

FIG. 5 is a diagram illustrating a communication process according to each command in a digital device including an I2C bus to which a communication method using a control bus according to an exemplary embodiment of the present invention is applied.

In FIG. 5, I2C Byte Write is an instruction to write one data through the I2C bus, and I2C Sequential Write is an instruction to continuously write several data through the I2C bus.

In addition, I2C Byte Write is a command that reads one data through the I2C bus, and I2C Sequential Write is a command that reads several data sequentially through the I2C bus.

In the communication process according to each command of FIG. 5, start parts are the same as Start / Device ID / Address.

As shown in FIG. 5, in the process of performing a data read or write command, the 'Device ID' and 'Address' parts indicate an identifier of a device to which data is to be transmitted or received and an address of the stored or stored data.

Meanwhile, in case of a write command (I2C Byte Write or I2C Sequential Write), 'Data' is located after the 'Address' part. Therefore, whether the I2C device 310 is a write command or a read command or 'Data' is located after 'Address'. Judge according to whether or not.

Therefore, in the 'Data' part, which is a process in which actual data is written, the N2 signal is selectively generated when the I2C device 310 is executing another command, and the ACK signal is selectively generated when the other command is not being executed.

On the other hand, in other parts, for example, 'Device ID' and 'Address' part, the ACK signal is always generated so that the NAK signal can be generated in the I2C slave 312 only in the write command.

By selectively generating an ACK signal and a NAK signal according to a command for processing data in the I2C device 310, the I2C device 310 without writing and reading a specific value in the I2C status register of the I2C register map 314. ) Command can be received and executed.

Preferred embodiments of the present invention described above are disclosed for purposes of illustration, and those skilled in the art will be able to make various modifications, changes, and additions within the spirit and scope of the present invention. Additions should be considered to be within the scope of the following claims.

As described above, according to the communication method and apparatus using the control bus according to the present invention, there is an advantage that no additional work for command transfer is required each time a command is transmitted in the communication of the control bus.

In addition, there is an advantage that the speed of the entire digital device including the control bus is not slowed down because the command can be simply transferred without additional work for command transfer.

Claims (15)

A method of communicating using a control bus to allow a baseband portion to be connected to an I2C device, (A) determining whether a slave included in the I2C device generates an acknowledgment (ACK) signal; And If the ACK signal occurs in the slave includes the step (b) of transmitting a command, The ACK signal is generated when the I2C device does not perform an operation corresponding to the command transmitted by the baseband unit. Claim 2 was abandoned when the setup registration fee was paid. The method of claim 1, The control bus is a communication method using a control bus, characterized in that the I2C (Inter-Integrated Circuit) bus. The method of claim 1, And the I2C device causes a NAK signal to be generated at the slave when the command is transmitted. The method of claim 3, If the transmitted command is a read command, the I2C device causes the slave to generate an ACK signal again. The master included in the baseband unit reads data in accordance with the ACK signal. The method of claim 4, wherein And the read data is data recorded in an I2C register map included in the I2C device. In order to perform a communication method with a baseband unit using a control bus, a program of instructions executable by the I2C device coupled to the baseband unit through the control busbar is tangibly implemented and can be read by the I2C device. In the recording medium on which a program is recorded, (A) controlling a slave included in the I2C device to output an acknowledgment (ACK) signal to the baseband unit when the command processing operation is not performed; (B) receiving a command from the master included in the baseband unit through the slave according to the ACK signal; Determining (c) whether the transferred command is a read command; And And (d) reading data from a memory included in the I2C device and generating an ACK signal in the slave in the case of the determination result as a read command. Recording medium that records the program. Claim 7 was abandoned upon payment of a set-up fee. The method of claim 6, The control bus is a recording medium for recording a program for implementing a communication method using a control bus, characterized in that the I2C (Inter-Integrated Circuit) bus. The method of claim 6, Step (c) is, And a program for implementing a communication method using a control bus, characterized in that it is determined according to the type of an area next to an address area among the areas constituting the command. A baseband unit which transmits a command through the control bus and reads a result of execution of the command; And An I2C device for receiving a command from the baseband unit and recording the result of the execution of the command, And the baseband unit transmits the command when an acknowledgment signal is input from a slave included in the I2C device. Claim 10 was abandoned upon payment of a setup registration fee. The method of claim 9, The control bus is a communication device using a control bus, characterized in that the I2C (Inter-Integrated Circuit) bus. The method of claim 9, And the slave outputs a NAK signal to the baseband unit when the command is transmitted. The method of claim 11, The I2C device causes the slave to output an ACK signal again when the transferred command is a read command, And the baseband unit reads corresponding data according to the ACK signal. The method of claim 12, And the I2C device determines whether the read command is a read command according to a type of an area next to an address area among areas constituting the transferred command. The method of claim 9, The I2C device is a communication device of a control bus, characterized in that it comprises a processor for performing an operation according to the received instruction. Claim 15 was abandoned upon payment of a registration fee. The method of claim 9, And the I2C device includes an I2C register map that records a result of the execution of the command.

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