KR100708872B1 - packaged integrated circuit device - Google Patents

Abstract

The disclosed packaged integrated circuit device has at least one pad formed on the active side and a conductive line connected to the inactive side along the side, the pad and the inactive side (side or opposite side of the active side). The connection is characterized in that through the redistribution substrate.

The packaged integrated circuit device having such a configuration enables assembly of the semiconductor substrate as a whole, productivity improvement, foreign material intrusion prevention, and miniaturization of the package. Especially, it is advantageous for the application of semiconductor products that operate by receiving physical signals from the outside. Can be provided.

Wafers, Sensors, Boards, Solders, Interconnects

Description

Packaged integrated circuit device

1 is a diagram illustrating a structure of a chip scale package using a conventional via hole.

2 illustrates a packaged integrated circuit device according to one embodiment of the invention.

3 illustrates a packaged integrated circuit device according to another embodiment of the present invention.

<Description of Symbols for Major Parts of Drawings>

200 ... Rewiring substrate 214 ... Dam projection

216 ... pattern protrusion 218 ... first metal layer

300 ... semiconductor substrate 302 ... active surface

304 ... Non-active 312 ... Receiver

314 ... pad 316 ... protective layer

318 ... Second Metal Layer 320 ... Hole

322 ... conductive lines 324 ... metal wiring

328 ... photosolder resistor 330 ... terminals

342 ... Epoxy

The present invention relates to a packaged integrated circuit device, and more particularly to at least one pad formed on the active surface and a conductive line connected to the inactive surface along the side surface, the pad and the inactive surface (side or And an opposite side of the active surface) to a packaged integrated circuit device made through a redistribution substrate.

In general, an integrated circuit (IC) refers to a package in which electronic circuit elements such as transistors, diodes, resistors, and capacitors are integrated on a semiconductor substrate with high density, and packaging is an individual package made by a wafer process. Refers to a process of electrically connecting chips to be used as real electronic components and sealing packaging to protect them from external impact.

Conventionally, such a packaged integrated circuit device attaches a chip made from a wafer to a chip support paddle, and electrically connects a lead frame which is an electrical connection terminal inside the chip and an electrical connection terminal of the package. It is connected by wires and has a structure sealed by a molding material such as plastic or ceramic to protect the chip and the electric wires in the package.

Recently, with the rapid development of the multimedia and telecommunications industry, there is an increasing demand for highly integrated and high performance semiconductor chips. Accordingly, the package rather than the semiconductor chip is manufactured due to the increase of connection terminals and reduction of chip size. Due to the problems caused by the physical and electrical characteristics of the package, a package is produced by a method of narrowing the gap between the chip's electrical connection terminal and the lead frame, which is an electrical connection terminal of the package.

In addition, the ball type of ball grid array (BGA) package, which is different from the conventional lead frame method, is increasing, and the chip size package (near the size of the chip where the package size is mounted) It is being developed in the form of a chip scale package (CSP).

In addition, a technology for electrically connecting an active surface and an inactive surface of a semiconductor substrate using a via hole penetrating the semiconductor substrate has been attempted.

The technique of electrically connecting the active surface and the inactive surface of the semiconductor substrate using a via hole penetrating the semiconductor substrate has been disclosed in Korean Patent Laid-Open No. 2001-0001159.

1 illustrates a structure of a chip scale package using a conventional via hole.

Referring to the drawings, a chip size package using a conventional via hole includes a semiconductor chip 110 having an inactive surface (lower surface in the publication) 116 opposite to an active surface 114 on which bonding pads 112 are formed; A conductive line 120 electrically connecting the active surface 114 and the inactive surface 116 and formed along side surfaces of the semiconductor chip 110; A metal wire 140 electrically connected to any bonding pads 112 through conductive lines 120 and forming ball pads corresponding to any bonding pads 112 on the non-active surface 116; Sealing means 130 for sealing the bonding pads 112, the metal wire 140, and the conductive line 120; And solder balls 150 formed on the ball pads, respectively, wherein the conductive line 120 uses via holes formed along the scribing line at the wafer level where the semiconductor chips 110 are provided. It is characterized by being formed.

However, the chip scale package using the conventional via hole connects the bonding pad and the conductive line with the bonding wire. Therefore, since the metal wiring is formed on the active surface of the semiconductor chip, there is a limitation in the fabrication of the highly integrated semiconductor device. In the manufacture of an optical sensor package, such as a charge coupled device (CCD) and a complementary metal oxide semiconductor (CMOS), there is a problem in that the use of a design is limited.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has been packaged and improved to electrically connect a pad formed on an active surface of a semiconductor substrate and a conductive line connected to an inactive surface using a redistribution substrate made separately. It is an object of the present invention to provide an integrated circuit device.

In addition, another object of the present invention is to provide a packaged integrated circuit device for preventing foreign matter from entering the sensor unit formed on the active surface of the semiconductor substrate by using a redistribution substrate formed with a dam protrusion.

According to an aspect of the present invention, there is provided a semiconductor device comprising: a semiconductor substrate having at least one pad formed on an active surface, and a conductive line connected to the inactive surface along a side thereof corresponding to the pad; And a redistribution substrate coupled to the semiconductor substrate to electrically connect the pad and the conductive line.

In addition, the present invention for achieving the above object, has an inactive surface on the opposite side of the active surface, an optical sensor and at least one pad is formed on the active surface, the conductive ( A semiconductor substrate formed with an electrostatic line corresponding to the pad; And a redistribution substrate coupled to the semiconductor substrate to electrically connect the pad and the conductive line.

Here, the conductive line is formed using a hole or a portion of the hole penetrating the semiconductor substrate, the hole is preferably formed by any one of a drill (drill) or etching (etching) method.

The conductive line may include tungsten (W), titanium (Ti), aluminum (Al), zirconium (Zr), chromium (Cr), copper (Cu), gold (Au), silver (Ag), and lead (Pb). Indium tin oxide (ITO) and nickel (Ni) is preferably formed to include at least one.

In addition, the semiconductor substrate may have a terminal connected to an electrical circuit of an external printed circuit board (PCB) on an inactive surface thereof, and the conductive line may be electrically connected to the terminal. The terminal is preferably a solder ball connecting the metal to the metal or the terminal is a solder pad connecting the metal to the metal.

In addition, a side surface of the semiconductor substrate may include a terminal electrically connected to an external printed circuit board (PCB) including a pad, and the conductive line may be electrically connected to the terminal. The terminal is preferably soldered to the pad of the printed circuit board.

Further, titanium (Ti), copper (Cu), and nickel (Ni) are formed on a seed layer made of any one of chromium (Cr), titanium (Ti), and titanium tungsten (TiW) between the conductive line and the terminal. , Gold (Au) material order or chromium (Cr), copper (Cu), nickel (Ni), gold (Au) material order, titanium tungsten (TiW), nickel (Ni) material order It is preferable to further include a metal wiring formed by plating (Pattern Plating).

In addition, the metal wiring may be patterned or patterned by laser trimming as a photoresist is applied and patterned, and then the terminal is sealed with a sealing means in a mounted state.

In addition, the semiconductor substrate and the conductive line may be molded with a thermosetting polymer compound (ex: epoxy).

In addition, the redistribution substrate may have a pair of pattern protrusions contacting the pad and the conductive line, respectively, on one surface thereof, and the pair of pattern protrusions may be coated with a first metal layer. It is preferred to be formed of a metal layer based on Al).

In addition, the first metal layer is chromium (Cr), copper (Cu), titanium (Ti) material order, titanium (Ti), copper (Cu), nickel (Ni) material order, chromium (Cr), copper (Cu) , Nickel (Ni) material order or titanium (Ti), tungsten (W), nickel (Ni) material order is formed by coating any one material, each material is preferably applied to a thickness of 50 ~ 25um.

In addition, the first metal layer is preferably applied by any one of a deposition method, a sputtering method, a plating method, an electroless plating method, a screen printing method and an ink printing method.

In addition, the redistribution substrate may further include a dam protrusion that prevents foreign matter from entering the optical sensor.

The pattern protrusion and the dam protrusion may be formed by patterning a polymer compound (ex: polyimide).

In addition, the upper portion of the pad, the conductive line and the portion where the dam protrusion contacts the pattern protrusion may be coated with a second metal layer, and the second metal layer may be gold (Au), nickel (Ni), aluminum (Al), and copper. It is preferable that any one of (Cu) is formed by apply | coating to 100 micrometers-5um thickness.

In addition, the redistribution substrate may be a glass substrate including an indium tin oxide (ITO) material.

Finally, it is preferable that the semiconductor substrate and the redistribution substrate be coated with one of an anisotropic conductive epoxy and a nano interconnect paste material.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 illustrates a packaged integrated circuit device according to an embodiment of the present invention. Referring to the drawings, a packaged integrated circuit device according to an embodiment of the present invention may include a semiconductor substrate 300 and a redistribution substrate 200.

The semiconductor substrate 300 is a thin substrate having a thickness of 50 to 150 um made of single crystal silicon and may be a substrate having an active surface and an inactive surface (side or opposite surface of the active surface). On the active surface 302 of the semiconductor substrate 300, a plurality of pads 314 acting as electrical connection terminals are formed, and conductive lines 322 connected to the non-active surface 304 along the side surface thereof are pads. It is preferable to form a plurality in correspondence with 314.

The pad 314 may be formed of a material including aluminum (Al). For example, the pad 314 may be formed of only aluminum (Al) material, or may be formed of an alloy material of aluminum (Al) and copper (Cu).

The conductive line 322 is an external lead terminal 330, that is, a printed circuit board (PCB) that may be formed on the inactive side (side or opposite side of the active side) 304 of the semiconductor substrate 300. It is electrically connected to a terminal connected to an external electrical circuit. The terminal 330 may be a solder ball, a solder pad, or a contact pad connecting the metal to the metal.

The conductive line 322 may be formed of a metal or a highly conductive nonmetallic material. For example, the conductive lines 322 include tungsten (W), Ti (titanium), aluminum (Al), zirconium (Zr) chromium (Cr), copper (Cu), nickel (Ni), gold (Au), and silver. (Ag), lead (Pb) and indium tin oxide (ITO) may be formed to include a metal material, preferably chromium, copper, nickel may be formed in order.

The conductive line 322 may be a printed circuit board (PCB) using a via hole 320 or a part of the via hole 320 penetrating the semiconductor substrate 300, depending on the precision of soldering technology. It may be formed to enable soldering (soldering).

In this case, the hole 320 may be formed by a drill method such as a laser drill or a mechanical drill, and an etching method such as dry etching or reactive ion etching using plasma. Can be formed.

When the hole 320 is formed using an etching method, a cross-linkable thermosetting polymer compound 342 between the semiconductor substrate 300 and the conductive line 322, for example, epoxy It is preferable to be molded in, for example, which is a packaged integrated circuit device according to another embodiment of the present invention, having the structure shown in FIG. Referring to the drawings, it has the same structure as that of a packaged integrated circuit device according to an embodiment of the present invention shown in FIG. 2 except that it is molded with epoxy 342.

The connection between the conductive line 322 and the terminal 330 may be generally made of a metal having high adhesion such as silicon and chromium (Cr), titanium (Ti), tungsten (W), and the like. It may be implemented as a metal layer structure of a composite composition of other metals. For example, nickel (Ni) and a gold (Au) layer may be used for solder wetting as a tin diffusion barrier.

When the connection between the conductive line 322 and the terminal 330 is made of a composite metal layer, the composite metal layer may be an adhesion layer or seed made of chromium (Cr), titanium (Ti), or titanium tungsten (TiW). A layer may be formed, and the metal line 324 may be formed by pattern plating a metal material having excellent conductivity and thermal conductivity on the formed seed layer.

The metal wire 324 is made of titanium (Ti), copper (Cu), nickel (Ni), gold (Au) material order or chromium (Cr), copper (Cu), nickel (Ni), gold (Au) material order. It may be formed by pattern plating in the order of titanium tungsten (TiW), nickel (Ni) material or the like.

When the photoresist is used when the metal line 324 is formed, the photoresist may be used as a sealing means after the terminal 330 is mounted. For example, the metal wire 324 may be coated with a photoresist, patterned together with a photoresist patterned by a photoresist, a mask, a laser, or the like, and then a terminal 330 such as solder balls. ) Is preferably sealed with a sealing means such as a photo solder resister (PSR) 328 in a mounted state. The metallization 324 may be patterned by laser trimming.

The redistribution substrate 200 serves to electrically connect the pad 314 and the conductive line 322 formed on the semiconductor substrate 300 and is the most characteristic component in the spirit of the present invention.

In other words, the packaged integrated circuit device according to the embodiment of the present invention, unlike the prior art, the pad 314 and the conductive line 322 formed on the active surface 302 of the semiconductor substrate 300 (which is Electrical connection of the terminal mounted on the inactive surface side of the semiconductor substrate) is not made by wiring or wire bonding formed on the active surface 302 of the semiconductor substrate 300, but is grown separately from the semiconductor substrate 300. It is characterized by being made using the line substrate 200.

The redistribution substrate 200 may be an inorganic material having a good light transmittance, for example, a substrate made of glass or quartz, and may be a substrate including indium tin oxide (ITO). Although not limited thereto, other materials such as ceramics or semiconductors may be used as long as the pad 314 formed on the semiconductor substrate 300 and the conductive line 322 may be electrically connected to each other. Or any other material.

The redistribution substrate 200 may electrically connect the pad 314 and the conductive line 322 of the semiconductor substrate 300 to the pad 314 and the conductive line 322 on one surface of the semiconductor substrate 300, according to an exemplary embodiment. Each of the pattern protrusions 216 in contact with each other is formed, and the pattern protrusions 216 have a structure coated with the first metal layer 218 and are coupled to the semiconductor substrate 300 in an aligned state. Do.

That is, the pad 314 and the conductive line 322 are electrically connected to each other through the first metal layer 218 applied to the pair of pattern protrusions 216.

The first metal layer 218 is a chromium (Cr), copper (Cu), titanium (Ti) material order, titanium (Ti), copper (Cu), nickel (Ni) material order, chromium (Cr), copper (Cu ), Nickel (Ni) material order or titanium (Ti), tungsten (W), nickel (Ni), gold (Au) material order, such as material order may be formed and applied.

Each metal material can be applied to a thickness of 50 kPa to 20 um as needed, preferably in the order listed, the first metal material is applied to a thickness of 100 kPa to 2 um and the second metal material is 100 kPa to 5 um thick. The third metal material may be applied to a thickness of 100 μm to 20 μm.

The coating method of the first metal layer 218 may be a deposition method, a sputtering method, a plating method, an electroless plating method, a screen printing method, or an ink printing method.

The packaged integrated circuit device according to the exemplary embodiment of the present invention may be an optical sensor package including a light receiver 312 composed of an image array and a micro lens.

In this case, the light receiving unit 312 is formed on the active surface 302 of the semiconductor substrate 300, the dam projection 214 to prevent foreign matter from entering the light receiving unit 312 in the redistribution substrate 200. May be further formed.

The pattern protrusion 216 and the dam protrusion 214 may be formed by patterning an organic polymer compound such as polyimide.

On the other hand, the active surface 302 of the semiconductor substrate 300 is coated with a passivation film 316 consisting of silicon oxide (SiO _x ) or silicon nitride (SiN _x ), wherein the protective film 316 is a light receiving part 312, the pad 314 and the conductive line 322 are preferably applied to expose the normal operation.

In a state where the semiconductor substrate 300 and the redistribution substrate 200 are aligned and coupled, an upper portion of the pad 314 to which the pattern protrusion 216 is in contact with the conductive line 322 and the dam protrusion 214 are in contact with each other. A portion of the passivation layer 316 may be applied to the second metal layer 318.

The second metal layer 318 may be a metal layer made of the same material as the first metal layer 218 or a combination of other metals, preferably, gold (Au), nickel (Ni), or aluminum (Al). ) Or copper (Cu) may be formed by coating in a thickness of 1 to 3um.

More preferably, the metal layer formed by coating the gold (Au), nickel (Ni), aluminum (Al), or copper (Cu) has a strong oxidation resistance such as gold (Au) or a conductive oxide film such as tin (Sn). It is preferable that the metal to be formed is further applied to a thickness of 100 kPa to 5 um.

As described above, the packaged integrated circuit device of the present invention provides the following effects.

First, by electrically connecting the pads formed on the active surface of the semiconductor substrate and the conductive lines connected to the non-active surface using a redistribution substrate, the design availability and productivity of the integrated circuit device is improved, and the package is miniaturized. It can be implemented, and in particular, it provides an advantageous effect for the application of semiconductor products that operate by receiving a physical signal from the outside.

Second, by preventing the intrusion of foreign matter into the sensor unit formed on the active surface of the semiconductor substrate by using the redistribution substrate formed with the dam protrusion, to improve the performance and reliability of the sensor package, such as a charge coupled device (CCD) It provides an effect that can be improved.

It is to be understood that the invention is not limited to that described above and illustrated in the drawings and that many more modifications and variations are possible within the scope of the following claims.

Claims (31)

delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete An active surface and an inactive surface opposite the active surface, an optical sensor and at least one pad are formed on the active surface, and a conductive line connected to the inactive surface along the side thereof corresponds to the pad. A formed semiconductor substrate; And Packaged characterized in that it comprises a redistribution substrate having a dam protrusion for preventing foreign matter from entering the optical sensor, coupled to the semiconductor substrate to electrically connect the pad and the conductive line. Integrated circuit devices. The method of claim 23, wherein The redistribution substrate is packaged integrated circuit device, characterized in that the pattern projections in contact with each of the pad and the conductive line are formed in pairs on one surface, the pair of pattern projections are coated with a first metal layer. The method of claim 23, wherein And wherein the pad is formed of a metal layer based on aluminum (Al). The method of claim 24, The first metal layer is chromium (Cr), copper (Cu), titanium (Ti) material order, titanium (Ti), copper (Cu), nickel (Ni) material order, chromium (Cr), copper (Cu), nickel (Ni) material and titanium (Ti), tungsten (W), nickel (Ni) material is applied in any one of the order of the material is formed, the package is characterized in that each material is applied in a thickness of 50 ~ 25um Integrated circuit devices. delete The method of claim 24, And the pattern protrusion and the dam protrusion are formed by patterning a polymer compound. The method of claim 28, The packaged integrated circuit device, wherein the upper portion of the pad, the conductive line, and the portion where the dam protrusion contacts the pattern protrusion are coated with a second metal layer. The method of claim 29, The second metal layer is a packaged integrated circuit device, characterized in that any one of gold (Au), nickel (Ni), aluminum (Al) and copper (Cu) is formed by applying a thickness of 100 ~ 5um. The method of claim 23, wherein The redistribution substrate is a packaged integrated circuit device, characterized in that the glass substrate comprising a glass (Indium tin Oxide) (ITO) material.

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