KR100310468B1 - Method for forming metal barrier film of semiconductor device - Google Patents
Method for forming metal barrier film of semiconductor device Download PDFInfo
- Publication number
- KR100310468B1 KR100310468B1 KR1019940016350A KR19940016350A KR100310468B1 KR 100310468 B1 KR100310468 B1 KR 100310468B1 KR 1019940016350 A KR1019940016350 A KR 1019940016350A KR 19940016350 A KR19940016350 A KR 19940016350A KR 100310468 B1 KR100310468 B1 KR 100310468B1
- Authority
- KR
- South Korea
- Prior art keywords
- film
- titanium
- barrier metal
- oxygen
- forming
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76867—Barrier, adhesion or liner layers characterized by methods of formation other than PVD, CVD or deposition from a liquids
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Manipulation Of Pulses (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
제 1 도는 본 발명의 일실시예에 따른 장벽금속막 형성 공정 단면도,1 is a cross-sectional view of a barrier metal film forming process according to an embodiment of the present invention;
제 2 도는 본 발명의 다른 실시예에 따른 장벽금속막 형성 공정 단면도.2 is a cross-sectional view of a barrier metal film forming process according to another embodiment of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : Ti막 2 : TiN막1: Ti film 2: TiN film
3 : TiNO막3: TiNO film
본 발명은 반도체 소자 제조 공정 중 소자간의 전기적 연결을 위한 금속배선 형성 방법에 관한 것으로, 특히 반도체 소자의 장벽금속막 형성 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming metal wirings for electrical connection between devices in a semiconductor device manufacturing process, and more particularly, to a method of forming a barrier metal film of a semiconductor device.
일반적으로, 얕은 접합(shallow junction)을 갖는 서브마이크론(sub-micron)급 소자 제조시 접합 스파이킹(junction spiking) 현상 방지 및 콘택에서의 저항개선을 위하여 알루미늄합금과 함께 장벽금속막을 형성하고 있다.In general, barrier metal films are formed together with aluminum alloys to prevent junction spiking and to improve resistance in contacts when manufacturing sub-micron class devices having shallow junctions.
한편, 종래에는 장벽금속막을 티타늄/질화티타늄(Ti/TiN)의 이중구조로 형성한다. 상기 질화티타늄막은 하부막과 상부막 사이에서 원자들의 이동을 차단해 주는 확산장벽(Diffusion Barrier)으로 사용되는데, 그 목적을 완전하게 하기 위해서 질화티타늄에서 Ti : N의 조성비가 정확히 1대 1이 되어야만 한다. 그러나, 현재의 스퍼터링 장비로는 조성비를 정확히 1 대 1로 하기가 어려운 실정이다.On the other hand, the barrier metal film is conventionally formed in a double structure of titanium / titanium nitride (Ti / TiN). The titanium nitride film is used as a diffusion barrier to block the movement of atoms between the lower layer and the upper layer. In order to complete the purpose, the composition ratio of Ti: N in titanium nitride must be exactly one to one. do. However, with the current sputtering equipment, it is difficult to make the composition ratio exactly one to one.
또한, 질화티타늄막은 다공질막인 까닭에 막내에 많은 틈(vacancy)이 있어 원자들이 이동을 차단해 주는데 효과적이지 못하다.In addition, since the titanium nitride film is a porous film, there is a lot of vacancy in the film, which is not effective for blocking atoms from moving.
따라서, 상기와 같은 문제점을 해결하기 위하여 안출된 본 발명은 장벽금속막 형성시 다공질이 없는 조밀한 구조를 갖도록 함으로써 원자들의 이동이 어렵도록 하는 반도체 소자의 장벽금속막 형성 방법을 제공하는데 그 목적이 있다.Accordingly, an object of the present invention is to provide a method for forming a barrier metal film of a semiconductor device, which makes it difficult to move atoms by having a dense structure without pores when forming the barrier metal film. have.
상기 목적을 달성하기 위하여 본 발명은 장벽금속막을 이룰 티타늄막을 형성하는 단계; 상기 티타늄막 내에 산소를 이온주입하는 단계; 및 질소(N2) 분위기에서 열처리를 실시하여 티타늄-질소-산소(Ti-N-O) 구조의 장벽금속막을 형성하는 단계를 포함하는 반도체 소자의 장벽금속막 형성 방법을 제공한다.In order to achieve the above object, the present invention comprises the steps of forming a titanium film to form a barrier metal film; Ion implanting oxygen into the titanium film; And forming a barrier metal film having a titanium-nitrogen-oxygen (Ti-NO) structure by performing heat treatment in a nitrogen (N 2 ) atmosphere.
본 발명은 장벽금속막으로 조밀한 구조를 갖는 티타늄-질소-산소(Ti-N-O) 구조의 막을 형성함으로써 원자들의 이동을 어렵게 하여 확산장벽으로서의 역할을 훌륭히 수행하도록 하는데 그 특징이 있다.The present invention has a feature of making a titanium-nitrogen-oxygen (Ti-N-O) structured film having a dense structure as a barrier metal film, thereby making it difficult to move atoms and performing a role as a diffusion barrier.
본 발명의 실시예에 따른 Ti-N-O 구조의 조밀한 장벽금속막 형성 방법을 첨부된 도면을 참조하여 설명한다.Dense barrier metal film formation method of the Ti-N-O structure according to an embodiment of the present invention will be described with reference to the accompanying drawings.
이하, 제 1a 도 내지 제 1c 도를 참조하여 본 발명의 제1 실시예에 따른 장벽금속막 형성 방법을 설명한다.Hereinafter, a method of forming a barrier metal film according to a first embodiment of the present invention will be described with reference to FIGS. 1A to 1C.
먼저, 제 1a 도에 도시한 바와 같이 기판(도시하지 않음) 상에 700Å 두께 이상의 티타늄막(1)을 형성한다.First, as shown in FIG. 1A, a titanium film 1 having a thickness of 700 GPa or more is formed on a substrate (not shown).
다음으로, 제 1b 도에 도시한 바와 같이 산소 이온주입 시스템으로 티타늄막(1)의 중간 위치에 산소를 이온주입한다.Next, as shown in FIG. 1B, oxygen is ion implanted in the intermediate position of the titanium film 1 by the oxygen ion implantation system.
다음으로, 제 1c 도에 도시한 바와 같이 N2분위기에서 열처리를 실시하여 티타늄-질소-산소(Ti-N-O) 구조의 장벽금속막(3)을 형성한다. 이때, 고속열공정(Rapid Thermal Process : RTP)의 경우는 660℃ 이상의 온도에서, 공정로(furnace) 경우는 450℃ 이상의 온도에서 열공정을 진행하게 되면 N2분위기에서 열처리하는 동안 티타늄막 속의 산소 원자들의 일부는 바닥으로 확산되고 일부는 표면으로 확산되어 티타늄막 전체에 산소가 침투하게 된다. 또한, N2분위기에서 열처리하게 되므로 질소 원자들이 티타늄막 속으로 확산되어 결국은 티타늄-질소-산소 구조를 갖는 장벽금속막을 형성할 수 있다.Next, as shown in FIG. 1C, a heat treatment is performed in an N 2 atmosphere to form a barrier metal film 3 having a titanium-nitrogen-oxygen (Ti-NO) structure. In this case, when the thermal process is performed at a temperature of 660 ° C. or higher in the case of a rapid thermal process (RTP) or at a temperature of 450 ° C. or higher in the furnace, the oxygen in the titanium film is heat treated in an N 2 atmosphere. Some of the atoms diffuse to the bottom and some diffuse to the surface, allowing oxygen to penetrate the entire titanium film. In addition, since the heat treatment is performed in an N 2 atmosphere, nitrogen atoms may diffuse into the titanium film to eventually form a barrier metal film having a titanium-nitrogen-oxygen structure.
이와 같이 티타늄-질소-산소 구조를 갖는 장벽금속막을 형성할 때 주의할 점은 산소 원자들이 장벽금속막 내에 너무 많이 존재하게 되면 장벽금속막의 저항을 높이게 되어 소자에 악영향을 끼칠 우려가 있으므로 10% 미만의 소량의 산소만이 존재할 수 있도록 이온주입시 도즈량을 적절히 조절하는 것이 중요하다.When forming a barrier metal film having a titanium-nitrogen-oxygen structure as described above, care should be taken when less than 10% of oxygen atoms are present in the barrier metal film, which increases the resistance of the barrier metal film and may adversely affect the device. It is important to properly adjust the dose during ion implantation so that only a small amount of oxygen is present.
첨부된 도면 제 2a 도 내지 제 2c 도는 본 발명의 제2 실시예에 따른 장벽금속막 형성 방법을 보이는 공정 단면도이다.2A through 2C are cross-sectional views illustrating a method of forming a barrier metal film according to a second embodiment of the present invention.
제1 실시예에서는 티타늄막 내에 산소가 이온주입되는데 반해 제2 실시예에서는 질화티타늄막(2) 상부에 산소가 이온주입되는 차이점 외에는 제1 실시예와 동일하므로 보다 상세한 설명은 생략한다.Oxygen is ion-implanted in the titanium film in the first embodiment, whereas in the second embodiment is the same as in the first embodiment except that oxygen is ion-implanted on the titanium nitride film 2, and thus, detailed description thereof will be omitted.
이하, 본 발명의 제3 실시예에 따른 장벽금속막 형성 방법을 설명한다.Hereinafter, a method of forming a barrier metal film according to a third embodiment of the present invention will be described.
티타늄-질소-산소 구조를 갖는 장벽금속막을 형성하는 또 다른 하나의 방법은 스퍼터링(sputtering) 방법으로 질화티타늄막을 형성하는 공정에서 아르곤(Ar) 가스, 질소(N2) 가스 및 산소(O2) 가스를 챔버 내로 유입시켜서, 질화티타늄막의 틈새로 산소 원자들이 채워질 수 있도록 하는 방법이다. 이때 가장 중요한 것은 O2가스를 5 sccm 미만으로 조절하는 것으로써, 그 이유는 상기 언급한 바와 같이 너무 많은 양의 산소가 질화티타늄막 속에 존재하게 되면 면저항(Rs)이 증가되어 소자의 특성을 저하시킬 우려가 있기 때문이다.Another method of forming a barrier metal film having a titanium-nitrogen-oxygen structure is argon (Ar) gas, nitrogen (N 2 ) gas and oxygen (O 2 ) in a process of forming a titanium nitride film by sputtering. A gas is introduced into the chamber so that oxygen atoms can be filled in the gap of the titanium nitride film. In this case, the most important thing is to control the O 2 gas to less than 5 sccm, because, as mentioned above, when too much oxygen is present in the titanium nitride film, the sheet resistance (R s ) is increased to improve the characteristics of the device. This is because there is a risk of lowering.
상기한 바와 같이 여러 가지 용이한 방법으로 형성될 수 있는 티타늄-질소-산소 구조를 갖는 장벽금속막은 다공질이 없는 조밀한 구조이기 때문에 원자들의 이동이 어려워 확산장벽으로서의 역할을 총족시킬 수 있다. 아울러 얇은 두께로도 우수한 장벽역할을 기대할 수 있어 막 자체의 스트레스도 완화시킬 수가 있으며, 또한 서브-마이크론급의 얕은 접합에서도 접합누설전류(Junction Leakage Current)에 안정한 효과를 얻을 수 있다.As described above, the barrier metal film having a titanium-nitrogen-oxygen structure, which can be formed by various easy methods, has a porous, dense structure, and thus, atoms are difficult to move, thereby fulfilling their role as diffusion barriers. In addition, it can be expected to be excellent barrier role even in the thin thickness to relieve the stress of the film itself, and can also obtain a stable effect on the junction leakage current in the sub-micron shallow junction.
이상에서 설명한 본 발명은 전술한 실시예 및 첨부된 도면에 의해 한정되는 것이 아니고, 본 발명의 기술적 사상을 벗어나지 않는 범위 내에서 여러 가지 치환, 변형 및 변경이 가능하다는 것이 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자에게 있어 명백할 것이다.The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made in the art without departing from the technical spirit of the present invention. It will be apparent to those of ordinary knowledge.
Claims (2)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940016350A KR100310468B1 (en) | 1994-07-07 | 1994-07-07 | Method for forming metal barrier film of semiconductor device |
GB9513938A GB2291264B (en) | 1994-07-07 | 1995-07-07 | Method for forming a metallic barrier layer in semiconductor device and device made by the method |
CN95109193A CN1062978C (en) | 1994-07-07 | 1995-07-07 | Method for forming a metallic barrier layer in semiconductor device |
US08/499,791 US5877031A (en) | 1994-07-07 | 1995-07-07 | Method for forming a metallic barrier layer in semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940016350A KR100310468B1 (en) | 1994-07-07 | 1994-07-07 | Method for forming metal barrier film of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960005868A KR960005868A (en) | 1996-02-23 |
KR100310468B1 true KR100310468B1 (en) | 2001-12-15 |
Family
ID=37530931
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940016350A KR100310468B1 (en) | 1994-07-07 | 1994-07-07 | Method for forming metal barrier film of semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR100310468B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101064679B1 (en) | 2009-03-09 | 2011-09-15 | 울산대학교 산학협력단 | Transparent electrode |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100540587B1 (en) * | 2002-08-10 | 2006-01-10 | 양원동 | Water pressure type massage machine |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0465824A (en) * | 1990-07-06 | 1992-03-02 | Fujitsu Ltd | Manufacture of semiconductor device |
JPH04320029A (en) * | 1991-04-18 | 1992-11-10 | Oki Electric Ind Co Ltd | Manufacture of semiconductor device |
JPH056865A (en) * | 1991-06-27 | 1993-01-14 | Sanyo Electric Co Ltd | Manufacture of semiconductor device |
-
1994
- 1994-07-07 KR KR1019940016350A patent/KR100310468B1/en not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0465824A (en) * | 1990-07-06 | 1992-03-02 | Fujitsu Ltd | Manufacture of semiconductor device |
JPH04320029A (en) * | 1991-04-18 | 1992-11-10 | Oki Electric Ind Co Ltd | Manufacture of semiconductor device |
JPH056865A (en) * | 1991-06-27 | 1993-01-14 | Sanyo Electric Co Ltd | Manufacture of semiconductor device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101064679B1 (en) | 2009-03-09 | 2011-09-15 | 울산대학교 산학협력단 | Transparent electrode |
Also Published As
Publication number | Publication date |
---|---|
KR960005868A (en) | 1996-02-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100243286B1 (en) | Method for manufacturing a semiconductor device | |
US6291344B1 (en) | Integrated circuit with improved contact barrier | |
KR100310468B1 (en) | Method for forming metal barrier film of semiconductor device | |
JPH0691094B2 (en) | Method for manufacturing semiconductor device | |
KR19990060904A (en) | Method of forming diffusion barrier in semiconductor device | |
JPH0226051A (en) | Manufacture of semiconductor device | |
US5877031A (en) | Method for forming a metallic barrier layer in semiconductor device | |
KR970007175B1 (en) | Metal wiring method for semiconductor device | |
JPH0226052A (en) | Semiconductor device | |
KR940010194A (en) | Wiring layer formation method of semiconductor device | |
KR960002081B1 (en) | Making method of semiconductor device with shallow junction | |
KR960008567B1 (en) | Silicide layer forming method | |
KR100541705B1 (en) | Method for fabricating semiconductor device | |
KR100224650B1 (en) | Method of manufacturing a semiconductor device | |
KR920004777B1 (en) | Anti-diffusion method of impurity material in contact window | |
KR100399957B1 (en) | Method for manufacturing semiconductor device | |
JPS63175420A (en) | Manufacture of semiconductor device | |
KR910006090B1 (en) | Metalic multi-layer wireing method | |
KR100694971B1 (en) | Method for forming a Junction region of a semiconductor device | |
KR100342824B1 (en) | Method for manufacturing semiconductor device | |
JPS62137823A (en) | Annealing method for compound semiconductor substrate | |
KR100381865B1 (en) | Method for manufacturing thin film transistor(tft) substrate for liquid crystal display(lcd) | |
KR0168153B1 (en) | Forming method of titanium silicide layer | |
KR20000026197A (en) | Method for reinforcing characteristics of barrier metal by ion injection | |
KR20060037776A (en) | Method for fabricating semiconductor device with gate spacer by ald |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20090828 Year of fee payment: 9 |
|
LAPS | Lapse due to unpaid annual fee |